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Lane Westlund
MSP430 Applications Engineer
Texas Instruments
© 2006 Texas Instruments Inc, Slide 1
Agenda
• Analog measurements with the MSP430
Comparator, ADC10, ADC12, SD16, SD16_A
• References CAEX
and externally +
+
CCI1B
set CAIFG
selectable by 0V VCC
Flag
software CAON
multiplexer
• One interrupt 0.5xVCC
D
G S
t_NTC
V
C x ln CAREF
R_NTC Vcc t_NTC
= R_NTC = 10k x
10k t_10k t_10k
VCAREF
C x ln
Vcc
AUTO
Data2
ADC Data1
DTC Data0
Data2
//
// Software
Software //
// Autoscan
Autoscan ++ DTC
DTC
Res[pRes++]
Res[pRes++] == ADC10MEM;
ADC10MEM; _BIS_SR(CPUOFF);
_BIS_SR(CPUOFF);
ADC10CTL0
ADC10CTL0 &=
&= ~ENC;
~ENC;
if (pRes < NR_CONV)
if (pRes < NR_CONV)
{{
CurrINCH++;
CurrINCH++;
if
if (CurrINCH
(CurrINCH ==== 3)
3)
CurrINCH
CurrINCH == 0;
0;
ADC10CTL1
ADC10CTL1 &=
&= ~INCH_3;
~INCH_3;
ADC10CTL1 |= CurrINCH;
ADC10CTL1 |= CurrINCH;
ADC10CTL0
ADC10CTL0 |=
|= ENC+ADC10SC;
ENC+ADC10SC;
}}
• 16 memory buffer
• Each interrupt capable
• Each DMA enabled
© 2006 Texas Instruments Inc, Slide 12
Conversion Sequences
ADC12MEMa 0 SREFx INCHx
ADC12MEMb 0 SREFx INCHx
ADC12MEMc 0 SREFx INCHx
ADC12MEMd 1 SREFx INCHx
• Single or repeat
• Flexible channel selection
• Complete conversion timing control
ADC
//
// Interrupt
Interrupt CPU
CPU cycles
cycles
;; MSP430
MSP430 ISR
ISR to
to start
start conversion
conversion 66
BIS
BIS #ADC12SC,&ADC12CTL0
#ADC12SC,&ADC12CTL0 ;; Start
Start conversion
conversion 55
RETI
RETI ;; Return
Return 55
;; 16
16
• fM divider Temp.
A5
sensor
• Up to 1024 OSR
V ref / 2
V FSR =
GAIN PGA
+0.015V
0V
-0.015V
0.2
1.
0
Conversion
VREF 0 VREF 0
1.2V AVCC 1.2V AVCC
1 1
AVSS AVSS
Internal Internal
External Only
SD16VMIDON SD16VMIDON
Reference Reference
SD16VMIDON = 0
SD16VMIDON = 1
• CVREF = 470nF
• Ref buffer = +100x faster
reference settling
• Disable once settled
© 2006 Texas Instruments Inc, Slide 26
SD16 Data
while(1)
while(1)
{{
ADC12CTL0
ADC12CTL0 |=
|= _______;
_______; //
// Start
Start conversion
conversion
• Available clocks:
ACLK (32.768 kHz)
SMCLK (1MHz)
ADC internal OSC:
ADC12CTL0
ADC12CTL0 == ADC12ON
ADC12ON ++ REFON
REFON ++ REF2_5V
REF2_5V ++ SHT0_7;
SHT0_7;
ADC12CTL1
ADC12CTL1 == SHP;
SHP;
© 2006 Texas Instruments Inc, Slide 34
ADC Lab - Defaults
• ADC12CTL1
ADC12MCTL0
ADC12MCTL0 == INCH_10
INCH_10 ++ SREF_1;
SREF_1;
© 2006 Texas Instruments Inc, Slide 36
ADC Lab – Final code
ADC12CTL0
ADC12CTL0 == ADC12ON
ADC12ON ++ REFON
REFON ++ REF2_5V
REF2_5V ++ SHT0_7;
SHT0_7;
//
// Setup
Setup ADC12,
ADC12, ref.,
ref., sampling
sampling time
time
ADC12CTL1
ADC12CTL1 == SHP;
SHP; //
// Use
Use sampling
sampling timer
timer
ADC12MCTL0
ADC12MCTL0 == INCH_10
INCH_10 ++ SREF_1;
SREF_1; //// Select
Select channel
channel A10,
A10, Vref+
Vref+
ADC12IE
ADC12IE == 0x01;
0x01; //
// Enable
Enable ADC12IFG.0
ADC12IFG.0
for
for (i
(i == 0;
0; ii << 0x3600;
0x3600; i++);
i++); //
// Delay
Delay for
for reference
reference start
start
ADC12CTL0
ADC12CTL0 |= |= ENC;
ENC; //
// Enable
Enable conversions
conversions
__enable_interrupt();//
__enable_interrupt();// Enable Enable interrupts
interrupts
while(1)
while(1)
{{
ADC12CTL0
ADC12CTL0 |=
|= ADC12SC;
ADC12SC; //
// Start
Start conversion
conversion
ADC10 8 34 200+ 10 57 Vss to Vref 1.4-3.6 1.5/2.5V +/-1mA SW/Timer/Cont N/A DTC
ADC12 12 34 200+ 12 68 Vss to Vref 1.4-3.6 1.5/2.5V +/-1mA SW/Timer/Cont N/A Conv Mem
SD16 3 ind ~4 16 85 +/-600mV 1.0-1.5 1.2V +/-1mA SW/Cont to 32x Preload
SD16_A 4 mux'd ~0.03 ~5 16 85 +/-600mV 1.0-1.5 1.2V +/-1mA SW/Cont to 32x Buffered input
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
RFID www.ti-rfid.com Telephony www.ti.com/telephony
Low Power www.ti.com/lpw Video & Imaging www.ti.com/video
Wireless
Wireless www.ti.com/wireless
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