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Goals
• Understand how the cache system finds a
d t item
data it in
i th
the cache.
h
Cache Mapping • Be able to break an address into the fields
used by the different cache mapping
schemes.
COMP375 Computer Architecture
and
dOOrganization
i ti
COMP375 1
Cache Mapping
COMP375 2
Cache Mapping
COMP375 3
Cache Mapping
6
t=
t=
t=
t=
e
ffs
ffs
ffs
ffs
,o
,o
,o
,o
2
=1
=1
=1
=1
e
in
in
in
,l
,l
,l
,l
4
6
g=
g=
g=
g=
ta
ta
ta
ta
COMP375 4
Cache Mapping
How many bits are in the tag and Set Associative Mapping
offset fields?
• Set associative mapping is a mixture of
Associative Mapping 25% 25% 25% 25% pp g
direct and associative mapping.
24 bit addresses • The cache lines are grouped into sets.
128K bytes of cache • The number of lines in a set can vary from
64 byte cache lines 2 to 16.
1. tag= 20, offset=4 • A portion of the address is used to specify
2. tag=19, offset=5 which set will hold an address.
3. tag=18, offset=6 • The data can be stored in any of the lines
=4
=5
=6
=8
4. tag=16, offset=8
et
et
et
et
in the set.
ffs
ff s
ff s
ff s
,o
,o
,o
,o
20
19
18
16
g=
g=
g=
g=
ta
ta
ta
ta
COMP375 5
Cache Mapping
=4
=4
=4
=4
et
et
et
et
3. tag=12, set = 8, offset=4
fs
ff s
ff s
ff s
of
,o
o
0111110101110111000. If a match is found,
,
4,
8,
12
10
=
=
=
4. tag=10, set = 10, offset=4
et
et
et
et
s
,s
6,
2,
0,
return byte 111000 (56) of that line
1
g=
g=
g=
g=
ta
ta
ta
ta
COMP375 6
Cache Mapping
COMP375 7
Cache Mapping
Comparison of Mapping
Set Associative
COMP375 8