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Proceedings of the 5th International Workshop on Wearable and Implantable Body Sensor Networks, in conjunction with

The 5th International Summer School and Symposium on Medical Devices and Biosensors
The Chinese University of Hong Kong, HKSAR, China. Jun 1-3, 2008

Wireless ECG Plaster for Body Sensor Network


M Cassim Munshi, Xiaoyuan Xu, Xiaodan Zou, Edward Soetiono, Chang Sheng Teo, and Yong Lian

Abstract—Miniaturization of electrocardiograph (ECG) wiring is used, and this inflicts discomfort onto patients.
monitoring devices has received much attention due to the In this paper, a prototype of fully integrated wearable
growing emphasis on healthcare. In this paper, we present a ECG plaster that resolves the above issues is presented. The
wearable wireless ECG monitoring device, ECG Plaster. A system level design is described in Section II. The imple-
description of design considerations with regards to the con-
mentation of each module is detailed in Section III. Section
stituents of the device is provided, together with its implemen-
tation on a small size board measuring 55 by 23 mm, to ensure IV covers the plans for future development and optimiza-
wearability. tion.

I. INTRODUCTION II. SYSTEM DESIGN

E MPHASIS on individual health and well-being in recent


years has triggered the mass insurgence of numerous
healthcare products into the healthcare market. The electro-
A. Design Considerations & Specifications
In addition to the essential functions that traditional ECG
cardiograph (ECG) has unrivalled importance, amongst sen- equipment provides, a wireless ECG plaster has to incorpo-
sory devices, in its ability to monitor heartbeat irregularities, rate portability without compromising performance. This
which in turn, gives insights into the individual’s physio- translates to the following design considerations:
logical condition. Most ECG devices at present are not - The sensor interface must be able to pick up sub-millivolt
wearable and expensive, and thus are used in hospitals, level ECG signals from closely spaced electrodes, and apply
rather than the home where monitoring can be more conven- bandwidth conditioning and data quantization locally. A low
ient. Miniaturization of such devices is therefore necessary, noise front-end amplifier with sufficient gain and built-in
as this ensures simpler, more extensive and prolonged heart- filtering function is thereby required.
beat monitoring. Among these downscaled versions are the - The collected ECG data needs to be preprocessed before
wearable devices operating on batteries, forming wireless transmission or storage, and this suggests the use of an on-
nodes positioned on various ECG measurement sites on the board microcontroller. The preprocessing is necessary in
human body, thus constituting a body sensor network order to minimize the power consumption as the wireless
(BSN). Such a system allows real-time in-depth monitoring. transceiver dissipates large amounts of power. With the pre-
As its mobility feature operates on limited battery power, processing, the device only needs to transmit ECG data
a wearable ECG sensor node calls for low power consump- when abnormal ECG signals are detected. This helps to re-
tion. Other requirements include having a small form factor, duce the transmission time significantly resulting consider-
providing reliable communications, and, to the end users’ able power saving.
perspective, ease of use. Various attempts have been re- - Wireless transmission and local storage are both determin-
ported to address these requirements. In [1], non-contact ing factors for portability and versatility in a BSN system.
Quasar’s sensors were employed to pick up ECG potentials - To ensure stable and continuous operations under the sup-
on different body sites. The analog-to-digital (A/D) conver- ply of the onboard low profile battery, the power figure of
sion and wireless communication to the base station were the overall system needs to be well confined. A power man-
carried out on a miniature Eco board. Although the Eco ar- agement plug-in (either in hardware or software) is a bonus.
chitecture is compact, it is evident that analog signals from - As a wearable medical device meant for continuous health
different pickup sites may need to travel through long wires monitoring, the wireless ECG plaster should be small in
before reaching the quantizer. This increases the likelihood size, and cause minimal discomfort to patients.
of the signal being corrupted by noise and other forms of - For the ease of use, a fully integrated, “plug-and-play” type
interference. This problem was rectified in [2] where the of design that requires few or no external wirings is pre-
A/D conversion was integrated into the sensor node. Unfor- ferred.
tunately, the sensor requires external battery packs to pro- - The device should use compatible hardware accessories
vide sufficient power. Consequently, cumbersome external (e.g. electrode pieces) as those used in commercial ECG
machines.

Manuscript received February 1, 2008. This work was supported by the B. System Architecture
Embedded and Hybrid System (EHS) programme under the Agency for Taking into consideration of above requirements, the sys-
Science, Technology and Research (A*STAR) from grants 052-118-0057
and 052-118-0060. tem architecture for ECG plaster is proposed as shown in
The authors are with the Department of Electrical & Computer Engi- Fig. 1. It contains four blocks, i.e. front-end data acquisition
neering, the National University of Singapore, 119260, Singapore. ({cas- circuits, digital signal processing and storage, wireless trans-
sim, xiaodan, elexxy, eleliany}@nus.edu.sg)

978-1-4244-2253-1/08/$25 ©2008 IEEE 310


Authorized licensed use limited to: University of Leeds. Downloaded on August 17,2010 at 08:15:12 UTC from IEEE Xplore. Restrictions apply.
ceiver, and power management system. ECG signals from the contradiction that the narrow bandwidth amplifier results
the chest area, collected by the on-board electrodes, are fil- in low driving capability, which has direct impact on the S/H
tered and amplified by the low noise front-end amplifier to circuit followed the front-end amplifier. The immediate ef-
reach the desired dynamic range. This analog signal is then fect is on the accuracy of tracking error [7]. To solve this
fed into the 12-bit analog to digital converter (ADC) for problem, the proposed front-end amplifier comprises two
quantization. The digitized data are passed to microcontrol- stages. The first stage takes care of signal amplification with
ler for pre-processing or storage. The microcontroller trig- low input-referred noise, while the second stage is a low
gers wireless transceiver if there are abnormal QRS detected gain buffer that serves as a driving circuit for the S/H circuit
in ECG signals. The power management system optimizes of ADC, as depicted in Fig. 2.
the power utilization by putting un-used circuits into sleep To prevent the DC component in the ECG signal from
mode. saturating the amplifier, a high pass function with very low
cutoff frequency is preferred to integrate into the front-end
Battery amplifier [8]. This is realized by transistors M1~M4 config-
ured as pseudo-resistors that provide huge resistance values.
Power Management

12-bit Micro ZigBee


ADC
Controller Radio

Input from
Amplifier Micro SD
Probes

Data Digital Data


Acquisition Processing/ Transceiver Fig. 2. Schematic diagram of front-end amplifier.
Storage

Most of the information present in ECG signals fall below


Fig. 1. System architecture of the Wireless ECG Plaster. 300 Hz, which relaxes the speed requirement of ADC. The
power-efficient capacitive successive approximation register
The data rate for ECG signals is low, and this mitigates (SAR) structure (Fig. 3) in this case makes an ideal candi-
the need for wasteful continuous wireless transmission, es- date. To conserve switching power, 1 V VDD is used across
pecially for a power hungry wireless module. The data is the quantizer. The ECG signal out of the front-end amplifier
thus buffered locally and transmitted intermittently. This is sampled through the bootstrapped switch and held in the
necessitates the use of a micro-SD module interfaced to the capacitive DAC. The SAR logic then resolves this input
ZigBee node for temporary storage. In addition, the micro- level bit by bit. The driving clock is provided by the local
SD module allows for several other operating modes such as 32.768 kHz crystal oscillator, which features both low jitter
long-term local recording which consumes very little power. level and low power consumption.
The microcontroller coordinates the use of such operating
modes and modular power management.
C. Front-end Chip Design
ECG signal characteristics pose great challenges to the
front-end amplifier design. Several low power biomedical
signal acquisition front-end circuits were proposed in the
past [3-6]. Most of these circuits dissipate power ranging
from a few microwatts to tens of microwatts. We have pro-
Fig. 3. Schematic diagram of ADC.
posed an energy efficient biomedical signal acquisition
front-end architecture that optimizes the power consumption
A front-end chip is designed with a low noise amplifier, a
and meets all requirements for wearable ECG devices. Tra-
band-pass filter with corner frequencies at 0.052Hz and
ditionally, the bio-signal acquisition frond-end circuits con-
200Hz, a 12-bit ADC sampled at 1 KS/s. The chip die photo
tain a low noise amplifier, a sample and hold (S/H) circuit,
is shown in Fig.4. Table 1 listed the measurement results.
and a successive approximation ADC. The bandwidth of
The core of overall chip consumes only 1.1µW from a 1-V
low noise amplifier is designed in such a way that it encom-
supply voltage. The level converters are included in the chip
passes the frequency range of the ECG signal, which is from
to allow the front-end chip interfacing with transceiver.
sub 1 hertz to several hundred hertz. However, this leads to

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battery, are placed on a 1-mm thick PCB measuring 55 mm
TABLE I
SPECIFICATIONS OF DATA ACQUISITION CHIP by 23 mm, as shown in Fig. 5. Prioritizing size require-
ments, components are chosen and placed such that the
Parameter Typical Reading empty area on the board remains as small as possible. A tiny
Core Voltage 1V chip antenna operating in the 2.4 GHz band is placed at the
I/O Voltage 3V
edge of the board to minimize losses due to absorption of
Core Current 1.1 µA
RF energy from the inner metallization planes. Its balun and
3 dB Bandwidth 0.052 Hz ~ 200 Hz
matching network circuitry provides a matched 50-ohm im-
Mid-band Gain 45.5 dB
Input Referred Noise 2.1 µVrms (0.05 Hz ~ 200 Hz)
pedance, while 0603 package size RLC components are
Amplifier THD < 1% @ full output swing mainly used. Decoupling capacitors are placed as closely as
CMRR > 67 dB possible to the power inputs to stabilize supply voltage lev-
ADC Resolution 12 bits els, and a small pushbutton switch is included for manual
ADC Sampling Rate 1 KS/s resetting of the CC2430. Moreover, power control is pro-
ADC DNL < ±1.5 LSB vided by a Power MOSFET switch which ensures that while
ADC INL < ±1.5 LSB the CC2430 is being downloaded with firmware, no power
Package 44-pin QFN is being supplied to the ECG chip. While the CC2430 has an
internal voltage regulator, the ECG chip adopts an external
voltage regulator to provide desired voltage levels to its core
modules. DC power for the entire system is drawn from a
rechargeable 100-mAh Lithium Polymer battery measuring
11.0 by 28.7 mm, providing 3.7 V under normal operating
conditions. In addition, the two on-board electrodes used are
compatible with present ECG monitoring applications.
Debugging the firmware of CC2430 is carried out through
an external evaluation board which interfaces with the IO
ports via a FPC connector, located on the bottom side of the
board. As mentioned, the power MOSFET switch automati-
cally turns off the power to the ECG chip while the CC2430
is being debugged.

B. Firmware Development
Fig.4 Front-end chip die photo With the use of a 3rd party IDE software, the IAR Embed-
ded Workbench, and CC2430 Zigbee Development tools,
D. MCU and RF Transceiver
the firmware is downloaded onto the module. At present, the
Prioritizing low power operation, the CC2430 ZigBee CC2430 microcontroller is tasked to read parallel ECG data
Transceiver from TI is selected as the wireless channel to placed on its port pins, and transmit wirelessly at 2.4 GHz to
transmit ECG signals to a host device. The transceiver con- a host device. The current consumption for continuous
sumes only 27 mA with the data rate of 250kbps, and uses transmission is measured at 29 mA, resulting in the continu-
very few inexpensive external components. Furthermore it ous operation for more than 3 hours before the battery runs
integrates an 8051 microcontroller making it ideal for the out. It is expected that when transmission is done with
ECG plaster. Its other features include 8 kB of RAM and packets instead of continuously, the power consumption can
128 kB of flash memory. Having 21 pins across 3 ports, the be reduced, thus increasing operation time. This is because a
transceiver is able to accommodate the 12 data bits from the large portion of the power is being consumed by the RF part
ECG sensor in parallel, as well as one strobe bit. In serial of the wireless module, and packet transmission allows for
mode, data is read through only one of these pins, together this part to be switched off in the durations between succes-
with a strobe pin and a clock signal from the ECG sensor. In sive packet transmissions. This is especially the case since
both modes, 6 of the remaining pins transfer data to and data arrives to the CC2430 MCU at 12kbps, but the 802.15.4
from the micro SD card, for storage purposes. standard, observed by Zigbee, dictates data transmission
wirelessly at 250 kbps.

III. DESIGN OF ECG PLASTER.

A. Hardware Development
Surface mount components, CC2430 RF Transceiver, the
ECG Chip, electrodes, SD Card slot, and Lithium Polymer

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ing time and is intended when the immediate retrieval of
ECG data is not required.

V. CONCLUSION
A wearable ECG plaster that is suitable for BSN applica-
tions and compatible with most commercial ECG products is
designed and implemented. By integrating the differential
electrode sockets, signal acquisition front-end, microcontrol-
ler, micro-SD card, ZigBee transmitter and LiPo battery
onto the same miniaturized PCB, the device offers mobility
and most of the essential functions in ECG monitoring with
hardly any noticeable discomfort to users. Benefitting from
the state-of-the-art low power circuit techniques and the
system level power management, the ECG plaster provides
multiple operation modes and promises long battery life.
Future optimization in system firmware can make further
use of such advantage to achieve even better power effi-
ciency.
(a). Top view

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read from the ECG Chip can be written to the SD Card for [7] X.D. Zou, X.Y. Xu, Y. Lian, and Y.J. Zheng, “A Low Power Sensor
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kbps. Since the ECG data samples arrive at the MCU at 12
kbps, an estimate would be that the RF part needs to be
turned on about 5% of the time, since this is when the packet
transmission takes place. It is expected that the RF part can
consume as low as 1 mA, averaged over the entire monitor-
ing duration, and thus the overall current consumption can
be as low as 12 mA. This scheme is being investigated at
present.
The device might also work on another operating mode,
one which does not make use of the RF portion. Here, data
is simply collected and written to the micro SD Card for
storage. Such a scheme greatly increases the battery operat-

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