5 4 3 2 1

Have internal VRM

+3VS +1.05VS R268 @
0_0603_5%
2 1 +VCCACLK

2 1 +3VS_VCC_CLKF33 +3V_PCH
R303 0_0603_5% 1 1 R269 U4J POWER +1.05VS +5VALW +5VALW_PCH

10U_0603_6.3V6M
C231

1U_0402_6.3V6K
C232
2 1 +VCCPDSW R270
1 AD49 N26 +1.05VS_VCCUSBCORE 2 1
0_0603_5% VCCACLK VCCIO[29] R289
2 2 1
C234 P26 0_0603_5% 2 1
.1U_0402_16V7K T16 VCCIO[30] C233
D 2 VCCDSW3_3 1mA P28 1U_0402_6.3V6K D
0_0603_5%
VCCIO[31] 2
2 1 +PCH_VCCDSW V12 T27
DCPSUSBYP VCCIO[32]
C235 @ T29

烉On-Die PLL voltage regulator enable +3VS_VCC_CLKF33 T38 VCCIO[33] +3V_PCH

On-Die PLL Voltage Regulator .1U_0402_16V7K
VCC3_3[5]
H T101 65mA R272
T23 +3V_VCCPUSB 2 1
+VCCAPLL_CPY_PCH BH23 VCCSUS3_3[7]
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 VCCAPLLDMI2 80mA +5VALW_PCH

.1U_0402_16V7K
C236
T24 0_0603_5% +3V_PCH
,VCCAPLLSATA VCCSUS3_3[8] 1 +3V_PCH
2 1 +VCCDPLL_CPY AL29 R273
+1.05VS VCCIO[14]
R271 0_0603_5% V23 +3V_VCCAUBG 2 1
VCCSUS3_3[9]

USB
1

2
+VCCSUS1 AL24 V24 2 0_0603_5%
DCPSUS[3] 130mA VCCSUS3_3[10] C238 R275 D1
1
P24 .1U_0402_16V7K 10_0402_5% CH751H-40PT_SOD323-2
@ C239 VCCSUS3_3[6] 2 +1.05VS
1U_0402_6.3V6K AA19 R276

1
2 VCCASW[1] T26 +1.05VS_VCCAUPLL 2 1 +PCH_V5REF_SUS
+1.05VS AA21 VCCIO[34]
903mA VCCASW[2]

1
R277 0_0805_5% 0_0603_5%
1 2 +1.05VM_VCCASW AA24 M26 +PCH_V5REF_SUS C240
VCCASW[3] 1mA V5REF_SUS 0.1U_0402_25V6
1 1

2
22U_0805_6.3V6M
C241

22U_0805_6.3V6M
C242
AA26

Clock and Miscellaneous

VCCASW[4] AN23 +VCCA_USBSUS C243 @1
@ 2 1U_0402_6.3V6K
AA27 DCPSUS[4]
2 2 VCCASW[5] AN24 +3V_VCCPSUS 2 .1U_0402_16V7K
C316 @1
@
AA29 VCCSUS3_3[1]
VCCASW[6]
AA31 +5VS +3VS
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN +3V_PCH
VCCASW[8] 1mA V5REF

2
C R278 C
1 1 1

1U_0402_6.3V6K
C244

1U_0402_6.3V6K
C245

1U_0402_6.3V6K
C246
AC27 2 1 R279 D2
VCCASW[9] N20 +3V_VCCPSUS CH751H-40PT_SOD323-2
VCCSUS3_3[2] 1 10_0402_5%
+1.05VS AC29 0_0603_5%

PCI/GPIO/LPC
2 2 2 VCCASW[10] N22 C247

1
AC31 VCCSUS3_3[3] 1U_0402_6.3V +PCH_V5REF_RUN
L5 VCCASW[11] P20 2 +3VS
VCCSUS3_3[4] 1
1 2 +1.05VS_VCCA_A_DPL AD29 R281
VCCASW[12] P22 2 1 C248
1

10UH_LB2012T100MR_20% AD31 VCCSUS3_3[5] 1U_0402_6.3V6K

VCCASW[13] 1 2
R300 C249 0_0603_5%
0_0603_5% W21 AA16 +3VS_VCCPCORE .1U_0402_16V7K
VCCASW[14] VCC3_3[1]
L6 W23 W16 2 +3VS
2

1 2 +1.05VS_VCCA_B_DPL VCCASW[15] VCC3_3[8] R282

10UH_LB2012T100MR_20% W24 T34 +3VS_VCCPPCI 2 1
VCCASW[16] VCC3_3[4]
1 1 1
220U_B2_2.5VM_R35
C250

22U_0805_6.3V6M
C186

1U_0402_6.3V6K
C251

220U_B2_2.5VM_R35
C252

22U_0805_6.3V6M
C187

1U_0402_6.3V6K
C253

1 1 1 1 W26 0_0603_5%
+ + VCCASW[17] C254
@ W29 +3VS .1U_0402_16V7K
VCCASW[18] R283 2
2 2 2 @2 2 2 W31 AJ2 +VCC3_3_2 2 1
VCCASW[19] VCC3_3[2] +1.05VS_SATA3 +1.05VS
1
W33 0_0603_5% R285
VCCASW[20] AF13 2 1
VCCIO[5] C255
2 .1U_0402_16V7K 1
+VCCRTCEXT N16 0_0603_5%
DCPRTC AH13 C257
1 VCCIO[12]
C258 1U_0402_6.3V6K
.1U_0402_16V7K +VCCAFDI_VRM Y49 167mA AH14 +1.05VS_SATA3 2
VCCVRM[4] VCCIO[13]
2
B AF14 B
2 1 +1.05VS_VCCA_A_DPL BD47 VCCIO[6]
+1.05VS VCCADPLLA 75mA AK1

SATA
R274 0_0603_5% +VCCSATAPLL T100

烉On-Die PLL voltage regulator enable

+1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA
1 VCCADPLLB 75mA
+VCCAFDI_VRM On-Die PLL Voltage Regulator
C256 H
1U_0402_6.3V6K AF11 +VCCAFDI_VRM
+1.05VS_VCCDIFFCLKN +VCCDIFFCLK AF17 VCCVRM[1] +1.05VS_VCC_SATA +1.05VS
2 VCCIO[7] VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
AF33 R288
55mA AF34 VCCDIFFCLKN[1] AC16 +1.05VS_VCC_SATA 2 1 ,VCCAPLLSATA
2 1 +1.05VS_VCCDIFFCLKN AG34 VCCDIFFCLKN[2] VCCIO[2]
+1.05VS VCCDIFFCLKN[3]
R280 0_0603_5%
1 AC17 1 0_0603_5%
VCCIO[3] C261
C259 +1.05VS_SSCVCC AG33 AD17 1U_0402_6.3V6K
1U_0402_6.3V6K VCCSSC 95mA VCCIO[4]
2 2
+VCCSST V16 +1.05VS
DCPSST
1
2 1 C263
+1.05VS
R284 0_0603_5%
1 .1U_0402_16V7K +1.05VM_VCCSUS T17 T21
V19 DCPSUS[1] VCCASW[22]
C262 2 DCPSUS[2]
MISC

1U_0402_6.3V6K +V1.05S_VCCP V21

2 VCCASW[23]
CPU

@ R290 2 1 +V_CPU_IO BJ8

0_0603_5% R286 0_0603_5% V_PROC_IO 1mA T19
2 1 +1.05VM_VCCSUS VCCASW[21]
+1.05VS 1 1 1
4.7U_0603_6.3V6K
C265

.1U_0402_16V7K
C266

.1U_0402_16V7K
C267

+RTCVCC +3V_PCH
1 R287
A22 P32 +VCCSUSHDA 2 1
RTC

2 2 2 VCCRTC 10mA VCCSUSHDA

HDA

C264 @ @
1U_0402_6.3V6K
C268

.1U_0402_16V7K
C269

.1U_0402_16V7K
C270

1U_0402_6.3V6K 1 1 1 1 0_0603_5%
2 PANTHER-POINT_FCBGA989 C271
A 0.1U_0402_16V4Z A
@
2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

2011/10/27 2012/10/27 Title
Issued Date Deciphered Date PCH (8/9) PWR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-7983P
Date: Thursday, January 05, 2012 Sheet 21 of 60
5 4 3 2 1
 5 4 3 2 1

U4I

AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
D U4H B15 VSS[163] VSS[263] K7 D
H5 B19 VSS[164] VSS[264] L18
VSS[0] B23 VSS[165] VSS[265] L2
AA17 AK38 B27 VSS[166] VSS[266] L20
AA2 VSS[1] VSS[80] AK4 B31 VSS[167] VSS[267] L26
AA3 VSS[2] VSS[81] AK42 B35 VSS[168] VSS[268] L28
AA33 VSS[3] VSS[82] AK46 B39 VSS[169] VSS[269] L36
AA34 VSS[4] VSS[83] AK8 B7 VSS[170] VSS[270] L48
AB11 VSS[5] VSS[84] AL16 F45 VSS[171] VSS[271] M12
AB14 VSS[6] VSS[85] AL17 BB12 VSS[172] VSS[272] P16
AB39 VSS[7] VSS[86] AL19 BB16 VSS[173] VSS[273] M18
AB4 VSS[8] VSS[87] AL2 BB20 VSS[174] VSS[274] M22
AB43 VSS[9] VSS[88] AL21 BB22 VSS[175] VSS[275] M24
AB5 VSS[10] VSS[89] AL23 BB24 VSS[176] VSS[276] M30
AB7 VSS[11] VSS[90] AL26 BB28 VSS[177] VSS[277] M32
AC19 VSS[12] VSS[91] AL27 BB30 VSS[178] VSS[278] M34
AC2 VSS[13] VSS[92] AL31 BB38 VSS[179] VSS[279] M38
AC21 VSS[14] VSS[93] AL33 BB4 VSS[180] VSS[280] M4
AC24 VSS[15] VSS[94] AL34 BB46 VSS[181] VSS[281] M42
AC33 VSS[16] VSS[95] AL48 BC14 VSS[182] VSS[282] M46
AC34 VSS[17] VSS[96] AM11 BC18 VSS[183] VSS[283] M8
AC48 VSS[18] VSS[97] AM14 BC2 VSS[184] VSS[284] N18
AD10 VSS[19] VSS[98] AM36 BC22 VSS[185] VSS[285] P30
AD11 VSS[20] VSS[99] AM39 BC26 VSS[186] VSS[286] N47
AD12 VSS[21] VSS[100] AM43 BC32 VSS[187] VSS[287] P11
AD13 VSS[22] VSS[101] AM45 BC34 VSS[188] VSS[288] P18
AD19 VSS[23] VSS[102] AM46 BC36 VSS[189] VSS[289] T33
AD24 VSS[24] VSS[103] AM7 BC40 VSS[190] VSS[290] P40
AD26 VSS[25] VSS[104] AN2 BC42 VSS[191] VSS[291] P43
AD27 VSS[26] VSS[105] AN29 BC48 VSS[192] VSS[292] P47
AD33 VSS[27] VSS[106] AN3 BD46 VSS[193] VSS[293] P7
AD34 VSS[28] VSS[107] AN31 BD5 VSS[194] VSS[294] R2
C AD36 VSS[29] VSS[108] AP12 BE22 VSS[195] VSS[295] R48 C
AD37 VSS[30] VSS[109] AP19 BE26 VSS[196] VSS[296] T12
AD38 VSS[31] VSS[110] AP28 BE40 VSS[197] VSS[297] T31
AD39 VSS[32] VSS[111] AP30 BF10 VSS[198] VSS[298] T37
AD4 VSS[33] VSS[112] AP32 BF12 VSS[199] VSS[299] T4
AD40 VSS[34] VSS[113] AP38 BF16 VSS[200] VSS[300] W34
AD42 VSS[35] VSS[114] AP4 BF20 VSS[201] VSS[301] T46
AD43 VSS[36] VSS[115] AP42 BF22 VSS[202] VSS[302] T47
AD45 VSS[37] VSS[116] AP46 BF24 VSS[203] VSS[303] T8
AD46 VSS[38] VSS[117] AP8 BF26 VSS[204] VSS[304] V11
AD8 VSS[39] VSS[118] AR2 BF28 VSS[205] VSS[305] V17
AE2 VSS[40] VSS[119] AR48 BD3 VSS[206] VSS[306] V26
AE3 VSS[41] VSS[120] AT11 BF30 VSS[207] VSS[307] V27
AF10 VSS[42] VSS[121] AT13 BF38 VSS[208] VSS[308] V29
AF12 VSS[43] VSS[122] AT18 BF40 VSS[209] VSS[309] V31
AD14 VSS[44] VSS[123] AT22 BF8 VSS[210] VSS[310] V36
AD16 VSS[45] VSS[124] AT26 BG17 VSS[211] VSS[311] V39
AF16 VSS[46] VSS[125] AT28 BG21 VSS[212] VSS[312] V43
AF19 VSS[47] VSS[126] AT30 BG33 VSS[213] VSS[313] V7
AF24 VSS[48] VSS[127] AT32 BG44 VSS[214] VSS[314] W17
AF26 VSS[49] VSS[128] AT34 BG8 VSS[215] VSS[315] W19
AF27 VSS[50] VSS[129] AT39 BH11 VSS[216] VSS[316] W2
AF29 VSS[51] VSS[130] AT42 BH15 VSS[217] VSS[317] W27
AF31 VSS[52] VSS[131] AT46 BH17 VSS[218] VSS[318] W48
AF38 VSS[53] VSS[132] AT7 BH19 VSS[219] VSS[319] Y12
AF4 VSS[54] VSS[133] AU24 H10 VSS[220] VSS[320] Y38
AF42 VSS[55] VSS[134] AU30 BH27 VSS[221] VSS[321] Y4
AF46 VSS[56] VSS[135] AV16 BH31 VSS[222] VSS[322] Y42
AF5 VSS[57] VSS[136] AV20 BH33 VSS[223] VSS[323] Y46
AF7 VSS[58] VSS[137] AV24 BH35 VSS[224] VSS[324] Y8
AF8 VSS[59] VSS[138] AV30 BH39 VSS[225] VSS[325] BG29
AG19 VSS[60] VSS[139] AV38 BH43 VSS[226] VSS[328] N24
B AG2 VSS[61] VSS[140] AV4 BH7 VSS[227] VSS[329] AJ3 B
AG31 VSS[62] VSS[141] AV43 D3 VSS[228] VSS[330] AD47
AG48 VSS[63] VSS[142] AV8 D12 VSS[229] VSS[331] B43
AH11 VSS[64] VSS[143] AW14 D16 VSS[230] VSS[333] BE10
AH3 VSS[65] VSS[144] AW18 D18 VSS[231] VSS[334] BG41
AH36 VSS[66] VSS[145] AW2 D22 VSS[232] VSS[335] G14
AH39 VSS[67] VSS[146] AW22 D24 VSS[233] VSS[337] H16
AH40 VSS[68] VSS[147] AW26 D26 VSS[234] VSS[338] T36
AH42 VSS[69] VSS[148] AW28 D30 VSS[235] VSS[340] BG22
AH46 VSS[70] VSS[149] AW32 D32 VSS[236] VSS[342] BG24
AH7 VSS[71] VSS[150] AW34 D34 VSS[237] VSS[343] C22
AJ19 VSS[72] VSS[151] AW36 D38 VSS[238] VSS[344] AP13
AJ21 VSS[73] VSS[152] AW40 D42 VSS[239] VSS[345] M14
AJ24 VSS[74] VSS[153] AW48 D8 VSS[240] VSS[346] AP3
AJ33 VSS[75] VSS[154] AV11 E18 VSS[241] VSS[347] AP1
AJ34 VSS[76] VSS[155] AY12 E26 VSS[242] VSS[348] BE16
AK12 VSS[77] VSS[156] AY22 G18 VSS[243] VSS[349] BC16
AK3 VSS[78] VSS[157] AY28 G20 VSS[244] VSS[350] BG28
VSS[79] VSS[158] G26 VSS[245] VSS[351] BJ28
PANTHER-POINT_FCBGA989 G28 VSS[246] VSS[352]
G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
A A

PANTHER-POINT_FCBGA989

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/10/27 Deciphered Date 2012/10/27 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (9/9) VSS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-7983P
Date: Thursday, January 05, 2012 Sheet 22 of 60
5 4 3 2 1
 5 4 3 2 1

+3VS_VGA

U65A N13P@
PCH_THRMTRIP#_R <19>

1
PCIE_CTX_GRX_N[0..15]
<5> PCIE_CTX_GRX_N[0..15]
PCIE_CTX_GRX_P0 AN12 Part 1 of 7
PEX_RX0

3
PCIE_CTX_GRX_P[0..15] PCIE_CTX_GRX_N0 AM12 P6 GPU_VID4 RV208
<5> PCIE_CTX_GRX_P[0..15] PEX_RX0_N GPIO0 GPU_VID4 <54>
PCIE_CTX_GRX_P1 AN14 M3 GPU_VID3 10K_0402_5% QV7B
PCIE_CRX_GTX_N[0..15] PEX_RX1 GPIO1 GPU_VID3 <54>
PCIE_CTX_GRX_N1 AM14 L6 N13P@ DMN66D0LDW-7 2N_SOT363-6
<5> PCIE_CRX_GTX_N[0..15]

2
PCIE_CTX_GRX_P2 AP14 PEX_RX1_N GPIO2 P5 VGA_GPIO3 0_0402_5% 1 @ 2DPRSLPVR_VGA 5 N13P@
PCIE_CRX_GTX_P[0..15] PEX_RX2 GPIO3 DPRSLPVR_VGA <54>
PCIE_CTX_GRX_N2 AP15 P7 RV113
<5> PCIE_CRX_GTX_P[0..15] PEX_RX2_N GPIO4

6
PCIE_CTX_GRX_P3 AN15 L7 GPU_VID1 QV7A
GPU_VID1 <54>

4
D PCIE_CTX_GRX_N3 AM15 PEX_RX3 GPIO5 M7 GPU_VID2 DMN66D0LDW-7 2N_SOT363-6 D
PEX_RX3_N GPIO6 GPU_VID2 <54>
PCIE_CTX_GRX_P4 AN17 N8 N13P@
PCIE_CTX_GRX_N4 AM17 PEX_RX4 GPIO7 M1 OVERT# 2
PCIE_CTX_GRX_P5 AP17 PEX_RX4_N GPIO8 M2 GC6_EVENT#_R
PCIE_CTX_GRX_N5 AP18 PEX_RX5 GPIO9 L1

1
PCIE_CTX_GRX_P6 AN18 PEX_RX5_N GPIO10 M5 GPU_VID0 N13P@

GPIO
PEX_RX6 GPIO11 GPU_VID0 <54>
PCIE_CTX_GRX_N6 AM18 N3 VGA_GPIO12 2 1
PEX_RX6_N GPIO12 VGA_AC_DET <42,54>
PCIE_CTX_GRX_P7 AN20 M4 GPU_VID5 DV3
PEX_RX7 GPIO13 GPU_VID5 <54>
PCIE_CTX_GRX_N7 AM20 N4 CH751H-40PT_SOD323-2
PCIE_CTX_GRX_P8 AP20 PEX_RX7_N GPIO14 P2 VGA_GPIO15 100K_0402_5% 1 @ 2 RV17
PCIE_CTX_GRX_N8 AP21 PEX_RX8 GPIO15 R8 VGA_GPIO16 0_0402_5% 1 @ 2 RV114 DPRSLPVR_VGA
PCIE_CTX_GRX_P9 AN21 PEX_RX8_N GPIO16 M6
PCIE_CTX_GRX_N9 AM21 PEX_RX9 GPIO17 R1 0_0402_5% 1 @ 2PSI#_VGA
PEX_RX9_N GPIO18 PSI#_VGA <54>
PCIE_CTX_GRX_P10 AN23 P3 RV233
PCIE_CTX_GRX_N10 AM23 PEX_RX10 GPIO19 P4
PCIE_CTX_GRX_P11 AP23 PEX_RX10_N GPIO20 P1
PCIE_CTX_GRX_N11 AP24 PEX_RX11 GPIO21 if GC6 is supported, stuff the BOM option to
PCIE_CTX_GRX_P12 AN24 PEX_RX11_N pull high to 3.3vs system power, if not, stuff
PCIE_CTX_GRX_N12 AM24 PEX_RX12 the BOM option to pull high to NV3V3;
+3VS_VGA PCIE_CTX_GRX_P13 AN26 PEX_RX12_N
PCIE_CTX_GRX_N13 AM26 PEX_RX13
+3VS_VGA PCIE_CTX_GRX_P14 AP26 PEX_RX13_N +3VS_VGA
PCIE_CTX_GRX_N14 AP27 PEX_RX14
PEX_RX14_N
2

PCIE_CTX_GRX_P15 AN27 AK9

RV24 RV25 PCIE_CTX_GRX_N15 AM27 PEX_RX15 DACA_RED AL10 GC6_EVENT#_R 1 N13P@ 2
2.2K_0402_5% 2.2K_0402_5% 12/07 update to SE124224K80 PEX_RX15_N DACA_GREEN
DACA_BLUE
AL9 RV49 10K_0402_5%
N13P@ N13P@ VGA_EDID_CLK 1 N13P@ 2

DACs
5

PCIE_CRX_GTX_P0 CV6 N13P@ 1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P0 AK14 RV3 2.2K_0402_5%

1

QV1B PCIE_CRX_GTX_N0 CV7 N13P@ 1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N0 AJ14 PEX_TX0 AM9 VGA_EDID_DATA 1 N13P@ 2
VGA_SMB_CK2 4 3 PCIE_CRX_GTX_P1 CV8 N13P@ 1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P1 AH14 PEX_TX0_N DACA_HSYNC AN9 RV4 2.2K_0402_5%
EC_SMB_CK2 <15,39,42> PEX_TX1 DACA_VSYNC
PCIE_CRX_GTX_N1 CV9 N13P@ 1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N1 AG14 VGA_CRT_DATA 1 N13P@ 2
2N7002DW-T/R7_SOT363-6 PCIE_CRX_GTX_P2 CV10 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P2 AK15 PEX_TX1_N 10K_0402_5% RV10 2.2K_0402_5%
C N13P@ PCIE_CRX_GTX_N2 CV11 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N2 AJ15 PEX_TX2 AG10 +DACA_VDD 2 RV107 1 VGA_CRT_CLK 1 N13P@ 2 C
PEX_TX2_N DACA_VDD

PCI EXPRESS
PCIE_CRX_GTX_P3 CV12 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P3 AL16 AP9 RV11 2.2K_0402_5%
PCIE_CRX_GTX_N3 CV13 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N3 AK16 PEX_TX3 DACA_VREF AP8 I2CB_SCL 1 N13P@ 2
PCIE_CRX_GTX_P4 CV15 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P4 AK17 PEX_TX3_N DACA_RSET RV12 2.2K_0402_5%
PEX_TX4 N13P@
2

PCIE_CRX_GTX_N4 CV17 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N4 AJ17 I2CB_SDA 1 N13P@ 2

QV1A PCIE_CRX_GTX_P5 CV19 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P5 AH17 PEX_TX4_N RV13 2.2K_0402_5%
VGA_SMB_DA2 1 6 PCIE_CRX_GTX_N5 CV14 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N5 AG17 PEX_TX5 OVERT# 1 N13P@ 2
EC_SMB_DA2 <15,39,42> PEX_TX5_N
PCIE_CRX_GTX_P6 CV16 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P6 AK18 RV1 10K_0402_5%
2N7002DW-T/R7_SOT363-6 PCIE_CRX_GTX_N6 CV18 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N6 AJ18 PEX_TX6 VGA_GPIO12 1 N13P@ 2
N13P@ PCIE_CRX_GTX_P7 CV20 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P7 AL19 PEX_TX6_N RV2 10K_0402_5%
PCIE_CRX_GTX_N7 CV22 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N7 AK19 PEX_TX7 R4 VGA_CRT_CLK
PCIE_CRX_GTX_P8 CV24 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P8 AK20 PEX_TX7_N I2CA_SCL R5 VGA_CRT_DATA
PCIE_CRX_GTX_N8 CV26 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N8 AJ20 PEX_TX8 I2CA_SDA
PCIE_CRX_GTX_P9 CV21 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P9 AH20 PEX_TX8_N R7 I2CB_SCL
PCIE_CRX_GTX_N9 CV23 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N9 AG20 PEX_TX9 I2CB_SCL R6 I2CB_SDA
PCIE_CRX_GTX_P10 CV25 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P10 AK21 PEX_TX9_N I2CB_SDA

I2C
PCIE_CRX_GTX_N10 CV27 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N10 AJ21 PEX_TX10 R2 VGA_EDID_CLK
PCIE_CRX_GTX_P11 CV29 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P11 AL22 PEX_TX10_N I2CC_SCL R3 VGA_EDID_DATA
PCIE_CRX_GTX_N11 CV31 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N11 AK22 PEX_TX11 I2CC_SDA +1.05VS_VGA
PCIE_CRX_GTX_P12 CV33 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P12 AK23 PEX_TX11_N T4 VGA_SMB_CK2
PCIE_CRX_GTX_N12 CV28 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N12 AJ23 PEX_TX12 I2CS_SCL T3 VGA_SMB_DA2
PEX_TX12_N I2CS_SDA 30 ohms @100MHz (ESR=0.05)
PCIE_CRX_GTX_P13 CV30 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P13 AH23
PCIE_CRX_GTX_N13 CV32 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N13 AG23 PEX_TX13 LV7
PCIE_CRX_GTX_P14 CV36 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_P14 AK24 PEX_TX13_N 60mA +PLLVDD 1 2
PCIE_CRX_GTX_N14 CV41 N13P@1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N14 AJ24 PEX_TX14 FBMA-10-100505-300T 0402

22U_0805_6.3V6M
.1U_0402_16V7K
CV34 N13P@1 2 AL25 PEX_TX14_N

N13P@ CV131
PCIE_CRX_GTX_P15 0.22U_0402_10V6K PCIE_CRX_C_GTX_P15 1 1 N13P@
CV35 N13P@1 2 AK25 PEX_TX15

N13P@ CV40
PCIE_CRX_GTX_N15 0.22U_0402_10V6K PCIE_CRX_C_GTX_N15
+3VS_VGA +3VS_VGA PEX_TX15_N
AD8 RV112 1 @ 2
AJ11 PLLVDD 0_0402_5% 2 2 Near GPU
PEX_WAKE_N AE8
45mA
CLK_PCIE_VGA AL13 SP_PLLVDD
<15> CLK_PCIE_VGA PEX_REFCLK 45mA
2

B @ CLK_PCIE_VGA# AK13 AD7 +SP_PLLVDD B

<15> CLK_PCIE_VGA# PEX_REFCLK_N VID_PLLVDD
RV105 CLK_REQ_GPU# AK12

CLK
10K_0402_5% PEX_CLKREQ_N N13P@
Differential signal 1 @ 2 PEX_TSTCLK_OUT AJ26 H3 XTALIN_R 1 2 XTALIN
PEX_TSTCLK_OUT XTAL_IN
5

RV20 200_0402_1% PEX_TSTCLK_OUT# AK26 H2 XTAL_OUT RV230 0_0402_5%

1

2 PEX_TSTCLK_OUT_N XTAL_OUT 1 2 GCLK_27MHZ

P

<18,36,37,42,45> PLT_RST# B GCLK_27MHZ <36>

4 PLT_RST_VGA# AJ12 J4 XTALOUT RV231 0_0402_5%
1 Y PEX_TERMP AP29 PEX_RST_N XTAL_OUTBUFF H1 XTALSSIN GCLK274@
<18> DGPU_HOLD_RST# A PEX_TERMP XTAL_SSIN
G

Under GPU
1

1
3

N13P@ UV2 RV18 RV26 RV27

2

NC7SZ08P5X_NL_SC70-5 100K_0402_5% 10K_0402_5% 10K_0402_5%

N13P@ RV22 N13P@ N13P@
2.49K_0402_1% N13P-PES-A1_FCBGA908
2

2
N13P@
1

1 2
RV23 10M_0402_5% Under GPU(below 150mils)
<18,25> DGPU_PWR_EN N13P@
N13P@
150mA
YV1 +1.05VS_VGA 1 2 +SP_PLLVDD
2

4 3 XTAL_OUT LV1

22U_0805_6.3V6M

.1U_0402_16V7K

.1U_0402_16V7K
4.7U_0402_6.3V6M
+3VS_VGA NC OSC

N13P@ CV4

N13P@ CV5
N13P@ CV112

N13P@ CV113
BLM18PG330SN1D_0603 1 1 1 1
RV29 XTALIN 1 2 180ohms (ESR=0.2) Bead
10K_0402_5% OSC NC
N13P@ 1 27MHZ 16PF +-30PPM X3G027000FG1H-HX 1
1

CV42 CV37 N13P@ CV38 2 2 2 2

2 1 RV30 18P_0402_50V8J 18P_0402_50V8J
N13P@ 10K_0402_5% N13P@ N13P@
2

.1U_0402_16V7K N13P@ 2 2
G

A 1 3 CLK_REQ_GPU# A
<15> CLK_REQ_VGA#
D

QV2 N13P@
2N7002H 1N_SOT23-3 @ RV32
10K_0402_5%

1 2
Security Classification Compal Secret Data Compal Electronics, Inc.
1

RV110 @ 0_0402_5%
Issued Date 2011/10/27 Deciphered Date 2012/10/27 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13X-PCIE/DAC/GPIO
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-7983P
Date: Thursday, January 05, 2012 Sheet 23 of 60
5 4 3 2 1
 5 4 3 2 1

U65D

Part 4 of 7
AM6
AN6 IFPA_TXC P8
AP3 IFPA_TXC_N NC AC6
AN3 IFPA_TXD0 NC AJ28
AN5 IFPA_TXD0_N NC AJ4
AM5 IFPA_TXD1 NC AJ5
AL6 IFPA_TXD1_N NC AL11
AK6 IFPA_TXD2 NC C15
IFPA_TXD2_N NC

NC
AJ6 D19
AH6 IFPA_TXD3 NC D20
D IFPA_TXD3_N NC D23 D
NC D26
AJ9 NC H31
AH9 IFPB_TXC NC T8
AP6 IFPB_TXC_N NC V32
AP5 IFPB_TXD4 NC
AM7 IFPB_TXD4_N
AL7 IFPB_TXD5
AN8 IFPB_TXD5_N
AM8 IFPB_TXD6
AK8 IFPB_TXD6_N
AL8 IFPB_TXD7
IFPB_TXD7_N L4 VCCSENSE_VGA
VDD_SENSE VCCSENSE_VGA <54>
AK1
AJ1 IFPC_L0
AJ3 IFPC_L0_N L5 VSSSENSE_VGA
IFPC_L1 GND_SENSE VSSSENSE_VGA <54>
AJ2
AH3 IFPC_L1_N
IFPC_L2 trace width: 16mils
AH4
AG5 IFPC_L2_N differential voltage sensing.
AG4 IFPC_L3
IFPC_L3_N differential signal routing.
TEST
AM1 AK11 TESTMODE
AM2 IFPD_L0 TESTMODE
AM3 IFPD_L0_N AM10
IFPD_L1 JTAG_TCK TV2

1
AM4 AM11
IFPD_L1_N JTAG_TDI TV3
AL3 AP12
IFPD_L2 JTAG_TDO TV4 10K_0402_5%
C AL4 AP11 C
IFPD_L2_N JTAG_TMS TV5
AK4 AN11 1 2 RV33
AK5 IFPD_L3 JTAG_TRST_N RV34 10K_0402_5% N13P@

2
IFPD_L3_N

LVDS/TMDS
N13P@
AD2
AD3 IFPE_L0
AD1 IFPE_L0_N
AC1 IFPE_L1 SERIAL
AC2 IFPE_L1_N H6 ROM_CS
AC3 IFPE_L2 ROM_CS_N H4 ROM_SCLK
IFPE_L2_N ROM_SCLK ROM_SCLK <32>
AC4 H5 ROM_SI ROM_SI <32>
AC5 IFPE_L3 ROM_SI H7 ROM_SO
IFPE_L3_N ROM_SO ROM_SO <32>

AE3
AE4 IFPF_L0
AF4 IFPF_L0_N
AF5 IFPF_L1 +3VS_VGA
AD4 IFPF_L1_N GENERAL RV35 10K_0402_5%
AD5 IFPF_L2 L2 2 1
AG1 IFPF_L2_N BUFRST_N N13P@ RV232 10K_0402_5%
AF1 IFPF_L3 L3 NV_CEC 2 1
IFPF_L3_N CEC N13P@
J1 1 N13P@ 2
MULTI_STRAP_REF0_GND RV38 40.2K_0402_1%
AG3
AG2 IFPC_AUX_I2CW _SCL
IFPC_AUX_I2CW _SDA_N J2 STRAP0
STRAP0 STRAP0 <32>
J7 STRAP1
B STRAP1 STRAP1 <32> B
AK3 J6 STRAP2 STRAP2 <32>
AK2 IFPD_AUX_I2CX_SCL STRAP2 J5 STRAP3
IFPD_AUX_I2CX_SDA_N STRAP3 STRAP3 <32>
J3 STRAP4 STRAP4 <32>
STRAP4
AB3
AB4 IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N K3
THERMDP K4
AF3 THERMDN
AF2 IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
Reserve 1MB SPI ROM FOR VBIOS ROM
+3VS_VGA
CV295
N13P-PES-A1_FCBGA908
2 1 20mils
N13P@

1
0.1U_0402_16V4Z
@ RV229 @ @ RV225
10K_0402_5% 10K_0402_5%

2
@ RV224
@RV224 0_0402_5% UV15 @
ROM_CS 1 2 ROM_CS_R 1 8
ROM_SO 1 2 ROM_SO_R 2 CS# VCC 7 ROM_HOLD#
@RV226
@ RV226 0_0402_5% 3 DO HOLD# 6
4 W P# CLK 5 @ RV228 0_0402_5%
GND DIO ROM_SCLK_R 1 2 ROM_SCLK
A MX25L1005AMC-12G SOP ROM_SI_R 1 2 ROM_SI A
@ RV227 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/10/27 Deciphered Date 2012/10/27 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13X-LVDS/HDMI/DP/THM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-7983P
Date: Thursday, January 05, 2012 Sheet 24 of 60
5 4 3 2 1
 5 4 3 2 1

+1.5VS_VGA U65E
Near GPU
Near GPU Part 5 of 7 2000mA +1.05VS_VGA
3.5A
D AA27 AG19 N13P@ D
FBVDDQ_0 PEX_IOVDD_0

22U_0805_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
CV273

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
AA30 AG21
FBVDDQ_1 PEX_IOVDD_1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
CV269

CV270

CV271

CV272

CV43

CV44

CV45

CV46

CV47

CV48

CV49

CV50

CV51

CV52
1 2 2 2 2 AB27 AG22 1 1 1 1 1 1 2 2 2 2
AB33 FBVDDQ_2 PEX_IOVDD_2 AG24
AC27 FBVDDQ_3 PEX_IOVDD_3 AH21
@ AD27 FBVDDQ_4 PEX_IOVDD_4 AH25 N13P@
2 1 1 1 1 AE27 FBVDDQ_5 PEX_IOVDD_5 2 2 2 2 2 2 1 1 1 1
N13P@ AF27 FBVDDQ_6
+1.5VS_VGA AG27 FBVDDQ_7 AG13 N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@
N13P@ N13P@ N13P@ B13 FBVDDQ_8 PEX_IOVDDQ_0 AG15
4.7uF X7R 0402 * 2 FBVDDQ_9 PEX_IOVDDQ_1 Under GPU(below 150mils) +1.05VS_VGA
B16 AG16
FBVDDQ_10 PEX_IOVDDQ_2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
Under GPU(below 150mils) B19 AG18
FBVDDQ_11 PEX_IOVDDQ_3

CV54

CV53

CV56

CV55
1uF X7R 0402 * 2 0.1uF X7R 0402 * 8 E13 AG25 1 1 1 1
E16 FBVDDQ_12 PEX_IOVDDQ_4 AH15
FBVDDQ_13 PEX_IOVDDQ_5
.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K
E19 AH18
FBVDDQ_14 PEX_IOVDDQ_6
1U_0402_6.3V6K

1U_0402_6.3V6K
CV267

CV268

CV277

CV278

CV279

CV280

CV292

CV287

CV294

CV284

CV285

CV286
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1 1 1 1 1 1 1 1 1 1 1 1 H10 AH26
H11 FBVDDQ_15 PEX_IOVDDQ_7 AH27 2 2 2 2
H12 FBVDDQ_16 PEX_IOVDDQ_8 AJ27
H13 FBVDDQ_17 PEX_IOVDDQ_9 AK27
2 2 2 2 2 2 2 2 2 2 2 2 H14 FBVDDQ_18 PEX_IOVDDQ_10 AL27 N13P@ N13P@ N13P@ N13P@

POWER
H15 FBVDDQ_19 PEX_IOVDDQ_11 AM28
N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ N13P@ H16 FBVDDQ_20 PEX_IOVDDQ_12 AN28
FBVDDQ_21 PEX_IOVDDQ_13 Under GPU(below 150mils)
H18
H19 FBVDDQ_22 +3VS_VGA
H20 FBVDDQ_23
FBVDDQ_24

.1U_0402_16V7K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
N13P@ H21 AH12 +PEX_PLLHVDD RV138 1 @ 2 0_0402_5%
FBVDDQ_25 PEX_PLL_HVDD

CV70

CV74

CV73
H22 1 1 1
H23 FBVDDQ_26
H24 FBVDDQ_27
H8 FBVDDQ_28 AG12 +PEX_SVDD3V3
H9 FBVDDQ_29 PEX_SVDD_3V3 2 2 2
rise 1.5v system source voltage to 1.55-1.57V L27 FBVDDQ_30
FBVDDQ_31
N13P@ N13P@ N13P@ Place near balls +1.05VS_VGA
M27 LV2 N13P@
N27 FBVDDQ_32 AG26 +PEX_PLLVDD +PEX_PLLVDD 120mA 2 1
FBVDDQ_33 PEX_PLLVDD

.1U_0402_16V7K

1U_0402_6.3V6K

4.7U_0603_6.3V6K
P27
C FBVDDQ_34 C

CV65

CV66
CV3
R27 1 1 1 BLM18PG121SN1D_0603
T27 FBVDDQ_35
FBVDDQ_36 +3VS_VGA
120ohms @100MHz (ESR=0.18)
T30 J8
T33 FBVDDQ_37 VDD33_0 K8
FBVDDQ_38 VDD33_1 Place near balls Place near GPU 2 2 2
V27 L8 RV5
W27 FBVDDQ_39 VDD33_2 M8 +VDD33 2 1 N13P@
FBVDDQ_40 VDD33_3

.1U_0402_16V7K

.1U_0402_16V7K

4.7U_0603_6.3V6K
W30 N13P@ N13P@
+1.5VS_VGA FBVDDQ_41

1U_0402_6.3V6K
CV109

CV111

CV293

CV75
W33 1 1 1 1 0_0603_5%
Y27 FBVDDQ_42 N13P@
FBVDDQ_43 AH8 +IFPAB_PLLVDD1 RV40 2 10K_0402_5%
IFPAB_PLLVDD AJ8 RV48 1 @ 2 1K_0402_1%
IFPAB_RSET 2 2 2 2
Place near balls
2 RV141 @1 FB_VDDQ_SENSE
10_0402_5% AG8 +IFPAB_IOVDD 1 RV65 2 10K_0402_5% N13P@ +VDD33
@ IFPA_IOVDD AG9 N13P@ N13P@ N13P@ N13P@
IFPB_IOVDD Inc 2pcs 0.1u

.1U_0402_16V7K

.1U_0402_16V7K
2 RV142 1 FB_VSS_SENSE F1
FB_VDDQ_SENSE following DG

CV303

N13P@ CV304
10_0402_5% N13P@ 1 1
AF7 +IFPC_PLLVDD 1 RV42 2 10K_0402_5%
+1.5VS_VGA IFPC_PLLVDD

N13P@
F2 AF8 RV43 2 @ 1 1K_0402_1%
FB_GND_SENSE IFPC_RSET
AF6 +IFPC_IOVDD 1 RV44 2 10K_0402_5% 2 2
1 2 J27 IFPC_IOVDD
RV6 N13P@ 40.2_0402_1% FB_CAL_PD_VDDQ
CALIBRATION PIN DDR3 AG7 +IFPD_PLLVDD 1
N13P@
RV45 2 10K_0402_5%
1 2 H27 IFPD_PLLVDD AN2 RV46 1 @ 2 1K_0402_1%
RV8 N13P@ 42.2_0402_1% FB_CAL_PU_GND IFPD_RSET
FB_CAL_x_PD_VDDQ 40.2Ohm AG6 +IFPD_IOVDD 1
N13P@
RV47 2 10K_0402_5%
1 2 H25 IFPD_IOVDD
RV9 N13P@ 51.1_0402_1% FB_CAL_TERM_GND
FB_CAL_x_PU_GND 42.2Ohm AB8 +IFPEF_PLLVDD1
N13P@
RV72 2 10K_0402_5%
IFPEF_PLVDD AD6 1 RV50 2 1K_0402_1%
IFPEF_RSET
FB_CAL_xTERM_GND 51.1Ohm Place near balls AC7
N13P@
N13P@
IFPE_IOVDD AC8 +IFPE_IOVDD1 RV73 2 10K_0402_5%
IFPF_IOVDD
B N13P@ B

+3VS to +3VS_VGA
N13P-PES-A1_FCBGA908

N13P@ +3VS +3VS_VGA

J10
@
1 2
1 2

JUMP_43X79
+5VALW
QV5 CV57
LP2301ALT1G_SOT23 10U_0603_6.3V6M

D
R1109 @ N13P@ 3 1 2 1
0_0402_5% R1103 N13P@

1
2 1 100K_0402_5%
<10,42,46,51,52,53,54> SUSP#
N13P@

G
2

2
RV205 RV206
DGPU_PWR_EN# 1 2 470_0603_5%
10K_0402_5% @

1 2
1
D

CV241
R1104 N13P@ 1 D

.1U_0402_16V7K
2 1 2 Q128 RV207 @
<18,23> DGPU_PWR_EN
G 2N7002_SOT23 2 2 1 DGPU_PWR_EN#
0_0402_5% S N13P@ QV6 @ G

3
2
N13P@ S 10K_0402_5%

3
1
2N7002_SOT23

R1105

.1U_0402_16V7K
CV242
100K_0402_5% 1
N13P@

2
A A
@
2

Security Classification
2011/10/27
Compal Secret Data
2012/10/27 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13X-POWER
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-7983P
Date: Thursday, January 05, 2012 Sheet 25 of 60
5 4 3 2 1