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I. INTRODUCTION
b)
It is well known that boost topology is highly effective in Fig.1. Cascaded two-switch buck-boost topologies: a) boost-buck-
PFC applications, provided that the dc output voltage is close cascaded, b) buck-boost-cascaded
to, but slightly greater than the peak AC input voltage [1]. In
universal-input applications, with the RMS input line voltage Q2 L2 D1
in the 90-305V range, the output voltage has to be set to
about 450V. At low line (90Vrms), the switch conduction
losses are high because the input RMS current has the largest
L1
value, and the largest step-up conversion is required. The
inductor has to be oversized for large RMS current at low line C1
C2 Ro
input, and for the highest volt-seconds applied throughout the Vg
Q1
input-line range. As a result, a boost converter designed for
universal-input PFC applications is heavily oversized D2
compared to a converter designed for a narrow range of input
line voltages. Furthermore, because of the large energy
storage filter capacitor at the output, the boost converter has
inrush current problem that can only be mitigated using Fig. 2. Boost Interleaved Buck-Boost Converter (BoIBB).
additional components.
In universal-input PFC applications, the capability of The boost and the buck converter are known to have the
providing both step-up and step-down conversion is attractive potentials for highest efficiency and lowest component
because the output DC voltage can be set to any value. stresses if their conversion characteristics meet the
However, conventional single-switch buck-boost topologies, input/output specifications. Based on this observation, our
including the plain buck-boost, flyback, SEPIC, and Cuk objective was to construct a converter topology with two
converters [2, 3] have greatly increased component stresses, independently controllabe switches such that it can operate as
component sizes, and reduced efficiency compared to the a buck or as a boost in portions of the AC line cycle. Such
boost converter. two-switch topologies could offer higher efficiency, reduced
size, and ability to arbitrarily choose the DC output voltage.
1
This work is supported by Philips Research, Briarcliff Manor, NY, through Colorado Power Electronics Center
L2 D1 TABLE I
iL2 (t)
L1
Boost Mode Buck Mode
C1 C2 Ro
Q1 active always off
vg(t)
iQ1(t)
Q2 always on active
M 1 /(1 − d1 ) d2
Q1
d1 V
IL1 0
1 − d 1 Ro
(a)
iQ2(t) Q2 L2 iL2 (t)
IL2 V / Ro V / Ro
VC1 0 Vg − V
iL1 (t)
L1 II. OPERATING MODES AND STEADY-STATE
C1 CHARACTERISTICS OF THE BOOST INTERLEAVED
v g(t) C2 Ro
BUCK-BOOST CONVERTER
v g (t ) V
i g (t ) = (4)
Re Tac /4 t
tm
where the emulated resistance Re is constant for a given d1(t), d2(t) (a)
output power.
1 d2(t)
Fig. 4(a) shows the waveforms of the input and the output
voltage in one half of a line period, for the case when the
output voltage is chosen to be lower than the peak of the d1(t)
V/VM
input voltage. The converter operates in boost or buck modes
according to the condition of the input and the output DC t
voltage. In the following analysis, CCM operation is Boost
Boost Buck
assumed.
(b)
A. Boost mode
Fig. 4. (a) Rectified input voltage and DC output voltage waveforms,
In the time period [0, tm], shown in Fig. 4, the input voltage (b) duty ratios of the boost and the buck cells in the BoIBB converter
is lower than the output voltage, the boost switch cell (Q1, D1) operated as a low-harmonic rectifier.
is active, and the buck cell (Q2, D2) is inactive (Q2 is always
on). tm VM sin(ω t ) VM2 sin 2 (ω t ) 2
∫
4
I L1 , rms = ( − ) dt (8)
In quasi steady-state operation, the duty ratios of the Tac 0 Re VRe
transistors as functions of time are:
The volt-seconds applied to L1 and L2 during a switching
V
d 1 (t ) = 1 − M sin(ω t ) period are the same as the volt-seconds applied to the
V (5)
inductor in a simple boost converter, and are given by
d 2 (t ) = 1
v ⋅ s = d 1 (t )Ts ⋅ v g (t )
buck-boost-
120 0.22 0.417 0.25 0.306 cascaded
1
(a)
TABLE III Inductor(s) Conduction Losses BoIBB
3.5 Compared to Boost Converter
COMPARISON OF SWITCH VOLTAGE STRESSES single-switch
buck-boost
3
buck-boost-
2.5 cascaded
Q1 Q2 D1 D2 boost-buck-
2 cascaded
Boost Vo Vo
1.5
0.5
Buck-boost-cascaded Vo VM Vo VM Vo(v)
0
150 200 250 300 325 350 400 450
Boost-buck-cascaded VM VM Vo VM
(b)
BoIBB VM VM Vo VM
Fig. 5. (a) Worst-case transistor conduction losses comparisons (b)
worst-case inductor conduction losses comparisons
Vo: output DC voltage, VM: input peak voltage
v ⋅ s = (1 − d 2 (t ))Ts ⋅ V
The duty ratios of Q1 and Q2 during one half of a line cycle V2 (14)
= (V − ) ⋅ Ts
are plotted in Fig. 4(b). The transitions between the boost and VM sin(ω t )
buck modes are continuous. Both Q2 and L2 are conducting
currents in both boost and buck modes, and the RMS currents
The volt-seconds applied to L1 are close to zero in the buck
are found from (5), (6), and (11):
mode.
As an example, the component RMS currents are evaluated
I Q2 , rms =
4
Tac ∫ [d (i
0
tm
2 L1 + iL2 ) 2 ] boost dt + ∫tm
Tac / 4
[d i ]
2 L2
2
buck dt
and shown in TABLE II for two different lines.
e
sin 2 (ω t )dt + ∫tm 2
Re Vo
sin 3 (ω t )dt
In this section, the BoIBB converter is compared to the
boost, the single-switch buck-boost, and cascaded buck-boost
(12) topologies in terms of switch voltage stresses, conduction
losses, and size of magnetics. All results are obtained under
4 tm VM4 Tac / 4 VM4 the assumption that the converters operate in continuous
I L2 ,rms =
Tac ∫0 V 2
Re2
sin 4 (ω t )dt + ∫ tm V 2
Re2
sin 4 (ω t )dt
conduction mode (CCM).
0.0008 0.0004
0.0004
0.0004 0.0002
Fig. 6. The volt-seconds applied to the inductors (a) boost, (b) single-switch buck-boost, (c) two-switch buck-boost
and have almost the same voltage stress as the boost voltage, the loss can be as low as 50% of the inductor
converter (at the expense of more switching devices). conduction loss in the boost converter.
In this comparison, we assume that all devices have the The volt-seconds applied to the inductor in the single-
same on-resistance, and so we compare the total transistor switch buck-boost converters are given by (15). For a two-
RMS currents defined as the sum of the squares of the switch buck-boost converter, an inductor can play the role as
individual transistor RMS currents. In practice, for the same part of a low-frequency filter in one of the modes. In this
die size, the on-resistance for the transistor in single-switch case, the volt-seconds applied during a switching cycle are
buck-boost converters would be higher because of the higher almost zero. When the input voltage is lower than the output
voltage rating. The worst case for switch conduction losses voltage, the inductor operates as in a boost converter and the
occurs at the minimum ac line input (90Vrms). Switch volt-seconds applied follow from (9). When the input voltage
conduction losses for all buck-boost topologies are found as is greater than the output voltage, the inductor operates as in a
functions of the DC output voltage and normalized to the buck converter, and the volt-seconds applied follow from
switch conduction losses in a boost converter operating with (14).
fixed DC output voltage equal to 450V. The results are
shown in Fig. 5(a). The proposed converter and the boost- VV M sin ω t
buck-cascaded converter have the total transistor conduction v⋅s = ⋅ Ts (15)
V + V M sin(ω t )
losses very close to the boost converter, and much smaller
losses than in the single-switch buck-boost or the buck-boost-
cascaded converters. For example, at 300V output, the The total volt-seconds applied to the inductors for the
transistor conduction losses in the single-switch buck-boost boost, single-switch buck-boost and two-switch buck-boost
converter and the buck-boost-cascaded converter are 1.78 and converters are plotted in Fig 6. as functions of time over one
2.15 times of the transistor conduction losses in the new half of the line cycle. Three curves are shown, based on
topology. different rms input voltages and for a fixed switching
Lf Q2 L2 D1
C. Comparison of magnetics
inductor size.
Q1 D2
The worst-case inductor copper loss also occurs at the Vcontrol Dual PWM
Current Shaping Controller
minimum AC line input. The results for copper losses as Driver
d2=1+Vcontrol
d1=Vcontrol
Vcontrol
-1 1
(a)
vcontrol(t)
1 vg(t)
V
t
-1+Vo/VM
(b) (a)
Fig. 8. (a) Duty ratios as functions of Vcontrol , (b) Vcontrol(t) in half line
cycle
(b)
Efficiency
0.948
0.946
0.944
0.942
0.94
0.938
0.936
0.934
0.932 Vin,rms
0.93
90 120 150 180 210 240 270
Fig. 10. Rectified input voltage and input line current: (a) 120Vrms low-line
input, (b) 240Vrms high-line input
Ch2: 100V/div, Ch4: 0.5A/div
frequency of 100KHz. For single-switch and two-switch Fig. 11 shows the rectifier efficiency as a function of the
buck-boost converters, the output voltage is set to 325V, input line RMS voltage. Efficiency of over 93% is achieved
while the boost dc output voltage is 450V. The peak volt- throughout the line voltage range (90Vrms-264Vrms).
seconds applied to the inductors for all two-switch buck-
boost converters has the smallest value of 0.812e-3(vs), VI. CONCLUSIONS
compared to 1.8e-3(vs) for all single-switch buck-boost
converters, and 1.125e-3(vs) for the boost converter. A new two-switch topology, named Boost Interleaved
As a result of low inductor conduction losses and low peak Buck-Boost (BoIBB) converter, has been proposed for
volt-seconds applied, the BoIBB topology has the potential universal-input PFC applications. The new converter has
for smaller inductor size compared to other buck-boost advantages of low voltage stresses, low switch and inductor
topologies and the boost converter. conduction losses, potential for small inductor size, and the
ability to set the output dc voltage arbitrarily. Experimental
V. EXPERIMENTAL RESULTS results are provided to verify the validity of the new
topology. High efficiency (over 93% throughout the whole ac
An experimental prototype (Fig. 7) has been built to verify line voltage range), and low current harmonic distortion at
feasibility of the proposed converter. L1 and L2 are selected so both high and low line inputs are demonstrated.
that the converter operates in CCM in both boost and buck
modes at full load. A single control voltage Vcontrol is used to REFERENCES
produce the switch control signals with the duty ratios d1 for
[1] R. Erickson, Fundamentals of Power Electronics, Kluwer 1997, ch17.
the switch Q1 and d2 for the switch Q2 as shown in Fig. 8(a).
[2] D.S.L. Simonetti, J.Sebastian, F.S.dos Reis and J.Uceda,"Design
The steady state value of Vcontrol as a function of time is criteria for SEPIC and CUK converters as power factor preregulators in
shown in Fig. 8(b). The control voltage is the input to a dual discontinuous conduction mode," IEEE IECON92, 1992, pp283-288.
PWM circuit that outputs drive signals for Q1 and Q2. The [3] R.Erickson, R.Madigan, and S.Singer," Design of a simple high power
factor rectifier based on the flyback converter," IEEE APEC90, 1990,
experimental waveform of Vcontrol is shown in Fig. 9. pp.792-801.
Average current control is applied to achieve PFC operation. [4] O. Lopez, L. Vicuna, M. Castilla, J. Matas and M. Lopez, "Sliding-
Experimental waveforms are shown in Fig 9. The output mode-control design of a high-power-factor buck-boost rectifier," IEEE
power is 100W. In Fig. 10(a), the input line voltage has low Trans. Indu. Elec., Vol. 46, No.3, June 1999, pp.604-612.
[5] M.C.Ghanem, K. Al-Hassad, and G.Roy," A new control strategy to
rms value 120Vrms and the converter operates in the boost
achieve sinusoidal line in a cascade buck-boost converter," IEEE Trans.
mode always. The efficiency is 93.8% and the total current Indu. Elec., Vol.43, pp. 441-449, May 1996.
harmonic distortion is 1.9%. The waveforms of Fig. 10(b) are [6] D.Zhou, "Synthesis of PWM Dc-to-Dc Power Converters,” Ph.D.
for high input (240Vrms) and converter works in the boost thesis, California Institute of Technology, October 1995
and buck mode in different parts of the line period. The
efficiency is 93.8% and the total current harmonic distortion
is 4.6%.