TOSHIBA Satellite L450D - COMPAL LA-5831P

A B C D E
1 1
Compal confidential
2
Low Cost Los Angeles 10AL+ 2
NBWAE LA-5831P Schematics Document

Mobile AMD S1G2
RS780MN & RS780MC / SB700
3
2009-08-12 Rev. 1.0 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2009-02-12 2009-02-12 Title
Issued Date Deciphered Date Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-5831P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 12, 2009 Sheet 1 of 44
A B C D E
A B C D E
Compal Confidential Memory BUS(DDRII) Thermal Sensor Clock Generator

Fan Control AMD S1G2 CPU Dual Channel ADM1032ARMZ page 7 SLG8SP626 page 16
page 5
Model Name : NBWAE
uFCPGA-638 Package 1.8V DDRII 667/800MHZ
File Name : LA-5831P page 5,6,7.8
200pin DDRII-SO-DIMM X2
1 Hyper Transport Link 2.6GHz BANK 0, 1, 2, 3 page 9,10 1
16X16
CRT
page 17
ATI
RTL8103E LAN 10/100M RJ45
RS780MN PCIe port 3 page 26
page 26
LCD Conn. PCIe 4x
page 18 RS780MC
1.5V 2.5GHz(250MB/s)
PCIe Mini Card WLAN
PCIe Port 2
HDMI Conn. PCIE-Express 4X
USB Port 8 page 27
page 19
page 11,12,13,14.15
2 2
A-Link Express II
4X PCI-E USB/B Right USB/B Left
USB port 0,1 USB port 2
page 25 page 25
USB 3IN1 Card Reader Int. Camera

5V 480MHz USB port 9
RTS5159-VDD
USB port 4 page 18
ATI page 28
SB700 SATA port 1 SATA HDD

5V 1.5GHz(150MB/s) page 25
SATA port 3 SATA ODD

5V 1.5GHz(150MB/s) page 25
page 20,21,22,23,24
3 3
HD Audio 3.3V 24.576MHz/48Mhz

LPC BUS
3.3V 33 MHz
MDC 1.5 Conn HDA Codec

Debug Port ALC272
page 31 page 29
ENE KB926D3
page 31 page 32
RTC CKT.
page 20
NBWAE Sub-boards RJ11 MIC Conn Int. MIC Conn HP Conn AMP.
page 31
Touch Pad Int.KBD SPI ROM page 30 page 30 page 30 TPA6017
page 33 page 31 page 31 page 30
Power On/Off CKT. Power/B
page 33
LS-4574P page 33
SPK Conn
page 30
DC/DC Interface CKT. Cap Sensor/B
4 4
page 34
LS-5822P page 33
USB/B
Power Circuit DC/DC LS-5821P page 25
page 35,36,37,38
39,40,41.42
Security Classification
2009-02-12
Compal Secret Data
2009-02-12 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Block Diagram
A B C D E
5 4 3 2 1
DESIGN CURRENT 100mA +3VL

B+ DESIGN CURRENT 100mA +5VL
Ipeak=5A, Imax=3.5A, Iocp min=7.9 +5VALW
SUSP#
N-CHANNEL DESIGN CURRENT 5A +5VS

SI4800BDY
D D
Ipeak=5A, Imax=3.5A, Iocp min=7.7 +3VALW
SUSP#
TPS51125RGER N-CHANNEL DESIGN CURRENT 5A +3VS
SI4800BDY
UMA_ENVDD
P-CHANNEL DESIGN CURRENT 1.0A +LCD_VDD

AO-3413
SUSP
LDO DESIGN CURRENT 2A +1.5VS

APL5331KAC
WOL_EN#
DESIGN CURRENT 330mA +3V_LAN
P-CHANNEL
AO-3413
C C
DESIGN CURRENT 500mA +2.5VS

LDO
APL5508
POK
Ipeak=5A, Imax=3.5A, Iocp min=7.78 +1.2VALW
VLDT_EN
N-CHANNEL DESIGN CURRENT 4.5A +1.2V_HT

IRF8113PBF
TPS51124RGER
Ipeak=7A, Imax=4.9A, Iocp min=9.32 +NB_CORE (+1.1VS)
SUSP#
CPU_VCORE_ENABLE
B Ipeak=18A, Imax=12.6A, Iocp min=30 +CPU_CORE0 B
Ipeak=18A, Imax=12.6A, Iocp min=30 +CPU_CORE1

ISL6265 DESIGN CURRENT 4A +VDDNB
SYSON
Ipeak=8A, Imax=5.6A, Iocp min=8.87 +1.8V
TPS51117RGYR SUSP#
N-CHANNEL DESIGN CURRENT 1A +1.8VS

IRF8113PBF
SYSON#
LDO DESIGN CURRENT 2A +0.9V

APL5331KAC
A A
Security Classification
2009-02-12
Compal Secret Data
2009-02-12 Title
Issued Date Deciphered Date
Power Map
5 4 3 2 1
A B C D E
Voltage Rails
O : ON Platform CPU NB SB
X : OFF S1G2 RS780MC SB700
PUMA@
S1G2 RS780MN SB700
S1G3 RS880MC SB710
TIGRIS@
S1G3 RS880M SB710
1
+5VS 1
power
plane +3VS
+2.5VS
+1.8VS
+1.5VS
B+ +5VALW +1.8V @ : just reserve , no build
+1.1VS
+3VL +3VALW +0.9V
+1.2V_HT
+5VL +1.2VALW BTO (Build-To-Order) Option Table
State +VDDNB
+RTCVCC +3V_LAN
+CPU_CORE_0
+CPU_CORE_1
Function Modem HDMI CAMERA & MIC
Description (R) (Y) (X)
Explain CAMERA MIC

S0 O O O O
BTO MDC@ HDMI@ CAM@ MIC@
S1 O O O O
2 2
S3 O O O X
S5 S4/AC O O X X
S5 S4/ Battery only O X X X
SMBUS Control Table
S5 S4/AC & Battery
don't exist X X X X CPU LCD HDMI
SOURCE INVERTER BATT HDMI SODIMM CLK WLAN DDC DDC NEW
CEC THERMAL GEN CARD
I / II ROM ROM
SENSOR
EC_SMB_CK1
KB926
SB700 SM Bus0 Address SB700 SM Bus1 Address EC_SMB_DA1 V
EC_SMB_CK2
KB926
EC_SMB_DA2 V
Power Device HEX Address Power Device HEX Address
I2C_CLK RS780MN
3
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b +3VALW WLAN/WIMAX I2C_DATA RS780MC V 3
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b DDC_CLK0 RS780MN

+3VS Clock Generator D2 H 1101 0010 b DDC_DATA0 RS780MC V
DDC_CLK1 RS780MN
DDC_DATA1 RS780MC
SCL0
SB700
SDA0 V V
SCL1
KB926 SM Bus1 Address KB926 SM Bus2 Address SB700
V
SDA1
SCL2
Power Device HEX Address Power Device HEX Address SB700
SDA2
+3VL Smart Battery 16 H 0001 011X b +3VS CPU_ADM1032-1 98 H 1001 100X b SCL3
SB700
SDA3
KB926 ESB Address
4 Power Device HEX Address 4
+3VL Cap. Sensor Virtual I2C

Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
Notes List
A B C D E
A B C D E
+1.2V_HT
VLDT CAP. Near CPU Socket
250 mil
1 1 1 1 1 1
PUMA@ TIGRIS@ PUMA@ TIGRIS@ C3 C4 C5 C6
C1 C1 C2 C2
4.7U_0805_10V4Z 10U_0805_10V6K 4.7U_0805_10V4Z 10U_0805_10V6K 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
1 1
H_CADIP[0..15] H_CADOP[0..15]
<11> H_CADIP[0..15] H_CADOP[0..15] <11>
H_CADIN[0..15] H_CADON[0..15]
<11> H_CADIN[0..15] H_CADON[0..15] <11>
+1.2V_HT JCPUA PUMA@

C7
D1 HT LINK AE2 +VLDT_B 1 2 4.7U_0805_10V4Z
VLDT=500mA D2
VLDT_A0 VLDT_B0
AE3
< VLDT_A & VLDT_B : HyperTransport I/O ring power >
VLDT_A1 VLDT_B1
D3 AE4
VLDT_A2 VLDT_B2 TIGRIS@
D4 VLDT_A3 VLDT_B3 AE5
C7
H_CADIP0 E3 AD1 H_CADOP0 10U_0805_10V6K
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1
H_CADIP1 E1 AC2 H_CADOP1
F1 AC3
H_CADIP2 L0_CADIN_L1 L0_CADOUT_L1 H_CADOP2
G3 L0_CADIN_H2 L0_CADOUT_H2 AB1
H_CADIN2 G2 AA1 H_CADON2
G1 AA2
H1 AA3
2 H_CADIP4 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP4 2
J1 L0_CADIN_H4 L0_CADOUT_H4 W2
H_CADIN4 K1 W3 H_CADON4
L3 V1
L2 L0_CADIN_L5 L0_CADOUT_L5 U1
H_CADIP6 L1 U2 H_CADOP6
M1 U3
N3 L0_CADIN_H7 L0_CADOUT_H7 T1
H_CADIN7 N2 R1 H_CADON7
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4
H_CADIN8 F5 AD3 H_CADON8
< From NB > F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 < To NB >
H_CADIN9 F4 AC5 H_CADON9
G5 L0_CADIN_H10 L0_CADOUT_H10 AB4
H_CADIN10 H5 AB3 H_CADON10
H3 AB5
H4 AA5
K3 Y5
K4 W5
L5 V4
M5 L0_CADIN_L13 L0_CADOUT_L13 V3
H_CADIP14 M3 V5 H_CADOP14
M4 U5
N5 T4
P5 T3
L0_CADIN_L15 L0_CADOUT_L15
<11> H_CLKIP0 J3 Y1 H_CLKOP0 <11>

L0_CLKIN_H0 L0_CLKOUT_H0
<11> H_CLKIN0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 H_CLKON0 <11>
<11> H_CLKIP1 J5 Y4 H_CLKOP1 <11>
L0_CLKIN_H1 L0_CLKOUT_H1
<11> H_CLKIN1 K5 Y3 H_CLKON1 <11>
L0_CLKIN_L1 L0_CLKOUT_L1
<11> H_CTLIP0 N1 R2 H_CTLOP0 <11>

L0_CTLIN_H0 L0_CTLOUT_H0
<11> H_CTLIN0 P1 R3 H_CTLON0 <11>
3 L0_CTLIN_L0 L0_CTLOUT_L0 3
<11> H_CTLIP1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 H_CTLOP1 <11>
<11> H_CTLIN1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 H_CTLON1 <11>
6090022100G_B @
< FAN Control Circuit : Vout = 1.6 x Vset >
+5VS
1A
1
D1
2 @
+FAN1 C183 1SS355_SOD323-2
JFAN @ +3VS
1
2
C192 10U_0805_10V4Z +FAN1 1

1 1
2 2
1
1
10U_0805_10V4Z 2 3
2 U6 D2 C9 3 R12
1 8 @ @ 4
EN GND BAS16_SOT23-3 1000P_0402_25V8J GND 10K_0402_5%
2 7 5
VIN GND 1 GND
3 6
2
2
VOUT GND ACES_85204-0300N
< From EC ><32> EN_DFAN1 4
VSET GND
5 FAN_SPEED1 <32> < To EC >
2
APL5607KI-TRG_SO8 C8
4 @ 4
0.01U_0402_25V7K
1

AMD CPU S1G3 HT I/F
A B C D E
A B C D E
< Processor DDR2 Memory Interface >
< DDR2 VREF is 0.5 ratio > < PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH > JCPUC
<9> DDR_B_D[63..0]
+1.8V MEM:DATA
DDR_A_D[63..0] <10>
DDR_A_CLK0 DDR_B_CLK0 < From/To SO_DIMMB > DDR_B_D0 C11 G12 DDR_A_D0
DDR_B_D1 MB_DATA0 MA_DATA0 DDR_A_D1
1 1 A11
MB_DATA1 MA_DATA1
F12 < From/To SO_DIMMA >
2
C10 C14 DDR_B_D2 A14 H14 DDR_A_D2

R1 DDR_B_D3 MB_DATA2 MA_DATA2 DDR_A_D3
B14 MB_DATA3 MA_DATA3 G14
1.5P_0402_50V9C 1.5P_0402_50V9C DDR_B_D4 G11 H11 DDR_A_D4
1K_0402_1% DDR_A_CLK#0 2 DDR_B_CLK#0 2 DDR_B_D5 MB_DATA4 MA_DATA4 DDR_A_D5
E11 MB_DATA5 MA_DATA5 H12
1 DDR_B_D6 DDR_A_D6 1
D12 C13
1
+MCH_REF DDR_B_D7 MB_DATA6 MA_DATA6 DDR_A_D7

A13 MB_DATA7 MA_DATA7 E13
DDR_B_D8 A15 H15 DDR_A_D8
MB_DATA8 MA_DATA8
2
1 1 DDR_A_CLK1 DDR_B_CLK1 DDR_B_D9 A16 E15 DDR_A_D9

R2 C12 C13 DDR_B_D10 MB_DATA9 MA_DATA9 DDR_A_D10
1 1 A19 E17
C11 C15 DDR_B_D11 MB_DATA10 MA_DATA10 DDR_A_D11
A20 MB_DATA11 MA_DATA11 H17
1K_0402_1% 0.1U_0402_16V7K 1000P_0402_25V8J DDR_B_D12 C14 E14 DDR_A_D12
2 2 1.5P_0402_50V9C 1.5P_0402_50V9C DDR_B_D13 MB_DATA12 MA_DATA12 DDR_A_D13
D14 F14
1
DDR_A_CLK#1 2 DDR_B_CLK#1 2 DDR_B_D14 MB_DATA13 MA_DATA13 DDR_A_D14

C18 MB_DATA14 MA_DATA14 C17
DDR_B_D15 D18 G17 DDR_A_D15
D20 MB_DATA16 MA_DATA16 G18
DDR_B_D17 A21 C19 DDR_A_D17
D24 MB_DATA18 MA_DATA18 D22
DDR_B_D19 C25 E20 DDR_A_D19
B20 E18
C20 F18
B24 MB_DATA22 MA_DATA22 B22
DDR_B_D23 C24 C23 DDR_A_D23
E23 MB_DATA24 MA_DATA24 F20
DDR_B_D25 E24 F22 DDR_A_D25
G25 H24
G26 J19
C26 MB_DATA28 MA_DATA28 E21
DDR_B_D29 D26 E22 DDR_A_D29
G23 H20
G24 MB_DATA31 MA_DATA31 H22
+0.9V +0.9V DDR_B_D32 AA24 Y24 DDR_A_D32
JCPUB DDR_B_D33 MB_DATA32 MA_DATA32 DDR_A_D33
AA23 AB24
AD24 MB_DATA34 MA_DATA34 AB22
D10 W10 DDR_B_D35 AE24 AA21 DDR_A_D35
VTT1 MEM:CMD/CTRL/CLK VTT5 DDR_B_D36 MB_DATA35 MA_DATA35 DDR_A_D36
C10
VTT2 VTT6
AC10 < VTT regulator voltage > AA26
MB_DATA36 MA_DATA36
W22
Place them close to CPU within 1" B10 AB10 DDR_B_D37 AA25 W21 DDR_A_D37
2 VTT3 VTT7 DDR_B_D38 MB_DATA37 MA_DATA37 DDR_A_D38 2
AD10 VTT4 VTT8 AA10 AD26 MB_DATA38 MA_DATA38 Y22
A10 DDR_B_D39 AE25 AA22 DDR_A_D39
R4 1 MEM_P VTT9 DDR_B_D40 MB_DATA39 MA_DATA39 DDR_A_D40
2 39.2_0402_1% AF10 AC22 Y20
R3 1 MEM_N MEMZP VTT_SENSE DDR_B_D41 MB_DATA40 MA_DATA40 DDR_A_D41
+1.8V 2 39.2_0402_1% AE10 MEMZN VTT_SENSE Y10 PAD T1 AD22 MB_DATA41 MA_DATA41 AA20
DDR_B_D42 AE20 AA18 DDR_A_D42
+MCH_REF DDR_B_D43 MB_DATA42 MA_DATA42 DDR_A_D43
T2 PAD H16 W17 AF20 AB18
RSVD_M1 MEMVREF DDR_B_D44 MB_DATA43 MA_DATA43 DDR_A_D44
AF24 MB_DATA44 MA_DATA44 AB21
DDR_A_ODT0 T19 B18 DDR_B_D45 AF23 AD21 DDR_A_D45
<10> DDR_A_ODT0 DDR_A_ODT1 MA0_ODT0 RSVD_M2 PAD T3 DDR_B_D46 MB_DATA45 MA_DATA45 DDR_A_D46
< To SO_DIMMA > <10> DDR_A_ODT1 V22 MA0_ODT1 AC20 MB_DATA46 MA_DATA46 AD19
U21 W26 DDR_B_ODT0 DDR_B_D47 AD20 Y18 DDR_A_D47
MA1_ODT0 MB0_ODT0 DDR_B_ODT1 DDR_B_ODT0 <9> DDR_B_D48 MB_DATA47 MA_DATA47 DDR_A_D48
V19 MA1_ODT1 MB0_ODT1 W23 DDR_B_ODT1 <9> < To SO_DIMMB > AD18 MB_DATA48 MA_DATA48 AD17
Y26 DDR_B_D49 AE18 W16 DDR_A_D49
DDR_CS0_DIMMA# T20 MB1_ODT0 DDR_B_D50 MB_DATA49 MA_DATA49 DDR_A_D50
<10> DDR_CS0_DIMMA# MA0_CS_L0 AC14 MB_DATA50 MA_DATA50 W14
< To SO_DIMMA > <10> DDR_CS1_DIMMA# DDR_CS1_DIMMA# U19 V26 DDR_CS0_DIMMB# DDR_B_D51 AD14 Y14 DDR_A_D51
MA0_CS_L1 MB0_CS_L0 DDR_CS1_DIMMB# DDR_CS0_DIMMB# <9> DDR_B_D52 MB_DATA51 MA_DATA51 DDR_A_D52
U20
MA1_CS_L0 MB0_CS_L1
W25 DDR_CS1_DIMMB# <9> < To SO_DIMMB >
DDR_B_D53
AF19
MB_DATA52 MA_DATA52
Y17
DDR_A_D53
V20 U22 AC18 AB17
MA1_CS_L1 MB1_CS_L0 DDR_B_D54 MB_DATA53 MA_DATA53 DDR_A_D54
AF16 AB15
DDR_CKE0_DIMMA J22 DDR_CKE0_DIMMB DDR_B_D55 MB_DATA54 MA_DATA54 DDR_A_D55
<10> DDR_CKE0_DIMMA J25 DDR_CKE0_DIMMB <9> AF15 AD15
DDR_CKE1_DIMMA J20 MA_CKE0 MB_CKE0 DDR_CKE1_DIMMB DDR_B_D56 MB_DATA55 MA_DATA55 DDR_A_D56
< To SO_DIMMA > <10> DDR_CKE1_DIMMA MA_CKE1 MB_CKE1
H26 DDR_CKE1_DIMMB <9> < To SO_DIMMB > AF13
MB_DATA56 MA_DATA56
AB13
DDR_B_D57 AC12 AD13 DDR_A_D57
N19 P22 AB11 Y12
MA_CLK_H0 MB_CLK_H0 DDR_B_D59 MB_DATA58 MA_DATA58 DDR_A_D59
N20 R22 Y11 W11
DDR_A_CLK0 MA_CLK_L0 MB_CLK_L0 DDR_B_CLK0 DDR_B_D60 MB_DATA59 MA_DATA59 DDR_A_D60
<10> DDR_A_CLK0 E16 A17 DDR_B_CLK0 <9> AE14 AB14
DDR_A_CLK#0 MA_CLK_H1 MB_CLK_H1 DDR_B_CLK#0 DDR_B_D61 MB_DATA60 MA_DATA60 DDR_A_D61
< To SO_DIMMA > <10> DDR_A_CLK#0 F16
MA_CLK_L1 MB_CLK_L1
A18 DDR_B_CLK#0 <9> < To SO_DIMMB > AF14
MB_DATA61 MA_DATA61
AA14
DDR_A_CLK1 Y16 AF18 DDR_B_CLK1 DDR_B_D62 AF11 AB12 DDR_A_D62
<10> DDR_A_CLK1 DDR_A_CLK#1 MA_CLK_H2 MB_CLK_H2 DDR_B_CLK#1 DDR_B_CLK1 <9> DDR_B_D63 MB_DATA62 MA_DATA62 DDR_A_D63
<10> DDR_A_CLK#1 AA16 AF17 DDR_B_CLK#1 <9> AD11 AA12
MA_CLK_L2 MB_CLK_L2 MB_DATA63 MA_DATA63
P19 MA_CLK_H3 MB_CLK_H3 R26 <9> DDR_B_DM[7..0] DDR_A_DM[7..0] <10>
P20 R25 DDR_B_DM0 A12 E12 DDR_A_DM0
MA_CLK_L3 MB_CLK_L3 DDR_B_DM1 MB_DM0 MA_DM0 DDR_A_DM1
< To SO_DIMMA > <10> DDR_A_MA[15..0] DDR_B_MA[15..0] <9> < To SO_DIMMB > < To SO_DIMMB > B16
MB_DM1 MA_DM1
C15 < To SO_DIMMA >
DDR_A_MA0 N21 P24 DDR_B_MA0 DDR_B_DM2 A22 E19 DDR_A_DM2
DDR_A_MA1 MA_ADD0 MB_ADD0 DDR_B_MA1 DDR_B_DM3 MB_DM2 MA_DM2 DDR_A_DM3
M20 N24 E25 F24
N22 P26 AB26 AC24
3 DDR_A_MA3 MA_ADD2 MB_ADD2 DDR_B_MA3 DDR_B_DM5 MB_DM4 MA_DM4 DDR_A_DM5 3
M19 MA_ADD3 MB_ADD3 N23 AE22 MB_DM5 MA_DM5 Y19
DDR_A_MA4 M22 N26 DDR_B_MA4 DDR_B_DM6 AC16 AB16 DDR_A_DM6
L20 L23 AD12 Y13
DDR_A_MA6 MA_ADD5 MB_ADD5 DDR_B_MA6 MB_DM7 MA_DM7
M24 MA_ADD6 MB_ADD6 N25
DDR_A_MA7 L21 L24 DDR_B_MA7 DDR_B_DQS0 C12 G13 DDR_A_DQS0
DDR_A_MA8 MA_ADD7 MB_ADD7 DDR_B_MA8 <9> DDR_B_DQS0 DDR_B_DQS#0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS#0 DDR_A_DQS0 <10>
L19 M26 <9> DDR_B_DQS#0 B12 H13 DDR_A_DQS#0 <10>
DDR_A_MA9 MA_ADD8 MB_ADD8 DDR_B_MA9 DDR_B_DQS1 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS1
K22 K26 <9> DDR_B_DQS1 D16 G16 DDR_A_DQS1 <10>
DDR_A_MA10 MA_ADD9 MB_ADD9 DDR_B_MA10 DDR_B_DQS#1 MB_DQS_H1 MA_DQS_H1 DDR_A_DQS#1
R21 T26 <9> DDR_B_DQS#1 C16 G15 DDR_A_DQS#1 <10>
DDR_A_MA11 MA_ADD10 MB_ADD10 DDR_B_MA11 DDR_B_DQS2 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS2
L22 L26 <9> DDR_B_DQS2 A24 C22 DDR_A_DQS2 <10>
DDR_A_MA12 MA_ADD11 MB_ADD11 DDR_B_MA12 DDR_B_DQS#2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS#2
K20 MA_ADD12 MB_ADD12 L25 <9> DDR_B_DQS#2 A23 MB_DQS_L2 MA_DQS_L2 C21 DDR_A_DQS#2 <10>
DDR_A_MA13 V24 W24 DDR_B_MA13 DDR_B_DQS3 F26 G22 DDR_A_DQS3
MA_ADD13 MB_ADD13 <9> DDR_B_DQS3 MB_DQS_H3 MA_DQS_H3 DDR_A_DQS3 <10>
DDR_A_MA14 K24 J23 DDR_B_MA14 DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
DDR_A_MA15 MA_ADD14 MB_ADD14 DDR_B_MA15 <9> DDR_B_DQS#3 DDR_B_DQS4 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS4 DDR_A_DQS#3 <10>
K19 MA_ADD15 MB_ADD15 J24 <9> DDR_B_DQS4 AC25 MB_DQS_H4 MA_DQS_H4 AD23 DDR_A_DQS4 <10>
DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
<9> DDR_B_DQS#4 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS#4 <10>
DDR_A_BS#0 R20 R24 DDR_B_BS#0 DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
<10> DDR_A_BS#0 DDR_A_BS#1 MA_BANK0 MB_BANK0 DDR_B_BS#1 DDR_B_BS#0 <9> <9> DDR_B_DQS5 DDR_B_DQS#5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS#5 DDR_A_DQS5 <10>
< To SO_DIMMA > <10> DDR_A_BS#1 R23
MA_BANK1 MB_BANK1
U26 DDR_B_BS#1 <9> < To SO_DIMMB > <9> DDR_B_DQS#5 AF22
MB_DQS_L5 MA_DQS_L5
AB20 DDR_A_DQS#5 <10>
DDR_A_BS#2 J21 J26 DDR_B_BS#2 DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
<10> DDR_A_BS#2 MA_BANK2 MB_BANK2 DDR_B_BS#2 <9> <9> DDR_B_DQS6 DDR_B_DQS#6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS#6 DDR_A_DQS6 <10>
<9> DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6 <10>
DDR_A_RAS# DDR_B_RAS# DDR_B_DQS7 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS7
<10> DDR_A_RAS# R19 U25 DDR_B_RAS# <9> <9> DDR_B_DQS7 AF12 W12 DDR_A_DQS7 <10>
DDR_A_CAS# MA_RAS_L MB_RAS_L DDR_B_CAS# DDR_B_DQS#7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS#7
< To SO_DIMMA > <10> DDR_A_CAS# T22
MA_CAS_L MB_CAS_L
U24 DDR_B_CAS# <9> < To SO_DIMMB > <9> DDR_B_DQS#7 AE12
MB_DQS_L7 MA_DQS_L7
W13 DDR_A_DQS#7 <10>
DDR_A_WE# T24 U23 DDR_B_WE#
<10> DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# <9>
< From/To SO_DIMMB > < From/To SO_DIMMA >
6090022100G_B @
@
4 4

AMD CPU S1G3 DDRII I/F
A B C D E
A B C D E
JCPUD
+CPU_CORE_0
< Close to CPU > +2.5VDDA F8 M11
R487 VDDA1 KEY1
F9 VDDA2 KEY2 W18
1 2 10_0402_5% CPU_VDD0_RUN_FB_H
CPU_CLKIN_SC_P A9 A6 CPU_SVC
R486 CPU_CLKIN_SC_N CLKIN_H SVC CPU_SVD CPU_SVC <42> < Serial VID Interface clock & data >
A8 A4
10_0402_5% CPU_VDD0_RUN_FB_L CLKIN_L SVD CPU_SVD <42>
1 2
LDT_RST# B7
H_PWRGD RESET_L
A7 PWROK
LDT_STOP# F10 AF6 CPU_THERMTRIP#_R < Thermal Sensor Trip output >
CPU_LDT_REQ_R# LDTSTOP_L THERMTRIP_L
Un-Mount R488 & R489 For Caspian C6 AC7 CPU_PROCHOT#_1.8 < HTC-active state indication or command >
+CPU_CORE_1 LDTREQ_L PROCHOT_L R42
MEMHOT_L AA8 2 1 +1.8V
R489 < Sideband-Temperature Sensor Interface Clock & Data> AF4 PUMA@ 300_0402_5%
PUMA@ 10_0402_5% CPU_VDD1_RUN_FB_H SIC
1 2 AF5 SID
1 < Sideband-Temperature Sensor Interface interrupt > THERMDC_CPU 1
AE6 ALERT_L THERMDC W7
R488 W8 THERMDA_CPU < Thermal diode cathode & anode >
PUMA@ 10_0402_5% CPU_VDD1_RUN_FB_L < Compensation Resistor to VSS > R13 CPU_HTREF0 THERMDA
1 2 1 2 44.2_0402_1% R6 HT_REF0
R14 1 2 44.2_0402_1% CPU_HTREF1 P6
+1.2V_HT HT_REF1
< Compensation Resistor to VLDT > +1.8V sense no support
<42> CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_H F6 W9
CPU_VDD0_RUN_FB_L VDD0_FB_H VDDIO_FB_H PAD T22 < Differential feedback for VDDIO >
<42> CPU_VDD0_RUN_FB_L E6 Y9 PAD T21
VDD0_FB_L VDDIO_FB_L < VDDIO : DDR SDRAM I/O ring power supply>
< 200-MHz PLL Reference Clock > CPU_VDD1_RUN_FB_H Y6 H6 CPU_VDDNB_RUN_FB_H < Differential feedback for VDDNB >
<42> CPU_VDD1_RUN_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H <42>< Northbridge power supply >
C20 <42> CPU_VDD1_RUN_FB_L CPU_VDD1_RUN_FB_L AB6 G6 CPU_VDDNB_RUN_FB_L
CPU_CLKIN_SC_P VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L <42>
<16> CLK_CPU_BCLK 1 2 3900P_0402_50V7K
< Debug ready > G10
T9 PAD DBRDY CPU_DBREQ# < Debug request >
T10 PAD AA9 TMS DBREQ_L E10
1 < JTAG debug port >
T11 PAD AC9
TCK
R8 AD9 AE9
T12 PAD TRST_L TDO PAD T20
T19 PAD AF9
169_0402_1% TDI
CPU_TEST23_TSTUPD AD7 J7 CPU_TEST28_H_PLLCHRZ_P route as differential
2
TEST23 TEST28_H PAD T5 as short as possible

C21 H8 CPU_TEST28_L_PLLCHRZ_N
CPU_CLKIN_SC_N TEST28_L PAD T6 testpoint under package
<16> CLK_CPU_BCLK# 1 2 3900P_0402_50V7K H10
TEST18 CPU_TEST17_BP3
G9 D7 PAD T7
TEST19 TEST17 CPU_TEST16_BP2
Address:100_1100 Place close to CPU wihtin 1.5" TEST16
E7 PAD T8
CPU_TEST25_H_BYPASSCLK_H E9 F7
CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST15
E8 TEST25_L TEST14 C7
< Filtered PLL Supply Voltage > CPU_TEST21_SCANEN AB8 C3 @ R32

CPU_TEST20_SCANCLK2 TEST21 TEST7 CPU_TEST10_ANALOGOUT 2
AF7 K8 1 300_0402_5% +1.2V_HT
CPU_TEST24_SCANCLK1 TEST20 TEST10
AE7
+2.5VS +2.5VDDA TEST24
AE8 TEST22 TEST8 C4
VDDA=300mA AC8 TEST12
L1 1 2 FBM_L11_201209_300L_0805 +2.5VDDA AF8
TEST27 CPU_TEST29_H_FBCLKOUT_P
1 1 1 1 C9 PAD T13
2 C17 C18 C19 TEST29_H CPU_TEST29_L_FBCLKOUT_N 2
1 1 2 R25 C2 TEST9 TEST29_L C8 PAD T14
+ C16 C124 0_0402_5% AA6
@ @ 4.7U_0805_10V4Z 3300P_0402_50V7K 0.22U_0603_16V4Z TEST6
100U_D2_10VM 0.1U_0402_16V7K 2 2 2
A3 RSVD1 RSVD10 H18
2 2
For EMI A5 RSVD2 RSVD9 H19
B3 AA7
RSVD3 RSVD8
B5 RSVD4 RSVD7 D5
C1 C5
RSVD5 RSVD6
< Serial VID Interface clock & data >
6090022100G_B @
+1.8VS 0718 AMD --> 1K ohm
R22
2 1 1K_0402_5% CPU_SVC
< HDT Connector >
R23
2 1 1K_0402_5% CPU_SVD
< R41 Close to CPU > < R494 Close to CPU > JP3 @
CPU_DBREQ# 1 2
+1.8VS @ R494 3 4
R41 5 6
+1.8V 1 2 300_0402_5% 1 2 0_0402_5%
7 8
T23 PAD 9 10
2
@ R40 1 2 220_0402_5%
R15 @ R39 220_0402_5% 11 12
1 2
@ R38 220_0402_5% 13 14
1 2 15 16
300_0402_5% +1.8V @ R37 1 2 220_0402_5%
17 18
1
LDT_RST# T24 PAD 19 20

<20> LDT_RST# 21 22 LDT_RST#
1 +1.8V 23 24
C22 Add R497 and R500 for Caspian
3 @ +1.8V 26 3
0.01U_0402_25V7K
2 TIGRIS@ R493 @ R965 SAMTEC_ASP-68200-07
1 2 510_0402_5% CPU_TEST25_H_BYPASSCLK_H 1 2 510_0402_5%
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
+1.8VS +1.8VS
@ R966 TIGRIS@ R492
1 2 510_0402_5% CPU_TEST25_L_BYPASSCLK_L 1 2 510_0402_5%
2
R21 R36
300_0402_5% 300_0402_5%
1
H_PWRGD LDT_STOP# R10 < To power circuitry>

<20,42> H_PWRGD
1
<12,20> LDT_STOP#
1 +1.8V 1 2 10K_0402_5% @ D12 < Thermal Sensor >
C23 C25 1 2 CH751H-40PT_SOD323-2 ENTRIP2 <36,38> +3VS
@ @
0.1U_0402_16V7K 0.01U_0402_25V7K R5 U2 < From EC >
2 2 1 2 300_0402_5% 1 8 EC_SMB_CK2
VDD SCLK EC_SMB_CK2 <32>
2
B
Q3 1
D16 < To SB710 ACPI block> C26 THERMDA_CPU 2 7 EC_SMB_DA2
+1.8VS D+ SDATA EC_SMB_DA2 <32>
E
CPU_THERMTRIP#_R 3 1 1 2 CH751H-40PT_SOD323-2 H_THERMTRIP# <21>

C
0.1U_0402_16V7K 1 2 C27 THERMDC_CPU 3 6

MMBT3904_NL_SOT23-3 2 2200P_0402_50V7K D- ALERT#
2
4 5
R30 < noise filter cap > THERM# GND
300_0402_5% Add R29 and R31 for Caspian < Differential feedback for VDDNB > ADM1032ARM-1 ZREEL_MSOP8
PUMA@ R967
1
CPU_LDT_REQ# 1 2 0_0402_5% CPU_LDT_REQ_R# TIGRIS@ R968 Close to CPU

<12,20> CPU_LDT_REQ# +VDDNB
1 2 1 300_0402_5% CPU_TEST20_SCANCLK2
C24 Un-Mount R27 For Caspian R484
4 4
@ 2 1 10_0402_5% CPU_VDDNB_RUN_FB_H
330P_0402_50V7K TIGRIS@ R969
2 CPU_TEST23_TSTUPD
1 2 300_0402_5% R485
2 1 10_0402_5% CPU_VDDNB_RUN_FB_L
R26
2 1 300_0402_5% CPU_TEST21_SCANEN
R9 Security Classification Compal Secret Data Compal Electronics, Inc.

+1.8V 1 2 300_0402_5% R28 Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
< To SB700 CPU block> 1 2 300_0402_5% CPU_TEST24_SCANCLK1
@ R11
AMD CPU S1G3 CTRL
CPU_PROCHOT#_1.8 1 2 0_0402_5% Size Document Number Rev
H_PROCHOT# <20> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A B C D E
A B C D E
+CPU_CORE_0 JCPUE +CPU_CORE_1

VDD decoupling : +CPU_CORE G4 P8
VDD0_1 VDD1_1
H2 VDD0_2 VDD1_2 P10
+CPU_CORE_0 +CPU_CORE_0 +CPU_CORE_0 J9 R4
VDD0_3 VDD1_3
J11 R7
VDD0_4 VDD1_4
J13 R9
VDD0_5 VDD1_5
1 1 1 1 1 1 1 1 1 J15 R11
C32 C33 C34 C35 C40 C41 C42 VDD0_6 VDD1_6
K6 VDD0_7 VDD1_7 T2
+ C30 + C28 K10 T6
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J VDD0_8 VDD1_8
K12 T8
330U_X_2VM_R6M 330U_X_2VM_R6M 2 2 2 2 2 2 2 VDD0_9 VDD1_9
K14 T10
2 2 VDD0_10 VDD1_10
L4 VDD0_11 VDD1_11 T12
Near CPU Socket Under CPU Socket Under CPU Socket L7 VDD0_12 VDD1_12 T14
L9 VDD0_13 VDD1_13 U7
1 1
L11 VDD0_14 VDD1_14 U9
L13 VDD0_15 VDD1_15 U11
+CPU_CORE_1 +CPU_CORE_1 +CPU_CORE_1 L15 U13
VDD0_16 VDD1_16
M2 U15
VDD0_17 VDD1_17
M6 V6
VDD0_18 VDD1_18
1 1 1 1 1 1 1 1 1 M8 VDD0_19 VDD1_19 V8
C36 C37 C38 C39 C43 C44 C45 M10 V10
+ C31 + C29 VDD0_20 VDD1_20
N7 VDD0_21 VDD1_21 V12
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J N9 V14
330U_X_2VM_R6M 330U_X_2VM_R6M 2 2 2 2 2 2 2 +VDDNB VDD0_22 VDD1_22
N11 W4
2 2 VDD0_23 VDD1_23
VDD1_24 Y2
Near CPU Socket Under CPU Socket Under CPU Socket K16
VDDNB_1 VDD1_25
AC4
M16 AD2 +1.8V
VDDNB_2 VDD1_26
P16
VDDNB_3
T16 Y25
+1.8V VDDNB_4 VDDIO27
V16 V25
VDDNB_5 VDDIO26
V23
VDDIO decoupling : DDR SDRAM I/O ring power H25
VDDIO25
V21
+1.8V VDDIO1 VDDIO24
J17 VDDIO2 VDDIO23 V18
K18 U17
VDDIO3 VDDIO22
K21 T25
VDDIO4 VDDIO21
1 1 1 1 1 1 K23 T23
C46 C47 C48 C49 C50 C51 VDDIO5 VDDIO20
K25 VDDIO6 VDDIO19 T21
L17 VDDIO7 VDDIO18 T18
22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J M18 R17
2 2 2 2 2 2 VDDIO8 VDDIO17
M21 VDDIO9 VDDIO16 P25
Under CPU Socket M23
VDDIO10 VDDIO15
P23
M25 P21
VDDIO11 VDDIO14
N17 VDDIO12 VDDIO13 P18
+1.8V
6090022100G_B Athlon 64 S1 Processor Socket

2 @ 2
1 1 1 1
C55 C56 C57 C58
JCPUF
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z AA4 J6
2 2 2 2 VSS1 VSS66
AA11 VSS2 VSS67 J8
Between CPU Socket and DIMM AA13
VSS3 VSS68
J10
AA15 VSS4 VSS69 J12
AA17 J14
+1.8V VSS5 VSS70
AA19 VSS6 VSS71 J16
AB2 J18
VSS7 VSS72
AB7 VSS8 VSS73 K2
1 1 AB9 K7
C60 C61 VSS9 VSS74
AB23 VSS10 VSS75 K9
AB25 K11
0.01U_0402_25V7K 0.01U_0402_25V7K VSS11 VSS76
AC11 K13
2 2 VSS12 VSS77
AC13 K15
VSS13 VSS78
Between CPU Socket and DIMM AC15
VSS14 VSS79
K17
AC17 L6
VSS15 VSS80
AC19 L8
VSS16 VSS81
AC21 VSS17 VSS82 L10
+1.8V AD6 L12
180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch> VSS18 VSS83
AD8 L14
VSS19 VSS84
AD25 L16
VSS20 VSS85
1 1 1 1 AE11 L18
C62 C63 C64 C65 VSS21 VSS86
AE13 M7
VSS22 VSS87
AE15 M9
180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J VSS23 VSS88
AE17 VSS24 VSS89 AC6
2 2 2 2 AE19 M17
VSS25 VSS90
Between CPU Socket and DIMM AE21
VSS26 VSS91
N4
AE23 N8
VSS27 VSS92
B4 N10
+1.8V VSS28 VSS93
Change to B2 size B6
VSS29 VSS94
N16
3 3
B8 VSS30 VSS95 N18
1 B9 VSS31 VSS96 P2
1 1 1 1 B11 P7
C74 C75 C76 C77 @ + C78 VSS32 VSS97
B13 VSS33 VSS98 P9
220U_B2_4VM_R45M B15 P11
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z VSS34 VSS99
B17 P17
2 2 2 2 2 VSS35 VSS100
B19 R8
VSS36 VSS101
Between CPU Socket and DIMM B21
VSS37 VSS102
R10
B23 R16
VSS38 VSS103
B25 VSS39 VSS104 R18
D6 VSS40 VSS105 T7
D8 T9
+0.9V VSS41 VSS106
D9 T11
VTT decoupling. D11
VSS42 VSS107
T13
VSS43 VSS108
D13 VSS44 VSS109 T15
1 1 1 1 1 1 1 1 D15 T17
C66 C67 C68 C69 C70 C71 C72 C73 VSS45 VSS110
D17 U4
VSS46 VSS111
D19 U6
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J +0.9V VSS47 VSS112
D21 U8
2 2 2 2 2 2 2 2 VSS48 VSS113
1. Near Power Supply D23
VSS49 VSS114
U10
Near CPU Socket Right side 1 2. Change to B2 size D25
VSS50 VSS115
U12
+0.9V E4 U14
+ C59 VSS51 VSS116
F2 U16
VSS52 VSS117
220U_B2_4VM_R45M F11 VSS53 VSS118 U18
1 1 1 1 1 1 1 1 F13 V2
C79 C80 C81 C82 C83 C84 C85 C86 2 VSS54 VSS119
F15 V7
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J VSS55 VSS120
F17 VSS56 VSS121 V9
F19 V11
2 2 2 2 2 2 2 2 VSS57 VSS122
F21 V13
VSS58 VSS123
Near CPU Socket Left side F23
VSS59 VSS124
V15
F25 V17
VSS60 VSS125
H7 VSS61 VSS126 W6
4 4
H9 Y21
VSS62 VSS127
H21 VSS63 VSS128 Y23
H23 N6
+VDDNB decoupling : Northbridge power Add 22uF for Caspaian J4
VSS64 VSS129
+VDDNB VSS65
6090022100G_B Athlon 64 S1 Processor Socket
@
1
C52
1
C53
1
C54 Security Classification Compal Secret Data Compal Electronics, Inc.
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 TIGRIS@
AMD CPU S1G3 PWR & GND
A B C D E
A B C D E
DDR_B_D[0..63]
+1.8V +1.8V DDR_B_D[0..63] <6>
DDR_B_DM[0..7]
DDR_B_DM[0..7] <6>
DDR_B_DQS[0..7]
DDR_B_DQS[0..7] <6> +0.9V +1.8V
DDR_B_MA[0..15]
DDR_B_MA[0..15] <6>
JDDRH DDR_B_DQS#[0..7] RP8
DDR_B_DQS#[0..7] <6> DDR_B_MA4 C105 2
<10> +V_DDR_MCH_REF 1 VREF VSS 2 1 8 1 0.1U_0402_16V7K
1 3 4 DDR_B_D4 DDR_B_MA2 2 7
DDR_B_D0 VSS DQ4 DDR_B_D5 DDR_B_MA0 C106 2
5 DQ0 DQ5 6 3 6 1 0.1U_0402_16V7K
1 C104 DDR_B_D1 DDR_B_RAS# 1
7 DQ1 VSS 8 4 5
1000P_0402_25V8J 9 10 DDR_B_DM0
2 DDR_B_DQS#0 VSS DM0 47_0804_8P4R_5%
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DDR_B_D7 RP9
15 16
DDR_B_D2 VSS DQ7 DDR_B_MA14 C108 2
17 DQ2 VSS 18 1 8 1 0.1U_0402_16V7K
DDR_B_D3 19 20 DDR_B_D12 DDR_B_MA11 2 7
DQ3 DQ12 DDR_B_D13 DDR_B_MA7 C107 2
21 VSS DQ13 22 3 6 1 0.1U_0402_16V7K
DDR_B_D8 23 24 DDR_B_MA6 4 5
DDR_B_D9 DQ8 VSS DDR_B_DM1
25 26
DQ9 DM1 47_0804_8P4R_5%
27 VSS VSS 28
DDR_B_DQS#1 29 30 DDR_B_CLK0
DDR_B_DQS1 DQS1# CK0 DDR_B_CLK#0 DDR_B_CLK0 <6>
31 32 RP10
DQS1 CK0# DDR_B_CLK#0 <6>
33 34 DDR_CKE0_DIMMB 8 1 C109 2 1 0.1U_0402_16V7K
DDR_B_D10 VSS VSS DDR_B_D14 DDR_B_BS#2
35 36 7 2
DDR_B_D11 DQ10 DQ14 DDR_B_D15 DDR_B_MA15 C110 2
37 38 6 3 1 0.1U_0402_16V7K
DQ11 DQ15 DDR_CKE1_DIMMB 5
39 VSS VSS 40 4
47_0804_8P4R_5%
41 42
DDR_B_D16 VSS VSS DDR_B_D20 RP11
43 44
DDR_B_D17 DQ16 DQ20 DDR_B_D21 DDR_B_MA3 C111 2
45 46 8 1 1 0.1U_0402_16V7K
DQ17 DQ21 DDR_B_MA8
47 VSS VSS 48 7 2
DDR_B_DQS#2 49 50 DDR_B_MA12 6 3 C112 2 1 0.1U_0402_16V7K
DDR_B_DQS2 DQS2# NC DDR_B_DM2 DDR_B_MA9
51 52 5 4
DQS2 DM2
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22 47_0804_8P4R_5%
DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 58
DQ19 DQ23 RP12
59 VSS VSS 60
DDR_B_D24 61 62 DDR_B_D28 DDR_B_BS#0 8 1 C114 2 1 0.1U_0402_16V7K
DDR_B_D25 DQ24 DQ28 DDR_B_D29 DDR_B_MA10
63 64 7 2
DQ25 DQ29 DDR_B_MA1 C113 2
65 66 6 3 1 0.1U_0402_16V7K
2 DDR_B_DM3 VSS VSS DDR_B_DQS#3 DDR_B_MA5 2
67 DM3 DQS3# 68 5 4
69 70 DDR_B_DQS3
NC DQS3 47_0804_8P4R_5%
71 72
DDR_B_D26 VSS VSS DDR_B_D30
73 DQ26 DQ30 74
DDR_B_D27 75 76 DDR_B_D31 RP13
DQ27 DQ31 DDR_CS1_DIMMB# C116 2
77 78 8 1 1 0.1U_0402_16V7K
DDR_CKE0_DIMMB VSS VSS DDR_CKE1_DIMMB DDR_B_ODT1
<6> DDR_CKE0_DIMMB 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMB <6> 7 2
81 82 DDR_B_CAS# 6 3 C115 2 1 0.1U_0402_16V7K
VDD VDD DDR_B_MA15 DDR_B_WE#
83 NC NC/A15 84 5 4
DDR_B_BS#2 85 86 DDR_B_MA14
<6> DDR_B_BS#2 BA2 NC/A14
87 88 47_0804_8P4R_5%
DDR_B_MA12 VDD VDD DDR_B_MA11
89 90
DDR_B_MA9 A12 A11 DDR_B_MA7 RP14
91 A9 A7 92
DDR_B_MA8 93 94 DDR_B_MA6 DDR_B_BS#1 1 8 C118 2 1 0.1U_0402_16V7K
A8 A6 DDR_CS0_DIMMB#
95 96 2 7
DDR_B_MA5 VDD VDD DDR_B_MA4 DDR_B_MA13 C117 2
97 98 3 6 1 0.1U_0402_16V7K
DDR_B_MA3 A5 A4 DDR_B_MA2 DDR_B_ODT0
99 100 4 5
DDR_B_MA1 A3 A2 DDR_B_MA0
101 102
A1 A0 47_0804_8P4R_5%
103 104
DDR_B_MA10 VDD VDD DDR_B_BS#1
105 A10/AP BA1 106 DDR_B_BS#1 <6>
DDR_B_BS#0 107 108 DDR_B_RAS#
<6> DDR_B_BS#0 BA0 RAS# DDR_B_RAS# <6>
DDR_B_WE# 109 110 DDR_CS0_DIMMB#
<6> DDR_B_WE# WE# S0# DDR_CS0_DIMMB# <6>
111 112
DDR_B_CAS# VDD VDD DDR_B_ODT0
<6> DDR_B_CAS# 113 114 DDR_B_ODT0 <6>
DDR_CS1_DIMMB# CAS# ODT0 DDR_B_MA13
<6> DDR_CS1_DIMMB# 115 116
NC/S1# NC/A13
117 118
DDR_B_ODT1 VDD VDD
<6> DDR_B_ODT1 119 NC/ODT1 NC 120
121 122
123 124
125 126
DQ33 DQ37
127 128
DDR_B_DQS#4 VSS VSS DDR_B_DM4
129 130
3 DDR_B_DQS4 DQS4# DM4 3
131
133
DQS4 VSS 132
134 DDR_B_D38
For EMI
DDR_B_D34 VSS DQ38 DDR_B_D39
135 136
DDR_B_D35 DQ34 DQ39 +1.8V
137 DQ35 VSS 138
139 140 DDR_B_D44
DDR_B_D40 VSS DQ44 DDR_B_D45
141 142
DDR_B_D41 DQ40 DQ45
143 144
DQ41 VSS DDR_B_DQS#5
145 146
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
147 148
DM5 DQS5
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D46
153
DQ43 DQ47
154 1 @ 1 @ 1 @ 1 @
155 156 C120 C121 C122 C123
VSS VSS
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
DDR_B_D48 157 158 DDR_B_D52
159 DQ49 DQ53 160
161 162 2 2 2 2
VSS VSS DDR_B_CLK1
163 164 DDR_B_CLK1 <6>
NC,TEST CK1 DDR_B_CLK#1
165 166 DDR_B_CLK#1 <6>
DDR_B_DQS#6 VSS CK1#
167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 170
DQS6 DM6
171 172
173 DQ50 DQ54 174
DDR_B_D51 175 176 DDR_B_D55
DQ51 DQ55
177 VSS VSS 178
DDR_B_D56 179 180 DDR_B_D60
181 182
DQ57 DQ61
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS7# DDR_B_DQS7
187 188
DDR_B_D58 VSS DQS7
189 190
DDR_B_D59 DQ58 VSS DDR_B_D62
191 192
DQ59 DQ62 DDR_B_D63
193 VSS DQ63 194
4 SMB_CK_DAT0 4
<10,16,21> SMB_CK_DAT0 195 196
SMB_CK_CLK0 SDA VSS
<10,16,21> SMB_CK_CLK0 197 SCL SAO 198 +3VS
199 VDDSPD SA1 200
+3VS
1
C119
P-TWO_A5692B-A0G16-P
0.1U_0402_16V7K @
2
DIMM0 STD H:9.2mm (Bot) Security Classification Compal Secret Data Compal Electronics, Inc.
DDRII SO-DIMM 0
A B C D E
A B C D E
+1.8V
2
R43
1K_0402_1%
DDR_A_D[0..63]
1
+V_DDR_MCH_REF DDR_A_D[0..63] <6>
<9> +V_DDR_MCH_REF DDR_A_DM[0..7]
1 1 DDR_A_DM[0..7] <6>
2
C96
R44 C95 DDR_A_DQS[0..7]
1K_0402_1% 0.1U_0402_16V7K 1000P_0402_25V8J DDR_A_DQS[0..7] <6>
2 2 DDR_A_MA[0..15]
DDR_A_MA[0..15] <6>
1
1 +1.8V +1.8V DDR_A_DQS#[0..7] 1
DDR_A_DQS#[0..7] <6>
JDDRL
1 2
VREF VSS DDR_A_D4
3 4
DDR_A_D0 VSS DQ4 DDR_A_D5
5 DQ0 DQ5 6
DDR_A_D1 7 8
DQ1 VSS DDR_A_DM0
9 VSS DM0 10
DDR_A_DQS#0 11 12
DDR_A_DQS0 DQS0# VSS DDR_A_D6
13 14
DQS0 DQ6 DDR_A_D7
15 VSS DQ7 16
DDR_A_D2 17 18
DDR_A_D3 DQ2 VSS DDR_A_D12
19 DQ3 DQ12 20
21 22 DDR_A_D13
DDR_A_D8 VSS DQ13
23 24
DDR_A_D9 DQ8 VSS DDR_A_DM1 +0.9V +1.8V
25 26
DQ9 DM1
27 VSS VSS 28
DDR_A_DQS#1 29 30 DDR_A_CLK0
DQS1# CK0 DDR_A_CLK0 <6>
DDR_A_DQS1 31 32 DDR_A_CLK#0 RP1
DQS1 CK0# DDR_A_CLK#0 <6> DDR_A_MA6
33 34 1 8 C87 1 2 0.1U_0402_16V7K
DDR_A_D10 VSS VSS DDR_A_D14 DDR_A_MA14
35 36 2 7
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR_A_MA7 C88
37 38 3 6 1 2 0.1U_0402_16V7K
DQ11 DQ15 DDR_A_MA11
39 VSS VSS 40 4 5
47_0804_8P4R_5%
41 42 RP2
DDR_A_D16 VSS VSS DDR_A_D20 DDR_CKE0_DIMMA C90
43 44 8 1 1 2 0.1U_0402_16V7K
DDR_A_D17 DQ16 DQ20 DDR_A_D21 DDR_A_BS#2
45 46 7 2
DQ17 DQ21 DDR_CKE1_DIMMA C89
47 VSS VSS 48 6 3 1 2 0.1U_0402_16V7K
DDR_A_DQS#2 49 50 DDR_A_MA15 5 4
DDR_A_DQS2 DQS2# NC DDR_A_DM2
51 52
DQS2 DM2 47_0804_8P4R_5%
53 54
2 DDR_A_D18 VSS VSS DDR_A_D22 RP3 2
55 DQ18 DQ22 56
DDR_A_D19 57 58 DDR_A_D23 DDR_A_BS#1 1 8 C91 1 2 0.1U_0402_16V7K
DQ19 DQ23 DDR_A_MA2
59 60 2 7
DDR_A_D24 VSS VSS DDR_A_D28 DDR_A_MA0 C92
61 DQ24 DQ28 62 3 6 1 2 0.1U_0402_16V7K
DDR_A_D25 63 64 DDR_A_D29 DDR_A_MA4 4 5
DQ25 DQ29
65 66
DDR_A_DM3 VSS VSS DDR_A_DQS#3 47_0804_8P4R_5%
67 DM3 DQS3# 68
69 70 DDR_A_DQS3 RP4
NC DQS3 DDR_A_MA5 C93
71 VSS VSS 72 8 1 1 2 0.1U_0402_16V7K
DDR_A_D26 73 74 DDR_A_D30 DDR_A_MA8 7 2
DDR_A_D27 DQ26 DQ30 DDR_A_D31 DDR_A_MA9 C94
75 DQ27 DQ31 76 6 3 1 2 0.1U_0402_16V7K
77 78 DDR_A_MA12 5 4
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA
<6> DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA <6>
81 82 47_0804_8P4R_5%
VDD VDD DDR_A_MA15 RP5
83 84
DDR_A_BS#2 NC NC/A15 DDR_A_MA14 DDR_A_BS#0 C98
<6> DDR_A_BS#2 85 86 8 1 1 2 0.1U_0402_16V7K
BA2 NC/A14 DDR_A_MA10
87 88 7 2
DDR_A_MA12 VDD VDD DDR_A_MA11 DDR_A_MA3 C97
89 90 6 3 1 2 0.1U_0402_16V7K
DDR_A_MA9 A12 A11 DDR_A_MA7 DDR_A_MA1
91 92 5 4
DDR_A_MA8 A9 A7 DDR_A_MA6
93 A8 A6 94
95 96 47_0804_8P4R_5%
DDR_A_MA5 VDD VDD DDR_A_MA4 RP6
97 98
DDR_A_MA3 A5 A4 DDR_A_MA2 DDR_A_ODT1 C100 1
99 100 8 1 2 0.1U_0402_16V7K
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_CS1_DIMMA#
101 102 7 2
A1 A0 DDR_A_CAS# C99
103 104 6 3 1 2 0.1U_0402_16V7K
DDR_A_MA10 VDD VDD DDR_A_BS#1 DDR_A_WE#
105 106 DDR_A_BS#1 <6> 5 4
DDR_A_BS#0 A10/AP BA1 DDR_A_RAS#
<6> DDR_A_BS#0 107 BA0 RAS# 108 DDR_A_RAS# <6>
DDR_A_WE# 109 110 DDR_CS0_DIMMA# 47_0804_8P4R_5%
<6> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <6>
111 112 RP7
DDR_A_CAS# VDD VDD DDR_A_ODT0 DDR_A_MA13 C102 1
<6> DDR_A_CAS# 113 114 DDR_A_ODT0 <6> 1 8 2 0.1U_0402_16V7K
DDR_CS1_DIMMA# CAS# ODT0 DDR_A_MA13 DDR_A_ODT0
<6> DDR_CS1_DIMMA# 115 116 2 7
NC/S1# NC/A13 DDR_A_RAS# C101 1
117 118 3 6 2 0.1U_0402_16V7K
3 DDR_A_ODT1 VDD VDD DDR_CS0_DIMMA# 3
<6> DDR_A_ODT1 119 NC/ODT1 NC 120 4 5
121 VSS VSS 122
DDR_A_D32 123 124 DDR_A_D36 47_0804_8P4R_5%
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 128
DDR_A_DQS#4 VSS VSS DDR_A_DM4
129 130
DDR_A_DQS4 DQS4# DM4
131 132
DQS4 VSS DDR_A_D38
133 134
135 136
DDR_A_D35 DQ34 DQ39
137 DQ35 VSS 138
139 140 DDR_A_D44
141 142
DDR_A_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 DM5 DQS5 148
149 150
DDR_A_D42 VSS VSS DDR_A_D46
151 152
153 154
DQ43 DQ47
155 156
157 158
159 160
DQ49 DQ53
161 VSS VSS 162
163 164 DDR_A_CLK1
NC,TEST CK1 DDR_A_CLK#1 DDR_A_CLK1 <6>
165 VSS CK1# 166 DDR_A_CLK#1 <6>
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 170
DQS6 DM6
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
175 176
DQ51 DQ55
177 178
179 180
181 DQ57 DQ61 182
4 4
183 184
DDR_A_DM7 VSS VSS DDR_A_DQS#7
185 DM7 DQS7# 186
187 188 DDR_A_DQS7
DDR_A_D58 VSS DQS7
189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
193 194 DDR_A_D63
SMB_CK_DAT0 VSS DQ63
<9,16,21> SMB_CK_DAT0 195 SDA VSS 196
SMB_CK_CLK0 197 198
<9,16,21> SMB_CK_CLK0
+3VS
199
SCL
VDDSPD
SAO
SA1 200
1 Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
C103
PTI_A5652D-A0G16-P
DDRII SO-DIMM 1
0.1U_0402_16V7K @ Size Document Number Rev
2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DIMM0 STD H:5.2mm (Bot) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D E
U3B
D4 A5 HDMI_TXD2+
GFX_RX0P GFX_TX0P HDMI_TXD2+ <19>
C4 PART 2 OF 6 B5 HDMI_TXD2-
GFX_RX0N GFX_TX0N HDMI_TXD2- <19>
A3 A4 HDMI_TXD1+ HDMI_TXD1+ <19>
GFX_RX1P GFX_TX1P HDMI_TXD1-
B3 B4 HDMI_TXD1- <19>
GFX_RX1N GFX_TX1N HDMI_TXD0+
C2 C3 HDMI_TXD0+ <19>
GFX_RX2P GFX_TX2P HDMI_TXD0-
C1 B2 HDMI_TXD0- <19>
GFX_RX2N GFX_TX2N HDMI_CLK0+
E5 GFX_RX3P GFX_TX3P D1 HDMI_CLK0+ <19>
F5 D2 HDMI_CLK0-
GFX_RX3N GFX_TX3N HDMI_CLK0- <19>
G5 E2
GFX_RX4P GFX_TX4P
G6 E1
GFX_RX4N GFX_TX4N
H5 GFX_RX5P GFX_TX5P F4
H6 GFX_RX5N GFX_TX5N F3
J6 GFX_RX6P GFX_TX6P F1
1 1
J5 GFX_RX6N GFX_TX6N F2 < If integrated GFX is used, some PCIE pairs are used as HDMI signal pairs >
J7 GFX_RX7P GFX_TX7P H4
J8 H3 RS880M Display Port Support (muxed on GFX)
GFX_RX7N GFX_TX7N
L5 H1
GFX_RX8P GFX_TX8P
L6 H2
GFX_RX8N GFX_TX8N DP0 GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
M8 GFX_RX9P GFX_TX9P J2
L8 J1
GFX_RX9N GFX_TX9N
PCIE I/F GFX

P7 GFX_RX10P GFX_TX10P K4
M7 K3 DP1 GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
GFX_RX10N GFX_TX10N
P5 K1
GFX_RX11P GFX_TX11P
M5 GFX_RX11N GFX_TX11N K2
R8 M4
GFX_RX12P GFX_TX12P
P8 GFX_RX12N GFX_TX12N M3
R6 M1
GFX_RX13P GFX_TX13P
R5 M2
GFX_RX13N GFX_TX13N
P4 N2
GFX_RX14P GFX_TX14P
P3 GFX_RX14N GFX_TX14N N1
T4 P1
GFX_RX15P GFX_TX15P
T3 GFX_RX15N GFX_TX15N P2
AE3 AC1
GPP_RX0P GPP_TX0P
AD4 AC2
GPP_RX0N GPP_TX0N
AE2 GPP_RX1P GPP_TX1P AB4
AD3 GPP_RX1N GPP_TX1N AB3
PCIE_PTX_C_IRX_P2 AD1 AA2 PCIE_ITX_PRX_P2 C156 1 2 0.1U_0402_16V7K
<27> PCIE_PTX_C_IRX_P2 GPP_RX2P GPP_TX2P PCIE_ITX_C_PRX_P2 <27>
< To WLAN > PCIE_PTX_C_IRX_N2 PCIE_ITX_PRX_N2 C157 0.1U_0402_16V7K
<27> PCIE_PTX_C_IRX_N2 PCIE_PTX_C_IRX_P3
AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
PCIE_ITX_PRX_P3
1 2 PCIE_ITX_C_PRX_N2 <27>< To WLAN >
V5 Y1 C158 1 2 0.1U_0402_16V7K
<26> PCIE_PTX_C_IRX_P3 PCIE_PTX_C_IRX_N3 GPP_RX3P GPP_TX3P PCIE_ITX_PRX_N3 PCIE_ITX_C_PRX_P3 <26>
< To LAN > C159 0.1U_0402_16V7K
<26> PCIE_PTX_C_IRX_N3 W6
GPP_RX3N GPP_TX3N
Y2 1 2 PCIE_ITX_C_PRX_N3 <26>< To LAN >
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 V1
GPP_RX5P GPP_TX5P
U7 V2
2 GPP_RX5N GPP_TX5N 2
<20> SB_RX0P SB_RX0P AA8 AD7 SB_TX0P_C C162 1 2 0.1U_0402_16V7K

SB_RX0N SB_RX0P SB_TX0P SB_TX0N_C SB_TX0P <20>
<20> SB_RX0N Y8 AE7 C163 1 2 0.1U_0402_16V7K
SB_RX0N SB_TX0N SB_TX0N <20>
< From SB710 : x4 PCIE A-link > <20> SB_RX1P SB_RX1P AA7 AE6 SB_TX1P_C C164 1 2 0.1U_0402_16V7K
<20> SB_RX1N Y7 AD6 C165 1 2 0.1U_0402_16V7K < To SB710 : x4 PCEI A-link>
SB_RX2P SB_RX1N SB_TX1N SB_TX2P_C SB_TX1N <20>
<20> SB_RX2P AA5 PCIE I/F SB AB6 C166 1 2 0.1U_0402_16V7K
SB_RX2P SB_TX2P SB_TX2P <20>
<20> SB_RX2N SB_RX2N AA6 AC6 SB_TX2N_C C168 1 2 0.1U_0402_16V7K
<20> SB_RX3P SB_RX3P W5 AD5 SB_TX3P_C C169 1 2 0.1U_0402_16V7K
<20> SB_RX3N Y5 AE5 C167 1 2 0.1U_0402_16V7K
AC8 PCIE_CALRP R55 1 2 1.27K_0402_1% < TX Impedance Calibration. Connect to GND >
PCE_CALRP(PCE_BCALRP) PCIE_CALRN R56 2K_0402_1% < RX Impedance Calibration. Connect to VDDPCIE >
AB8 1 2 +1.1VS
PCE_CALRN(PCE_BCALRN)
RS780M_FCBGA528 RS780MCR3@
U3A
H_CADOP[0..15] H_CADOP0 Y25 D24 H_CADIP0 H_CADIP[0..15]
H_CADOP[0..15] <5> HT_RXCAD0P HT_TXCAD0P H_CADIP[0..15] <5>
H_CADON0 Y24 PART 1 OF 6 D25 H_CADIN0
H_CADON[0..15] H_CADOP1 HT_RXCAD0N HT_TXCAD0N H_CADIP1 H_CADIN[0..15]
H_CADON[0..15] <5> V22 E24 H_CADIN[0..15] <5>
H_CADON1 HT_RXCAD1P HT_TXCAD1P H_CADIN1
V23 HT_RXCAD1N HT_TXCAD1N E25
H_CADOP2 V25 F24 H_CADIP2
V24 F25
H_CADOP3 HT_RXCAD2N HT_TXCAD2N H_CADIP3
U24 F23
U25 F22
T25 H23
T24 H22
HYPER TRANSPORT CPU I/F
P22 HT_RXCAD5P HT_TXCAD5P J25

H_CADON5 P23 J24 H_CADIN5
P25 K24
P24 K25
N24 K23
N25 K22
3 HT_RXCAD7N HT_TXCAD7N 3
< From S1G3 CPU : x16 HT> < To S1G3 CPU : x16 HT>
H_CADOP8 AC24 F21 H_CADIP8
AC25 G21
AB25 HT_RXCAD9P HT_TXCAD9P G20
H_CADON9 AB24 H21 H_CADIN9
AA24 J20
AA25 J21
Y22 J18
Y23 K17
W21 HT_RXCAD12P HT_TXCAD12P L19
H_CADON12 W20 J19 H_CADIN12
V21 M19
V20 HT_RXCAD13N HT_TXCAD13N L18
H_CADOP14 U20 M21 H_CADIP14
U21 HT_RXCAD14N HT_TXCAD14N P21
H_CADOP15 U19 P18 H_CADIP15
U18 M18
HT_RXCAD15N HT_TXCAD15N
H_CLKOP0 T22 H24 H_CLKIP0
<5> H_CLKOP0 H_CLKON0 HT_RXCLK0P HT_TXCLK0P H_CLKIN0 H_CLKIP0 <5>
<5> H_CLKON0 T23 H25 H_CLKIN0 <5>
H_CLKOP1 HT_RXCLK0N HT_TXCLK0N H_CLKIP1
<5> H_CLKOP1 AB23 L21 H_CLKIP1 <5>
H_CLKON1 HT_RXCLK1P HT_TXCLK1P H_CLKIN1
<5> H_CLKON1 AA22 HT_RXCLK1N HT_TXCLK1N L20 H_CLKIN1 <5>
H_CTLOP0 M22 M24 H_CTLIP0
<5> H_CTLOP0 H_CTLON0 HT_RXCTL0P HT_TXCTL0P H_CTLIN0 H_CTLIP0 <5>
<5> H_CTLON0 M23 M25 H_CTLIN0 <5>
H_CTLOP1 HT_RXCTL0N HT_TXCTL0N H_CTLIP1
<5> H_CTLOP1 R21 P19 H_CTLIP1 <5>
H_CTLON1 HT_RXCTL1P HT_TXCTL1P H_CTLIN1
<5> H_CTLON1 R20 HT_RXCTL1N HT_TXCTL1N R18 H_CTLIN1 <5>
301_0402_1%1 2 R57 HT_RXCALP C23 B24 HT_TXCALP R58 1 2 301_0402_1% < Transmitter Calibration Resistor to HT_TXCALN >
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 B25
HT_RXCALN HT_TXCALN
0718 Place within 1" RS780M_FCBGA528 RS780MCR3@ 0718 Place within 1"
4 4
layout 1:2 layout 1:2
/
RS780M HT / PCIE
A B C D E
A B C D E
AVDD=100mA U3C
+AVDD1 F12 A22 UMA_LCD_TXOUT0_A0+ UMA_LCD_TXOUT0_A0+ <18>
AVDD1(NC) TXOUT_L0P(NC) UMA_LCD_TXOUT0_A0-
E12
AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC)
B22 UMA_LCD_TXOUT0_A0- <18>
+AVDD2 F14 A21 UMA_LCD_TXOUT0_A1+ UMA_LCD_TXOUT0_A1+ <18>
AVDDDI(NC) TXOUT_L1P(NC) UMA_LCD_TXOUT0_A1-
G15 B21 UMA_LCD_TXOUT0_A1- <18>
+AVDDQ AVSSDI(NC) TXOUT_L1N(NC) UMA_LCD_TXOUT0_A2+
H15 B20 UMA_LCD_TXOUT0_A2+ <18>
AVDDQ(NC) TXOUT_L2P(NC) UMA_LCD_TXOUT0_A2-
H14 A20 UMA_LCD_TXOUT0_A2- <18>
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0)
A19
TXOUT_L3P(NC)
E17 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) B19
F17
CRT/TVOUT
Y(DFT_GPIO2)
F15 B18
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
A18
UMA_CRT_R TXOUT_U0N(NC)
<17> UMA_CRT_R G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17
G17 REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) B17
UMA_CRT_G E18 D20
1 <17> UMA_CRT_G GREEN(DFT_GPIO1) TXOUT_U2P(NC) 1
F18 GREENb(NC) TXOUT_U2N(NC) D21
UMA_CRT_B E19 D18
<17> UMA_CRT_B BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
F19 BLUEb(NC) TXOUT_U3N(NC) D19
UMA_CRT_HSYNC A11 B16 UMA_LCD_TXCLK_ACLK+ UMA_LCD_TXCLK_ACLK+ <18>

<15,17> UMA_CRT_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
UMA_CRT_VSYNC B11 A16 UMA_LCD_TXCLK_ACLK- UMA_LCD_TXCLK_ACLK- <18>
<15,17> UMA_CRT_VSYNC UMA_CRT_CLK DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
<17> UMA_CRT_CLK F8 D16
UMA_CRT_DATA DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
<17> UMA_CRT_DATA E8 DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1) D17
R65 1 2 715_0402_1% G14

DAC_RSET(PWM_GPIO1) +VDDLTP18
VDDLTP18(NC) A13
+NB_PLLVDD A12 B13
PLLVDD(NC) VSSLTP18(NC)
+NB_HTPVDD D14 PLLVDD18(NC)
B12 A15 +VDDLT18
LVTM
PLLVSS(NC) VDDLT18_1(NC)
B15
PLL PWR
VDDLT18_2(NC)
+VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC)
VDDLT33_2(NC) B14
+VDDA18PCIEPLL D7
VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
D15
R67 1 NB_RESET# VSSLT2(VSS)
<15,20,26,27,31,32> PLT_RST# 2 0_0402_5% D8 C16
+1.1VS NB_PWRGD SYSRESETb VSSLT3(VSS)
<21> NB_PWRGD A10 C18
LDT_STOP# POWERGOOD VSSLT4(VSS)
<7,20> LDT_STOP# C10 LDTSTOPb VSSLT5(VSS) C20
CPU_LDT_REQ# C12 E20
PM
<7,20> CPU_LDT_REQ# ALLOW_LDTSTOP VSSLT6(VSS)
2
C22
R71 CLK_NBHT VSSLT7(VSS)
<16> CLK_NBHT C25 HT_REFCLKP
4.7K_0402_5% CLK_NBHT# C24
<16> CLK_NBHT# HT_REFCLKN
NB_OSC_14.318M E11
1
<16> NB_OSC_14.318M REFCLK_P/OSCIN(OSCIN)
CLOCKs
F11 E9 UMA_ENVDD < LVDS digital power enable >
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) UMA_ENVDD <18>
F7 UMA_ENBKL
LVDS_BLON(PCE_RCALRP) UMA_ENBKL <32>
1
NBGFX_CLK T2 G12 < LVDS backlight enable >

2 <16> NBGFX_CLK NBGFX_CLK# GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) 2
R72 T1 R73
<16> NBGFX_CLK# GFX_REFCLKN
4.7K_0402_5% PAD T17 2 1 100K_0402_5%
U1
GPP_REFCLKP
U2 Reserve for INVT_PWM
2
GPP_REFCLKN
CLK_SBLINK_BCLK V4
<16> CLK_SBLINK_BCLK GPPSB_REFCLKP(SB_REFCLKP)
CLK_SBLINK_BCLK# V3
<16> CLK_SBLINK_BCLK# GPPSB_REFCLKN(SB_REFCLKN)
UMA_LCD_DDC_CLK B9
<18> UMA_LCD_DDC_CLK UMA_LCD_DDC_DAT I2C_CLK HPD < HDMI hot-plug detection >
A9 D9
<18> UMA_LCD_DDC_DAT
HDMIDAT_UMA B8
I2C_DATA MIS. TMDS_HPD(NC)
D10
HPD <19,21>
<19> HDMIDAT_UMA DDC_DATA0/AUX0N(NC) HPD(NC)
HDMICLK_UMA A8
<19> HDMICLK_UMA DDC_CLK0/AUX0P(NC)
B7 D12 SUS_STAT# < Strap option pin or gate side-port memory IO >
DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) SUS_STAT# <15,21>
A7
@ DDC_DATA1/AUX1N(NC)
AE8
R88 2 THERMALDIODE_P
+3VS 1 10K_0402_5% B10 AD8
STRP_DATA THERMALDIODE_N
G11 D13 R80 1 2 1.8K_0402_5%
RSVD TESTMODE
Strap pin AUX_CAL C8
<15> AUX_CAL AUX_CAL(NC)
< Dedicated power for the DAC which can affect display quality > < Dedicated power for the DAC which can affect display quality >
+1.8VS R371 1 2 300_0402_5% NB_PWRGD
+3VS +1.8VS
L2 L4
1 2 BLM18PG121SN1D_0603 +AVDD1 0_0603_5% +AVDD2 R62 1 2 140_0402_1% UMA_CRT_R
3 3
1 1 1
C170 C172 C198
R63 1 2 150_0402_1% UMA_CRT_G
2.2U_0603_6.3V4Z 2.2U_0603_6.3V4Z 0.1U_0402_16V7K
2 2 2 R64 1 2 150_0402_1% UMA_CRT_B
< DAC Bandgap Reference Voltage >

< 1.8V power for system PLLs > < Power for integrated DVI/HDMI PLL macro >
+1.8VS
L6 +1.8VS +1.8VS
1 2 BLM18PG121SN1D_0603 +AVDDQ L7 +NB_HTPVDD L3
1 1 2 BLM18PG121SN1D_0603 2 1 BLM18PG121SN1D_0603 +VDDLTP18
C175 1 1
C176 C171
2.2U_0603_6.3V4Z
2 2.2U_0603_6.3V4Z 2.2U_0603_6.3V4Z
2 2
< IO power for HyperTransport PLL >

< 1.1V Power for system PLLs > < 1.8V IO power for the integrated DVI/HDMI interface >
+1.8VS +VDDA18HTPLL
L10
1 2 BLM18PG121SN1D_0603
+1.1VS +1.8VS
1
C179 L9 +NB_PLLVDD L5
1 2 BLM18PG121SN1D_0603 2 1 BLM18PG121SN1D_0603 +VDDLT18
2.2U_0603_6.3V4Z 1 1 1
4 2 C178 C174 C173 4
< 1.8V IO power for PCI-E PLLs >
2.2U_0603_6.3V4Z 4.7U_0805_10V4Z 0.1U_0402_16V7K
+1.8VS 2 2 2
L11 +VDDA18PCIEPLL
1 2 BLM18PG121SN1D_0603
1
C180 /
2.2U_0603_6.3V4Z
2 Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
RS780M VEDIO/CLK GEN
A B C D E
2 1
U3D
PAR 4 OF 6
AB12 AA18
MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 Y15
MEM_A7(NC) MEM_DQ7/DVO_D4(NC)
AD13 AC20
AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19
AC16 AE22
SBD_MEM/DVO_I/F
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 AD22
MEM_DQ14/DVO_D10(NC) AC22
AD16 AD21
MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)
AE17 MEM_BA1(NC)
AD17 Y17
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)
W18
MEM_DQS0N/DVO_IDCKN(NC)
W12 AD20
B MEM_RASb(NC) MEM_DQS1P(NC) B
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18
MEM_WEb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W17
AB18 AE19
MEM_CKE(NC) MEM_DM1/DVO_D8(NC)
V14
MEM_ODT(NC)
AE23 +1.8VS
IOPLLVDD18(NC)
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 +1.1VS
W14 MEM_CKN(NC)
AD23
IOPLLVSS(NC)
AE12 MEM_COMPP(NC)
AD12 AE18
MEM_COMPN(NC) MEM_VREF(NC)
A A
/
Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
RS780M SIDE PORT
2 1
A B C D E
U3E
< Main IO power for PCI-E graphics, SB, and GPP interfaces >
2A < Digital IO power for HyperTransport interface > L17
+1.1VS 2 1 L16FBMA-L11-201209-221LMA30T_0805 +VDDHT J17 A6 +VDDA11PCIE 1 2 +1.1VS
VDDHT_1 VDDPCIE_1 FBMA-L11-201209-221LMA30T_0805
1 1 1 1 1 K16
VDDHT_2 PART 5/6 VDDPCIE_2
B6
C224
C223
C220
C219
C222
C221
C211
C212
C209 C206 C207 C208 C210 L16 C6 VDDA_12=2.5A
VDDHT_3 VDDPCIE_3
M16 D6
4.7U_0805_10V4Z 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K VDDHT_4 VDDPCIE_4
P16 VDDHT_5 VDDPCIE_5 E6 2 2 1 1 1 1
2 2 2 2 2
R16 VDDHT_6 VDDPCIE_6 F6
T16 G7
VDDHT_7 VDDPCIE_7
2A < IO power for HyperTransport receive interface > VDDPCIE_8
H8
1 1 2 2 2 2
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 1 L18 FBMA-L11-201209-221LMA30T_0805 +VDDHTRX H18 J9
VDDHTRX_1 VDDPCIE_9
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 G19 VDDHTRX_2 VDDPCIE_10 K9
C215 C214 C216 C217 C218 F20 M9
1 VDDHTRX_3 VDDPCIE_11 1
E21 VDDHTRX_4 VDDPCIE_12 L9
10U_0805_10V4Z 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K D22 P9
2 2 2 2 VDDHTRX_5 VDDPCIE_13
B23 VDDHTRX_6 VDDPCIE_14 R9
A23 T9
VDDHTRX_7 VDDPCIE_15
2A < IO power for HyperTransport transmit interface > VDDPCIE_16
V9
+1.2V_HT 2 1 L19 FBMA-L11-201209-221LMA30T_0805 +VDDHTTX AE25 U9
VDDHTTX_1 VDDPCIE_17
1 1 1 1 1 AD24
C225 C226 C227 C228 C229 VDDHTTX_2
AC23 VDDHTTX_3 VDDC_1 K12 Change L90 to bead for EMI
AB22 VDDHTTX_4 VDDC_2 J14
4.7U_0805_10V4Z 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K AA21 U16 +NB_CORE
2 2 2 2 2 VDDHTTX_5 VDDC_3 L90
Y20 VDDHTTX_6 VDDC_4 J11
W19
VDDHTTX_7 VDDC_5
K15 < Core power > VDD_CORE:GM=5A/PM=10A
POWER
V18 VDDHTTX_8 VDDC_6 M12 1 2 +1.1VS
U17 L14
VDDHTTX_9 VDDC_7 FBMA-L11-201209-121LMA40T_0805
Change L16, L18, L19 and L22 T17
VDDHTTX_10 VDDC_8
L11
C247
C240
C241
C242
C243
C230
C231
C244
C232
R17 M13
to bead for EMI VDDHTTX_11 VDDC_9
C233
C245
C234
P17 VDDHTTX_12 VDDC_10 M15 1
M17 N12 2 2 2 2 2 2 2 2 2 1 1 PJP3
VDDHTTX_13 VDDC_11 +
2A < 1.8V IO power for PCI-E graphics, SB, and GPP interfaces > VDDC_12 N14 1 2
+1.8VS 2 1 L22FBMA-L11-201209-221LMA30T_0805 +VDDA18PCIE J10 P11
VDDA18PCIE_1 VDDC_13
330U_D2E_2.5VM
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 1 P10 P13 PAD-OPEN 4x4m
C235 C246 C236 C237 C238 C239 VDDA18PCIE_2 VDDC_14 1 1 1 1 1 1 1 1 1 2 2 2
K10 P14
M10 VDDA18PCIE_4 VDDC_16 R12
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K L10 R15
2 2 2 2 2 2 VDDA18PCIE_5 VDDC_17
W9 T11
H9 VDDA18PCIE_7 VDDC_19 T15
T10 U12
R10 T14
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11 < Isolated power for side-port memory interface >
AB9 AE10
VDDA18PCIE_12 VDD_MEM1(NC)
AD9 AA11
2 VDDA18PCIE_13 VDD_MEM2(NC) 2
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
U10 AD10
VDDA18PCIE_15 VDD_MEM4(NC)
< 1.8V IO transform power > VDD_MEM5(NC)
AB10
+1.8VS F9 VDD18_1 VDD_MEM6(NC) AC10
1 < 1.8V power for side-port memory interface > G9 VDD18_2
C251 +1.8VS L89 1 2 0_0603_5% AE11 H11 < 3.3V IO power >
VDD18_MEM1(NC) VDD33_1(NC)
1 AD11 VDD18_MEM2(NC) VDD33_2(NC) H12 +3VS
1U_0402_6.3V4Z C252 1 1
2 @ RS780M_FCBGA528 RS780MCR3@ C250 C253
1U_0402_6.3V4Z
2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2
U3F
A25 A2
VSSAHT1 VSSAPCIE1
D23
VSSAHT2 PART 6/6 VSSAPCIE2
B1
E22 D3
VSSAHT3 VSSAPCIE3
G22 D5
VSSAHT4 VSSAPCIE4
G24 E4
VSSAHT5 VSSAPCIE5
G25 G1
VSSAHT6 VSSAPCIE6
H19 VSSAHT7 VSSAPCIE7 G2
J22 G4
VSSAHT8 VSSAPCIE8
L17 H7
VSSAHT9 VSSAPCIE9
L22 J4
VSSAHT10 VSSAPCIE10
L24 R7
VSSAHT11 VSSAPCIE11
L25 L1
VSSAHT12 VSSAPCIE12
M20 L2
VSSAHT13 VSSAPCIE13
N22 VSSAHT14 VSSAPCIE14 L4
P20 L7
VSSAHT15 VSSAPCIE15
R19 M6
VSSAHT16 VSSAPCIE16
R22 N4
VSSAHT17 VSSAPCIE17
R24 P6
VSSAHT18 VSSAPCIE18
R25 R1
3 VSSAHT19 VSSAPCIE19 3
H20 VSSAHT20 VSSAPCIE20 R2
U22 VSSAHT21 VSSAPCIE21 R4
V19 V7
VSSAHT22 VSSAPCIE22
GROUND
W22 VSSAHT23 VSSAPCIE23 U4
W24 V8
VSSAHT24 VSSAPCIE24
W25 V6
VSSAHT25 VSSAPCIE25
Y21 W1
VSSAHT26 VSSAPCIE26
AD25 W2
VSSAHT27 VSSAPCIE27
W4
VSSAPCIE28
L12 VSS11 VSSAPCIE29 W7
M14 VSS12 VSSAPCIE30 W8
N13 Y6
VSS13 VSSAPCIE31
P12 VSS14 VSSAPCIE32 AA4
P15 AB5
VSS15 VSSAPCIE33
R11 VSS16 VSSAPCIE34 AB1
R14 AB7
VSS17 VSSAPCIE35
T12 AC3
VSS18 VSSAPCIE36
U14 AC4
VSS19 VSSAPCIE37
U11 AE1
VSS20 VSSAPCIE38
U15 AE4
VSS21 VSSAPCIE39
V12 AB2
VSS22 VSSAPCIE40
W11 VSS23
W15
VSS24
AC12 VSS25 VSS1 AE14
AA14 D11
VSS26 VSS2
Y18 G8
VSS27 VSS3
AB11 VSS28 VSS4 E14
AB15 E15
VSS29 VSS5
AB17 J15
VSS30 VSS6
AB19 J12
VSS31 VSS7
AE20 K14
VSS32 VSS8
AB21 VSS33 VSS9 M11
4 4
K11 L15
VSS34 VSS10
/
RS780M PWR / GND
A B C D E
A B C D E
< RS780 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K > < DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb >
Enables the Test Debug Bus using GPIO.

SI2: Change to 3K pull high
R101
3K_0402_5%
1 : Enable (RX780, RS780)
<12,17> UMA_CRT_VSYNC 2 1 +3VS
0 : Disable (RX780, RS780)
PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

1 R102 1
@ 2 1 3K_0402_5%
< RS780 use register to control PCI-E configure > < DFT_GPIO[4:2] : STRAP_PCIE_GPP_CFG[2:0] >
These pin straps are used to configure PCI-E GPP mode.

000 : 00001
001 : 00010
010 : 01011
011 : 00100
100 : 01010
101 : 01100
111 : 01011
< DFT_GPIO1 : LOAD_EEPROM_STRAPS >

< RS780 DFT_GPIO1 >
Selects Loading of STRAPS from EPROM
R104
@ 1 2 150_0402_1%
<12> AUX_CAL 1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected
2 2
D4 RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

<12,21> SUS_STAT# @ 2 1 CH751H-40PT_SOD323-2 PLT_RST# <12,20,26,27,31,32>
< DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb >

< RS780 use HSYNC to enable SIDE PORT (internal pull high) >
RX780: Enables the Test Debug Bus using PCIE bus
R125
2 1 3K_0402_5%
1 : Disable ( Can still be enabled using nbcfg register access )
<12,17> UMA_CRT_HSYNC +3VS
0 : Enable
RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS780)
0 : Enable (RS780)
3 3
4 4
/
RS780M STRAPS
A B C D E
A B C D E
+3VS +3VS_CLK
+1.2V_HT +VDDCLK_IO
R167 1 2 0_0805_5%
1 1 1 1 1 1 1 1
R168 1 2 0_0805_5% C445 C446 C447 C448 C449 C450
1 1 1 1 1 1 C444 C451
22U_0805_6.3V6M 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 1U_0402_6.3V4Z
C452 C453 C454 C455 C456 C457 2 2 2 2 2 2 2 2
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2
CLK_48M_CR_R R970 1 2 33_0402_5% < To Card Reader >

CLK_48M_CR <28>
+3VS_CLK
1 1 1 1
C458 C459 C460 C461 CLK_48M_USB_R R170 1 2 33_0402_5% < To SB700 USB host >
1 CLK_48M_USB <21> 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 NB_OSC_14.318M_R R379 158_0402_1%
<12> < To RS780 Clock block >
1 2
NB_OSC_14.318M
R380 1 2 90.9_0402_1%
TIGRIS@
R971 1 2 33_0402_5%
CLK_XTAL_OUT SB_14.318M <20>
CLK_XTAL_IN CLK_NBHT
CLK_NBHT <12>
CLK_NBHT#
< To RS780 Clock block >
CLK_NBHT# <12>
Y2
R174 1 2 8.2K_0402_5% +3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
2 1
14.31818MHZ_20P_6X1430004201 C629 1 2 1U_0402_6.3V4Z

1 1
C464 C465
CLK_CPU_BCLK_R R946 1 2 0_0402_5%
CLK_CPU_BCLK <7>
22P_0402_50V8J 22P_0402_50V8J
2
2 2
R186
@ < To CPU >
CLK_XTAL_OUT
261_0402_1%
CLK_XTAL_IN
1
2 CLK_CPU_BCLK_R# 2
SEL_SATA
R945 1 2 0_0402_5%
CLK_CPU_BCLK# <7>
27M_SEL
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
U10
VSS_48
48MHz_0
48MHz_1
VDD_48
REF_0/SEL_HTT66
REF_2/SEL_27
HTT_0/66M_0
HTT_0#/66M_1
PD#
CPU_K8_0
CPU_K8_0#
XTAL_OUT
VSS_REF
VDD_REF
VDD_HTT
VSS_HTT
REF_1/SEL_SATA
GND
XTAL_IN
Reserve Clock Request +3VS_CLK
SMB_CK_CLK0 1 54
<9,10,21> SMB_CK_CLK0 SCL VDD_CPU +3VS_CLK for NewCard
SMB_CK_DAT0 2 53
<9,10,21> SMB_CK_DAT0 SDA VDD_CPU_I/O +VDDCLK_IO
+3VS_CLK 3 52
VDD_DOT VSS_CPU CLKREQ_NCARD# CLKREQ_NCARD#
4 51 1 2
SRC_7#/27M CLKREQ_1# CLKREQ_MCARD2# R324 8.2K_0402_5%
5 50
SRC_7/27M_SS CLKREQ_2# CLKREQ_MCARD2# <27> CLKREQ_MCARD2#
6 49 +3VS_CLK 1 2
VSS_DOT VDD_A R325 8.2K_0402_5%
7 SRC_5# VSS_A 48
8 47 CLKREQ_LAN# 1 2
CLK_SBLINK_BCLK# SRC_5 VSS_SATA CLK_SBSRC_BCLK R390 8.2K_0402_5%
<12> CLK_SBLINK_BCLK# 9 46 CLK_SBSRC_BCLK <20>
CLK_SBLINK_BCLK SRC_4# SRC_6/SATA CLK_SBSRC_BCLK#
SB LINK <12> CLK_SBLINK_BCLK 10
SRC_4 SRC_6#/SATA#
45 CLK_SBSRC_BCLK# <20> SB SRC
11 44 +3VS_CLK
VSS_SRC VDD_SATA
+VDDCLK_IO 12 43
VDD_SRC_IO CLKREQ_3#
13 42
SRC_3# CLKREQ_4# R372 1
14 SRC_3 SB_SRC_SLOW# 41 2 10K_0402_5% +3VS_CLK
CLK_PCIE_MCARD2# 15 40
<27> CLK_PCIE_MCARD2# CLK_PCIE_MCARD2 SRC_2# SB_SRC_0
WLAN <27> CLK_PCIE_MCARD2 16
SRC_2 SB_SRC_0#
39
+3VS_CLK 17 38 +3VS_CLK
VDD_SRC VDD_SB_SRC
+VDDCLK_IO 18 37 +VDDCLK_IO
VDD_SRC_IO VDD_SB_SRC_IO
VSS_SB_SRC
VDD_ATIG_IO
3 3
ATIGCLK_2#
ATIGCLK_1#
ATIGCLK_0#
CLKREQ_0#
SB_SRC_1#
ATIGCLK_2
ATIGCLK_1
ATIGCLK_0
SB_SRC_1
VDD_ATIG
VSS_ATIG
VSS_SRC
SRC_1#
SRC_0#
SRC_1
SRC_0
+3VS_CLK
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
2
SLG8SP626VTR_QFN72_10x10
R179
8.2K_0402_5% OSC_14M_NB
@
RS780 1.1V 158R/90.9R
1
SEL_SATA +3VS_CLK
+3VS_CLK
+VDDCLK_IO
2
R181 NB CLOCK INPUT TABLE

NBGFX_CLK <12>
8.2K_0402_5% R180 NB GFX
NBGFX_CLK# <12>
8.2K_0402_5% NB CLOCKS RX780 RS780
1
HT_REFCLKP
1
27M_SEL 100M DIFF 100M DIFF

HT_REFCLKN 100M DIFF 100M DIFF
REFCLK_P
1 configure as SATA output CLKREQ_LAN# 14M SE (1.8V) 14M SE (1.1V)
CLK_PCIE_LAN CLKREQ_LAN# <26>
SEL_SATA 1 * configure as 27M and 27M_SS output LAN REFCLK_N NC vref
CLK_PCIE_LAN# CLK_PCIE_LAN <26>
0 * configure as normal SRC(SRC_6) output 27M_SEL
CLK_PCIE_LAN# <26>
* default 0 configure as SRC_7 output GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
* default
GPP_REFCLK 100M DIFF NC or 100M DIFF OUTPUT
4 4
GPPSB_REFCLK 100M DIFF 100M DIFF
Use voltage divider resistor R379 & R380 to pull low

/
1 configure as single-ended 66MHz output

NB_OSC_14.318M
0* configure as differential 100MHz output
Clock Generator
* default Size Document Number Rev
A B C D E
A B C D E
+5VS
< CRT CONNECTOR > D36 +R_CRT_VCC +CRT_VCC
2 F2
1 1 2 1.1A_6V_MINISMDC110F-2
3 1
C475
RB491D_SOT23-3 0.1U_0402_16V4Z
2
1
D35 D37 D34
@ DAN217_SC59 @ DAN217_SC59 @ DAN217_SC59
1 1
+3VS JCRT @
6
3
6
11
RED_L 11
1
1
7 7
D_DDCDATA 12
L47 GREEN_L 12
2 2
1 2 NBQ100505T-800Y_0402 RED_L 8
<12> UMA_CRT_R 8
HSYNC 13
L48 BLUE_L 13
3 3
1 2 NBQ100505T-800Y_0402 GREEN_L 9
<12> UMA_CRT_G +CRT_VCC 9
VSYNC 14 16
L49 14 G
4 17
BLUE_L 4 G
<12> UMA_CRT_B 1 2 NBQ100505T-800Y_0402 10
D_DDCCLK 10
1 15
C706 15
5 5
1 1 1 1 1 1
1
1
C471 C859 C469 C858 C476 C472 220P_0402_50V7K ALLTO_C10532-11505-L_15P-T
R214 R211 R217 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 6P_0402_50V8D 2
140_0402_1% 150_0402_1% 150_0402_1%
2 2 2 2 2 2
2
2
+CRT_VCC
2 R972 2
C473 1 2 0.1U_0402_16V4Z 1 2 10K_0402_5%
5
1
OE#
P
2 4 D_HSYNC L84 1 2 10_0402_5% HSYNC
<12,15> UMA_CRT_HSYNC A Y
G
U14
SN74AHCT1G125GW_SOT353-5 < SYNC SIGNAL >
3
L83 1 2 10_0402_5% VSYNC
+CRT_VCC
1 1
R973 C474 C470
C477 1 2 0.1U_0402_16V4Z 1 2 10K_0402_5% @ 10P_0402_50V8J @ 10P_0402_50V8J
5
1
2 2
OE#
P
2 4 D_VSYNC
<12,15> UMA_CRT_VSYNC A Y
G
U13
SN74AHCT1G125GW_SOT353-5
3 +CRT_VCC
+3VS
3 3
1
R237 R238 +3VS

4.7K_0402_5% 4.7K_0402_5% R100 R218
6.8K_0402_5% 6.8K_0402_5%
5
2
Q10B
4 3 2N7002DW-7-F_SOT363-6 D_DDCDATA
<12> UMA_CRT_DATA
1
C177
@ 33P_0402_50V8K
< Display Data Channel >
2
+3VS
2
Q10A
1 6 2N7002DW-7-F_SOT363-6 D_DDCCLK
<12> UMA_CRT_CLK
1 1
1
C181 C857 C856

@ 33P_0402_50V8K @ 470P_0402_50V8J @ 470P_0402_50V8J
2
2 2
RS780 DAC_SCL & SDA is 5V tolerance
4
FOR EMI 4
/
CRT Connector
A B C D E
A B C D E
< Int. Camera, USB port 9 >
1 1
Int. Camera
< EMI require > +5V_CAM
CAM@
0_0402_5% 2 1 R103 R1009 W=20mils
+5VS 2 1
0_0603_5% @ C888 @
L60 @ 1 2
2 1 0_0402_5% R1004
2 1 USB20_N9_R @ USB20_N9_R_R 0.1U_0402_16V4Z
<21> USB20_N9 2 1
USB20_P9_R 2 @ 1 USB20_P9_R_R
<21> USB20_P9
3 4 0_0402_5% R1005
3 4 JCAM
WCM-2012-900T_0805 reserve for test, close to JLVDS 1
1 USB20_N9_R_R
2
CAM@ 2 USB20_P9_R_R
3 3
0_0402_5% 2 1 R99 4
4
5
5
6
GND1
GND2 7
ACES_88266-05001
@
2 2
+5V_LVDS_CAM
R1006 C882 CAM@

2 1 1 2
LVDS & CAMERA +5VS
0_0603_5%
CAM@ W=20mils0.1U_0402_16V4Z
JLVDS @
2 1 +5V_LVDS_CAM
2 1
<12> UMA_LCD_TXOUT0_A0+ 4 3 UMA_LCD_TXCLK_ACLK+ <12>
4 3
<12> UMA_LCD_TXOUT0_A0- 6 5 UMA_LCD_TXCLK_ACLK- <12>
6 5
8 7
<12> UMA_LCD_TXOUT0_A1+ 10
12
8
10
7
9
9
11
DAC_BRIG <32>
2 L8 1
1.5A LCD/PANEL BD. Conn.
<12> UMA_LCD_TXOUT0_A1- 12 11 INVT_PWM <32> +LCD_VDD
14 13 0_0805_5%
14 13
<12> UMA_LCD_TXOUT0_A2+ 16 15 1 1
16 15
<12> UMA_LCD_TXOUT0_A2- 18 17
18 17 C265 C266
20 19
20 19 0.1U_0402_16V4Z 4.7U_0805_10V4Z +LCD_VDD +3VS +3VS
22 21 UMA_LCD_DDC_CLK <12>
+5V_LVDS_CAM 22 21 2 2
24 23 UMA_LCD_DDC_DAT <12>
24 23
26 26 25 25
1
USB20_P9_R 28 27 +LCDVDD_R
USB20_N9_R 28 27 R142 R143
30 29
30 29 +3VS
32 31
32 31 150_0603_5% 100K_0402_5%
34
34 33
33 +LCD_INV 2 W=60mils
36 35 C874
6 2
2
3 36 35 3
38 38 37 37
BKOFF# 40 39 Rated Current MAX:3000mA 0.1U_0402_16V7K
<32> BKOFF# 40 39 1
42 41 L12 2 1 B+ 1 Q1A
GND GND
2
3
S
FBMA-L11-201209-221LMA30T_0805 R140 G
R146 ACES_88242-4001 1 1 C267 2N7002DW-T/R7_SOT363-6 2 1 2 2 Q2
10K_0402_5% 0.1U_0402_16V4Z 1 +LCD_VDD
C268 C269 2 47K_0402_5% C875 D AO3413_SOT23
1
68P_0402_50V8J 0.1U_0402_25V4Z W=60mils
1
2 2 0.01U_0402_25V7K
2 Inrush current = 0A
For EMI
3
1 1
C263 C264
C707 R668 Q1B @
DAC_BRIG 1 2 1 2 0_0402_5% ENVDD 5 4.7U_0805_10V4Z 0.1U_0402_16V7K
<12> UMA_ENVDD 2 2
2N7002DW-T/R7_SOT363-6
+3VS 220P_0402_50V7K
4
1
R68 1 2 4.7K_0402_5% UMA_LCD_DDC_CLK C708 R144
INVT_PWM 1 2 100K_0402_5%
R69 1 2 4.7K_0402_5% UMA_LCD_DDC_DAT 220P_0402_50V7K
2
C709
BKOFF# 1 2
220P_0402_50V7K
4 4

LCD CONN. / Camera
A B C D E
A B C D E
+HDMI_5V_OUT_M +HDMI_5V_OUT
HDMI@
1 D53 HDMI@ F3 1
HDMI@ C189 1 2 0.1U_0402_16V7K HDMI_TX0+ 2 1 PMEG2010AEH_SOD123 2 1 1.1A_6V_MINISMDC110F-2
<11> HDMI_TXD0+ +5VS
HDMI@ C188 1 2 0.1U_0402_16V7K HDMI_TX0- 1
<11> HDMI_TXD0- HDMI_TX1+
HDMI@ C190 1 2 0.1U_0402_16V7K C258
<11> HDMI_TXD1+ HDMI_TX1-
HDMI@ C184 1 2 0.1U_0402_16V7K Vf=0.25V when If=55mA HDMI@
<11> HDMI_TXD1-
HDMI@ C187 1 2 0.1U_0402_16V7K HDMI_TX2+ 0.1U_0402_16V7K
<11> HDMI_TXD2+ HDMI_TX2- 2
HDMI@ C191 1 2 0.1U_0402_16V7K
<11> HDMI_TXD2-
HDMI@ C185 1 2 0.1U_0402_16V7K HDMI_CLK+

<11> HDMI_CLK0+ HDMI_CLK-
HDMI@ C186 1 2 0.1U_0402_16V7K
<11> HDMI_CLK0-
< Place MOSFET close to HDMI connector >

< HDMI DDC channel to device >
+3VS +3VS +HDMI_5V_OUT
< HDMI Connector >
JHDMI @
HDMI_HPD 19
HP_DET
2
+HDMI_5V_OUT 18 HDMI@ HDMI@
+5V R176 R209 HDMI@ HDMI@
17 DDC/CEC_GND
2
HDMI_SDATA 16 4.7K_0402_5% 4.7K_0402_5% HDMI@ R210 R236
SDA
G
HDMI_SCLK 15 Q139 2.2K_0402_5% 2.2K_0402_5%
SCL BSH111_SOT23-3
14
1
2 Reserved HDMI_SDATA 2
13 CEC 3 1
HDMI_R_CK- <12> HDMIDAT_UMA
12 20
CK- GND
D
11 21
HDMI_R_CK+ CK_shield GND
10 CK+ GND 22
2
HDMI_R_D0- 9 23 HDMI@
D0- GND
G
8 Q140
HDMI_R_D0+ D0_shield BSH111_SOT23-3
7 D0+
HDMI_R_D1- 6 3 1 HDMI_SCLK
D1- <12> HDMICLK_UMA
< EMI solution > 5 D1_shield
D
HDMI_R_D1+ 4
HDMI_R_D2- D1+
3 D2-
@ R616 2
HDMI_CLK- 0_0402_5% HDMI_R_CK- HDMI_R_D2+ D2_shield
1 2 1 D2+
TYCO_1939864-1_19P
L85 HDMI@
1 2
1 2
4 3
4 3
WCM-2012-900T_0805 < Termination resistor >
@ R617
HDMI_CLK+ 1 2 0_0402_5% HDMI_R_CK+ HDMI@ < Hot-plug detection & level shift >
HDMI@ R307 Q136A
@ R618 HDMI_R_CK+ 1 2 715_0402_1% 6 1
HDMI_TX0- 1 2 0_0402_5% HDMI_R_D0- 2N7002DW-7-F_SOT363-6
HDMI_R_CK- 1 2
715_0402_1% +HDMI_5V_OUT
2
HDMI@ R315 +5VS

3 L86 HDMI@ HDMI_HPD 3
4 4 3 3 2
C851
5
1
2
+5VS HDMI@ 2
1 2 0.1U_0402_16V4Z R628 C850
OE#
P
1 2
5
1 HPD HDMI@ HDMI@

2 4
WCM-2012-900T_0805 HDMI@ R304 Q136B A Y 100K_0402_5% 0.1U_0402_16V4Z
G
HDMI_R_D0- 1 2 715_0402_1% 3 4 U39 1
1
@ R619 2N7002DW-7-F_SOT363-6 SN74AHCT1G125GW_SOT353-5
3
HDMI_TX0+ 1 2 0_0402_5% HDMI_R_D0+ HDMI_R_D0+ 1 2 HDMI@
715_0402_1% HDMI@
@ R620 HDMI@ R172
HDMI_TX1- 1 2 0_0402_5% HDMI_R_D1-
L87 HDMI@
1 2 HDMI@ +3VS
1 2 HDMI@ R297 Q137A
HDMI_R_D1- 1 2 715_0402_1% 6 1
1
4 3 2N7002DW-7-F_SOT363-6
4 3 HDMI_R_D1+ R588
1 2
WCM-2012-900T_0805 715_0402_1% 2.2K_0402_5%
2
HDMI@ R173 +5VS HDMI@

@ R621
2
HDMI_TX1+ 1 2 0_0402_5% HDMI_R_D1+
@ R623 HPD
+5VS HPD <12,21>
HDMI_TX2- 1 2 0_0402_5% HDMI_R_D2-
5
2
HDMI@ R141 Q137B
HDMI_R_D2+ 1 2 715_0402_1% 3 4 R977
4 L88 HDMI@ 2N7002DW-7-F_SOT363-6 4
100K_0402_5%
4 3 HDMI_R_D2- 1 2
4 3 715_0402_1% HDMI@
1
HDMI@ R139
1 1 2 2
WCM-2012-900T_0805
HDMI_TX2+
@ R624
0_0402_5% HDMI_R_D2+
1 2 Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
HDMI
A B C D E
A B C D E
+3VALW
C506
2 1 0.1U_0402_16V4Z U16 R303 C501
NC7SZ08P5X_NL_SC70-5 CLK_PCI_EC @ 1 2 100_0402_5% @ 1 2 100P_0402_50V8J
5
2 R369 C503
P
B PLT_RST# CLK_PCI_SIO2 @ 1
4 PLT_RST# <12,15,26,27,31,32> 2 100_0402_5% @ 1 2 100P_0402_50V8J
NB_RST#_R Y
1 A
G
3
R312 2 @ 1 33_0402_5% U15A
1
N2
SB700 P4 1
A_RST# PCICLK0
Part 1 of 5 PCICLK1 P3
C492 1 2 0.1U_0402_16V7K SB_RX0P_C V23 P1 PCI_CLK2
PCI CLKS
<11> SB_RX0P SB_RX0N_C PCIE_TX0P PCICLK2 PCI_CLK3 PCI_CLK2 <24>
C493 1 2 0.1U_0402_16V7K V22 P2
<11> SB_RX0N SB_RX1P_C PCIE_TX0N PCICLK3 PCI_CLK4 PCI_CLK3 <24>
C494 1 2 0.1U_0402_16V7K V24 T4
<11> SB_RX1P PCIE_TX1P PCICLK4 PCI_CLK4 <24>
C495 1 2 0.1U_0402_16V7K SB_RX1N_C V25 T3 PCI_CLK5
< x4 PCIE A-link To NB > <11> SB_RX1N
C496 1 2 0.1U_0402_16V7K SB_RX2P_C U25
PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 <24>
<11> SB_RX2P SB_RX2N_C PCIE_TX2P
C497 1 2 0.1U_0402_16V7K U24
<11> SB_RX2N SB_RX3P_C PCIE_TX2N
C498 1 2 0.1U_0402_16V7K T23
<11> SB_RX3P PCIE_TX3P
C499 1 2 0.1U_0402_16V7K SB_RX3N_C T22 N1
<11> SB_RX3N PCIE_TX3N PCIRST#
<11> SB_TX0P SB_TX0P U22
PCI EXPRESS INTERFACE

SB_TX0N PCIE_RX0P
<11> SB_TX0N U21 PCIE_RX0N AD0 U2
<11> SB_TX1P SB_TX1P U19 P7
SB_TX1N PCIE_RX1P AD1
V19 V4
< x4 PCIE A-link from NB > <11>
<11>
SB_TX1N
SB_TX2P SB_TX2P R20
PCIE_RX1N AD2
T1
<11> SB_TX2N R21 PCIE_RX2N AD4 V3
<11> SB_TX3P SB_TX3P R18 U1
<11> SB_TX3N R17 PCIE_RX3N AD6 V1
V2
R305 AD7
2 1 562_0402_1% T25 T2
R306 PCIE_CALRP AD8
+PCIE_VDDR 2 1 2.05K_0402_1% T24 W1
PCIE_CALRN AD9
AD10 T9
L53 1 2 BLM18PG121SN1D_0603 +SB_PCIEVDD P24 R6
+1.2V_HT PCIE_PVDD AD11
1 R7
C504 AD12
P25 PCIE_PVSS AD13 R5
2.2U_0603_6.3V4Z U8
AD14
U5
2 AD15
AD16 Y7
AD17 W8
V9
AD18
Y8
2 AD19 2
Close to SB AD20 AA8
Y4
AD21
Y3
AD22 PCI_AD23
AD23 Y2 PCI_AD23 <24>
AA2 PCI_AD24
AD24 PCI_AD25 PCI_AD24 <24>
AB4 PCI_AD25 <24>
CLK_SBSRC_BCLK AD25 PCI_AD26
<16> CLK_SBSRC_BCLK N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 <24>
CLK_SBSRC_BCLK# N24 AB3 PCI_AD27
<16> CLK_SBSRC_BCLK# PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD28 PCI_AD27 <24>
AD28 AB2 PCI_AD28 <24>
K23 AC1 PAD T18
NB_DISP_CLKP AD29 PAD T26
K22 NB_DISP_CLKN AD30 AC2
AD1
AD31
M24 NB_HT_CLKP CBE0# W2
PCI INTERFACE
M25 U7
NB_HT_CLKN CBE1#
AA7
CBE2#
P17 Y1
CPU_HT_CLKP CBE3#
M18 AA6
CPU_HT_CLKN FRAME#
W5
DEVSEL#
M23 AA5
SLT_GFX_CLKP IRDY#
M22 SLT_GFX_CLKN TRDY# Y5
U6
PAR
J19 W6
GPP_CLK0P STOP#
J18 W4
GPP_CLK0N PERR#
V7
SERR#
L20 AC3
GPP_CLK1P REQ0#
L19 AD4
GPP_CLK1N REQ1#
REQ2# AB7
M19 AE6
GPP_CLK2P REQ3#/GPIO70 PAD T15
M20 AB6
GPP_CLK2N REQ4#/GPIO71
AD2
GNT0#
CLOCK GENERATOR
N22 AE4
GPP_CLK3P GNT1#
P22 AD5
3 GPP_CLK3N GNT2# 3
GNT3#/GPIO72 AC6
SB_14.318M L18 AE5 PAD T16
<16> SB_14.318M 25M_48M_66M_OSC GNT4#/GPIO73
AD6
CLKRUN#
LOCK# V5
J21
25M_X1
AD3
INTE#/GPIO33
AC4
INTF#/GPIO34
AE2
C643 INTG#/GPIO35
Close to SB J20
25M_X2 INTH#/GPIO36
AE3
1 2 18P_0402_50V8J
Y3 G22 CLK_PCI_EC1 R308 1 2 22_0402_5%

CLK_PCI_EC <24,32>
LPCCLK0
1
4 OUT NC 3 LPCCLK1 E22 CLK_PCI_SIOC R310 1 2 22_0402_5%

CLK_PCI_SIO2 <24,31>
R389 SB_32KHI A3 H24 LPC_AD0
X1 LAD0 LPC_AD0 <31,32>
20M_0603_5% 1 2 H23 LPC_AD1
IN NC LAD1 LPC_AD2 LPC_AD1 <31,32>
C652 32.768KHZ_12.5P_1TJS125BJ4A421P LAD2
J25
LPC_AD3
LPC_AD2 <31,32> EC & TPM &Debug
J24
2
LPC_AD3 <31,32>
RTC XTAL
LAD3
LPC
1 2 18P_0402_50V8J SB_32KHO B3 H25 D84 PUMA@ R978
X2 LFRAME# LPC_FRAME#_SB PUMA@ 1
H22 2 CH751H-40PT_SOD323-2 2 1 300_0402_5% +3VS
LDRQ0#
AB8
LDRQ1#/GNT5#/GPIO68 R979 1
AD7 2 0_0402_5% LPC_FRAME# <31,32>
BMREQ#/REQ5#/GPIO65 TIGRIS@
SERIRQ V15
SERIRQ
CPU_LDT_REQ# SERIRQ <31,32>
<7,12> CPU_LDT_REQ# F23 ALLOW_LDTSTP
+3VS R319 2 1 10K_0402_5% H_PROCHOT# H_PROCHOT# F24 C3 RTC_CLK RTC_CLK <24> STRAP PIN
<7> H_PROCHOT# PROCHOT# RTCCLK
H_PWRGD F22 C2
<7,42> H_PWRGD LDT_PG INTRUDER_ALERT#
LDT_STOP# G25
CPU
<7,12> LDT_STOP# LDT_STP# VBAT B2 +SB_VBAT
LDT_RST# G24
<7> LDT_RST# LDT_RST#
RTC
SB700R3@
4 4
218S7EALA11FG_BGA528_SB700
+SB_VBAT +RTCVCC +RTCBATT
D10
R316 R317 R184
1 2 120_0402_5% 1 2 120_0402_5% 2 1 1K_0402_5% 3
1 1 W=20mils
2
C509 1
C510 J1 1
2
0.1U_0402_16V7K 1U_0402_6.3V4Z @ JUMP_43X39 C297 2

Security Classification Compal Secret Data
2 2
1
0.1U_0402_16V7K
2 BAS40-04_SOT23-3 SB700 - PCIE / PCI / ACPI / LPC / RTC
1
+CHGRTC AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A B C D E
A B C D E
+3VALW
R320
@ 1 2 2.2K_0402_5% SB_TEST2 Reserve for EMI request
R321 U15D R311 C617
@ 1 2 2.2K_0402_5% SB_TEST1 1 2 100_0402_5% 1 2 100P_0402_50V8J
SB700 Part 4 of 5
1 R322 1
E1 PCI_PME#/GEVENT4#
@ 1 2 2.2K_0402_5% SB_TEST0 E2 C8 CLK_48M_USB
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC CLK_48M_USB <16>
H7 R323
R561 PM_SLP_S3# SLP_S2/GPM9# USB_RCOMP
<32> PM_SLP_S3# F5 G8 1 2 11.8K_0402_1%
1K_0402_5% LAN_WAKE# PM_SLP_S5# SLP_S3# USB_RCOMP
2 1 <32> PM_SLP_S5# G1
PBTN_OUT# SLP_S5#
USB MISC
H2
ACPI / WAKE UP EVENTS

<32> PBTN_OUT# SB_PWRGD PWR_BTN#
R330 H1
EXP_CPPE# <32,42> SB_PWRGD SUS_STAT# PWR_GOOD
@ 2 1 100K_0402_5% K3
<12,15> SUS_STAT# SB_TEST2 SUS_STAT#
H5 TEST2 USB_FSD13P E6
SB_TEST1 H4 E7
SB_TEST0 TEST1 USB_FSD13N
Reserve pull-high for EXP_CPPE# H3 TEST0
GATEA20
USB 1.1
<32> GATEA20 Y15 F7
KB_RST# GA20IN/GEVENT0# USB_FSD12P
<32> KB_RST# W15 KBRST#/GEVENT1# USB_FSD12N E8
EC_SCI# K4
<32> EC_SCI# EC_SMI# LPC_PME#/GEVENT3#
<32> EC_SMI# K24 H11
+3VS LPC_SMI#/EXTEVNT1# USB_HSD11P
F1 J10
R328 S3_STATE/GEVENT5# USB_HSD11N
J2 SYS_RESET#/GPM7#
1 2 1.2K_0402_5% SMB_CK_CLK0 LAN_WAKE# H6 E11
<26> LAN_WAKE# WAKE#/GEVENT8# USB_HSD10P
<S0> F2
H_THERMTRIP# J6 BLINK/GPM6# USB_HSD10N F11
R329
<7> H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
1 2 1.2K_0402_5% SMB_CK_DAT0 NB_PWRGD W14 A11 USB20_P9
<12> NB_PWRGD NB_PWRGD USB_HSD9P USB20_N9 USB20_P9 <18>
EC_RSMRST# USB_HSD9N
B11 USB20_N9 <18> USB-9 Int Camera
<32> EC_RSMRST# D3 RSMRST#
C10 USB20_P8
+3VALW USB_HSD8P USB20_N8 USB20_P8 <27>
USB_HSD8N
D10 USB20_N8 <27> USB-8 WLAN
R331
1 2 2.2K_0402_5% SMB_CK_CLK1 AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P
< S0~ S5 ASF only > AD18
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N
H12
R332 AA19
2.2K_0402_5% SMB_CK_DAT1 SMARTVOLT1/SATA_IS2#/GPIO4
1 2 W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12
V17 E14
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
W20
2 SB_SPKR CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 2
<29> SB_SPKR W21 C12
USB 2.0
SMB_CK_CLK0 AA18 SPKR/GPIO2 USB_HSD5P
<9,10,16> SMB_CK_CLK0 D12
SMB_CK_DAT0 W18 SCL0/GPOC0# USB_HSD5N
<9,10,16> SMB_CK_DAT0 SDA0/GPOC1#
R327 SMB_CK_CLK1 K1 B12 USB20_P4
EC_RSMRST# <27> SMB_CK_CLK1 SMB_CK_DAT1 SCL1/GPOC2# USB_HSD4P USB20_N4 USB20_P4 <28>
2 1 100K_0402_5% K2 A12 USB-4 Card Reader (3 IN 1)
<27> SMB_CK_DAT1 SDA1/GPOC3# USB_HSD4N USB20_N4 <28>
AA20
DDC1_SCL/GPIO9
GPIO
Y18 DDC1_SDA/GPIO8 USB_HSD3P G12
@ R400 C1 G14
LLB#/GPIO66 USB_HSD3N
+3VS 1 2 4.7K_0402_5% Y19 SMARTVOLT2/SHUTDOWN#/GPIO5
G5 H14 USB20_P2
+3VS DDR3_RST#/GEVENT7# USB_HSD2P USB20_N2 USB20_P2 <25>
HDMI@ R980 H15 USB-2 Left USB
USB_HSD2N USB20_N2 <25>
1 2 0_0402_5% HPD_R
<12,19> HPD
R388 A13 USB20_P1
SUS_STAT# USB_HSD1P USB20_N1 USB20_P1 <25>
1 2 4.7K_0402_5% B13 USB20_N1 <25> USB-1 Right side
USB_HSD1N
For BIOS utility support
B14 USB20_P0
USB_HSD0P USB20_P0 <25>
EC_LID_OUT# B9 A14 USB20_N0 USB-0 Right side
<32> EC_LID_OUT# USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 <25>
EXP_CPPE# B8
USB_OC5#/IR_TX0/GPM5#
<25,32> USB_OC#2 A8 A18
USB OC
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
<25,32> USB_OC#0 A9 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9 B18
E5 F21
USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
F8 D21
R333 USB_OC1#/GPM1# SCL2/IMC_GPIO11
<29> HDA_BITCLK_CODEC 1 2 33_0402_5% E4 F19
R334 HDA_BITCLK USB_OC0#/GPM0# SDA2/IMC_GPIO12
<31> HDA_BITCLK_MDC 1 MDC@ 2 33_0402_5% E20
R335 SCL3_LV/IMC_GPIO13
<31> HDA_SDOUT_MDC 1 MDC@ 2 33_0402_5% M1 E21
R336 HDA_SDOUT AZ_BITCLK SDA3_LV/IMC_GPIO14
<29> HDA_SDOUT_CODEC 1 2 33_0402_5% M2 E19
HDA_SDIN0 AZ_SDOUT IMC_PWM1/IMC_GPIO15 GPIO16
<29> HDA_SDIN0
HDA_SDIN1
J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19
GPIO17
GPIO16 <24> STRAP PIN
<31> HDA_SDIN1 J8
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17
E18 GPIO17 <24> STRAP PIN
L8
AZ_SDIN2/GPIO44
HD AUDIO
M3 G20
R337 HDA_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18
<31> HDA_SYNC_MDC 1 MDC@ 2 33_0402_5% L6 G21
R338 AZ_SYNC IMC_GPIO19
<29> HDA_SYNC_CODEC 1 2 33_0402_5% M4 D25
3 AZ_RST# IMC_GPIO20 3
L5 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24
R339 1 2 33_0402_5% HDARST# C25
INTEGRATED uC
<29> HDA_RST#_CODEC IMC_GPIO22
R340 1 MDC@ 2 33_0402_5% C24
<31> HDA_RST#_MDC IMC_GPIO23
STRAP PIN<24> HDARST# IMC_GPIO24 B25
C23
IMC_GPIO25
1 B24
C619 IMC_GPIO26
For EMI IMC_GPIO27
B23
100P_0402_50V8J A23
Close to U15 IMC_GPIO28
C22
2 IMC_GPIO29
IMC_GPIO30 A22
B22
IMC_GPIO31
IMC_GPIO32 B21
A21
IMC_GPIO33
H19 IMC_GPIO0 IMC_GPIO34 D20
H20 C20
IMC_GPIO1 IMC_GPIO35
H21 A20
INTEGRATED uC
SPI_CS2#/IMC_GPIO2 IMC_GPIO36
F25 B20
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37
B19
IMC_GPIO38
D22 A19
E24 D18
E25 IMC_GPIO6 IMC_GPIO41 C18
D23
IMC_GPIO7
218S7EALA11FG_BGA528_SB700 SB700R3@
4 4
/
SB700 USB / AC97
A B C D E
A B C D E
U15B
AD9
SB700 AA24
SATA_TX0P IDE_IORDY
AE9
SATA_TX0N Part 2 of 5 IDE_IRQ
AA25
Y22
IDE_A0
AB10 SATA_RX0N IDE_A1 AB23
AC10 SATA_RX0P IDE_A2 Y23
AB24
SATA_STX_DRX_P1 IDE_DACK#
<25> SATA_STX_DRX_P1 AE10 AD25
SATA_STX_DRX_N1 SATA_TX1P IDE_DRQ
<25> SATA_STX_DRX_N1 AD10 SATA_TX1N IDE_IOR# AC25
AC24
HDD SATA_RXN1_C AD11
IDE_IOW#
Y25
1 <25> SATA_RXN1_C SATA_RX1N IDE_CS1# 1
SATA_RXP1_C AE11 Y24
<25> SATA_RXP1_C SATA_RX1P IDE_CS3#
AB12 SATA_TX2P IDE_D0/GPIO15 AD24
AC12 AD23
SATA_TX2N IDE_D1/GPIO16
ATA 66/100/133
AE22
IDE_D2/GPIO17
AE12 SATA_RX2N IDE_D3/GPIO18 AC22
AD12 AD21
SATA_RX2P IDE_D4/GPIO19
IDE_D5/GPIO20 AE20
SATA_STX_DRX_P3 AD13 AB20
<25> SATA_STX_DRX_P3 SATA_TX3P IDE_D6/GPIO21
SATA_STX_DRX_N3 AE13 AD19
<25> SATA_STX_DRX_N3 SATA_TX3N IDE_D7/GPIO22
AE19
ODD
SERIAL ATA
SATA_RXN3_C IDE_D8/GPIO23
<25> SATA_RXN3_C AB14 AC20
SATA_RXP3_C SATA_RX3N IDE_D9/GPIO24
<25> SATA_RXP3_C AC14 SATA_RX3P IDE_D10/GPIO25 AD20
AE21
IDE_D11/GPIO26
AE14 AB22
SATA_TX4P IDE_D12/GPIO27
AD14 AD22
SATA_TX4N IDE_D13/GPIO28
IDE_D14/GPIO29 AE23
AD15 AC23
SATA_RX4N IDE_D15/GPIO30
AE15 SATA_RX4P
AB16
SATA_TX5P
AC16
SATA_TX5N
SPI_DI/GPIO12 G6
AE16 SATA_RX5N SPI_DO/GPIO11 D2
AD16 D1
R342 SATA_RX5P SPI_CLK/GPIO47
F4
SPI ROM
SATA_CAL V12 SPI_HOLD#/GPIO31
2 1 1K_0402_1% F3
SATA_CAL SPI_CS1#/GPIO32
R343 SATA_X1 Y12 U15
SATA_X1 LAN_RST#/GPIO13
+3VS 1 2 10K_0402_5% ROM_RST#/GPIO14 J1
SATA_X2 AA12
SATA_X2
M8
2 SATA_LED# FANOUT0/GPIO3 2
<33> SATA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5
M7
L54 FANOUT2/GPIO49
+1.2V_HT BLM18PG121SN1D_0603 2 1 +PLLVDD_SATA AA11 P5

PLLVDD_SATA FANIN0/GPIO50
2 2 FANIN1/GPIO51 P8
W12
XTLVDD_SATA SATA PWR FANIN2/GPIO52
R8
C522 C523
C6
2.2U_0603_6.3V4Z 1 1 0.1U_0402_16V4Z TEMP_COMM
TEMPIN0/GPIO61 B6
A6
TEMPIN1/GPIO62 SPK_SEL
TEMPIN2/GPIO63 A5 SPK_SEL <29>
B5 EC_THERM#
TEMPIN3/TALERT#/GPIO64 EC_THERM# <32>
HW MONITOR
D41
A4 ACIN_SB 2 1 CH751H-40PT_SOD323-2 ACIN <32,33,35>
L55 VIN0/GPIO53
B4
BLM18PG121SN1D_0603 +XTLVDD_SATA VIN1/GPIO54
+3VS 2 1 C4
VIN2/GPIO55 R562
2 1 D4
VIN3/GPIO56
D5 1 2 150K_0402_5% +3VALW
C524 C625 VIN4/GPIO57
D6
1U_0402_6.3V4Z 0.1U_0402_16V4Z VIN5/GPIO58
VIN6/GPIO59 A7
1 2 B7
VIN7/GPIO60
F6 +SB_AVDD L56 2 1 0_0603_5%

AVDD +3VALW
1 1
G7 C525 C526
AVSS
0.1U_0402_16V4Z 2.2U_0603_6.3V4Z
SB700R3@ 2 2
218S7EALA11FG_BGA528_SB700
3 C516 3
10P_0402_50V8J 2 1 SATA_X1
1
Y4 R341
25MHz_20pF_6X25000017 10M_0402_5%
2
C517
2
10P_0402_50V8J 2 1 SATA_X2
4 4

SB700 SATA / IDE / SPI
A B C D E
A B C D E
U15C U15E
R593
L9
SB700 L15 +1.2V_HT_R 1 2 0_0805_5%
+3VS
M9
VDDQ_1
Part 3 of 5
VDD_1
M12
+1.2V_HT SB700 A2
@ C528 22U_0805_6.3V6M VDDQ_2 VDD_2 VSS_1
2 1 T15 VDDQ_3 VDD_3 M14 VSS_2 A25
U9 VDDQ_4 VDD_4 N13 VSS_3 B1
CORE S0
1 @ C531 1U_0402_6.3V4Z 10U_0805_6.3V6M C529 1
1 2 U16 VDDQ_5 VDD_5 P12 1 2 VSS_4 D7
@ C530 1 2 1U_0402_6.3V4Z U17 P14 T10 F20
VDDQ_6 VDD_6 AVSS_SATA_1 VSS_5
PCI/GPIO I/O
@ C533 1 2 1U_0402_6.3V4Z V8 R11 1U_0402_6.3V4Z 2 1 C532 U10 G19
@ C536 1U_0402_6.3V4Z VDDQ_7 VDD_7 1U_0402_6.3V4Z C534 AVSS_SATA_2 VSS_6
1 2 W7 R15 2 1 U11 H8
@ C535 1U_0402_6.3V4Z VDDQ_8 VDD_8 1U_0402_6.3V4Z C538 AVSS_SATA_3 VSS_7
1 2 Y6 T16 2 1 U12 K9
VDDQ_9 VDD_9 1U_0402_6.3V4Z C537 AVSS_SATA_4 VSS_8
AA4 VDDQ_10 2 1 V11 AVSS_SATA_5 VSS_9 K11
@ C539 1 2 0.1U_0402_16V4Z AB5 V14 K16
@ C541 0.1U_0402_16V4Z VDDQ_11 0.1U_0402_16V4Z C527 AVSS_SATA_6 VSS_10
1 2 AB21 VDDQ_12 2 1 W9 AVSS_SATA_7 VSS_11 L4
@ C542 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 1 C540 Y9 L7
AVSS_SATA_8 VSS_12
Y11 L10
AVSS_SATA_9 VSS_13
No IDE device unmount CAP Y14 AVSS_SATA_10 VSS_14 L11
Y17 L12
+1.2V_HT AVSS_SATA_11 VSS_15
+3VS Y20 VDD33_18_1 CKVDD_1.2V_1 L21 +1.2V_HT AA9 AVSS_SATA_12 VSS_16 L14
AA21 L22 AB9 L16
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_13 VSS_17
AA22 L24 AB11 M6
IDE/FLSH I/O
CLKGEN I/O
AE25 L25 AB13 M10
AB15 AVSS_SATA_16 VSS_20 M11
+PCIE_VDDR AB17 M13
L61 AVSS_SATA_17 VSS_21
AC8 AVSS_SATA_18 VSS_22 M15
+1.2V_HT 2 1 0_0805_5% AD8 N4
R564 AVSS_SATA_19 VSS_23
AE8 N12
+S5_3V 0_0805_5% AVSS_SATA_20 VSS_24
1 2 +3VALW N14
C552 2 4.7U_0805_10V6K VSS_25
1 P6
POWER 22U_0805_6.3V6M 1 2 @ C556
VSS_26
VSS_27 P9
C553 1 2 @ 1U_0402_6.3V4Z P10
C555 1U_0402_6.3V4Z 2.2U_0603_6.3V4Z C559 VSS_28
1 2 2 1 A15 AVSS_USB_1 VSS_29 P11
C554 1 2 1U_0402_6.3V4Z P18 2.2U_0603_6.3V4Z 2 1 C561 B15 P13
C558 1U_0402_6.3V4Z PCIE_VDDR_1 AVSS_USB_2 VSS_30
1 2 P19 C14 P15
PCIE_VDDR_2 1U_0402_6.3V4Z C562 AVSS_USB_3 VSS_31
P20 PCIE_VDDR_3 2 1 D8 AVSS_USB_4 VSS_32 R1
C557 1 2 0.1U_0402_16V4Z P21 A17 D9 R2
A-LINK I/O
C560 1 0.1U_0402_16V4Z PCIE_VDDR_4 S5_3.3V_1 0.1U_0402_16V4Z C563 AVSS_USB_5 VSS_33
2 R22 A24 2 1 D11 R4
PCIE_VDDR_5 S5_3.3V_2 0.1U_0402_16V4Z C564 AVSS_USB_6 VSS_34
R24 B17 2 1 D13 R9
2 PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_7 VSS_35 2
GROUND
R25 J4 0.1U_0402_16V4Z 2 1 C565 D14 R10
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_8 VSS_36
J5 D15 R12
3.3V_S5 I/O
S5_3.3V_5 AVSS_USB_9 VSS_37
L1 E15 R14
S5_3.3V_6 AVSS_USB_10 VSS_38
S5_3.3V_7 L2 F12 AVSS_USB_11 VSS_39 T11
+1.2V_SATA L64 F14 T12
L63 +S5_1.2V 0_0603_5% AVSS_USB_12 VSS_40
+1.2VALW G9 T14
AVSS_USB_13 VSS_41
+1.2V_HT 2 1 0_0805_5% AA14 AVDD_SATA_1 H9 AVSS_USB_14 VSS_42 U4
AB18 1U_0402_6.3V4Z 2 1 C569 H17 U14
AVDD_SATA_4 1U_0402_6.3V4Z 2 C570 AVSS_USB_15 VSS_43
AA15 AVDD_SATA_2 1 J9 AVSS_USB_16 VSS_44 V6
2 1 AA17 G2 J11 Y21
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_17 VSS_45
CORE S5
SATA I/O
C566 22U_0805_6.3V6M AC18 G4 J12 AB1
AVDD_SATA_5 S5_1.2V_2 L65 AVSS_USB_18 VSS_46
AD17 J14 AB19
C567 1 AVDD_SATA_6 AVSS_USB_19 VSS_47
2 1U_0402_6.3V4Z AE17 AVDD_SATA_7
0_0603_5% +1.2VALW J15 AVSS_USB_20 VSS_48 AB25
C568 1 2 1U_0402_6.3V4Z K10 AE1
+1.2_USB 10U_0805_10V4Z 1 AVSS_USB_21 VSS_49
A10 2 @ C573 K12 AE24
C571 1 USB_PHY_1.2V_1 AVSS_USB_22 VSS_50
2 0.1U_0402_16V4Z B10 K14
C572 1 USB_PHY_1.2V_2 AVSS_USB_23
2 0.1U_0402_16V4Z 1U_0402_6.3V4Z 2 1 C574 K15
AVSS_USB_24
P23
0.1U_0402_16V4Z C575 PCIE_CK_VSS_9
2 1 R16
PCIE_CK_VSS_10
PCIE_CK_VSS_11 R19
+AVDD_USB T17
L66 R346 PCIE_CK_VSS_12
U18
+V5_VREF PCIE_CK_VSS_13
+3VALW 2 1 0_0805_5% A16 AE7 2 1 1K_0402_5% +5VS H18 U20
AVDDTX_0 V5_VREF PCIE_CK_VSS_1 PCIE_CK_VSS_14
B16 2 2 J17 V18
AVDDTX_1 +AVDDCK_3.3V C578 C579 D14 PCIE_CK_VSS_2 PCIE_CK_VSS_15
C16 J16 J22 V20
C576 1 AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_3 PCIE_CK_VSS_16
2 10U_0805_10V4Z D16 1 2 CH751H-40PT_SOD323-2 +3VS K25 V21
C577 1 AVDDTX_3 +AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17
2 10U_0805_10V4Z D17 K17 0.1U_0402_16V4Z 1U_0603_10V4Z M16 W19
PLL
AVDDTX_4 AVDDCK_1.2V 1 1 PCIE_CK_VSS_5 PCIE_CK_VSS_18

E17 M17 W22
AVDDTX_5 PCIE_CK_VSS_6 PCIE_CK_VSS_19
USB I/O
C580 1 2 1U_0402_6.3V4Z F15 E9 +AVDDC M21 W24

C581 1 AVDDRX_0 AVDDC PCIE_CK_VSS_7 PCIE_CK_VSS_20
2 1U_0402_6.3V4Z F17 P16 W25
AVDDRX_1 L67 PCIE_CK_VSS_8 PCIE_CK_VSS_21
F18
C583 1 AVDDRX_2
2 0.1U_0402_16V4Z G15 2 1 0_0603_5% +3VALW F9 L17
3 C582 1 AVDDRX_3 AVSSC AVSSCK 3
2 0.1U_0402_16V4Z G17 AVDDRX_4 Part 5 of 5
C584 1 2 0.1U_0402_16V4Z G18 AVDDRX_5 2.2U_0603_6.3V4Z C585 218S7EALA11FG_BGA528_SB700
2 1
218S7EALA11FG_BGA528_SB700 SB700R3@ 0.1U_0402_16V4Z 2 1 C586 SB700R3@
L68
+AVDDCK_1.2V 2 1 0_0603_5% +1.2V_HT
2.2U_0603_6.3V4Z 2 1 C587
0.1U_0402_16V4Z 2 1 C588
L69
+AVDDCK_3.3V 2 1 0_0603_5% +3VS
2.2U_0603_6.3V4Z 2 1 C589
0.1U_0402_16V4Z 2 1 C590
4 4
/
SB700 Power / GND
A B C D E
A B C D E
REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK AZ_RST_CD# GP17 GP16
PULL BOOTFAIL USE RESERVED RESERVED ENABLE PCI CLKGEN INTERNAL EC Internal pull up
HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED
H,H = Reserved
ENABLED STRAPS
1 DEFAULT 1
H,L = SPI ROM
EXT. RTC
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN (PD on X1, EC
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED L,H = LPC ROM (Default)
DISABLED STRAPS 32KHz to DEFAULT L,L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
1
R347 R348 R349 R350 R351 R352 R353 R354 R355 R356
@ @ @ @ @ @ @ @ @
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2
SI2: mount 2.2K
<20> PCI_CLK2
<20> PCI_CLK3
<20> PCI_CLK4
<20> PCI_CLK5
<20,32> CLK_PCI_EC
<20,31> CLK_PCI_SIO2
<20> RTC_CLK
<21> HDARST#
2 <21> GPIO17 2
<21> GPIO16
1
1
R357 R358 @ R359 @ R360 R361 R362 R363 R364 R365 R366
@ @
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 2.2K_0402_5% 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2
2
Need to confirm if SB SPI ROM will mount
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
3 DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT 3
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM

LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK
<20> PCI_AD28
<20> PCI_AD27
<20> PCI_AD26
<20> PCI_AD25
<20> PCI_AD24
<20> PCI_AD23
1
R373 R374 R375 R376 R377 R378

@ @ @ @ @ @
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2
4 4

SB700 STRAPS
A B C D E
A B C D E
SATA HDD Conn. SATA ODD Conn

+5VS Place closely JHDD0 SATA CONN.
1.2A
+5VS
1 1 1 1
C387 C388 C389 C390 1.1A
JHDD0 @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
GND 1 1 1 1 1 1
1 SATA_TXP1 C512 1 1
A+ 2 2 0.01U_0402_25V7K SATA_STX_DRX_P1 <22>
C414 C415 C416
3 SATA_TXN1 C513 1 2 0.01U_0402_25V7K @ C417 C418
A- SATA_STX_DRX_N1 <22>
4 10U_0805_10V4Z 10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
GND SATA_IRX_DTX_N1 C410 1 2 2 2 2 2
5 2 0.01U_0402_25V7K SATA_RXN1_C <22>
B- SATA_IRX_DTX_P1 C412 1
6 2 0.01U_0402_25V7K SATA_RXP1_C <22>
B+
GND 7
V33 8 +3VS
9
V33
V33 10
11
GND JODD @
GND 12
13
GND
14 +5VS 1
V5 GND SATA_TXP3 C518
15 2 1 2 0.01U_0402_25V7K SATA_STX_DRX_P3 <22>
V5 A+ SATA_TXN3 C519
V5 16 A- 3 1 2 0.01U_0402_25V7K SATA_STX_DRX_N3 <22>
17 4
GND GND SATA_IRX_DTX_N3 C424
Reserved 18 B- 5 1 2 0.01U_0402_25V7K SATA_RXN3_C <22>
19 6 SATA_IRX_DTX_P3 C425 1 2 0.01U_0402_25V7K
GND B+ SATA_RXP3_C <22>
20 7
V12 GND
24 21
GND V12
23 GND V12 22
DP 8
9 +5VS
OCTEK_SAT-22SO1G_RV +5V
+5V 10
11
MD
15 12
GND GND
14 GND GND 13
SANTA_206401-1_RV
2 2
USB Right Board USB Left Conn
W=60mils
W=60mils +5VALW 2A +USB_VCCB
+5VALW 2A +USB_VCCA U19
U25 1 8
GND VOUT
1 8 2 7
GND VOUT VIN VOUT
2 7 3 6
VIN VOUT USB_EN#2 VIN VOUT
3 VIN VOUT 6 <32> USB_EN#2 4 EN FLG 5 1 R584 2 USB_OC#2 <21,32>
<32> USB_EN#0 USB_EN#0 4 5 1 2 0_0402_5%
EN FLG USB_OC#0 <21,32>
1 R422 0_0402_5% RT9715BGS_SO8 1
RT9715BGS_SO8 C438 C367
@ 4.7U_0805_10V4Z
4.7U_0805_10V4Z @
3 2 2 3
For ESD
+USB_VCCA
JUSBB +USB_VCCB
W=60mils
W=60mils @ D11
1 1 2
R1026 1 2 0_0402_5% 2 1 0.1U_0402_16V4Z
2
3 3 3 1 1 1
4
L50 @ 4 PJDLC05_SOT23-3 C350 + C352 C351
5
5
<21> USB20_N0 1 2 6
1 2 USB20_N0_R 6 2 2
7
USB20_P0_R 7 220U_6.3V_M 2
8
8 1000P_0402_50V7K
<21> USB20_P0 4 3 9
4 3 USB20_N1_R 9 R95
10 10 1 2 0_0402_5%
WCM-2012-900T_0805 USB20_P1_R 11 13
11 GND
12 12 GND 14
L46 @ JUSB @
R1027 1 2 0_0402_5% <21> USB20_N2 1 2 1 5
ACES_85201-1205N 1 2 USB20_N2_R VCC GND
2 D- GND 6
USB20_P2_R 3 7
D+ GND
<21> USB20_P2 4 3 4 8
4 3 GND GND
R1028 1 2 0_0402_5% WCM-2012-900T_0805 P-TWO_CU304G-A0G1G-P
4 4
L51 @ R96 1 2 0_0402_5%
<21> USB20_N1 1 1 2 2
<21> USB20_P1 4 3
4 3
WCM-2012-900T_0805 /
R1029 1 2 0_0402_5%
SATA HDD/ODD
A B C D E
A B C D E
Place Close to Chip

UL1
<11> PCIE_PTX_C_IRX_P3 CL2 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_P3 20 HSOP LED3/EEDO 33 LAN_DO T27 PAD
34 LAN_DI RL1 1 2 3.6K_0402_5% +LAN_VDD12
LED2/EEDI/AUX +3V_LAN
<11> PCIE_PTX_C_IRX_N3 CL1 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_N3 21 35 LAN_SK_LAN_LINK# Close to Pin10,13,30,36
HSON LED1/EESK LAN_CS RL2
32 2 1 1K_0402_5%
PCIE_ITX_C_PRX_P3 EECS
<11> PCIE_ITX_C_PRX_P3 15 2 2 2 2
HSIP LAN_ACTIVITY# CL3 CL4 CL5 CL6
LED0 38
PCIE_ITX_C_PRX_N3 16
<11> PCIE_ITX_C_PRX_N3 HSIN LAN_MDI0+
RTL8103EL-GR 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
CLK_PCIE_LAN MDIP0 LAN_MDI0- 1 1 1 1
<16> CLK_PCIE_LAN 17 3
CLK_PCIE_LAN# REFCLK_P MDIN0 LAN_MDI1+
<16> CLK_PCIE_LAN# 18 REFCLK_M MDIP1 5
6 LAN_MDI1-
CLKREQ_LAN# MDIN1
<16> CLKREQ_LAN# 25 CLKREQB NC 8
1 1
NC 9
PLT_RST# 27 11 +LAN_VDD12
<12,15,20,27,31,32> PLT_RST# PERSTB NC
NC 12
RL3 2
1 2 2.49K_0402_1% 46 4 CL7
RSET NC
Close to Pin45
LAN_WAKE# 26 48 VCTRL12 0.1U_0402_16V4Z
<21> LAN_WAKE# LANWAKEB VCTRL12A 1
ISOLATEB 28 ISOLATEB
VDDTX 19 +EVDD12
LAN_X1 41 30 +LAN_VDD12
LAN_X2 CKXTAL1 DVDD12
42 CKXTAL2 DVDD12 36
13 +EVDD12
DVDD12
DVDD12 10 Close to Pin19
+3V_LAN 39
NC 2 2
@ RL4 CL8 CL9
1 2 10K_0402_5% LAN_WAKE# 23 44
NC NC 1U_0402_6.3V4Z 1U_0402_6.3V4Z
24 45 +LAN_VDD12
NC VCTRL12D 1 1
7 29 1 R97 2 0_0402_5% +3V_LAN
GND VDD33 R98
14 37 1 2 0_0402_5%
GND VDD33
31
GND R105 2 0_0402_5%
47 GND AVDD33 1 1
40 +3V_LAN
NC
22
GNDTX NC
43 Close to Pin1,37,29
Reserve bead for EMI
2 2 2
RTL8103EL-GR_LQFP48_7X7 CL10 CL11 CL12
+3VS
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1
1
2 RL5 2
1K_0402_1%
R70 @ Close to Pin48
2
ISOLATEB 1 2 VCTRL12
WOL_EN# <32,34>
YL1 1 2
0_0402_5% CL14 CL15
RL6 LAN_X1 2 1 LAN_X2 @
1 1 10U_0805_10V4Z 0.1U_0402_16V4Z
15K_0402_5% CL13 CL16 2 1
Reserve R70 for cost down 25MHz_20pF_6X25000017
27P_0402_50V8J 27P_0402_50V8J
2 2
2
CL21
< LAN Conn >
68P_0402_50V8J
RL9 1 JLAN @
LAN_ACTIVITY# 2 1 150_0402_1% 12
RL10 Yellow LED-
2 1 150_0402_1% 11
3 +3V_LAN Yellow LED+ 3
8 PR4-
Place these components Add CL18, CL20 7 PR4+
colsed to LAN chip UL2 for customer request RJ45_MIDI1- 6
LAN_MDI0+ RJ45_MIDI0+ PR2-
1 16
CL17 LAN_MDI0- TD+ TX+ RJ45_MIDI0- CL18 RL7
2 15 5
0.01U_0402_25V7K TD- TX- PR3-
2 1 3 14 1 2 1000P_0402_50V8-J 1 2 75_0402_1%
CT CT
4 NC NC 13 4 PR3+
CL19 5 12 CL20 RL8
0.01U_0402_25V7K NC NC RJ45_GND RJ45_MIDI1+
2 1 6 11 1 2 1000P_0402_50V8-J 1 2 75_0402_1% 3
LAN_MDI1+ CT CT RJ45_MIDI1+ PR2+
7 RD+ RX+ 10 2
LAN_MDI1- 8 9 RJ45_MIDI1- CL22 RJ45_MIDI0- 2
RD- RX- PR1-
SHLD2 14
68P_0402_50V8J RJ45_MIDI0+ 1
LF-H1201P-2 RL11 1 PR1+
13
LAN_SK_LAN_LINK#2 150_0402_1% SHLD1
1 10
RL12 Green LED-
2 1 150_0402_1% 9
+3V_LAN Green LED+
TYCO_2068888-1_12P-T
CL23
RJ45_GND 1 2 1000P_1808_3KV7K LANGND
1 1
CL24 CL25
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
4 4

RTL8103EL 10 / 100 LAN
A B C D E
A B C D E
< PCIe Mini Card for WLAN/ WiMAX >

+1.5VS +3VS
1 1
1 1 1 1 1 1
CM20 CM21 CM22 CM17 CM18 CM19
0.01U_0402_25V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.01U_0402_25V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z

2 2 2 2 2 2
+1.5VS +3VS
JWLAN @
1 1 2 2
3 4
3 4
5 6
CLKREQ_MCARD2# 5 6
<16> CLKREQ_MCARD2# 7 8
7 8
9 9 10 10
CLK_PCIE_MCARD2# 11 12
<16> CLK_PCIE_MCARD2# 11 12
CLK_PCIE_MCARD2 13 14
<16> CLK_PCIE_MCARD2 13 14
15 16
15 16
17 18
17 18 WL_OFF#
19 20 WL_OFF# <32>
19 20 PLT_RST#
21 21 22 22 PLT_RST# <12,15,20,26,31,32>
PCIE_PTX_C_IRX_N2 23 24
<11> PCIE_PTX_C_IRX_N2 23 24
PCIE_PTX_C_IRX_P2 25 26
<11> PCIE_PTX_C_IRX_P2 25 26
27 27 28 28
29 30 SMB_CK_CLK1
PCIE_ITX_C_PRX_N2 29 30 SMB_CK_DAT1 SMB_CK_CLK1 <21>
<11> PCIE_ITX_C_PRX_N2 31 32 SMB_CK_DAT1 <21>
PCIE_ITX_C_PRX_P2 31 32
33 33 34 34
<11> PCIE_ITX_C_PRX_P2 USB20_N8
35 35 36 36 USB20_N8 <21>
37 38 USB20_P8
37 38 USB20_P8 <21>
+3VS 39 40
2 39 40 2
41 41 42 42
43 44
43 44
45 46
45 46
47 47 48 48
E51_TXD RM6 1 2 0_0402_5% E51_TXD_R 49 50
<32> E51_TXD E51_RXD RM7 E51_RXD_R 49 50
1 2 0_0402_5% 51 52
<32> E51_RXD 51 52
1 2 PLT_RST#
2
53 54 RN3 100K_0402_5%
RM8 GND1 GND2
100K_0402_5%
ACES_88911-5204
1
<NB & SB >

< R1 for customer BOM STRUCTURE > < R3 for mass production BOM STRUCTURE >
3
< PCB > 3
U3 U3
ZZZ
RS780MN RS780MN
PCB
RS780MN R1 RS780MN R3
RS780MNR1@ RS780MNR3@ PCB 075 LA-5831P REV1 M/B
U3
RS780MC
RS780MC R1
RS780MCR1@
U15
SB700
SB700R1
SB700R1@
4 4
/
WLAN / CAMERA
A B C D E
5 4 3 2 1
CC1 2 1 0.1U_0402_16V4Z RC1 2 1 0_0402_5%
UC1
1
CC2 AV_PLL
2 1 0.1U_0402_16V4Z 3
NC
7 NC
+3VS_CR 9
+VCC_3IN1 CARD_3V3
RC2 11
+3VS_CR D3V3
+3VS 1 2 0_0603_5% 33 10
D3V3 VREG
1 1 MS_D4 22 1
CC3 CC4 30 CC5
NC
8 3V3_IN 1U_0402_6.3V4Z
D 0.1U_0402_16V4Z 1U_0402_6.3V4Z RST#_R D
44 RST#
RC3 2 2 MODE SEL 45 2
@ MODE_SEL
+3VALW 1 2 0_0603_5% 47 XTLO XD_CLE_SP19 43 For EMI
XTLI 48 42
XTLI XD_CE#_SP18
41
USB20_N4 XD_ALE_SP17 SD_DATA2
<21> USB20_N4 4 DM SD_DAT2/XD_RE#_SP16 40
USB20_P4 5 39 SD_DATA3 RC4 RC5 CC6
<21> USB20_P4 CR_LED# DP SD_DAT3/XD_WE#_SP15
confirm that whether can be removed 14 GPIO0 XD_RDY_SP14 38 1 2 22_0402_5% SDCLK 1 @ 2 10_0402_5% @ 10P_0402_50V8J
SD_DAT4/XD_WP#/MS_D7_SP13 37
35 RC6 RC7 CC7
SD_DAT5/XD_D0/MS_D6_SP12 SD_MS_CLK
SD_CLK/XD_D1/MS_CLK_SP11 34 1 2 22_0402_5% MSCLK 1 @ 2 10_0402_5% @ 10P_0402_50V8J
31 MS_DATA3_SD_DATA6
+3VS_CR SD_DAT6/XD_D7/MS_D3_SP10 MSCD#
MS_INS#_SP9 29
28 MS_DATA2_SD_DATA7
SD_DAT7/XD_D2/MS_D2_SP8 SD_MS_DATA0
27
SD_DAT0/XD_D6/MS_D0_SP7
2
26 MS_DATA1
RC8 SD_DAT1/XD_D3/MS_D1_SP6 MSBS
XD_D5_SP5 25
23 SD_DATA1
100K_0402_5% XD_D4/SD_DAT1_SP4 SDCD#
SD_CD#_SP3 21
RC9 20 SDWP#
1
RST# RST#_R SD_WP_SP2

2 1 0_0402_5% 19
XD_CD#_SP1
1 18
CC8 EEDI
2 13 XTAL_CTR
1U_0402_6.3V4Z RREF XTAL_CTR
24
2 MS_D5
12 DGND
32 15
DGND EEDO
16
MODE SEL EECS
6 AGND EESK 17
46 36 SDCMD
AGND SD_CMD
1
2
CC9 RC10
C 0.1U_0402_16V4Z RC11 RC12 C
0_0402_5%
@ RTS5159-VDD-GR
2 6.19K_0402_1% 0_0402_5%
2
1
< Card Reader LED >
< 3 in 1 Card Reader >
JREAD @
1 SDWP#
SD-WP SD_DATA1
2
+3VS SD-DAT1 SD_MS_DATA0
3
SD-DAT0
4
SD-GND
MS-GND 5
1
6 MSBS
RC13 MS-BS SDCLK
7
SD-CLK MS_DATA1
8
120_0402_5% MS-DAT1 SD_MS_DATA0
9
MS-DAT0
10 +VCC_3IN1
22
SD-VCC MS_DATA2_SD_DATA7
11
DC1 MS-DAT2
SD-GND 12 1 1
HT-110UYG-CT_YEL/GRN 13 MSCD# CC10 CC11
MS-INS MS_DATA3_SD_DATA6
14
MS-DAT3 SDCMD 0.1U_0402_16V4Z 1U_0402_6.3V4Z
Vf=1.9V(typ),2.4V(max) SD-CMD
15
16 MSCLK 2 2
1
MS-SCLK
17
B MS-VCC SD_DATA3 B
SD-DAT3 18
CR_LED# 19
MS-GND SD_DATA2
22 20
GND1 SD-DAT2 SDCD#
23 GND2 SD-CD 21
CR_LED: Low when card reader is being accessed. TAITW_R009-125-LR_RV
< 48MHz > Cost-down option

R C USB AUTO DE-LINK MS FORMATTER Description
RC14 0 NC YES Recommended
1 2 0_0402_5% XTLI For EMI
<16> CLK_48M_CR
NC 47P YES YES
1
RC15 R925
+3VS_CR 1 2 0_0402_5% XTAL_CTR 33_0402_5% NC NC Compatible with RTS5158E
@
2
NC 680P YES LED ON

1
@
C919 10K 180P LED ON
22P_0402_50V8J
A 2 A
10K 680P YES

RTS5159 Card Reader
5 4 3 2 1
A B C D E
+3VS_DVDD
RA1
+AVDD 30mil 2 1 0_0603_5% +3VS
1 1
CA1 CA2
0.1U_0402_16V4Z 10U_0805_10V4Z
2 2
RA3
40mil
+5VS 2 1 0_0603_5%
1 1 1 1
CA3 CA4 CA5 CA6
1 1
10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z CA7 CA8
2 2 2 2
1 0.1U_0402_16V4Z 10U_0805_10V4Z 1
Remove LDO 2 2
25
38
9
UA2
DVDD_IO
AVDD1
AVDD2
DVDD
14 35 AMP_SPK_L
LINE2-L LOUT1_L AMP_SPK_L <30>
15 36 AMP_SPK_R
LINE2-R LOUT1_R AMP_SPK_R <30>
MIC2_L 16 39
<30> MIC2_L MIC2_L LOUT2_L
Int. Mic MIC2_R 17 41
<30> MIC2_R MIC2_R LOUT2_R
23 LINE1_L SPDIFO1 48
24 LINE1_R SPDIFO2 45
MIC1_C_L 21 33 HPL RA5 1 2 63.4_0402_1%

<30> MIC1_C_L MIC1_L HPOUT_L HP_L <30>
Ext. Mic MIC1_C_R 22 32 HPR RA6 1 2 63.4_0402_1%
<30> MIC1_C_R MIC1_R HPOUT_R HP_R <30>
CA14 1 2 100P_0402_50V8J MONO_IN 12 37

BEEP_IN MONO_OUT
HDA_BITCLK_CODEC 6 46
<21> HDA_BITCLK_CODEC BITCLK DMIC_CLK1/2
HDA_SDOUT_CODEC 5 44
<21> HDA_SDOUT_CODEC SDATA_OUT DMIC_CLK3/4
RA7
2 2
<21> HDA_SDIN0 2 1 33_0402_5% HDA_SDIN0_R 8 SDATA_IN LINE2_VREFO 20
HDA_RST#_CODEC 11 18
<21> HDA_RST#_CODEC RESET# LINE1_VREFO
HDA_SYNC_CODEC 10 28
10mil
<21> HDA_SYNC_CODEC SYNC MIC1_VREFO +MIC1_VREFO
19
10mil
MIC2_VREFO +MIC2_VREFO
SPK_SEL 2
<22> SPK_SEL GPIO0/DMIC_DATA1/2
31 CA16 1 2 2.2U_0603_6.3V6K
CPVREF
3
GPIO1/DMIC_DATA3/4 AC_VREF
GPIO63-->SPK_SEL HIGH: HARMAN VREF 27
SENSE_A 13
LOW: NO-BRAND SENSE A AC_JDREF
JDREF 40 1 1
SENSE_B 34 CA18 CA19
SENSE B
1
30 CA17 1 2
MUTE# RA39 1 CBN
<30> MUTE# 2 0_0402_5% 47 RA10 10U_0805_10V4Z 0.1U_0402_16V4Z
EAPD 2.2U_0603_6.3V6K 2 2
29
CBP 20K_0402_1%
43
NC
2
4 DVSS AVSS1 26
For EMI 7
DVSS AVSS2
42
@ ALC272-GR_LQFP48
HDA_BITCLK_CODEC 1 @ 2 C618 1 2 100P_0402_50V8J
DGND AGND
R313 100_0402_5%
1 2
RA12 0_0603_5%
1 2
RA13 0_0603_5%
1 2
3 RA14 0_0603_5% 3
1 2
< SENSE_A & SENSE_B, place close to chip > RA15 0_0603_5%
1 2
RA19 0_0603_5%
RA18
1 2 20K_0402_1% SENSE_A Add RA19 for EMI
<30> MIC_SENSE
RA16
1 2 5.1K_0402_1% SENSE_B
<30> NBA_PLUG
MIC@ RA17
1 2 20K_0402_1%
< MONO_IN SOURCE >
RA8
Sense Pin Impedance Codec Signals Function EC Beep <32> EC_BEEP 1 2 47K_0402_5%
39.2K PORT-A (PIN 39, 41) RA9 CA15

PCI Beep <21> SB_SPKR 1 2 47K_0402_5% 1 2 0.1U_0402_16V4Z MONO_IN
20K PORT-B (PIN 21, 22) Ext. MIC

SENSE A
1
10K PORT-C (PIN 23, 24) RA11
1
CA20
10K_0402_5% 0.1U_0402_16V4Z
5.1K PORT-D (PIN 35, 36) SPK out 2
2
4 4
39.2K PORT-E (PIN 14, 15)
20K PORT-F (PIN 16, 17) Int. MIC

SENSE B
10K PORT-H (PIN 37) /
5.1K PORT-I (PIN 32, 33) Headphone out HD Audio ALC272 Codec
A B C D E
A B C D E
< TPA6017 Medium Range Amplifier >

+5VS
< Ext. Mic >
1 1 1
CA23 CA24 CA25
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z RA20 DA1

2 2 2 2 1 4.7K_0402_5% 1 2 CH751H-40PT_SOD323-2 +MIC1_VREFO
RA21
CA21 2 1 4.7U_0805_10V4Z 2 1 1K_0402_5% MIC1_L
<29> MIC1_C_L
10 dB CA22 2 1 4.7U_0805_10V4Z 2 1 1K_0402_5% MIC1_R

<29> MIC1_C_R
RA22 RA23 DA2
+5VS
2 1 4.7K_0402_5% 1 2 CH751H-40PT_SOD323-2
16
15
+MIC1_VREFO
1
UA3
RA27 RA28
PVDD1
PVDD2
VDD
1 1
@
100K_0402_5% 100K_0402_5%
CA29
2
0.033U_0402_16V7K 7 2
RIN+ GAIN0
GAIN1 3
CA30
<29> AMP_SPK_R 0.033U_0402_16V7K LINE_C_OUTR 17 RIN-
1
18 SPKR+
ROUT+ @ RA29 RA30 < Int. Mic >
CA31 14 SPKR- 100K_0402_5% 100K_0402_5% +MIC2_VREFO
0.033U_0402_16V7K ROUT-
9
2
LIN+
4 SPKL+
CA32 LOUT+
close to JMIC
<29> AMP_SPK_L 0.033U_0402_16V7K LINE_C_OUTL 5 LIN-
1
8 SPKL- DA3 MIC@
LOUT- RA24 2
4.7K_0402_5% 1
MIC@ For EMI 3
2
12 Keep 10 mil width PJDLC05_SOT23-3
NC MIC@ MIC@ MIC@
10 AMP_BYPASS CA26 RA25 LA12 JMIC @
MUTE# BYPASS INT_MIC
<29> MUTE# 19 <29> MIC2_L 2 1 1U_0402_6.3V4Z 2 1 1K_0402_5% 1 2INT_MIC_L 1 1 NC1 3
SHUTDOWN SBY100505T-121Y-N
2 2 2 NC2 4
CA33 MIC@
GND5
GND1
GND2
GND3
GND4
CA27 LA11 ACES_85204-0200N

0.47U_0603_10V7K 2 1 1U_0402_6.3V4Z 2 1 1K_0402_5% 1 2 1 2
1 <29> MIC2_R
CA28 RA26 220P_0402_50V7K SBY100505T-121Y-N
TPA6017A2_TSSOP20 MIC@ MIC@ MIC@
21
20
13
11
1
close to Codec
close to JMIC
GAIN0 GAIN1 Av(db) Rin(ohm)
2 2
0 0 6 90K
0 1 10 70K
DA9 @
1 0 15.6 45K < Speaker Connector > Left Connector 1
2
1 1 21.6 25K 3
LA3 FBMA-L11-160808-800LMT_0603 PJDLC05_SOT23-3 JSPKL

SPKL+ 1 2 SPK_L1 1 3
SPKL- SPK_L2 1 NC1
1 2 2 2 NC2 4
LA4 FBMA-L11-160808-800LMT_0603 ACES_85204-0200N
@
DA10 @
2
Right Connector 1
3
LA5 FBMA-L11-160808-800LMT_0603 PJDLC05_SOT23-3 JSPKR @

SPKR+ 1 2 SPK_R1 1 3
SPKR- SPK_R2 1 NC1
1 2 2 2 NC2 4
LA6 FBMA-L11-160808-800LMT_0603 ACES_85204-0200N
< Volume Control >

< HeadPhone JACK >
+3VS JLINE @
3 5 3
1
NBA_PLUG 4
<29> NBA_PLUG
RA32
L35 1 2 KC FBM-L11-160808-121LMT 0603 HP_R_L 3
<29> HP_R
100K_0402_5% 6
L36 1 2 KC FBM-L11-160808-121LMT 0603 HP_L_L 2
2
<29> HP_L
1
1
DA8 FOX_JA6333L-B3T0-7F
CA36 2
0.1U_0402_16V4Z 1
+3VS 2 3
PJDLC05_SOT23-3
CA35
1
0.1U_0402_16V4Z
RA33 RA34 +3VS 1 2
5
SW2
10K_0402_5% 10K_0402_5%
DIP
UA4 +3VS
< Ext.MIC/LINE IN JACK >
2
RA35
NC
P
2 1 2 10K_0402_5% 2 4
A A Y
G
74LVC1G14GW_SOT353-5 UA5
1 1 14 JEXMIC @
3
COM CD1# VCC

2 13 5
RA36 D1 CD2#
3 12
CP1 D2 MIC_SENSE
3 1 2 10K_0402_5% 4 11 <29> MIC_SENSE 4
B SD1# CP2
5 10
Q1 SD2# MIC1_R LA9 MIC1_L_R
1 1 6 09 1 1 2 KC FBM-L11-160808-121LMT 0603 3
Q1# Q2
DIP
CA37 CA38 7 08 CA39 6

GND Q2# MIC1_L LA10 1 MIC1_L_L
2 KC FBM-L11-160808-121LMT 0603 2
SW_XRE094_3P 0.01U_0402_25V7K 0.01U_0402_25V7K 74LCX74MTC_TSSOP14 0.1U_0402_16V4Z 1
4
2 2 2
DA7 FOX_JA6333L-B3T0-7F
2 1 1
4 1 CA40 CA41 4
ENCODER_DIR <32>
3 100P_0402_50V8J 100P_0402_50V8J
ENCODER_PULSE <32>
@ @
PJDLC05_SOT23-3 2 2
/
AMP / Audio Jack / HP / SPEAKER / VR
Custom LA-5831P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
A B C D E
< SPI Flash 8Mb*1 > +3VL
20mils U46
8 4
VCC VSS
1
C786
1
C877
@
1
C878
@
3 W
< MDC 1.5 Conn >
0.1U_0402_16V4Z 10P_0402_50V8J 10P_0402_50V8J 7
2 2 2 HOLD
SPI_CS# 1
<32> SPI_CS# S
SPI_CLK 6
1 <32> SPI_CLK C 1
5 2 +3VALW
<32> EC_SO_SPI_SI D Q EC_SI_SPI_SO <32>
JMDC @
MX25L8005M2C-15G
1 2
HDA_SDOUT_MDC 3 GND1 RES0
<21> HDA_SDOUT_MDC IAC_SDATA_OUT RES1 4
5 6
HDA_SYNC_MDC 7 GND2 3.3V
<21> HDA_SYNC_MDC IAC_SYNC GND3 8
MDC@ R495 1 2 33_0402_5% HDA_SDIN1_MDC 9 10
<21> HDA_SDIN1 IAC_SDATA_IN GND4
<21> HDA_RST#_MDC HDA_RST#_MDC 11 12 HDA_BITCLK_MDC HDA_BITCLK_MDC <21>
IAC_RESET# IAC_BITCLK
1
R496
GND
GND
GND
GND
GND
GND
@
10_0402_5%
ACES_88018-124G
13
14
15
16
17
18
2
< LPC Debug Port > Connector for MDC Rev1.5
2
C777
@
Please place the PAD under DDR DIMM. 10P_0402_50V8J
1
+3VS H1 @
6 5
R622
SERIRQ 1 2 0_0402_5% 7 4 PLT_RST# +3VALW
<20,32> SERIRQ PLT_RST# <12,15,20,26,27,32>
LPC_AD3 8 3 LPC_AD2 1 1 1
2 <20,32> LPC_AD3 LPC_AD2 <20,32> 2
MDC@ MDC@ MDC@
C778 C779 C780
LPC_AD1 9 2 LPC_AD0 1000P_0402_50V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z
<20,32> LPC_AD1 LPC_AD0 <20,32> 2 2 2
LPC_FRAME# 10 1
<20,32> LPC_FRAME# CLK_PCI_SIO2 <20,24>
2
R634
DEBUG_PAD @
22_0402_5%
1
2
C639
@
22P_0402_50V8J
1
For EMI
KEYBOARD CONN. KSO2 1
C725
2
100P_0402_50V8J
KSO1 1 2
C717 100P_0402_50V8J
KSI[0..7] KSO0
KSI[0..7] <32> 1 2 Left switch Right Switch
C721 100P_0402_50V8J
KSO[0..15] KSO4 1 2
KSO[0..15] <32>
C609 100P_0402_50V8J SW7 SW8
KSO3 1 2 SMT1-05_4P SMT1-05_4P
3 C724 100P_0402_50V8J 3
1 3 1 3
JKB @ KSO5 1 2
1 2 C728 100P_0402_50V8J TP_SWL 2 4 TP_SWR 2 4
34 +3VS <33> TP_SWL <33> TP_SWR
R502 300_0402_5% KSO14 1 2
33 C730 100P_0402_50V8J
6
5
6
5
32 KSO6 1 2 1 1
31 C715 100P_0402_50V8J
30
2
1 2 KSO7 1 2 C889 C890
29 +3VS
KSO2 R503 300_0402_5% C732 100P_0402_50V8J 180P_0402_50V8J D86 180P_0402_50V8J D85
28 KSO1 KSO13 @ 2 @ 2
27 1 2 PJDLC05_SOT23-3 PJDLC05_SOT23-3
KSO0 C733 100P_0402_50V8J @ @
26 KSO4 KSO8 1 2
25 KSO3 C740 100P_0402_50V8J
24 KSO5 KSO9 1 2
23 KSO14 C737 100P_0402_50V8J
22 KSO6 KSO10 1 2
1
21 KSO7 C729 100P_0402_50V8J
20 KSO13 KSO11 1 2
19 KSO8 C738 100P_0402_50V8J
18 KSO9 KSO12
17
1 2 For EMI For EMI
KSO10 C718 100P_0402_50V8J
16 KSO11 KSO15
15 1 2
KSO12 C736 100P_0402_50V8J
14 KSO15 KSI7
13 1 2
KSI7 C716 100P_0402_50V8J
12 KSI2 KSI2 1 2
11 KSI3 C741 100P_0402_50V8J
10 KSI4 KSI3 1 2
9 KSI0 C726 100P_0402_50V8J
8 KSI5 KSI4 1 2
7 KSI6 C723 100P_0402_50V8J
6 KSI1 KSI0
5 1 2
4 C731 100P_0402_50V8J 4
2 1 +3VS
4 CAPS_LED# R509 300_0402_5% KSI5
3 CAPS_LED# <32> 1 2
CURS_LED# C739 100P_0402_50V8J
2 NUM_LED# CURS_LED# <32> KSI6
NUM_LED# <32> 1 2
1 C735 100P_0402_50V8J
ACES_88170-3400 KSI1 1 2
C734 100P_0402_50V8J
CAPS_LED# 1 2 /
CURS_LED#
C722 100P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
C727 100P_0402_50V8J
NUM_LED# 1 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SPI / LPC / MDC
C714 100P_0402_50V8J Size Document Number Rev
A B C D E
A B C D E
+3VL +3VL_EC +EC_AVCC

L25
2 1 0_0603_5%
111
125
22
33
96
67
9
U33
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
GATEA20 1 21 INVT_PWM_R
<21> GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F EC_BEEP
1
Reserve for EMI request <21> KB_RST# SERIRQ
2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 EC_BEEP <29> 1
<20,31> SERIRQ 3 SERIRQ# FANPWM1/GPIO12 26
LPC_FRAME# 4 27 ACOFF C812
<20,31> LPC_FRAME# LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <37>
@ C810 @ R530 <20,31> LPC_AD3 5 LAD3 1 2 100P_0402_50V8J ECAGND
1 2 15P_0402_50V8J1 2 33_0402_5% <20,31> LPC_AD2 LPC_AD2 7 PWM Output
LPC_AD1 LAD2 BATT_TEMPA
<20,31> LPC_AD1 8
LAD1 BATT_TEMP/AD0/GPIO38
63 BATT_TEMPA <36>Power has removed OVP component
LPC_AD0 BATT_OVP R1024
<20,31> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I_R BATT_OVP <37>
65 1 2 100K_0402_5% ADP_I <37>
CLK_PCI_EC ADP_I/AD2/GPIO3A ADP_V
<20,24> CLK_PCI_EC 12 PCICLK AD Input AD3/GPIO3B 66 ADP_V <37>
PLT_RST# 13 75 C896
<12,15,20,26,27,31> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
+3VL R533 1 2 47K_0402_5% ECRST# 37 76 1 2 0.22U_0603_16V4Z
EC_SCI# ECRST# SELIO2#/AD5/GPIO43
<21> EC_SCI# 20 SCI#/GPIO0E
WL_LED# 38
<33> WL_LED# CLKRUN#/GPIO1D
68 DAC_BRIG
DAC_BRIG/DA0/GPIO3C DAC_BRIG <18>
C811 2 1 0.1U_0402_16V4Z 70 EN_DFAN1 Reserve pull high for cap. sensor
EN_DFAN1/DA1/GPIO3D IREF EN_DFAN1 <5>
DA Output IREF/DA2/GPIO3E
71 IREF <37> +3VL
KSI0 55 72 CHGVADJ
KSI1 KSI0/GPIO30 DA3/GPIO3F CHGVADJ <37>
56 KSI1/GPIO31
KSI2 57
KSI3 KSI2/GPIO32 USB_EN#2
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 USB_EN#2 <25>
KSI4 59 84 USB_EN#0 @
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN#0 <25>
KSI5 60 85 ENCODER_DIR CAP_INT# R1025 1 2 4.7K_0402_5%
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C ENCODER_PULSE ENCODER_DIR <30>
61
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D
86 ENCODER_PULSE <30>
KSI7 62 87 TP_CLK @
KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK <33> ESB_CK R1033
39 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F 88 TP_DATA <33> 1 2 4.7K_0402_5%
KSO1 40
KSI[0..7] KSO2 KSO1/GPIO21 @
<31> KSI[0..7] 41 KSO2/GPIO22
KSO3 42 97 ESB_DA R1034 1 2 4.7K_0402_5%
2.2K_0402_5% 2 EC_SMB_DA2 KSO[0..15] KSO4 KSO3/GPIO23 SDICS#/GPXOA00 WOL_EN#
+3VS 1 R986 <31> KSO[0..15] 43 98
KSO5 KSO4/GPIO24 SDICLK/GPXOA01 USB_OC#2 WOL_EN# <26,34>
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
VGATE
USB_OC#2 <21,25>
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 VGATE <42>
2.2K_0402_5% 2 1 R987 EC_SMB_CK2 KSO7 46 SPI Device Interface For EMI
KSO8 KSO7/GPIO27
47
2 KSO9 KSO8/GPIO28 EC_SI_SPI_SO 2
48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO <31>
+3VL 2.2K_0402_5% 2 1 R988 EC_SMB_DA1 KSO10 49 120 EC_SO_SPI_SI R74
KSO11 KSO10/GPIO2A SPIDO/WR# SPI_CLK_R EC_SO_SPI_SI <31>
50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126 1 2 SPI_CLK <31>
KSO12 51 128 SPI_CS#
EC_SMB_CK1 KSO13 KSO12/GPIO2C SPICS# SPI_CS# <31>
2.2K_0402_5% 2 1 R989 52 0_0402_5% 1
KSO14 KSO13/GPIO2D C607
53
KSO15 KSO14/GPIO2E 10P_0402_50V8J
54 KSO15/GPIO2F CIR_RX/GPIO40 73
81 74 CAP_INT# @
KSO16/GPIO48 CIR_RLC_TX/GPIO41 FSTCHG CAP_INT# <33> 2
82 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 89 FSTCHG <37>
90 BATT_FULL_LED#
BATT_CHGI_LED#/GPIO52 CAPS_LED# BATT_FULL_LED# <33>
CAPS_LED#/GPIO53 91 CAPS_LED# <31>
4.7K_0402_5% 2 1 R991 TP_CLK EC_SMB_CK1 77 GPIO 92 BATT_CHG_LOW_LED#
+5VS <36> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW_LED# <33>
EC_SMB_DA1 78 93 PWR_ON_LED#
<36> EC_SMB_DA1 EC_SMB_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON PWR_ON_LED# <33>
<7> EC_SMB_CK2 79
SCL2/GPIO46 SM Bus SYSON/GPIO56
95
SYSON <34,40>
4.7K_0402_5% 2 1 R992 TP_DATA EC_SMB_DA2 80 121 CPU_VCORE_ENABLE
<7> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 ACIN_D CPU_VCORE_ENABLE <42>
127
AC_IN/GPIO59 R541
2 1 10K_0402_5%
PM_SLP_S3# 6 100 EC_RSMRST#
LID_SW# <21> PM_SLP_S3# PM_SLP_S5# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_LID_OUT# EC_RSMRST# <21>
+3VALW 100K_0402_5% 1 2 R995 14 101
<21> PM_SLP_S5# EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON EC_LID_OUT# <21>
<21> EC_SMI# 15 102 EC_ON <33>
LID_SW# EC_SMI#/GPIO08 EC_ON/GPXO05
<33> LID_SW# 16 103
ESB_CK LID_SW#/GPIO0A EC_SWI#/GPXO06 SB_PWRGD
<33> ESB_CK 17 104
100K_0402_5% 1 R996 ON/OFFBTN# ESB_DA SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF#_R SB_PWRGD <21,42>
+3VL 2 <33> ESB_DA 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105
19 GPIO 106 WL_OFF#
CAP_RST# EC_PME#/GPIO0D WL_OFF#/GPXO09 CURS_LED# WL_OFF# <27>
<33> CAP_RST# 25 107 CURS_LED# <31>
47K_0402_5% 1 R998 KSO1 FAN_SPEED1 EC_THERM#/GPIO11 GPXO10 R560
2 <5> FAN_SPEED1 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108
VLDT_EN 29 1 2 150K_0402_5%
<34> VLDT_EN FANFB2/GPIO15 +3VL
E51_TXD 30
47K_0402_5% 1 R999 KSO2 <27> E51_TXD E51_RXD EC_TX/GPIO16
2 31 110
<27> E51_RXD ON/OFFBTN# EC_RX/GPIO17 PM_SLP_S4#/GPXID1 UMA_ENBKL
<33> ON/OFFBTN# 32 112 UMA_ENBKL <12>
PWR_SUSP_LED# ON_OFF/GPIO18 ENBKL/GPXID2
34 114
3 <33> PWR_SUSP_LED# NUM_LED# PWR_LED#/GPIO19 GPXID3 EC_THERM# ACIN_D 3
Add for KB926D2 issue. Please refer to KB926D-AN1-100 for detail <31> NUM_LED# 36 NUMLED#/GPIO1A GPI GPXID4 115 EC_THERM# <22> 2 1 D33 ACIN <22,33,35>
116 SUSP# CH751H-40PT_SOD323-2
GPXID5 PBTN_OUT# SUSP# <34,39>
117 PBTN_OUT# <21>
C813 GPXID6 USB_OC#0
GPXID7 118 USB_OC#0 <21,25>
1 2 15P_0402_50V8J CRY1 122 C326
XCLK1
123 124 C814 2 1 4.7U_0805_10V4Z 2 1 100P_0402_50V8J
10K_0402_5% 2 SYSON XCLK0 V18R
1 R993
1
AGND
Y7
GND
GND
GND
GND
GND
2 1
10K_0402_5% 2 SUSP# NC OSC
1 R994 @ R545
3 4 20M_0402_5% KB926QFD3_LQFP128_14X14
11
24
35
94
113
69
NC OSC
2
32.768KHZ 12.5PF Q13MC14610002

C815
ECAGND
1 2 15P_0402_50V8J CRY2
Add R344 and R345 for EC pin damage issue

+3VL_EC L80 1 2 0_0603_5%
C816
+EC_AVCC 1 2 0.1U_0402_16V4Z L81 2 1 0_0603_5% R344
BKOFF#_R 1 2 33_0402_5% BKOFF# <18>
R345
INVT_PWM_R 1 2 33_0402_5%
+3VL_EC INVT_PWM <18>
1 1 1 1 1
C805 C806 C807 C808 C809
4 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z 1000P_0402_50V7K 4
2 2 2 2 2
/
ENE KB926 D3
A B C D E
A B C D E
CS/B Connector
Power Button/ PWR/B Touch Pad Connector
20 mil width
@ @ JCS @
JPOWER JTOUCH +3VL R1030 2 @ 1 0_0603_5% +3VL_CS 1
+5VS_TOUCH 1
1 1 2 R111 1 1 1 <32> CAP_INT#
R1031 1 @ 2 0_0402_5% 2 2
+5VS 0_0603_5% TP_CLK R1032 1 @
2 <32> TP_CLK 2 <32> CAP_RST# 2 0_0402_5% 3
+3VL 2 ON/OFFBTN# TP_DATA 2 3
5 3 2 <32> TP_DATA 3 4
GND 3 TP_SWL 3 L93 @ ESB_CK_L 4
6 GND 4 4 4 4 <32> ESB_CK 1 2 FBMA-11-100505-301T_0402 5 5
C713 <31> TP_SWL TP_SWR L94 @ ESB_DA_L
5 5 <32> ESB_DA 1 2 FBMA-11-100505-301T_0402 6 6
<31> TP_SWR
2
ACES_85201-04051 1U_0402_6.3V4Z 6 1 1 1 7
1 6 GND
C897 10P_0402_50V8J
C898 10P_0402_50V8J
C899 10P_0402_50V8J
1 R512 1
For Debug 7 GND 2 8 GND
8 GND 1
2
100K_0402_5% 3 @ @ @ ACES_85201-06051
SW5 ACES_85201-06051 2 2 2
1 51_ON# <35>
1 3 ON/OFFBTN# D87 @
ON/OFFBTN# <32>
TOP side D60 PJDLC05_SOT23-3
2 4 PJDLC05_SOT23-3
@
SMT1-05-A_4P For EMI
6
5
1
D Q19
2
1
SW6 <32> EC_ON G 2N7002_SOT23-3 @ @
2
1 3 S ESB_DA_L 1 2 1 2
3
R514
BTM side 2 4 10K_0402_5% R1015 C894
100_0402_5% 100P_0402_25V8K
SMT1-05-A_4P @
6
5
1
ESB_CK_L 1 @ 2 1 2
R1016 C895
100_0402_5% 100P_0402_25V8K
+3VALW
Lid SW
DC-IN LED
U34
2 ACIN <22,32,35> 2
Vf=1.9V(typ),2.4V(max) APX9132ATI-TRL_SOT23-3
2
D54 Q20
G
2 3
GND
VDD VOUT LID_SW# <32>
1 2 2 1 1 3
+3VALW
R515 120_0402_5% POWER ON/SUSPEND LED
D
1 1
1
HT-110UYG-CT_YEL/GRN
2N7002_SOT23-3 C645 C647
< Ultra Bright Yellow Green > 0.1U_0402_16V4Z 10P_0402_50V8J
D49 2 2
3 PWR_ON_LED# <32>
+3VALW 1 2 1
R521 120_0402_5%
2
BATT CHARGE/FULL LED PWR_SUSP_LED# <32>
D38 < Ultra Bright Yellow Green >

HT-210UD/UYG_AMB/GRN Screw Hole
< Ultra Bright Amber >
3 H2 H3 H4 H6 H7 H8 H9 H10
BATT_FULL_LED# <32>
Vf=1.9V(typ),2.4V(max) for amber
+3VALW 1 2 1 Vf=2.0V(typ),2.4V(max) for green
R549 120_0402_5% H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
1
2 If=30mA(max) @ @ @ @ @ @ @ @
BATT_CHG_LOW_LED# <32>
HT-210UD/UYG_AMB/GRN H12 H13 H14 H15 H11
< Ultra Bright Amber >

H_3P0 H_3P0 H_3P0 H_3P0 H_5P0
1
3 @ @ @ @ @ 3
Vf=1.9V(typ),2.4V(max) for amber
Vf=2.0V(typ),2.4V(max) for green
If=30mA(max)
H16 H37 H38
H_3P0N H_5P0X3P0N H_11P0X4P0N

For EMI
1
@ @ @
Vf=1.9V(typ),2.4V(max)
WLAN LED +5VALW @ C199 1 2 0.22U_0603_16V4Z
D50 MINI CARD-1 H32 H34 CPU INS87990490H22 H19 H21
+3VS 1 2 2 1 @ C200 1 2 0.22U_0603_16V4Z
WL_LED# <32>
R550 120_0402_5%
HT-110UD_1204_AMBER @ C201 1 2 0.22U_0603_16V4Z H_3P8 H_3P8 H_3P7 H_3P8 H_4P8X3P8 H_3P8X4P8
1
@ @ @ @ @ @
@ C202 1 2 0.22U_0603_16V4Z
@ C203 1 2 0.22U_0603_16V4Z
MDC H27 H33
H_1P2 H_1P2
1
SATA_LED# <22>
@ @
2
HDD LED
+3VS 2 R546 1 6 1
10K_0402_5%
PCB Fedical Mark PAD
5
Q18A
D46 2N7002DW-T/R7_SOT363-6
4 4
+3VS 1 2 2 1 3 4
R548 120_0402_5% FD1 FD2 FD3 FD4
HT-110UYG-CT_YEL/GRN Q18B 2N7002DW-T/R7_SOT363-6
@ @ @ @
Vf=1.9V(typ),2.4V(max)
1
LED/LID/PB/FB/SCREW HOLE
A B C D E
A B C D E
< +5VALW TO +5VS > < close to PQ20, must EMI confirm > < +1.8V TO +1.8VS >
+1.8V +1.8VS
+5VALW +5VS Q4
IRF8113PBF_SO8
Q35
Inrush current = 0A
Inrush current = 0A 8 1
8 D S 1 7 2 1 2
7 2 1 1 6 3 C848 C841
D S C833 C835
6 3 5
D S RUNON 1U_0402_6.3V4Z 10U_0805_10V4Z
5 4 1
D G 1U_0402_6.3V4Z 4.7U_0805_10V4Z C842 2 1
1
4
C864 SI4800BDY_SO8 2 2
4.7U_0805_10V4Z
1 4.7U_0805_10V4Z 2 R138 1
2 1.8VS_ENABLE 1 2 750K_0402_1% +VSB
6
1
R809 C849
10M_0402_5% 0.01U_0402_25V7K 2 SUSP

< +3VALW TO +3VS > < close to PQ20, must EMI confirm > 2
2
Q143A
1
2N7002DW-T/R7_SOT363-6
+3VALW +3VS
Q14 Inrush current = 0A

8 1
< +1.2VALW TO +1.2V_HT >
D S
7 2 1 1
D S C839 C838
6 D S 3
5 4 +1.2VALW
D G 1U_0402_6.3V4Z 4.7U_0805_10V4Z
1 2 2 +1.2V_HT
For power noise issue
C840 SI4800BDY_SO8 Q11
IRF8113PBF_SO8
Inrush current = 0A
4.7U_0805_10V4Z 8 1 1
2 R152 7 2 1 1
RUNON 2 1 750K_0402_1% 6 3 C846 C862 + C879
+VSB
5 @
1
1 1U_0402_6.3V4Z 4.7U_0805_10V4Z 330U_D2E_2.5VM

1
C834 R556 D Q17 2 2 2
4
1
@ 2 SUSP 1
0.01U_0402_25V7K 10M_0402_5% G C847 R367
2 S @ R233
2
2N7002_SOT23-3 4.7U_0805_10V4Z 1K_0402_5% 2 1 330K_0402_5% +VSB

2
1
2 2
1
6
For +1.2VALW OVP issue R808 C837
Just mount for TPS51117 10M_0402_5% 0.01U_0402_25V7K
< +3VALW TO +3V_LAN > 2 2 VLDT_EN#
2
+3VALW +3V_LAN
+3VALW Vgs=-4.5V, Id=3A Q12A
1
2N7002DW-T/R7_SOT363-6
Rds<97m ohm
< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >
2
R17 2
100K_0402_5% C880 +5VL +5VL +5VL
2
0.1U_0402_16V7K
1
1
S
R19 @ PJ29
2
1
G
WOL_EN# 1 2 47K_0402_5% 2 JUMP_43X79
<26,32> WOL_EN#
1 Q38 R595 R596
1
C182 D AO3413_SOT23 R597

1
100K_0402_5% 100K_0402_5% 100K_0402_5%

1
0.01U_0402_25V7K
2
2
1 1 SYSON# SUSP VLDT_EN#
<41> SYSON# SUSP <41>
C679 Inrush current = 0A C680
@
6
4.7U_0805_10V4Z 1U_0402_6.3V4Z
1
2 2 Q142B Q142A D
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 VLDT_EN 2 Q53
<32> VLDT_EN
5 2 G
<32,40> SYSON SUSP# <32,39>
S 2N7002_SOT23-3
3
4
1
3 3
< Discharge circuit >
+5VS +1.8VS +1.2V_HT +1.8V +3VS +0.9V +1.5VS +1.1VS

2
2
R239 R279 R280 R284 R288 R292 R293 R294
470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5%

1
3 1
3 1
1
6
1
D Q12B D D D
Q144A SUSP 2 Q48 Q143B Q144B SYSON# 2 Q49 SUSP 2 Q50 SUSP 2 Q52
G VLDT_EN# 5 2N7002DW-T/R7_SOT363-6 SYSON# 5 G G G
SUSP 2 2N7002DW-7-F_SOT363-6 S 2N7002_SOT23-3 SUSP 5 2N7002DW-7-F_SOT363-6 S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3
3
3
2N7002DW-T/R7_SOT363-6
4
4
1
4 4

DC / DC Circuits
A B C D E
A B C D
VIN
PL1 PR1
PF1 SMB3025500YA_2P 1M_0402_1%
DC301001M80 DC_IN_S1 1 2 DC_IN_S2 1 2 1 2
VIN
PJP1 VS
1 10A_125V_451010MRL
+
1
1
1
2 PR3
+ PC1 PC2 PC3 PC4 84.5K_0402_1%
3 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K 100P_0402_50V8J PR4
2
-
8
PU1A 22K_0402_1%
PR2
2
4 3 1 2
P
1 1
- PR5 +
1 2 1 2 1 0
<22,32,33> ACIN
1
@ SINGA_2DW -0005-B03 0_0402_5%
20K_0402_1%
- 2
1
10K_0402_1%
PR6
LM358DT_SO8 PC5
0.1U_0603_25V7K
4
PR7 PD2 1000P_0402_50V7K
2
PC6
10K_0402_1% GLZ4.3B_LL34-2
2
2
2
VIN
1 2
RTCVREF
2
PR8
PD3 10K_0402_1%
RLS4148_LL34-2
1
BATT+ 2 1
1
PD4 PR9 PR10
RLS4148_LL34-2 PQ1 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3 Vin Detector
PR11
2
200_0603_5%
CHGRTCP 1 2 N1 3 1 VS High 18.384 17.901 17.430
2
Low 17.728 17.257 16.976 2
1
1
PC8
PR12 PC7 0.1U_0603_25V7K
100K_0402_1% 0.22U_1206_25V7K
RTC Battery
2
2
2
2
<33> 51_ON# 1 2
PR13
22K_0402_1%
- PBJ1 +
2 1 +RTCBATT +RTCBATT
RTCVREF
1
PR14
200_0603_5% @ MAXEL_ML1220T10
PR15 PR16 PU2 G920AT24U_SOT89-3
560_0603_5% 560_0603_5% 3.3V
2
1 2 1 2 3 2 N2
+CHGRTC OUT IN
SP093MX0000
1
GND
PC9 PC10
10U_0805_10V4Z 1
2
1U_0805_25V4Z
3 3
PJ1 PJ2
PJ3
+3VALW P 2 2 1 1 +3VALW +1.8VP 2 2 1 1 +1.8V
VL 2 2 1 1 +5VL
@ JUMP_43X118 @ JUMP_43X118
(5A,200mils ,Via NO.= 10) PJ4 @ JUMP_43X39
OCP(min)=7.7A 2 2 1 1 (100mA,40mils ,Via NO.= 2)
PJ5 @ JUMP_43X118
+5VALW P 2 1 +5VALW (8A,320mils ,Via NO.= 16) PJ7
2 1 +1.2VALW P +1.2VALW
OCP(min)=8.87A 2 2 1 1
@ JUMP_43X118
PJ6
(5A,200mils ,Via NO.= 10) @ JUMP_43X118
OCP(min)=7.9A +3VLP 2 2 1 1 +3VL (5A,200mils ,Via NO.=10)
PJ8 OCP(min)=7.78A
@ JUMP_43X39
+VSBP 2 2 1 1 +VSB (100mA,40mils ,Via NO.= 2)
@ JUMP_43X39 PJ9 PJ10
+NB_COREP 2 1 +NB_CORE +VDDNBP 2 1 +VDDNB
2 1 2 1
(120mA,40mils ,Via NO.= 1)
@ JUMP_43X118 @ JUMP_43X118
PJ11 (7.0A,280mils ,Via NO.=14)
OCP(min)=9.32A (3A,120mils ,Via NO.=6)
+2.5VSP 2 1 +2.5VS
4
2 1 PJ12 PJ13 4
@ JUMP_43X39 +0.9VP 2 1 +0.9V +1.5VSP 2 1 +1.5VS

2 1 2 1
(0.5A,20mils ,Via NO.=1)
@ JUMP_43X79 @ JUMP_43X79
(2A,80mils ,Via NO.= 4) (2.0A,80mils ,Via NO.=4)
DCIN/DECTOR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-5831P 1.0
Date: W ednesday, August 12, 2009 Sheet 35 of 44
A B C D
A B C D
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 56 degree C
VMB VL
PF2 PL2 VL ENTRIP1 <38>
1
PJP2 15A_65V_451015MRL SMB3025500YA_2P VL 1
1 BATT_S1 1 2 1 2
1 BATT+
2
2
2
3 1 2 1 2 +3VLP
3 PR17 PR18 PR19
4 4
1
1K_0402_1% 47K_0402_1% 47K_0402_1% D
5
5 EC_SMDA PC11 PC12 PH1 PC13 PQ2
10 GND 6 6 2
11 7 EC_SMCA 1000P_0402_50V7K 0.01U_0402_25V7K 100K_0402_1%_NCP15WF104F03RC 0.1U_0603_25V7K PR20 G SSM3K7002FU_SC70-3
1
GND 7 47K_0402_1%
12 8 S
3
GND 8
1
13 9 1 2
2
GND 9 PR21 PR22
8
@ OCTEK_BTJ-09HA1G 1K_0402_1% 13.7K_0402_1% PU3A
1 2 3
P
+
1 2 1
2
O
2
2
TM_REF1 2 ENTRIP2 <7,38>
-
G
PR23 PR24 PD5
100_0402_1% 100_0402_1% LM393DG_SO8 RLS4148_LL34-2
4
0.22U_0805_16V7K
1
1
D
13.7K_0402_1%
1
1
PC14
PR26 2 PQ3
1000P_0402_50V7K
PR25
6.49K_0402_1% G SSM3K7002FU_SC70-3
2 1 2 1 S
3
+3VLP VL
PC15
PR27
2
100K_0402_1%
2
1
1
PR28
1K_0402_1%
PR29
100K_0402_1%
2
2 2
2
BATT_TEMPA <32>
EC_SMB_DA1 <32>
EC_SMB_CK1 <32>
PH2 near main Battery CONN :
BAT. thermal protection at 92 degree C
Recovery at 56 degree C
VL VL
PQ4
2
TP0610K-T1-E3_SOT23-3
1
PR30
PH2 47K_0402_1%
B+ 3 1 +VSBP PR31
100K_0402_1%_NCP15WF104F03RC 47K_0402_1%
1
100K_0402_1%
0.22U_1206_25V7K
0.1U_0603_25V7K
1 2
2
1
1
PR32
PC16
PC17
PR33
8
3 13.7K_0402_1% PU3B 3
1 2 5
P
2
+
7 2 1
2
TM_REF1 O
6 -
G
1
VL PR35 PD6
1
22K_0402_1% @ @ LM393DG_SO8 RLS4148_LL34-2
4
1 2 PC18 PR34
2
0.22U_0805_16V7K 16.9K_0402_1%
2
PR36
2
100K_0402_1%
PR37
1
0_0402_5% D
1 2 2 PQ5
<38,39> POK
G SSM3K7002FU_SC70-3
@ .1U_0402_16V7K
S
3
1
PC19
2
4 4

BATTERY CONN / OTP
Size
Document Number Rev
A B C D
A B C D E
B+
VIN PQ7 PQ8 PR38
AO4407A_SO8 PQ6
FDS4435BZ_SO8 0.015_1206_1%
8 1 1 8 1 4 1 8
D S S D
7
S 2
2 7 2 7
D S D
0.01U_0402_25V7K
6 D S 3 3 6 2 3 3 S D 6
@0.1U_0402_25V6
PR39 5 PL16
D G 4 5 4 G D 5
100K_0402_1%
4.7_1206_5%
3.3_1210_5% HCB2012KF-121T50_0805
1
1 2 CHG_B+
1
PR163
PC141
PC20
PR40
1000P_0402_50V7K 0.022U_0402_25V7K
FDS4435BZ_SO8
2 1
100K_0402_1%
0.01U_0603_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
1
PQ9
2
2
2
PC21
PR42
1 PR41 1
CHGEN#
1 8
2
S D
PC22
PC23
PC24
3.3_1210_5% 2 7
S D
PC25
PC26 PC27 3 6
1
S D
5
6
7
8
.1U_0402_16V7K PU4 0.22U_1206_25V7K /BATDRV 4 5
1 1
2
G D
1 2 1 28 1 2
PC28 CHGEN PVCC
1
2.2U_0805_25V6K PR43 @ FDS4435BZ_SO8
1K_0402_1%
PC29 PC30 0_0603_5% PQ10
2
1
0.1U_0603_25V7K @0.1U_0603_25V7K 27 1 2 4 AO4466_SO8
2
BTST
PC148
PR162
PR44
340K_0402_1% 2 26
1
ACN HIDRV
3
3
2
1
ACP
1
4 25 PL3 PR45
ACDET ACDRV PH PD7 10UH_SIL1045RA-100PF_4.5A_30% 0.02_1206_1%
5
ACDET
2 1 1 2 1 2 1 4
10U_1206_25V6M
10U_1206_25V6M
REGN
RLS4148_LL34-2 PC31 2 3 BATT+
2
1
PR47 0.1U_0603_25V7K
5
6
7
8
1
PC32
PC33
PR46 100K_0402_1%
54.9K_0402_1% 1 2 ACSET 6
2
VREF ACSET
24 PC34
2
REGN
1
.1U_0402_16V7K
1
1
PR48 PC36 PQ11 1 2
PC35 120K_0402_1% 1U_0603_10V6K 4 AO4466_SO8
@ 0.01U_0402_25V7K
2
2
1
2
1 2 7 ACOP PC38 PC39
PR49 PC37 23 0.1U_0603_25V7K @0.1U_0603_25V7K
3
2
1
2
340K_0402_1% 0.47U_0603_16V7K LODRV
1
2 2
PGND 22
OVPSET 8
OVPSET
9 AGND LEARN 21 ACOFF <32>

2
PR50
54.9K_0402_1%
VREF 20 CELLS
CELLS
1
10 VREF
PQ12
3
1
SI2301BDS-T1-E3_SOT23-3 PC40
1U_0603_10V6K
PR51 19
2
100K_0402_1% SRP
1 2 2 RTCVREF 11 18
VDAC SRN
17
BAT
1
VREF
1
PC41 VADJ 12
VREF 0.1U_0603_25V7K PR52 VADJ PC42
2
1
1
ACSET 100K_0402_1% 0.1U_0603_25V7K VREF
2
PR53 29
1
200K_0402_1% ACGOOD# TP
13
ACGOOD
1
2
1
D PR63
PR55
2
PR54 2 PQ13 16 2 1 IREF <32> 100K_0402_1%

100K_0402_1% G SSM3K7002FU_SC70-3 /BATDRV SRSET
14 49.9K_0402_1%
BATDRV
1
S
2
1
1
1
D
PR56
ACOFF 1 2 2 PQ14 15 1 2 100K_0402_1% PC44 CHGEN#
3 G SSM3K7002FU_SC70-3 IADAPT @0.01U_0402_25V7K 3
2
1
1
PC43 BQ24751ARHDR_QFN28_5X5 PR57 D
S
3
2
.1U_0402_16V7K PR58 10_0603_5% <32> FSTCHG 2 PQ15
340K_0402_1% REGN G SSM3K7002FU_SC70-3
1
S
3
PC45
2
100P_0402_50V8J ADP_I <32>
2
1
PR59 IREF Current

75W,Iadapter=3.947A,PR38=0.015ohm,PR47=100K,PR48=120K,CP=3.63A @ 0_0402_5%
PR60
210K_0402_1% 2.968V 3A
2
<32> CHGVADJ 1 2 VADJ CHGVADJ Pre Cell VIN

1
1.484V 1.5A
PR61 3.28V 4.35V
499K_0402_1%
VMB
1
0V 4V
2
499K_0402_1% 340K_0402_1%
PR159
1
VS 309K_0402_1%
@ PR62
CHGVADJ要要要EC DA pin
PR160
2
0.01U_0402_25V7K
10K_0402_1%
1 2
2
ADP_V <32>
1
PC46
1
@ PR64
PR161
2
47K_0402_1% PC147
.1U_0402_16V7K
2
2
2
8
4 @ PR65 PU1B 4
10K_0402_1% 5
P
+
<32> BATT_OVP 1 2 7 0
6
-
G
105K_0402_1%
1
0.01U_0402_25V7K
LM358DT_SO8
4
1
@ PR66
@ PC47

2

2
CHARGER
Size
Document Number Rev
A B C D E
A B C D
2VREF_51125
1U_0603_10V6K
1 1
1
PC48
2
PR67 PR68
13K_0402_1% 30K_0402_1%
1 2 1 2
PR69 PR70
B++
20K_0402_1% 19.6K_0402_1%
B++
1 2 1 2
PJ15
B+ 2 2 1 1 +3VLP
ENTRIP2
ENTRIP1
2200P_0402_50V7K
@ JUMP_43X118 PR71 PR72

10U_1206_25V6M
10U_1206_25V6M
150K_0402_1% 150K_0402_1%
1
2200P_0402_50V7K
PC49
4.7U_0805_10V6K
1 2 1 2
1
PC50
PC52
PC51
2
2
6
5
6
7
8
PC53
PU5
8
7
6
5
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
VREF
25 PQ16
2 PQ17 P PAD AO4466_SO8 2
2
AO4466_SO8
7 VO2 VO1 24 POK <36,39> 4
4
8 23 PR74 PC55
PR73 VREG3 PGOOD 2.2_0603_1% .1U_0402_16V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
3
2
1
2.2_0603_1% VBST2 VBST1
1
2
3
PL4 PC54 UG_3V 10 21 UG_5V PL5

4.7U_LF919AS-4R7M-P3_5.2A_20% .1U_0402_16V7K DRVH2 DRVH1 4.7U_LF919AS-4R7M-P3_5.2A_20%
1 2 LX_3V 11 20 LX_5V 1 2
+3VALWP LL2 LL1
1
8
7
6
5
5
6
7
8
1
4.7_1206_5%
680P_0603_50V7K 4.7_1206_5%
LG_3V 12 19 LG_5V +5VALWP
DRVL2 DRVL1
PR75
PR76
Ipeak = 5A
SKIPSEL
220U_6.3V_M
PQ18 PQ19
VREG5
220U_6.3V_M
@ .1U_0402_16V7K
VCLK
Imax = 3.5A 1 AO4712_SO8 AO4712_SO8 1
GND
EN0
1
VIN
PC142
@ .1U_0402_16V7K
2
1
PC56
PC57
PC143
+ +
F = 305kHz 4
PR77 TPS51125RGER_QFN24_4X4
4
2
13
14
15
16
17
18
1
1
680P_0603_50V7K
PC59
Total Capacitor = 220 uF 499K_0402_1%
2
2 2
PC58
1 2
B+
ESR = 15m Ohm
2
1
2
3
3
2
1
2
1
100K_0402_1%
PR78
1 2 VL
PC60
4.7U_0805_10V6K
PR79
2
@ 0_0402_5%
2
ENTRIP1 <36> ENTRIP2 <7,36>
B++ Ipeak = 5A
1
3
Imax = 3.5A 3
0.1U_0603_25V7K
F = 245kHz
2
PC61
1
D D
2VREF_51125 Total Capacitor = 220 uF
PQ20 2 2 PQ21
SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3 ESR = 15m Ohm
S S
3
2 1
VL
PR80
100K_0402_1%
1
VS 1 2 2 PQ22
G SSM3K7002FU_SC70-3
49.9K_0402_1%
0.01U_0402_16V7K
PR81 S
3
1
100K_0402_1%
1
PR82
@ PC62
2
2
4 4

3VALW/5VALW
Size
Document Number Rev
A B C D
5 4 3 2 1
D D
PR83 PR84 PR85 PR86

44.2K_0402_1% 75K_0402_1% 75K_0402_1% 33K_0402_1%
+1.2VALWP 1 2 1 2 2 1 2 1 +NB_COREP 51124_B+

PL14
HCB2012KF-121T50_0805
1 2 B+
0.1U_0402_25V6
@0.1U_0402_25V6
@0.1U_0402_25V6
51124_B+
2
PR87
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
0_0402_5%
1
PC137
PC138
PC139
1
1
PC63
PC64
2
1
PC65
2
4.7U_1206_25V6K
4.7U_1206_25V6K
2200P_0402_50V7K
8
7
6
5
5
6
7
8
1
PC66
PC67
PU6 PQ24
1
VO2
VFB2
TONSEL
VFB1
VO1
GND
PC68
PQ23 25 AO4466_SO8
2
AO4466_SO8 P PAD
2
4 7 24 4
PGOOD2 PGOOD1
C
PC70 C
PC69 PR88 8 23 PR89
EN2 EN1 .1U_0402_16V7K
.1U_0402_16V7K 2.2_0603_1% 2.2_0603_1%
2 1 2 1 BST_1.2V 9 22 BST_NB_COREP 2 1 1 2
1
2
3
3
2
1
VBST2 VBST1
+1.1V
PL6 UG_1.2V 10 21 UG_NB_COREP PL7
1.8UH_SIL104R-1R8PF_9.5A_30% DR VH2 DR VH1 1.8UH_SIL104R-1R8PF_9.5A_30% +NB_COREP
+1.2VALWP 1 2 LX_1.2V 11 20 LX_NB_COREP 1 2
+1.2VALWP LL2 LL1
LG_1.2V 12 19 LG_NB_COREP
DR VL2 DR VL1
1
8
7
6
5
4.7_1206_5%
5
6
7
8
1
PR90
4.7_1206_5%
@ .1U_0402_16V7K
PGND2
PGND1
1
V5FILT
TRIP2
TRIP1
220U_6.3V_M
220U_6.3V_M
PR91
@ .1U_0402_16V7K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PQ25 1
V5IN
1
1
PC144
PC71
PC145
+ AO4712_SO8 PQ26
1
PC72
PC73
AO4712_SO8 +
2
PC74
4 TPS51124RGER_QFN24_4x4
2
13
14
15
16
17
18
2
2 4
2
1
2
680P_0603_50V7K
PC75
680P_0603_50V7K
2
1
2
3
PC76
PR93
3
2
1
13.7K_0402_1% PR92
2
1 2 16.5K_0402_1%
Ipeak =5A
2
Imax = 3.5A Ipeak =7A
F = 300kHz PR94 PR96 Imax = 4.9A
0_0402_5% 22K_0402_5%
Total Capacitor = 220 uF <36,38> POK 2 1 1 2 +5VALW 1 2
SUSP# <32,34> F = 240kHz
ESR = 15m Ohm PR95 Total Capacitor = 550 uF
3.3_0402_5%
1
B PC77 B
ESR = 7.5m Ohm
1
1
@ .1U_0402_16V7K PC78 PC79 PC80
1U_0603_10V6K 4.7U_0805_10V6K .1U_0402_16V7K
2
A A

NB_COREP/1.2VALWP
Size
Document Number Rev
5 4 3 2 1
5 4 3 2 1
PL15
HCB2012KF-121T50_0805
51117_B+ 1 2 B+
@0.1U_0402_25V6
4.7U_1206_25V6K
4.7U_1206_25V6K
1
PC140
D D
1
PC81
PC82
2
5
6
7
8
2
PQ27
AO4466_SO8
PR97
255K_0402_1% 4
1 2
PR98 PR99
0_0402_5% 2.2_0603_1%
1 2 1 2
3
2
1
<32,34> SYSON
1
PL8
15
14
PC84
1
PC83 PU7 1.8UH_SIL104R-1R8PF_9.5A_30%
@.1U_0402_16V7K BST_1.8VP 1 2 1 2
VBST
EN_PSV
TP
+1.8VP
2
2 13 DH_1.8VP 0.1U_0603_25V7K
TON DRVH
4.7_1206_5%
PR101 3 12 LX_1.8VP
VOUT LL
5
6
7
8
PR100
100_0603_1% 1
220U_D2_4VM
@ .1U_0402_16V7K
+5VALW 1 2 4 11 1 2 +5VALW PQ28
V5FILT TRIP
1
PC85
PC146
PR102 AO4712_SO8 +
Ipeak = 8A
2
5 10 15.4K_0402_1% 1 2
VFB V5DRV
Imax = 5.6A
2
1
1
2
680P_0603_50V7K
6 9 PC89 4
PGOOD DRVL
PGND
PC87
PC86 4.7U_0805_10V6K F = 312kHz
GND
4.7U_0603_10V6K PC88 DL_1.8VP
2
@ 47P_0402_50V8J Total Capacitor = 220 uF
1 2 TPS51117RGYR_QFN14_3.5x3.5
3
2
1
C C
ESR = 15m Ohm
PR103
28.7K_0402_1%
1 2
1 PR104
20.5K_0402_1%
2
B B
PU8
APL5508-25DC-TRL_SOT89-3
PJ18
+3VS
1 1 2 2 2 IN OUT 3 +2.5VSP
@ JUMP_43X39
GND
1
PC90 1 PC91
1U_0603_10V6K 4.7U_0805_6.3V6K
2
A A

1.8VP/2.5VS
Size
Document Number Rev
5 4 3 2 1
5 4 3 2 1
+3VS
D D
1
PJ19
1
@ JUMP_43X79
2
PU9
2
1 VIN VCNTL 6 +5VALW
2 GND NC 5
1
1
PC92 3 7 PC93
4.7U_0805_6.3V6K VREF NC 1U_0603_6.3V6M
2
PR105 4 8
1.15K_0402_1% VOUT NC
9
2
TP
APL5331KAC-TRL_SO8
+1.5VSP
1
PR106
1
D 1K_0402_1%
1
SUSP 1 2 2
<34> SUSP
PR107 G PC94 PC95
1
0_0402_5% S PQ29 .1U_0402_16V7K 10U_0805_6.3V6M
2
PC96 SSM3K7002FU_SC70-3
@ .1U_0402_16V7K
2
C C
+1.8V
1 1 PJ20
@ JUMP_43X79
2
PU10
2
1 6 +3VALW
VIN VCNTL
2 5
GND NC
1
1
B PC97 B
1
4.7U_0805_6.3V6K 3 7 PC98
PR108 VREF NC 1U_0603_6.3V6M
2
2
1K_0402_1% 4 8
VOUT NC
9
2
TP
APL5331KAC-TRL_SO8
1
PR110 +0.9VP
1
0_0402_5% D PR109
1 2 2 1K_0402_1% PC99
<34> SYSON# 1
G .1U_0402_16V7K
2
1
S PQ30 PC100
3
PC101 SSM3K7002FU_SC70-3 10U_0805_6.3V6M

2
@ .1U_0402_16V7K
2
A A

0.9VP/1.5VSP
Size
Document Number Rev
5 4 3 2 1
A B C D E
CPU_B+ PL13 PL9

HCB2012KF-121T50_0805 HCB4532KF-800T90_1812
PC102 1 2 1 2 B+
10U_1206_25V6M
@0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
@0.1U_0402_25V6
33P_0402_50V8J
220U_25V_M
@ 220U_25V_M
0.1U_0402_25V6
2 1 1 1
5
6
7
8
1
PC106
PC103
PC104
PC136
PC135
PC132
PC134
+ +
PC133
2 1 2 1
2
PR111 PC105 2 2
44.2K_0402_1% 1000P_0402_50V7K UGATE_NB 4 PQ31
PR112 AO4466_SO8
1 2_0603_5% 1
+5VS 1 2 PC107 PL10

1000P_0402_50V7K 4.7U_LF919AS-4R7M-P3_5.2A_20%
3
2
1
2 1 PHASE_NB 1 2 +VDDNBP
PR113
5
6
7
8
1
PC108 PR115 2.2_0603_1%
0.1U_0603_16V7K 22K_0402_1% BOOT_NB 1 2 1 2 PR114
2 1 4.7_1206_5%
AP1
2
PR116 PC109 PJ21
@ 10_0402_5% 0.22U_0603_10V7K PQ32 + PC110 2 1
1 2
220U_D2_4VM 2 1
1 2 +VDDNBP LGATE_NB 4 AO4712_SO8
CPU_B+ 1 2 PR118 PC111 @ JUMP_43X118
0_0402_5% 680P_0603_50V7K 2
PR117 2 1 PJ22
2
CPU_VDDNB_RUN_FB_H <7>
2_0603_5% PR119 +CPU_CORE_0 2 1 +CPU_CORE_1
3
2
1
+5VS +3VS 11.3K_0402_1% 2 1
2 1 PHASE_NB @ JUMP_43X118
LGATE_NB PJ23
1
PC112 CPU_B+ 2 1
0.1U_0603_25V7K PHASE_NB 2 1
1
1
@ JUMP_43X118
2
PR120 PR121 UGATE_NB
10U_1206_25V6M
10U_1206_25V6M
0_0402_5% @ 105K_0402_1%
5
2 1 CPU_VDDNB_RUN_FB_L <7>
PR122
2
2
1
1
PC113
PC114
0_0402_5%
PR124 PQ33
PR123 @ 10K_0402_1% PR125 SI7686DP-T1-E3_SO8
2
105K_0402_1% @ 10_0402_5% UGATE0 4
1
48
47
46
45
44
43
42
41
40
39
38
37
2
1
PR126 PU11
2 @ 105K_0402_1% PHASE0 PL11 2
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
VIN
VCC
PR127 0.36UH_PCMC104T-R36MN1R17_30A_20%
3
2
1
2.2_0603_1%
2
<32> VGATE 1 36 BOOT_NB BOOT0 1 2 1 2 1 4 +CPU_CORE_0

OFS/VFIXEN BOOT_NB
1 2
<7,20> H_PWRGD @ PR129 100K_0402_5% 2 35 BOOT0 PC115 2 3
PGOOD BOOT0
5
1 2 0.22U_0603_10V7K
1
<21,32> SB_PWRGD PR158 100K_0402_5% ISL6265_PWROK 3 34 UGATE0
PWROK UGATE0
2
PR130
<7> CPU_SVD 2 1 4 33 PHASE0 4.7_1206_5% PR128
<7> CPU_SVC PR131 SVD PHASE0 3.65K_0402_1%
0_0402_5%2 1 5 32 4 4
1 2
<32> CPU_VCORE_ENABLE PR132 SVC PGND0 +5VS
1
PR133 PR134 0_0402_5% 6 31 LGATE0 PC116 PC117
113K_0402_1% 4.02K_0402_1% ENABLE LGATE0 680P_0603_50V7K 2 1
2 1 2 1 7 30 PQ34 PQ35
3
2
1
3
2
1
2
RBIAS ISL6265HRTZ-T_QFN48_6X6 PVCC TPCA8028-H_SOP-ADVANCE8-5 @ TPCA8028-H_SOP-ADVANCE8-5 0.1U_0603_16V7K
8 29 LGATE1
OCSET LGATE1
1
PC118 2 1
9 28 1U_0603_16V6K LGATE0
VDIFF0 PGND1 PR136
ISN0
ISP0
10 27 PHASE1 47K_0402_1%
FB0 PHASE1
11 26 UGATE1
COMP0 UGATE1 CPU_B+
12 25 BOOT1
VW0 BOOT1
COMP1
VDIFF1
VSEN0
VSEN1
RTN0
RTN1
ISN0
ISN1
ISP0
VW1
ISP1
FB1
10U_1206_25V6M
10U_1206_25V6M
TP
5
PR137
+CPU_CORE_0 2 1
13
14
15
16
17
18
19
20
21
22
23
24
49
1
PC119
PC120
@ 10_0402_5%
3 ISP0 PQ36 3
PR135 ISN0 SI7686DP-T1-E3_SO8
2
ISN1
ISP1
0_0402_5% UGATE1 4
2 1 VSEN0
<7> CPU_VDD0_RUN_FB_H 0_0402_5%
2 PR138 1 RTN0 PHASE1 PL12
<7> CPU_VDD0_RUN_FB_L PR139 0.36UH_PCMC104T-R36MN1R17_30A_20%
3
2
1
2 1RTN1 2.2_0603_1%
<7> CPU_VDD1_RUN_FB_L PR140 BOOT1 1 2 1 2 1 4 +CPU_CORE_1
@ 10_0402_5%
@ 10_0402_5%
0_0402_5%
2
1 PR143 2
PC121 2 3
5
PR142
0.22U_0603_10V7K
2
PR144
4.7_1206_5% PR141
1
3.65K_0402_1%
PR145 4 4
1 2
0_0402_5%
1
<7> CPU_VDD1_RUN_FB_H 2 1 VSEN1 PC122 PC123
680P_0603_50V7K 2 1
+CPU_CORE_1 2 PR146 1 PQ37 PQ38
3
2
1
3
2
1
2
TPCA8028-H_SOP-ADVANCE8-5 @ TPCA8028-H_SOP-ADVANCE8-5 0.1U_0603_16V7K
@ 10_0402_5%
DIFF_0 VW0 DIFF_1 VW1 2 1
LGATE1
PR147 PC124 PR148 PC127 PR157
ISN1
ISP1
255_0402_1% 4700P_0402_25V7K 255_0402_1% 4700P_0402_25V7K 47K_0402_1%
2 1 2 1 FB_0 2 1 COMP0 2 1 2 1 2 1 FB_1 2 1 COMP1 2 1
PC125 PC126 PC128 PC129

180P_0402_50V8J 1000P_0402_50V7K 180P_0402_50V8J 1000P_0402_50V7K
4 PR149 PR151 PR152 PR154 4
1K_0402_5% PR150 PC130 6.81K_0402_1% 1K_0402_5% PR153 PC131 6.81K_0402_1%
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
54.9K_0402_1% 1200P_0402_50V7K 54.9K_0402_1% 1200P_0402_50V7K

1
PR155 PR156
@ 36.5K_0402_1% @ 36.5K_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.
+CPU_CORE
2
A B C D E
A B C D E
Version Change List ( P. I. R. List ) for Circuit

Item Page# Request Rev.
Title Date Owner Issue Description Solution Description
1 35-43 PVT 2009/07/20 Release 1
39-40 Pre-MP Change PL6,PL7,PL8 2009/07/30 POWER Change PL6,PL7,PL8 footprint

38 Pre-MP Change PC56 2009/07/30 POWER change to common circuit.
36 Pre-MP Change PH1,PH2 2009/08/4 POWER change to common circuit.
37 Pre-MP Change PR38,PR45 2009/08/4 POWER change to common circuit.
2 2
3 3
4 4

List History
A B C D E
5 4 3 2 1
HW4 Product Improvement Record (P.I.R.)

NBWAE LA-5831P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 TO 1.0
D
GERBER-OUT DATE: 2009/08/07 D
NO DATE PAGE MODIFICATION LIST PURPOSE
--------------------------------------------------------------------------------------------------------------
1 7/21 25 Change JUSBB footprint back to E-T_6905-E12N-00R_12P USB/B pin define reverse
2 7/27 25 Add D11 For ESD
3 7/27 9 Add C120~C123 For EMI
4 7/27 32 Add R344 and R345 For EC pin damage issue
5 7/30 26 Add R97, R98 and R105 Reserve bead for EMI
6 8/6 18 Add C707, C708 and C709 For EMI
7 8/6 30 Add LA11 and LA12 For EMI
8 8/6 32 Add R74 and C607 For EMI
9 8/6 31 Delete R518 and C606 For EMI
10 8/6 7 Add C124 For EMI
--------------------------------------------------------------------------------------------------------------
C C
B B
A A

PIR
Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
5 4 3 2 1

TOSHIBA Satellite L450D - COMPAL LA-5831P

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TOSHIBA Satellite L450D - COMPAL LA-5831P

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A B C D E

Low Cost Los Angeles 10AL+ 2

NBWAE LA-5831P Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal Confidential Memory BUS(DDRII) Thermal Sensor Clock Generator

USB 3IN1 Card Reader Int. Camera

SB700 SATA port 1 SATA HDD

SATA port 3 SATA ODD

HD Audio 3.3V 24.576MHz/48Mhz

MDC 1.5 Conn HDA Codec

DESIGN CURRENT 100mA +3VL

N-CHANNEL DESIGN CURRENT 5A +5VS

Ipeak=5A, Imax=3.5A, Iocp min=7.7 +3VALW

P-CHANNEL DESIGN CURRENT 1.0A +LCD_VDD

LDO DESIGN CURRENT 2A +1.5VS

DESIGN CURRENT 500mA +2.5VS

N-CHANNEL DESIGN CURRENT 4.5A +1.2V_HT

Ipeak=7A, Imax=4.9A, Iocp min=9.32 +NB_CORE (+1.1VS)

Ipeak=18A, Imax=12.6A, Iocp min=30 +CPU_CORE1

N-CHANNEL DESIGN CURRENT 1A +1.8VS

LDO DESIGN CURRENT 2A +0.9V

Description (R) (Y) (X)

Explain CAMERA MIC

+3VS DDR SO-DIMM 1 A4 H 1010 0100 b DDC_CLK0 RS780MN

KB926 ESB Address

4 Power Device HEX Address 4

+3VL Cap. Sensor Virtual I2C

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.2V_HT JCPUA PUMA@

<11> H_CLKIP0 J3 Y1 H_CLKOP0 <11>

<11> H_CTLIP0 N1 R2 H_CTLOP0 <11>

< FAN Control Circuit : Vout = 1.6 x Vset >

C192 10U_0805_10V4Z +FAN1 1

Security Classification Compal Secret Data Compal Electronics, Inc.

< Processor DDR2 Memory Interface >

C10 C14 DDR_B_D2 A14 H14 DDR_A_D2

+MCH_REF DDR_B_D7 MB_DATA6 MA_DATA6 DDR_A_D7

1 1 DDR_A_CLK1 DDR_B_CLK1 DDR_B_D9 A16 E15 DDR_A_D9

DDR_A_CLK#1 2 DDR_B_CLK#1 2 DDR_B_D14 MB_DATA13 MA_DATA13 DDR_A_D14

Security Classification Compal Secret Data Compal Electronics, Inc.

TEST23 TEST28_H PAD T5 as short as possible

< Filtered PLL Supply Voltage > CPU_TEST21_SCANEN AB8 C3 @ R32

LDT_RST# T24 PAD 19 20

H_PWRGD LDT_STOP# R10 < To power circuitry>

CPU_THERMTRIP#_R 3 1 1 2 CH751H-40PT_SOD323-2 H_THERMTRIP# <21>

0.1U_0402_16V7K 1 2 C27 THERMDC_CPU 3 6

CPU_LDT_REQ# 1 2 0_0402_5% CPU_LDT_REQ_R# TIGRIS@ R968 Close to CPU

R9 Security Classification Compal Secret Data Compal Electronics, Inc.

+CPU_CORE_0 JCPUE +CPU_CORE_1

6090022100G_B Athlon 64 S1 Processor Socket

PCIE I/F GFX

<20> SB_RX0P SB_RX0P AA8 AD7 SB_TX0P_C C162 1 2 0.1U_0402_16V7K

P22 HT_RXCAD5P HT_TXCAD5P J25

UMA_CRT_HSYNC A11 B16 UMA_LCD_TXCLK_ACLK+ UMA_LCD_TXCLK_ACLK+ <18>

R65 1 2 715_0402_1% G14

<16> NB_OSC_14.318M REFCLK_P/OSCIN(OSCIN)

NBGFX_CLK T2 G12 < LVDS backlight enable >

< DAC Bandgap Reference Voltage >

< IO power for HyperTransport PLL >

Enables the Test Debug Bus using GPIO.

PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

These pin straps are used to configure PCI-E GPP mode.