This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2863694, IEEE
Transactions on Power Electronics
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. XX, NO. X, XXXXXX 201X
HVDC Circuit Breakers Combining Mechanical
Switches and a Multilevel PWM Converter:
Verification by Downscaled Models
Atsushi Suzuki and Hirofumi Akagi, Fellow, IEEE
Abstract—This paper presents two high-voltage direct-current
(HVDC) circuit breakers that have the capability of interrupting
a short-circuit current within several milliseconds. They consist
of a current-limit inductor, a current-control inductor, one
or two mechanical switches, and a multilevel converter with
phase-shifted-carrier pulsewidth modulation (PWM). The two
breakers can commutate an almost zero current from the main
branch to the auxiliary branch. This paper proposes an original
breaker with low-voltage and high-voltage mechanical switches
connected in series, followed by a simplified breaker with a
single high-voltage mechanical switch. Finally, this paper includes
experimental verification by two slightly-different downscaled
breakers rated at 300 Vdc and 150 Adc, as well as confirmation
of an actual original breaker by circuit simulation using the
“PSCAD/EMTDC” software package.
Keywords— Hybrid dc circuit breakers, multilevel converters,
multi-terminal HVDC transmission systems, phase-shifted-carrier
PWM.
I. I NTRODUCTION
Possible installation of offshore wind farms with a power
rating as high as 300 MW has stimulated multi-terminal high-
voltage direct-current (HVDC) transmission systems with a dc
voltage of several hundreds of kilovolts [1], [2]. The latest
multi-terminal HVDC transmission system for the offshore
wind farms has planned to combine voltage-source converters
with power cables [3]. However, a large amount of fault
current with a current-increasing rate of several kiloamperes
per millisecond may flow once a short-circuit fault occurs. This
makes dc circuit breakers indispensable to the multi-terminal
HVDC transmission systems.
Attention has been paid to dc circuit breakers that combine
mechanical switches such as a vacuum interrupter (VI) and/or
a disconnecting switch (DS) with active semiconductor devices
such as thyristors and IGBTs, along with passive components
[4]–[19]. In particular, multi-terminal HVDC transmission sys-
tems require hybrid dc circuit breakers to satisfy the following
items:
This work was supported by the Council for Science, Technology and
Innovation (CSTI), Cross-ministerial Strategic Innovation Promotion Program
(SIP), “Next-generation power electronics.” The funding agency was New
Energy and Industrial Technology Development Organization (NEDO). A.
Suzuki is with Central Japan Railway Company, Tokyo 108–8224, Japan
(e-mail: s1tatay.w4.a@gmail.com), and H. Akagi is with the department of
electrical and electronic engineering, Tokyo Institute of Technology, Tokyo
152–8552, Japan (e-mail: akagi@ee.titech.ac.jp).
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1
• Bidirectional and fast current interruption at abnormal
operating conditions.
• Almost no or very low conducting power loss at normal
operating conditions in terms of making cooling systems
simple or unnecessary.
The dc breaker presented in [5], [6] relies on the resonant
current flowing out of an LC resonant circuit connected in
parallel to the main mechanical switch. This breaker produces
almost no conducting power loss under normal operating
conditions. However, it might not be applicable to multi-
terminal HVDC transmission systems because it would suffer
from low-speed current interruption.
The dc breaker described in [4], [7] depends on an arc
voltage appearing across the main-branch mechanical switch at
the instant of interrupting a short-circuit current. This breaker
can eliminate active semiconductor devices such as IGBTs
from the main branch. Moreover, it has the capability of high-
speed current interruption. However, if it were applied to an
HVDC transmission system, it would have the difficulty of
commutating the short-circuit current from the main branch
to the auxiliary branch. The reason is that the sum of on-state
voltages of many anti-series IGBTs and diodes in the auxiliary
branch is much higher than the arc voltage in the main branch.
The dc breaker proposed in [16] provides a practical solution
to the above-mentioned issue by means of connecting a set of
two anti-series IGBTs and diodes in series with a mechanical
switch in the main branch. See Fig. 1. This solution would
enable to apply the breaker to HVDC transmission systems.
However, it would be more welcome to eliminate the IGBTs
and diodes from the main branch. The authors of [17] pre-
sented another dc breaker replacing each set of two anti-series
IGBTs and diodes with a single full-bridge converter with a
dc capacitor. This breaker is more similar in circuit topology
to two breakers proposed in this paper than that proposed in
[16]. However, the breakers in [16] and [17] are quite different
in current-commutating process from those in this paper.
The authors of [18], [19] presented dc breakers based on
the resonant current assisted by a half-bridge or full-bridge
converter. These breakers are somewhat similar in circuit
topology to those in this paper. However, the half-bridge or
full-bridge converter used in [18], [19] is quite different in role
and function from the multilevel PWM converter used in this
paper. As long as the authors of this paper know, no technical
paper or article has been presented or published on hybrid dc
circuit breakers based on current control of two-level, three-
level, or multilevel PWM converters.
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Transactions on Power Electronics

2 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. XX, NO. X, XXXXXX 201X

MOV This paper makes an intensive description of original and

simplified hybrid dc circuit breakers, with focus on circuit and
IGBTs control as well as operating principles. The original breaker
Auxiliary branch uses two mechanical switches connected in series whereas the
simplified breaker uses one mechanical switch with neither
Current-limit snubber circuit nor surge absorber. The validity, effectiveness,
Main branch
inductor and practicability of the two slightly-different breakers are
LS-DS LS-DS verified experimentally by two downscaled breakers rated at
HS-DS
IGBTs
300 Vdc and 150 Adc.

Fig. 1. The ABB breaker assisted by the main-branch anti-series IGBTs [16].
MOV
No. 1 No. N
C0
C1
N bridge cells
RS CS
Current-control
inductor L2
LS-DS Current-limit qVI HS-DS LS-DS
inductor L1
Fig. 2. The original “TiTech” breaker proposed in this paper, where “TiTech”
means Tokyo Institute of Technology.
The motivation of this research is to eliminate power semi-
conductor devices from the main branch in an HVDC breaker.
A new current-commutating process results from combining
two series-connected mechanical switches or a single me-
chanical switch with a multilevel PWM converter. When two
mechanical switches are used, one is a low-voltage high-speed
quasi vacuum interrupter (qVI)1 equipped with a low-voltage
snubber circuit, and the other is a high-voltage high-speed
disconnecting switch (HS-DS) without any snubber circuit or
surge absorber. When a single mechanical switch is used, it is
either high-voltage high-speed qVI without any snubber circuit
or surge absorber. Both breakers have the following attractive
characteristics:
• Capability of bidirectional current interruption.
• Almost no conducting power loss under normal operat-
ing conditions.
• Applicable to multi-terminal HVDC transmission sys-
tems because the multilevel converter is based on mod-
ular and scalable structure.
• The current-interruption time would be as short as five
milliseconds in a practical system.
1 General vacuum interrupters can interrupt ac short-circuit currents whereas
the vacuum interrupter used in Fig. 2 is characterized by interrupting almost
zero dc current. Therefore, this paper uses the term “quasi vacuum interrupter
(qVI)” to be distinguished from the general vacuum interrupters.
II. S IMILARITY AND D IFFERENCE B ETWEEN THE ABB
B REAKER AND THE O RIGINAL T I T ECH B REAKER
A. The Operating Principles of the ABB Breaker
Fig. 1 shows the circuit configuration of an IGBT-assisted
breaker intended for applications to multi-terminal HVDC
transmission systems [16]. This paper refers to it as the “ABB
breaker” to be distinguished from the others. It consists of a
current-limit inductor and a set of two anti-series IGBTs, each
of which is equipped with a free-wheeling diode, a high-speed
disconnecting switch (HS-DS) in the main branch, as well as
a string of many anti-series IGBTs, each of which is equipped
with a free-wheeling diode, in the auxiliary branch. Moreover,
a metal-oxide varistor (MOV) is connected in parallel with the
auxiliary branch.
As soon as the ABB breaker detected a fault current larger
than a prescribed current reference, it turned the main-branch
IGBTs off, and the fault current was commutated from the
main branch to the auxiliary branch. After an order of a
millisecond passed, the HS-DS was opened. Then, all the
IGBTs in auxiliary branch were turned off, and the fault current
was commutated to the MOV. This breaker has the capability
of fast current interruptions. However, the main-branch IGBTs
and diodes always produce a conduction power loss under
normal operating conditions. This would require a water-
cooling system for the IGBTs and diodes in an actual system.
Two low-speed disconnecting switches (LS-DSs) may be, but
not always, installed at both ends of the breaker for safety
and maintenance reasons. They are opened after completing
the current interruption. Hence, they do not affect any circuit-
breaking operation.
B. The Operating Principles of the Original TiTech Breaker
Fig. 2 shows the circuit configuration of a new dc circuit
breaker proposed in this paper. It is referred to as the “original
TiTech breaker” to be distinguished from the others, where
“TiTech” means Tokyo Institute of Technology. It consists of
a current-limit inductor L1 , a low-voltage high-speed quasi
vacuum interrupter (qVI), a high-voltage high-speed discon-
necting switch (HS-DS), a CS -RS snubber circuit, a current-
control inductor L2 , and a multilevel converter based on a
cascade connection of multiple single-phase full-bridge or H-
bridge cells, or shortly “bridge cells.” This multilevel converter
has long been known amongst research scientists and engineers
of power electronics [20]. The three-phase version with star
or delta connection is referred to as a “cascaded multilevel
converter,” “cascaded H-bridge converter,” or “chain-link mul-
tilevel converter” [21], [22]. The multilevel converter used in

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2863694, IEEE
Transactions on Power Electronics
SUZUKI et al.
the TiTech breaker is characterized by phase-shifted-carrier
PWM [23], [24].
The dc side of each bridge cell consists of two capacitors C0
and C1 , a diode connected in series with C0 , and a small-rated
MOV. Here, C0 is a low-voltage large-capacitance capacitor
that play an important role in current control during a current-
commutating process. Since a diode is connected in series
with C0 , no charging current flows in C0 . When multiple
reclosing/reopening operations are required for the original
breaker, careful design is mandatory for C0 , not to cause
any undervoltage because a serious undervoltage may bring
unstable current control to the multilevel converter. However,
multiple operations may not be required when the breaker
is applied to multi-terminal HVDC transmission systems us-
ing underground or undersea cables. On the other hand, C1
is a high-voltage small-capacitance capacitor working as a
dc snubber capacitor for protecting the four IGBTs against
overvoltage. The original breaker has the same principles
of operation as the ABB breaker, except for the current-
commutated process from the series-connected qVI and HS-DS
to the multilevel converter.
The aim of the current-limit inductor L1 is to mitigate a
current-increasing rate during abnormal conditions, while that
of the current-control inductor L2 is to make the current control
of iCon stable during the current-commutating process. The
peak currents of the two inductors during abnormal conditions
are the same. However, the inductance value of L2 is about one
thousandth as small as that of L1 , thus resulting in making an
air-cored inductor available to L2 . Two capacitor voltages vC0
and vC1 have a common initial voltage of VC during normal
operating conditions because the diode connected in series with
C0 remains on-state. On the other hand, this diode takes either
on-state or off-state during abnormal conditions, depending on
the operating modes described in the next section. In other
words, vC1 remains almost equal to vC0 during the current-
commutating process, while vC1 is higher than vC0 during an
energy-absorbing process.
As soon as the multilevel converter started with phase-
shifted-carrier PWM, the main-branch current started decreas-
ing, finally to almost zero. After it became almost zero,
the qVI was opened. With a delay time, the HS-DS was
opened, thus completing the commutation of the fault current
from the main branch to the auxiliary branch. However, the
multilevel converter still continued operation. Then, all the
IGBTs were turned off, and the dc voltage of each bridge
cell was increasing to the MOV voltage. After the dc voltage
reached it, the breaker started the energy-observing process.
The ABB and TiTech breakers had the same energy-absorbing
process to deceasing the fault current to zero.
C. Similarity and Difference Between the Two Breakers
Table I summarizes similarities and differences between
the ABB and TiTech breakers under an assumption that all
the IGBTs in Figs. 1 and 2 have the same voltage rating.
The following major difference lies in the count of IGBTs:
The ABB breaker has two IGBTs in the main branch and
2N IGBTs in the auxiliary branch. Hence, the total count of
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3
TABLE I. S IMILARITY AND D IFFERENCE B ETWEEN THE ABB AND
O RIGINAL T I T ECH B REAKERS .
• Function in main-branch IGBTs and qVI
Similarity • Function in main-branch HS-DS
• Energy-absorbing process
• Current-commutating process
Difference • Main-branch IGBTs or qVI
• Total IGBT count, 2N + 2 or 4N
the IGBTs reaches 2N + 2. On the other hand, the TiTech
breaker has 4N IGBTs in total because the multilevel converter
consists of N bridge cells.
Another major difference lies in current-commutating pro-
cesses. In Fig. 1, turning the main-branch IGBTs off triggers
current commutation. In Fig. 2, on the other hand, making the
multilevel converter active initiates current commutation. The
main-branch IGBTs in the ABB breaker have to interrupt the
full fault current while the qVI in the TiTech breaker interrupts
an almost zero current. The other processes including the
energy-absorbing process make no difference between the
ABB breaker and the original TiTech breaker.
III. O PERATING M ODES OF THE O RIGINAL T I T ECH
B REAKER
This section makes a detailed description about eight oper-
ating modes of the original TiTech breaker shown in Fig. 2.
It is assumed that a short-circuit fault occurs at the vicinity of
the load-side terminals. This assumption is one of the severest
fault conditions.
Fig. 3 shows the eight operating modes where the bridge-
cell count is set as N = 1 for the sake of simplicity. Strictly
speaking, all the N bridge cells in Fig. 2 are different in
switching timings because phase-shifted-carrier PWM [23],
[24] is applied to the multilevel converter. However, all the
bridge cells belong to the same operating mode as if they were
the single bridge cell shown in Fig. 3. Moreover, two low-
speed disconnecting switches, that may be installed at both
ends for safety and maintenance reasons, are eliminated from
Fig. 3 for the sake of simplicity.
Table II summarizes the timetable of the original breaker
during abnormal operating conditions, in which the total
current-interruption time is given as t6 − t0 .
A. Mode I
Fig. 3(a) shows operating mode I during normal operating
conditions when t < t0 . Here, both qVI and HS-DS remain
on-state, in which the dc-mains voltage source V is feeding a
dc power to the load via L1 , the qVI, and the HS-DS. Note
that both qVI and HS-DS are assumed as ideal mechanical
switches. The dc-capacitor voltage vC0 (= vC1 ) should be
charged up and kept to an initial voltage of VC under normal
operating conditions. This means that a small electrically-
isolated dc power supply continues feeding a small amount
of dc power to the dc side of each bridge cell. The aim is not
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Transactions on Power Electronics

4 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. XX, NO. X, XXXXXX 201X

TABLE II. T IMETABLE D URING THE C URRENT-I NTERRUPTING

VC VC P ROCESS .

t0 at the instant of the occurrence of the short-circuit fault

t1 at the instant of staring PWM operation
t2 at the instant of opening the qVI
t3 at the instant of opening the HS-DS
t4 at the instant of turning off all IGBTs
t5 at the instant that vC1 reached VMOV
t6 at the instant of interrupting the short-circuit current
V L1 V L1
- -
i i
(a) (b) only to keep each dc-capacitor voltage to the constant initial
value of VC , but also to provide a small electric power to the
gate-drive circuit for each IGBT as well as to the control circuit
-
vC0 -
vC0 for the breaker. Note that the electrostatic energy stored in C0
is much larger than that in C1 because their aims of installation
are different completely.

B. Mode II
-
iCon
-
iCon
- - Fig. 3(b) shows operating mode II during t0 ≤ t < t1 just
L2 vCon L2 vCon after the occurrence of a short-circuit fault. No current would
L1 L1
flow into CS and RS even during mode II because the qVI
- - - -
i iqVI i iqVI remains on-state. The short-circuit current i, that is equla to
(c) (d)
the qVI current iqVI , is obtained as

V
i = iqVI = (t − t0 ) + I0 . (1)
-
vC0 L1
C0
v-
C1 Here, I0 is the initial current at t0 , which corresponds to the
rated current under normal operating conditions. Monitoring
C1
the load current makes it possible to judge whether or not a
short circuit occurs [26].

L2
- L2
- C. Mode III
vCon vCon
L1 L1
- - Fig. 3(c) shows operating mode III during t1 ≤ t < t2 , where
iqVI = 0
i i the bridge cell started PWM operation at t1 . Here, iCon is the
(e) (f) current flowing into the bridge cell, and vCon is the L2 -side
voltage of the bridge cell. The multilevel converter detects the
main-branch current, forming a feedback current control loop.
This makes it possible to commutate the short-circuit current
flowing through both qVI and HS-DS from the main branch
-
VMOV to the auxiliary branch. See modes IV and V. Note that the
auxiliary branch consists of the current-control inductor L2
C1
and the multilevel converter in Fig. 2 or the single bridge cell
in Fig. 3(c).
Fig. 4 shows the block diagram of the current control
system based on phase-shifted carrier PWM. All the IGBTs
L2 - are assumed as ideal switching devices, and R2 is the winding
vCon
L1 resistance of the current-control inductor L2 . The current
- i=0 control loop consists of the multilevel converter, L2 , the qVI,
i
and the HS-DS. Therefore, the current-limit inductor L1 , as
(g) (h) well as transmission lines and loads, produce no effect on the
Fig. 3. Eight operating modes. (a) Mode I. (b) Mode II. (c) Mode III. (d) Mode current control performance. This makes the system and design
IV. (e) Mode V (f) Mode VI. (g) Mode VII. (h) Mode VIII. of current control extremely simple.

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Transactions on Power Electronics

SUZUKI et al. 5

MOV
Triangular Carriers No. 1 No. 120
vC0-

■iqVI Phase-Shifted
PWM
■
iqVI
-
C0 vC1

C1

120 bridge cells

Fig. 4. Block diagram of the current control system based on phase-shifted-
carrier PWM.

-
iCon RS CS
D. Mode IV L2

Fig. 3(d) shows operating mode IV during t2 ≤ t < t3 , L1 qVI HS-DS

where the qVI was opened at t2 , commutating iqVI to the CS -
- -  
RS snubber circuit. This snubber circuit plays the following i iqVI vqVI vDS
two important roles: 250 kV 208 Ω

1) One is to mitigate an opening surge voltage appearing

across the qVI at t2 .
2) The other is to eliminate a dc offset current from iqVI Fig. 5. The original TiTech breaker rated at 250 kV and 1.2 kA (6 kA) for
because CS act as a dc-blocking capacitor. circuit simulation, in which 4.5-kV IGBTs are used for each bridge cell.
The second role leads to opening the HS-DS without causing
any arc phenomenon. Note that the voltage rating of the qVI is TABLE III. C IRCUIT PARAMETERS OF THE O RIGINAL T I T ECH
determined mainly by the opening surge voltage at t2 , which B REAKER FOR C IRCUIT S IMULATION .
would be less than 1 kV even in an actual HVDC transmission
system rated at 250 kVdc. Rated dc voltage V 250 kV
Rated dc current I 1.2 kA
E. Mode V Resistive load R 208 Ω
Bridge cell count N 120
Fig. 3(e) shows operating mode V during t3 ≤ t < t4 . The MOV voltage VMOV 3 kV
HS-DS took its opening action at t3 . After the passage of a Carrier frequency fC 1 kHz
very short time, iqVI became zero. However, the bridge cell Equivalent carrier frequency feq 240 kHz
continued operating with PWM because it was unable to know Low-voltage dc capacitor C0 250 mF
the exact time when the HS-DS completed the opening action. Initial dc capacitor voltage VC 40 V
Once iqVI was zero, the waveform of vCon included no dc Unit capacitance constant of C0 HC0 80 µs at 40 V
component under ideal conditions. High-voltage dc capacitor C1 2 µF
Unit capacitance constant of C1 HC1 3.6 µs at 3 kV
Current-limit inductor L1 100 mH
F. Mode VI Unit inductance constant of L1 HL1 6 ms at 6 kA
Fig. 3(f) shows operating mode VI during t4 ≤ t < t5 . After Current-control inductor L2 100 µH
all the IGBTs in the bridge cell were turned off at t4 , the bridge Unit inductance constant of L2 HL2 6 µs at 6 kA
cell acted as a single-phase full-bridge diode rectifier. During Dead time TD 20 µs
this mode, an amount of the electromagnetic energy stored in Snubber capacitor CS 0.2 µF
L1 and L2 continued being released to C1 if no resistance Snubber resistor RS 400 Ω
exists in the circuit. This event made vC1 continue increasing
until it reached a varistor clamp voltage VMOV . However, no
charging current flowed into C0 because a reverse voltage was
applied across the diode connected in series with it. the breaker succeeded in disconnecting the short-circuit point
from the dc-mains voltage source.
G. Modes VII and VIII
Fig. 3(g) shows operating mode VII during t5 ≤ t < t6 , IV. C IRCUIT S IMULATION OF AN ACTUAL O RIGINAL
where vC1 reached VMOV at t5 . The energy-absorbing process T I T ECH B REAKER
started from t5 . During this mode, the electromagnetic energy
was being dissipated in the MOV. Finally, a relation of i = A. Circuit Configuration and Parameters
iqVI = 0 held true at t6 . Fig. 5 shows the circuit configuration of the original TiTech
Fig. 3(h) shows operating mode VIII after t6 , where the breaker used for the following circuit simulation. This is
breaker completed its mission. Then, the two low-speed dis- intended for installation on a simplified HVDC transmission
connecting switches shown in Fig. 2 were opened. As a result, system rated at 250 kVdc and 1.2 kAdc. Note that a single dc

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iCon
t0 t1 t2 t5 t6 TABLE IV. M AXIMUM VOLTAGES AND C URRENTS O BTAINED F ROM
6 ? THE WAVEFORMS OF F IGS . 6 AND 7.
iCon
iqVI
iqVI   qVI   HS-DS
[kA] 1.2 ? Current at the instant of opening 1.1 A 50 mA
0
Voltage at the instant of opening 290 V 10 kV1
40
Voltage after opening 25 V 45 V
vC0 Maximum voltage 290 V 360 kV
[V] Maximum current 6 kA 6 kA
0
1
Both qVI and HS-DS are assumed as ideal mechanical switches in the circuit simulator
4 used in this paper. Therefore, it was impossible to obtain this voltage value because neither
CR snubber nor surge absorber was connected across the HS-DS. Hence, the authors cal-
vC1
2 6 culated the voltage value from (3) under the assumptions of diHS−DS /dt = 100 A/µs
[kV] 3 kV (= VMOV ) [27] and L2 = 100 µH, neglecting the voltage across the multilevel converter, vCon .
0
400
vqVI  290 V that the current-increasing rate be 2.5 kA/ms. The inductance
200
[V] value of L2 was set as 0.1 mH, that is, one-thousandth as
0 small as that of L1 . An initial dc-capacitor voltage of each
bridge cell was set as VC = 40 V, that is much lower than
400
the MOV voltage of 3 kV. The carrier frequency was set as
vDS 6 fC = 1 kHz. As a result, the equivalent switching frequency
200 360 kV (= VMOV × 120)
[kV]
be 240 kHz (= 2N fC ) because the so-called “phase-shifted-
0
carrier PWM” was applied to the 120 bridge cells. This makes
0 2 4 6 8 a significant contribution, not only to improving current control
Time [ms]
performance but also, to reducing the size and weight of L2 .
Fig. 6. Simulated waveforms from the original TiTech breaker. The unit capacitance constant H is defined as the ratio of
the total electrostatic energy stored in all the dc capacitors
50 mA in peak-to-zero with respect to the rated power P [25]. Thus, it is given by
0
5 t2 t3 t4 the following equation:
iqVI 0
? ? N CVC2
[A] H=
, (2)
 50 µs - 2P
-5
Substituting the related circuit parameters into (2) yields
290 V-
400
HC0 = 80 µs at VC = 40 V, and HC1 = 3.6 µs at VC = 3 kV,
vqVI 200 where P = 300 MW. This significant difference in voltage
[V]
0
between the two dc capacitors comes from their role and
function.
Final voltage of 360 kV - Circuit simulation was executed to take into account the
50
vDS following items:
[V] 0 • A one-sampling delay time of 4.17 µs (= 1/240 kHz),
-50
that comes from the phase-shifted-carrier PWM intro-
1.85 1.9 1.95 2.00 duced to the 120 bridge cells.
Time [ms] • A saturation voltage of the IGBT and a forward voltage
Fig. 7. Expanded waveforms of Fig. 6.
of the diode, each of which is given as a function of
either collector or anode current from manufacturer’s
data sheet.
resistor is installed directly at the load-side end of the original • A dead time of 20 µs in each bridge cell.
breaker. A software package of “PSCAD/EMTDC” was used • Each MOV presents infinite resistance when the applied
as the circuit simulator in this paper. voltage is lower than 3 kV, and maintains a constant
voltage of 3 kV even when it is getting higher that 3 kV.
Table III summarizes the system ratings and circuit param-
• Both qVI and HS-DS present zero impedance under
eters of the original breaker. Since the 4.5-kV IGBTs were
on-state conditions and infinite impedance under off-
selected as the power switching devices, the maximum dc
state conditions. Instantaneous transition occurs without
voltage of each bridge cell was designed as 3 kV, equal to
producing any arc voltage.
the MOV voltage, under a bridge-cell count of N = 120.
The current rating of the IGBTs would be one of the design
matters of each bridge cell. The latest 4.5-kV 3-kA IGBTs, B. Delay Times Inherent in Mechanical Switches
that are available from the market, would be one of the best Any mechanical switch has an amount of delay time result-
candidates. The inductance value of L1 was set as 100 mH, so ing from its mechanical behavior when it is being opened. This

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Transactions on Power Electronics

SUZUKI et al. 7

is defined as the time interval spent from the time at the instant MOV
No. 1 No. 24
of having given an opening signal to the time at the instant vC0-
of having completed opening. A delay time of a cutting-edge
fast mechanical switch is less than 1 ms with a voltage rating v-
C1
C0
of several tens of kilovolts [7], and 2 ms with that of several
hundreds of kilovolts [26]. The following circuit simulation
C1
assumes both qVI and HS-DS to have the same delay time
as 1.8 ms under the following expectation: Continuous efforts
would reduce the delay time by 10% in a few years. Moreover, 24 bridge cells
a high-voltage mechanical switch as fast as a delay time of
1 ms would be available on the market in the near future.
- -
iCon RS CS vCon
C. Simulation Result L2
Fig. 6 shows the simulated waveforms of Fig. 5 before and L1 qVI HS-DS
after the severest short-circuit fault occurred at t0 . Before t0 , - -  
the following relations hold; i = iqVI = 1.2 kA, iCon = 0, and 300 V i iqVI vqVI vDS
2Ω
vqVI = vDS = 0. Note that vC0 and vC1 had been charged up
to an initial voltage of 40 V until t0 . After t0 , the amplitudes
of i and iqVI were increasing with a slope of 2.5 kA/ms (=
Fig. 8. The downscaled “original” TiTech breaker rated at 300 Vdc and
V /L1 ). 150 Adc.
The multilevel converter started PWM operation at t1 . At
Variable
that time, the short-circuit current i (= iCon ) reached 1.44 kA 100 V auto-transformer
50 Hz 100 : 12 No. 1
(120% of the rated current). As shown Fig. 6, iqVI fell down C0
to almost zero after a passage of 0.3 ms from t1 . This means
that the current control system shown in Fig. 4 worked well
as expected. On the other hands, the dc-capacitor voltage vC0 No. 2
(= vC1 ) was decreasing gradually from its initial value of 40 V
because the action of current control made a partial amount
of electrostatic energy in C0 released and transformed into
L2 . As a result, the corresponding amount of electromagnetic No. 24

energy was increasing, accompanied by a small energy loss.

Since the frequency of each triangular carrier is set to 1 kHz,
the actual IGBT switching count per circuit-breaking action is
only four times in average. This means that no cooling system
is required for each bridge cell in an actual original breaker.
Fig. 7 shows the time-expanded waveforms of Fig. 6, in
which attention is paid to the opening events of the two
mechanical switches. Carefully looking into Fig. 7 reveals that
a dc offset current of 1.1 A (0.09 %) remained in iqVI before
t2 but it decreased to 50 mA in peak-to-zero after t2 . Note
that the snubber capacitor CS acted as a dc-blocking capacitor.
Moreover, an opening surge voltage of 290 V occurred in
vqVI just after t2 as a result of a good effect of installation
of the snubber circuit. In addition, a very small amount of
switching-ripple voltage occurred in vqVI because the phase-
shifted-carrier PWM was introduced to the 120 bridge cells
The HS-DS was opened at t3 , thus resulting in iqVI = 0. A
switching-ripple voltage was superimposed not on vqVI but on
vDS after t3 , because the HS-DS has neither snubber circuit
nor surge suppressor whereas the qVI has the CS -RS snubber
circuit. After all the IGBTs were turned off at t4 , each bridge
cell acted a single-phase full-bridge diode rectifier. As a result,
vC1 was increasing rapidly until it reached an MOV voltage
of 3 kV at t6 . On the other hand, vC0 did not change at all
after t4 because a diode is connected in series with C0 . After
t5 , iCon was decreasing linearly until it reached zero at t6 .
Finally, the original TiTech breaker accomplished its mission
at t6 . The total current-interruption time was 7.8 ms.
Fig. 9. Initially-charging circuit used in the following experiments.
Table IV summarizes the current and voltage at the instant
of opening either qVI or HS-DS, and the voltage after opening
it, as well as the maximum voltage across either qVI or HS-DS
and the maximum current flowing in it. What is interesting in
Table IV can be summarized as follows:
• The qVI is required to have the capability of chopping
a dc current of 1.1 A, and it has to withstand a surge
voltage as low as 290 V.
• The HS-DS is required to have the capability of chop-
ping a ripple current of 50 mA in peak-to-zero, and it has
to withstand the maximum voltage as high as 360 kVdc
(= 3 kV × 120).
V. E XPERIMENTAL V ERIFICATION BY A D OWNSCALED
O RIGINAL T I T ECH B REAKER
A. Experimental System
Fig. 8 shows the circuit configuration of the downscaled
original breaker. Table V summarizes its circuit parameters.
The rated voltage and current of 300 Vdc and 150 Adc were
determined from the facility of the authors’ laboratory. A
tradeoff or compromise led to the following special design:

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iCon
t1 t2 t3 t4 t5 t6
TABLE V. C IRCUIT PARAMETERS OF THE D OWNSCALED O RIGINAL
150 ?
T I T ECH B REAKER . iCon
iqVI iqVI
Rated dc voltage V 300 V
Rated dc current I 150 A
[A]
0
?
Resistive load R 2Ω
15
Bridge cell count N 24
MOV voltage VMOV 43 V at 150 A vC0 10
Carrier frequency fC 4 kHz [V]
Equivalent carrier frequency feq 192 kHz 0
Low-voltage dc capacitor C0 10 mF 50
Initial dc-capacitor voltage VC 10 V
vC1
Unit capacitance constant of C0 HC0 0.27 ms at 10 V [V]
High-voltage dc capacitor C1 1 mF 10
0
Unit capacitance constant of C1 HC1 0.52 ms at 43 V
500
Current-limit inductor L1 6 mH
Unit inductance constant of L1 HL1 0.15 ms at 150 A vCon 0
[V] -500
Current-control inductor L2 0.05 mH
Unit inductance constant of L2 HL2 0.013 ms at 150 A -1000
Dead time TD 4 µs 10
Snubber capacitor CS 1 µF vqVI
Snubber resistor RS 33 Ω [V]
0

-10

Although the bridge-cell count in Fig. 8 is one-fifth of that in
Fig. 5, it would be acceptable for verifying the validity and
effectiveness of phase-shifted-carrier PWM. The MOV voltage
is as low as 43 Vdc, but it is much higher than that in a general
design for the downscaled breaker, as described in the next
subsection. A total of 24 MOSFET six-in-one modules, each
of which is rated at 75 V and 200 A, were used to build the
multilevel converter. Each MOSFET module achieves current
control only for a short interval of about 3 ms.
Fig. 9 shows the initially-charging circuit used in the follow-
ing experiments. The initial charging of all the 24 dc capacitors
can be adjusted by a single variable autotransformer. Once the
initial charging was completed, the ac output voltage of the
variable auto-transformer was reduced to zero. As a result, the
initially-charging circuit was electrically disconnected from all
the bridge cells. This means that the 24 diode rectifiers produce
no effect on experimental verification of the TiTech breaker.
Actual ABB and TiTech breakers have to be equipped with
many galvanically-isolated power supplies for gate-drive cir-
cuits of IGBTs. It would be possible to use the power supplies
as the initially-charging and charge-maintaining circuits.
The two mechanical switches, qVI and HS-DS, in the
experimental system were replaced with the same high-speed
dc power relays or magnetic contactors rated at 400 V and
250 A with a delay time of around 2 ms. The power relays
are available on the Japanese market. The delay time is the
sum of the time spent from the input of the opening signal to
the start of action of opening and the time spent from it to the
completion of action of opening.
B. Experimental Waveforms
Fig. 10 shows the experimental waveforms obtained from
Fig. 8. Before starting the PWM operation of the multilevel
1000
vDS
500
[V]
0
0 1 2 3 4 5
Time [ms]
Fig. 10. Experimental waveforms obtained from the downscaled “original”
breaker.
converter at t1 , the following relations came into existence;
iqVI = 150 A, iCon = 0, and vC0 = vC1 = 10 V. At t1 , iqVI
started decreasing. Then, it reached nearly zero after a passage
of 0.2 ms. Moreover, vC0 was decreasing gradually, containing
a switching-ripple voltage. Since the carrier frequency of each
bridge cell was set to 4 kHz, the actual count of on- and off-
switching events of each MOSFET was 16 times in an interval
of 2 ms.
Fig. 11 shows the time-expanded waveforms of Fig. 10
around t2 , where the vertical axis of iqVI is expanded sig-
nificantly, but that of vqVI is not expanded. Carefully looking
into Fig. 11 reveals that a dc offset included in the waveform
of iqVI was almost zero just before t2 . As soon as the qVI
was opened at t2 , iqVI was commutated to the CS -RS snubber
circuit, producing almost no opening surge voltage across the
qVI. In addition, the snubber capacitor CS acts a dc-blocking
capacitor. As a result, no dc current flowed in the HS-DS, or
existed in the waveform of iqVI in Fig. 11(a), after the qVI
was opened at t2 .
After all the MOSFETs were turned off at t4 , each bridge
cell acted as a single-phase diode rectifier. The load current
(i = iCon ) flowed into the dc side of each bridge cell. However,
the load current was unable to flow into C0 because a single
reverse-blocking diode was connected in series to it. Instead,
the load current flowed into C1 . As a result, vC1 was increasing

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Transactions on Power Electronics

SUZUKI et al. 9

t2 MOV
2 No. 1 No. 24
vC0-
iqVI
[A] 0
v-
C1
C0
-2
10
C1
vqVI
[V] 0
24 bridge cells
-10
1.9 2.0 2.1
Time [ms] - -
(a) iCon vCon
L2
1 t2
L1 qVI
iqVI 0.5 - - 
[A] i iqVI vqVI
0 300 V 2Ω
-0.5
10
vqVI Fig. 12. The downscaled “simplified” TiTech breaker rated at 300 Vdc and
[V] 0 150 Adc.

-10
2.005 2.010
Time [ms]
(b)
Fig. 11. Expanded waveforms around t2 in Fig. 10. (a) Expanded waveforms.
(b) Further-expanded waveforms.
linearly to a varistor clamp voltage of 43 V. Finally, the
maximum voltage of 1.04 kV (≃ 43 × 24)2 was applied across
the HS-DS.
After t5 , the load current was decreasing linearly, until it
reached zero at t6 . The total current-interruption time, given
by an interval of t6 − t1 , was 4.4 ms.
VI. E XPERIMENTAL V ERIFICATION BY A D OWNSCALED
S IMPLIFIED T I T ECH B REAKER
A. Experimental System and Waveforms
Fig. 12 shows the experimental circuit configuration of
a downscaled simplified TiTech breaker. This is the same
in circuit configuration as Fig. 8, except for removing both
snubber circuit and HS-DS from Fig. 8. When this simplified
breaker is applied to an actual HVDC system, the qVI should
replace a single low-voltage vacuum interrupter with a few or
several high-voltage vacuum interrupters connected in series.
Fig. 13 shows the experimental waveforms obtained from
Fig. 12 under the same conditions as those in Fig. 10.
Fig. 14 shows the time-expanded waveforms of Fig. 13 just
before and after opening the qVI. All the waveforms in Fig. 13
from t1 to t2 are the same as those in Fig. 10. The maximum
voltage across the qVI reached 1.03 kV.
2 The voltage across the HS-DS, v
DS reached 1.04 kV at t5 because each
MOV has a clamping voltage of 43 V. This means that the maximum voltage of
1.04 kV is 3.47 times as high as the dc-mains voltage of 300 V. In practice, the
maximum voltage applied across the HS-DS would be designed to be around
1.5 times the dc-mains voltage.
2.015
B. Maximum Opening Surge Voltages
Fig. 15 shows an equivalent circuit with focus on the
behavior of the simplified TiTech breaker shown in Fig. 12
at the instant of opening the qVI. The load current can be
regarded as a constant current source because the time spent
to open the qVI is short enough, and the inductance value of L1
is sufficiently larger than that of L2 . Since a stray inductance
existing in the main branch is much smaller than the current-
control inductor L2 , it is discarded from the equivalent circuit.
The equivalent circuit gives an opening surge voltage across
the qVI as follows:
diqVI
− vCon .
vqVI = L2 (3)
dt
The above equation, along with Fig. 15, concludes that an in-
ductance value of L2 and a value of diqVI /dt would determine
the maximum opening surge voltage. Thus, one of the simplest
ways to mitigate it is to reduce the inductance value of L2 .
Since Fig. 12 has neither snubber circuit nor surge absorber
connected in parallel with the qVI, it is indispensable to
examine the maximum opening surge voltage caused by the
so-called “current-chopping phenomenon.” This is defined as
having chopped a small amount of current and its resultant
phenomenon [28]. The authors did many current-interruption
tests in Fig. 12, intentionally adjusting the chopping current.
Fig. 16 shows another example of expanded waveforms
obtained from Fig. 12 before and after opening the qVI. Note
that the current flowing through the qVI was about 1.1 A at
the instant of the start of opening, intentionally adjusting it to
increase. An arc voltage of 18 V occurred and continued for
an interval of 3 µs. Since the arc discharge was unstable, iqVI
was decreasing gradually. At t2 , the qVI chopped a current of
0.25 A off. This chopping current was commutated instan-
taneously from the qVI to the current-control inductor L2 ,
producing a peak voltage of 45 V across the qVI. Generally, the

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iCon
t1 t2 t4 t5 t6
150 ? 2 t2
0.2 A
iCon
iqVI iqVI iqVI
[A] 0
[A]
0
?
-2
15 No arc voltage
30  22 V
10
vC0 vqVI ?
[V] [V] 0
0
-30
50
1.9 2.0 2.1
vC1 Time [ms]
[V] (a)
10
0 t2
1 0.2 A
500
vCon 0
iqVI
[V] -500 [A]
0
-1000 -0.5

1000
30  22 V
vqVI vqVI
[V] 500 [V] 0
0
-30
0 1 2 3 4 5 2.005 2.010 2.015
Time [ms] Time [ms]
Fig. 13. Experimental waveforms obtained from the downscaled “simplified” (b)
breaker. Fig. 14. Expanded waveforms around t2 in Fig. 13. (a) Expanded waveforms.
(b) Further-expanded waveforms.

chopping current changes, depending on the timing of opening

the qVI, and arc discharge conditions, as well as the shape or
structure, materials, and parallel-circuit constants of the qVI L2
[28]. In Fig. 11, the current flowing through the qVI at the -
instant of the completion of opening was 0.2 A. Therefore, it vL2
6
iCon
-
was commutated to the CS -RS snubber circuit, causing no arc vCon
voltage. In Fig. 14, on the other hand, a chopping current of qVI
about 0.2 A brought an opening surge voltage of 22 V to the - 
iqVI vqVI
qVI, but without any arc voltage. I0
Fig. 17 summarizes many current-interruption tests with
focus on relations between a wide range of chopping currents Fig. 15. Equivalent circuit before and after opening the qVI in the downscaled
and the resultant maximum opening surge voltages. Equation “simplified” breaker.
(3) indicates that the waveform of vCon was superimposed on
the waveform of vqVI . It is clear from Fig. 17 that the smaller
the inductance value of L2 , the lower the maximum opening rupter connected in series when it is rated at 250 kVdc
surge voltage, as expected. or higher than it. Moreover, the simplified breaker has
The following simple question may be asked about the to care for producing higher opening surge voltages than
original and simplified TiTech breakers proposed and discussed the original breaker.
in this paper, “Which is better from a practical point of view, Finally, the authors can summarize the final answer to the
the original one or the simplified one?” The answer is not above question as allows: The simplified breaker would be
straightforward from the following reasons. more suitable when it is applied to HVDC systems rated at
• The original breaker can use a single low-voltage vac- 150 kVdc or lower than it, depending on the maximum voltage
uum interrupter, producing extremely low opening surge rating of vacuum interrupters available from the market. On the
voltages with the help of the CS -RS snubber circuit. other hand, the original breaker would be more suitable when
However, the original breaker has the low-voltage vac- it is applied to HVDC systems rated at 150 kVdc or higher
uum interrupter with a CS -RS snubber circuit and a high- than it.
voltage disconnecting switch in the main branch.
• The simplified breaker has neither CS -RS snubber circuit VII. C ONCLUSION
nor high-voltage disconnecting switch. However, the This paper has presented two HVDC circuit breakers com-
simplified breaker has a few or several vacuum inter- bining one or two mechanical switches with a multilevel con-

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SUZUKI et al. 11

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Atsushi Suzuki was born in Hyogo, Japan, in 1993.

He received his B. S. and M. S. degrees in electrical
and electronic engineering from the Tokyo Institute
of Technology, Tokyo, Japan, in 2016 and 2018.
Since April 2018, he has been working for Central
Japan Railway Company. He did research on hybrid
dc circuit breakers for three years at the Tokyo
Institute of Technology.

Hirofumi Akagi (M’87-SM’94-F’96) was born in

Okayama, Japan, in 1951. He received his Ph. D.
degree in electrical engineering from the Tokyo
Institute of Technology, Tokyo, Japan, in 1979. In
the same year, he joined the Nagaoka University
of Technology, Nagaoka, Japan, as Assistant and
then Associate Professor. From 1991 to 1999, he
was Professor at Okayama University, Okayama,
Japan. Since January 2000, he has been Professor,
currently Distinguished Professor, in the department
of electrical and electronic engineering at the Tokyo
Institute of Technology. His research interests include power conversion
systems and its applications to industry, transportation, and utility. He has
authored and coauthored more than 140 IEEE Transactions papers and three
invited papers published in the Proceedings of the IEEE in 2001, 2005, and
2017.
He received six IEEE Transactions Prize Paper Awards and 15 IEEE IAS
Committee Prize Paper Awards. He is the recipient of the 2001 IEEE PELS
William E. Newell Power Electronics Award, the 2004 IEEE IAS Outstanding
Achievement Award, the 2008 IEEE Richard H. Kaufmann Award, the 2012
IEEE PES Nari Hingorani Custom Power Award, and the 2018 IEEE Medal
in Power Engineering. Dr. Akagi served as the President of the IEEE Power
Electronics Society for 2007-2008, and the IEEE Division II Director for
2015-2016.

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