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„ V Compute the AC and DC parameters for a common emitter amplifier


2 V uild a common emitter amplifier circuit and measure the DC parameters, the AC input
resistance and the voltage gain Observe the phase relationship between the input and
output signals
3 V redict and test the effects of certain faults in a common emitter amplifier

à 

his experiment involved the building of a common emitter amplifier A signal generator was used to
provide an input waveform of „ frequency and 300mV peatopea voltage A „2V DC signal was
also applied using an adjustable power supply he circuit was built according to the following
specifications:

0 

  
„ V he resistances of the 6 resistors used in the circuit shown in Figure „„ were measured
using a multimeter heir listed and measured values are presented in able „„

^

    
V
^V „0 9
^ 4 4 62
^ 0 „00 0 099
^V 0 330 0 3294
^ „0 0 99
^ „0 9

        
2.V T e e e c  v es  e se
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 VTH2„2)]V4.62„4.42)„2

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TH„ 2„2„2)45.26„4.42

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)]3.440.)3.„4„0„)0.429„)]

6.65 6.65„05 ees.



6.65  6.65„03 ees.


„)6.335  6.335„03 ees.

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VV)„]V2]0
V„2)9.]V4.62]6.65„050
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ë V  3 63 Volts

he emitter voltage VE is given by applying Ohm͛s law at the emitter terminal:

VE  IE x (RE„  RE2  0 0063 x (429 „

 2 93 Volts

he collector voltage can be calculated by applying Ohm͛s law on the collector resistor:

IC  (VCC  VC  RC

VC  VCC  ICRC  „2 (6 65 mA (0 99 

VC  5 30„ Volts

Finally, the collectoremitter voltage is given by:

VCE  VC  VE  5 30„  2 93

 2 3„ Volts

3 V he circuit in Figure „  2 above (the DC voltage divider circuit was constructed on the
breadboard For simplicity, the AC components were not connected at this stage he signal
generator was also left off he DC power supply was set to „2V and measurements were
taen using a multimeter An outline of how each measurement was taen is given:

he base voltage was taen as the voltage across the 4  resistor, R2
he emitter voltage was taen as the voltage across both the emitter resistances ence,
one of the multimeter probes was connected to one end of the „00 resistor, while the
other was connected to the other end of the 330 resistor
he collector voltage was taen as „2V minus the voltage across the „ 0 resistor, RC
he collectoremitter voltage was taen by connecting the multimeter across the
collector and emitter pins on the   itself

he results obtained in this section were tabulated and are given here:

  
  
 
  

V V V
V  VV 
VV
V  VV  VV
V 

VV V
V  VV  V
V 
VV  V


4 V he theoretical AC parameters were calculated for the amplifier hese included emitter AC
voltage Ve, small signal output resistance between base and emitter re, voltage gain Av, the
output voltage Vout and the total input resistance Rin(tot he AC equivalent circuit for this
amplifier is given by:

0 

9
 
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he small signal output resistance reis given by:

re  26mV  IEQ

From the calculations done in step (2 we already now that IEQ  6 335 mA ence,

re  3 05

he emitter AC voltage Ve is equal to the voltage drop across the combined emitter resistances re 
RE„ Due to the nature of parallel resistors, the voltage drop across these resistors is equal to the
source voltage:

Ve  Vin  300 mVpp

ence the AC signal emitter voltage is 300mV peatopea

he voltage gain AV is given by:

AV   R͛L  (re  RE„

Where, R͛L  RC RL  0 99   9    (0 99   9    99 „

AV  99 „  (3 05  99 

AV   69

he theoretical output voltage is given by the multiplying the peatopea value of the input signal
by the voltage gain:

VO  AVVin   69 x 300mV  2 6„ V

ence, the theoretical output voltage VO has a value of 2 6„ volts peatopea


he total input resistance Rin(tot is given by the parallel combination of the following resistors:

Rin(tot  R  (re  RE„

Where, R  R„ R2  3 „4 

Rin(tot  3 „4  „00(„03 505  2 409 

ence, the total input resistance is 2 409 

5 V he signal generator was turned on and the required „ 0  300mV peatopea signal was
applied to the circuit his time, a cathode ray oscilloscope (CRO was used to observe the
waveforms and to measure the AC parameters 

Once again, a brief explanation of how each measurement was determined is given he
table of results is provided after:

 he probe hoo was connected to the positive terminal of the capacitor C„ he alligator
clip was grounded 
 he alligator clip was connected to ground, while the hoo was connected to the emitter
terminal on the  
 he alligator clip was connected to ground, while the hoo was connected to the emitter
terminal on the  
 
he probe hoo was connected to the collector terminal on the   while the alligator
clip was connected to ground
he peatopea output signal voltage Vout was divided by the peatopea value
measured for the input signal Vin

he voltage gain AV is calculated from the input and output voltages
AV  Vo / Vin  2 24 V / 0 3 V   4
he negative sign indicates that the output signal is inverted when compared to the input
signal

It is clear from the table above, that the peatopea emitter voltage is actually less than
the peatopea value of the input signal W

6 V he total input resistance was measured using a rheostat  a variable resistor he rheostat
was connected in series with the AC voltage source he circuit diagram for the arrangement
is given:



0 

y treating the entire AC equivalent circuit as one resistance Rin(tot , we could use the
rheostat to determine what this value was efore inserting the rheostat, the oscilloscope
was used to measure the output signal and this value was noted down Next, the rheostat
was inserted in series with the AC generator and its value is varied until the output signal
changes to half of its initial value In this position, if only half of the applied signal is
appearing at the output terminals, then half of it must be appearing across the rheostat
Since the current passing through resistors in series is the same, the resistance of the
rheostat must be the  as the total input resistance Rin(tot ence, the value of the
rheostat͛s resistance is equal to Rin(tot and was found to be 2 5 

he results obtained in the previous three steps are tabulated in able „  3

à  
  
 
  

VVV  VV  VV
V V  VV
V  >V V
V  V 

V
 VVV  VV VV
^ !V  V"#V 
V"#V



 V he rheostat was removed from the circuit and the original amplifier configuration was
restored A second probe was connected to Channel wo on the oscilloscope and this was
used to measure the output waveform he first probe, connected to Channel One, was used
to measure the input waveform When the signal generator and power supply were turned
on, the following was observed on the oscilloscope screen:


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9 V he bypass capacitor was refitted and the load resistance was changed from „0 to „
Once again, the AC signal at the transistor͛s base, emitter and collector was measured he
voltage gain of the amplifier was also calculated hese results are given:


  

V V
V  VV
V 
VV
V  VV
$%VV  V
#

From this we can draw the conclusion that a decrease in load resistance results in a decrease
in voltage gain his can be proved by observing the formula:

A   R͛L  RC

Where, R͛L  RC RL

ence when the load resistance RL is decreased, the parallel combination of it and RC has a
reduced value ence, a lower R͛L and thus a lower voltage gain can be observed

„0 V RL was changed bac from „ to its original „0 value his time, the „00 emitter
resistance was left open Instead of measuring AC signals, the DC voltages at the base,
emitter and collector were taen he table of results is given:


  

V V
V  VV
V  VV
V  VV
$

he collector voltage was taen by subtracting the voltage across the collector resistance
from the DC voltage input of „2V We can see that the transistor is in cutoff because the
baseemitter junction is reversebiased

„„ V RE„ was replaced and the 4 > resistor R2 was removed Once again, the dc voltages at the
emitter, base and collector were taen he values are:

  

V V
V  VV
V  VV
V  VV

In this case, both the basecollector and baseemitter junctions are forward biased ence,
the transistor is in saturation mode
[  
    
„ V From lab handout:

„ V he purpose of a bypass capacitor in of an amplifier circuit is to improve the overall gain by
acting as a short circuit to AC voltages

In our case, the partially bypassed emitter resistance, we already see that the emitter
resistance comes up when calculating the theoretical gain:
AV   R͛L  (re  RE„

Essentially, this illustrates that there is not only a voltage drop across the small signal output
resistance re but also a drop across the first emitter resistance RE„

ence if the capacitor is currently bypassing the second emitter resistance RE2 is taen out,
then the equation would be,
AV   R͛L  (re  RE„  RE2

If we substitute values, we find that AV  2 06 which is fairly close to the measured gain
that we obtained in procedure 

2 V he output voltage is a voltage that has been stabilied by the emitter resistance If we too
the signal across the base terminal then the effects of the emitter resistance would not have
been included herefore, it is a better procedure to tae the signal at the load

3 V If the amplifier shown in figure 2 had „ V dc measured at the base and „ „V measured at
the emitter, then the baseemitter junction would still be forward biased owever the base
collector junction would not be reverse biased as the voltage VC  0 V his indicates that
the transistor is in saturation mode

A liely cause is that there is a large voltage drop happening across the collector resistance
Effectively, this leaves a small voltage at the collector (~„ „V hence forward biasing the
basecollector junction

4 V If C2 was shorted, the DC equivalent circuit would loo lie:


0 #

he base voltage will reduce from 3 63 V to 3 09 V and the collector voltage will become
negative due to the large value of IC ence, the amplifier will cease to wor correctly

5 V o see whether the transistor is in saturation or cutoff we would simply measure the
currents at the base and at the collector If there was current present at the collector then
cutoff can be ruled out If the value for IC over I was less than the theoretical gain AV for the
transistor, then we say it is in saturation

Another way would be to chec the voltage at the collectoremitter junction If this value
was equal to the input DC voltage VCC then the transistor is in cutoff If this value is
approximately 0, then the transistor is in saturation

2V