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Users Manual
AVR-MT128 is simple but powerful board which uses the MCU ATMega128
from Atmel. With its LCD, buttons, relay and variety of interfaces such as
RS232 (in two variants – 4 pins and DB9), JTAG, ISCP, Dallas, etc. this
board is suitable for different embedded systems applications.
BOARD FEATURES:
ELECTROSTATIC WARNING:
The AVR-MT128 board must not be subject to high electrostatic potentials.
General practice for working with static sensitive devices should be applied
when working with this board.
BLOCK DIAGRAM:
MEMORY MAP:
BOARD LAYOUT:
SCHEMATIC:
+12V
VR +5V
PWR +5V +5V
G1 78L05
DB104 Z
IN OUT R9
4.7K D10
+ C1 1N4728(3.3V) GND C2 C3 FR107
+
12VDC/9VAC R2 R3 R15 R16 R17 R8
220uF/25VDC 100n 100uF 22K 22K 22K 22K 22K DALLAS DALLAS
B1 B2 B3 B4 B5 33 1
D11 2
FR107
AVR-MT-128
COPYRIGHT(C) 2008, OLIMEX LTD B1 B2 B3 B4 B5
HTTP://WWW.OLIMEX.COM/DEV
+5V
R14 EXT1
C9
+5V 100n
T2 14 13 T1
10K XCK1 12 11 IC1
U1 C10 SDA/INT 1 10 9 SCL/INT0
ZM33064 U2 100n IC3/INT 7 8 7 T3/INT6
52
21
OC3C/INT5 6 5 OC3B/INT 4
2 VCC RESET 3
RESET 20 VCC
RESET/ OC3A/AIN1 4 3 XCK0/AIN0
+5V 2 1
GND C5 24
XTAL1
1
22p 23
Q2 XTAL2
51 B1
C6 16MHz 19 PA0/AD0 50 B2
22p Q1 TOSC1/PG4 PA1/AD1
18 49 B3
+5V 32768Hz TOSC2/PG3 PA2/AD2 LCD_TR
ICSP 48 B4 +5V
2 1 PDI 2 PA3/AD3 47 B5 10K
RXD0/PDI/PE0 PA4/AD4
4 3 PDO 3 TXD0/PDO/PE1 46 DALLAS
PA5/AD5
2
6 5 RESET XCK0/AIN0 4 45 RELAY
8 7 SCK BUZ3 OC3A/AIN1 5
XCK0/AIN0/PE2 PA6/AD6 44 PA7/AD7
VDD
OC3A/AIN1/PE3
BUZZER
PA7/AD7 3
10 9 OC3B/INT 4 6 VO
OC3B/INT4/PE4
OC3C/INT 5 7 35 RS
OC3C/INT5/PE5 PC0/A8
+5V T3/INT6 8
T3/INT6/PE6
36 R/W
RS232 IC3/INT7 9 PC1/A9 37 E
D4 11
4 IC3/INT7/PE7 D5 12 DB4
PC2/A10 38 PC3/A11
3 D6 13 DB5
SCL/INT 0 25 PC3/A11 39 D4
2 SCL/INT0/PD0 D7 14 DB6
SDA/INT1 26 PC4/A12 40 D5
1 SDA/INT1/PD1 DB7
RXD 27 PC5/A13 41 D6
RXD1/INT2/PD2 PC6/A14
TXD 28 42 D7
TXD1/INT3/PD3 PC7/A15 RS 4
IC1 29 _RS
J IC1/PD4 R/W 5
XCK1 30 XCK1/PD5 R/W
E 6
VSS
3 T1 31 17 OC2/OC1C E
T1/PD6 PB7/OC2/OC1C 16
2 FREQ T2 32 OC1B
T2/PD7 PB6/OC1B 15
1 OC1A
1
ADC0 61 PB5/OC1A 14 OC0
ADC0/PF0 PB4/OC0 13
ADC1 60 MISO
ADC1/PF1 PB3/MISO 12
ADC2 59 MOSI
JTAG ADC2/PF2 PB2/MOSI 11
ADC3 58 SCK
2 1 TCK ADC3/PF3 PB1/SCK 10 EXT2
TCK 57 SS
+5V 4 3 TDO ADC4/TCK/PF4 PB0/SS
TMS 56 PA7/AD7 14 13 PC3/A11
RESET 6 5 TM S ADC5/TMS/PF5
TDO 55 OC2/OC1C 12 11 OC1B
8 7 +5V ADC6/TDO/PF6
TDI 54 43 PG2/ALE OC1A 10 9 OC0
10 9 TDI +5V ADC7/TDI/PF7 PG2/ALE 34 PG1/RD MISO 8 7 MOSI
64 PG1/RD 33 PG0/WR SS 6 5 PG2/ALE
AVCC PG0/WR 1 +5V PG1/RD 4 3 PG0/WR
R13 AREF 62 PEN/ 2 1
ADC AVREF R1
ADC3 6 5 ADC2 NA 10K +5V
ADC1 4 3 ADC0
C8 C4 63 AGND
GND
2 1 AREF
100n 100n
22
53
ATMEGA128
+12V
REL_CON LED
+5V 3
2
1 D12
R6 R10
4.7K 1N4004
T2 R5 REL 2K
T XD RXD
BC856
10K R7 T1 T3 R11 RELAY
BC846 +5V BC846
DB9-RS232 10K 1K
1 R4 D13
4.7K FREQ
6 2
D8 D9 1
1N4148 R19
7 3 R12 FREQ
1N4148 2 22K
8 4 47K
9 5 1N4148 D14 R18
C7
1N4148 100K
10uF/25VDC
+
POWER SUPPLY CIRCUIT:
The power supply of AVR-MT128 is taken from Power jack connector. You
should apply 9 VAC or +12 VDC at the positive central pin.
The consumption of the board is about 30 mA.
RESET CIRCUIT:
AVR-MT128 reset circuit is made with ZM33064 with typical threshold
4.5V. When the voltage falls bellow that minimum, the MSU resets.
CLOCK CIRCUIT:
Quartz crystal 16MHz for maximum performance is connected to
ATMega128 pin 23 (XTAL2) and pin 24 (XTAL1).
Additional 32 768 Hz tact generator is connected to ATMega128 pin 18
(TOSC2/PG3) and pin 19 (TOSC1/PG4) and supplies the Real Time Clock.
JUMPER DESCRIPTION:
J
This jumper supplies the input user frequency FREQ to either
pin 31 (T1/PD6) or pin 32 (T2/PD7). When 1-2 is shorted the input
frequency pin is connected to T2. When 2-3 is shorted the input frequency pin is
connected to T1.
INPUT/OUTPUT:
JTAG:
1 TCK
2 GND
3 TDO
4 +5V
5 TMS
6 RESET
7 +5V
8 NC
9 TDI
10 GND
TDI Input Test Data In. This is the serial data input for the shift register.
TDO OutputTest Data Out. This is the serial data output for the shift register. Data is
shifted out of the device on the negative edge of the TCK signal.
TMS Input Test Mode Select. The TMS pin selects the next state in the TAP state
machine.
TCK Input Test Clock. This allows shifting of the data in, on the TMS and TDI pins. It is
a positive edge triggered clock with the TMS and TCK signals that define the internal state of
the device.
ICSP:
1 PDI
2 +5V
3 NC
4 GND
5 RST
6 GND
7 SCK
8 GND
9 PDO
10 GND
PDI Input Program Data In. This pin is serial data input for the MCU.
PDO OutputProgram Data Out. This pin is serial data output from the MCU.
SCK I/O Serial (Synchronization) Clock. This is the synchronization signal.
DB9-RS232:
1 NC
2 TXD
3 RXD
4 NC
5 GND
6 NC
7 NC
8 NC
9 NC
TXD OutputTransmit Data. This is the asynchronous serial data output for the RS232
interface.
RXD Input Receive Data. This is the asynchronous serial data input for the RS232
interface.
RS232:
1 TXD
2 RXD
3 GND
4 +5V
RELAY_CONNECTOR:
FREQ:
1 FREQ
2 GND
DALLAS:
1 DALLAS
2 GND
1 AREF
2 GND
3 ADC0
4 ADC1
5 ADC2
6 ADC3
EXT1:
1 GND
2 +5V
3 XCK0/AIN0
4 OC3A/AIN1
5 OC3B/INT4
6 OC3C/INT5
7 T3/INT6
8 IC3/INT7
9 SCL/INT0
10 SDA/INT1
11 IC1
12 XCK1
13 T1
14 T2
EXT2:
1 GND
2 +5V
3 PG0/WR
4 PG1/RD
5 PG2/ALE
6 SS
7 MOSI
8 MISO
9 OC0
10 OC1A
11 OC1B
12 OC2/OC1C
13 PC3/A11
14 PA7/AD7
PWR:
1 PWR
2 GND
Revision history:
REV.A - created September 2008
Disclaimer:
© 2008 Olimex Ltd. All rights reserved. Olimex®, logo and combinations thereof, are
registered trademarks of Olimex Ltd. Other terms and product names may be trademarks of
others.
The information in this document is provided in connection with Olimex products. No
license, express or implied or otherwise, to any intellectual property right is granted by this
document or in connection with the sale of Olimex products.
Neither the whole nor any part of the information contained in or the product described in
this document may be adapted or reproduced in any material from except with the prior
written permission of the copyright holder.
The product described in this document is subject to continuous development and
improvements. All particulars of the product and its use contained in this document are
given by OLIMEX in good faith. However all warranties implied or expressed including but
not limited to implied warranties of merchantability or fitness for purpose are excluded.
This document is intended only to assist the reader in the use of the product. OLIMEX Ltd.
shall not be liable for any loss or damage arising from the use of any information in this
document or any error or omission in such information or any incorrect use of the product.