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ST952

D.A.A. LINE INTERFACE

.. HOOK SWITCH DRIVER


PRELIMINARY DATA

. RING INDICATOR
LINE INTERFACE
- DC TERMINATION (4V AT 20mA)
- 2W/4W HYBRID CONVERTER
- FLAT FREQUENCY RESPONSE DOWN TO

. 10Hz FOR 56Kps MODEM


INTERFACE WITH CAPACITIVE ISOLATION TQFP32 (7 x 7 x 1.4mm)

.. BARRIER
CALLER ID INTERFACE
DIGITAL PHONE LINE OR OVER LOOP
(Thin Plastic Quad Flat Pack)
ORDER CODE : ST952TQF7

. CURRENT LIMIT DETECT


PHONE LINE IN USE CHECK
If CLID external transistor switch is enabled, a
limited amount of current, less than 1mA, is drawn
from the line.

..
APPLICATIONS
MODEMS UP TO V.34, 33.6KBPS AND 56Kbps
In off-hook state, ST952 DC voltage, 4V at a 20mA
line current, allows to interface with most of public

..
PCMCIA CARDS
FAX MACHINES
networks in the world.
The return loss is externally adjustable to real or

..
PERSONAL DIGITAL ASSISTANTS
ANSWERING MACHINES
complex impedance.
In case of a wrong connection in a digital phone
line, ST952 detects the over current value and

.
HIGH FEATURE PHONES
WEBPHONES AND SET TOP BOXES
sends to ST75951 an alert signal through the ca-
pacitive isolation barrier.
Before starting a line connection, ST952 is abled
DESCRIPTION to check if the line is used by an other terminal
ST952 is a line interface designed to implement connected on the same telephone line.
Modem application up to 56Kbps and Voice appli- PIN CONNECTIONS
cations.
VDREF

ST952 interfaces between telephone line and ca-


TER2

COM
IREF

OHC

IDC

pacitive isolation barrier.


NC
NC

A complete D.A.A. is made with ST75951 which


interfaces between capacitive isolation barrier and
the DSP or HSP signals. 16 15 14 13 12 11 10 9

TER1 17 8 LIM1
Tip
SET 18 7 LIM2
Digital
VDR 19 6 TOFF
ST75951 ST952
LINE 20 5 D6
952-02.EPS

Signals IDG 21 4 D5
Ring
IDI 22 3 RIN
LINI 23 2 D4
It incorporates Krypton Isolation Inc. patented sili-
GAIN 24 1 D3
con DAA technology.
The ring burst signal is detected by ST952 and is sent 25 26 27 28 29 30 31 32
to ST75951 through the capacitive isolation barrier.
Using the control signals given by ST75951, through
952-01.EPS
LCOM

LCOM
AIN
AOUT
NC
NC
D1
D2

the capacitive isolation barrier, ST952 activates the


off-hook or the CLID external transistor switch.

December 1998 1/12


This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
ST952

PIN LIST
Pin Number Name Type Description
1 D3 Output Isolation Signal Output
2 D4 Output Isolation Signal Output
3 RIN Input Ring Signal Input
4 D5 Input Isolation Control Signal Input
5 D6 Input Isolation Control Signal Input
6 TOFF Supply Internal Reference Supply
7 LIM2 Input Loop Current Limiter Control
8 LIM1 Output Loop Current Limiter Control
9 IDC Output Caller ID Control Output
10 COM Output Off-hook & ID Commun Output
11 OHC Output Off-hook Control Output
12 N.C. - Not Connected
13 N.C. - Not Connected
14 IREF Input Current Reference Setting
15 VDREF Supply Internal Reference Pin
16 TER2 Output Current Regulator Control Feedback
17 TER1 Output Current Regulator Control Output
18 SET Input Current Regulator Filter
19 VDR Supply Line DC Voltage Regulator
20 LINE Output Line AC Signal Output
21 IDG Input Caller ID Voltage Reference Input
22 IDI Input Caller ID Signal Input
23 LINI Input Line AC Signal Input
24 GAIN Input Transmit Gain / Trans-Hybrid Loss Set
25 LCOM Ground Line Side Common Ground
26 AIN Input Analog Transmit Signal Input
27 AOUT Output Analog Transmit Signal Output
28 N.C. - Not Connected
29 N.C. - Not Connected
30 D1 Input Isolation Signal Input 952-01.TBL

31 D2 Input Isolation Signal Input


32 LCOM Ground Line Side Common Ground
Note : Pins 12, 13, 28 and 29 must be left opened.

2/12
ST952

PIN DESCRIPTION
D1 - D2 RIN
These pins input the AC signal modulated at Fmod During the ring burst, a 1MHz oscillator is powered
coming from ST75951 through the capacitive iso- on this pin and a 6VPP/1MHz signal is sent on D3
lation barrier. and D4 to indicate the ring presence.
D3 - D4 IREF
These pins output the AC signal modulated at Fmod Internal reference current source setting, R4 must
in off-hook mode and at Fmod/2 in CLID mode to be equal to 82kΩ.
ST75951 through the capacitive isolation barrier.
VDR
In ring mode, these pins output the ring information,
a differential 6VPP/1MHz signal. Power supply for the transmit and receive paths in
Off-Hook mode.
D5 - D6
VDREF
These control pins input a 5VPP/Fmod signal com-
ing from ST75951 through the capacitive isolation Internal resistor reference.
barrier. SET
These signals control the off-hook and CLID exter- Line gyrator AC/DC filter.
nal transistor switches and are sent to the internal
transmit demodulator and receive modulator. OHC
Off-hook mode is enabled with a 5VPP/Fmod signal When D5 and D6 inputs a 5VPP/Fmod signal in
sent on D5 and D6 inputs with an opposite phase opposite phase, this pin puts ON the hook switch
(see Figure 1). With a dedicated application it is external Q1/Q2 transistor stage.
possible to reduce the input level to 3VPP. IDC
CLID mode is enabled with a 5VPP/Fmod signal When D5 input a 5VPP/Fmod signal, this pin puts
sent on D5 input only (see Figure 2). With a dedi- ON the CLID external Q3/Q4 transistor stage.
cated application it is possible to reduce the input R2 limits the line current in CLID mode at 1mA
level to 3VPP. max.
Figure 1 COM
Commun output for off-hook and CLID external
D5
5V transistor stages
Fmod

TER1 - TER2
These pins control the external Q5 transistor, in
952-03.EPS

D6 5V
Fmod which the main part of the line current goes
through to meet the line DC, V = f(IL), termination
requirements.
LINE
DC positive line connection and line AC signal output. IDI
Line AC signal input in CLID mode.
LCOM
Negative line connection. IDG
Power supply for the receive path in CLID mode.
LINI
Line AC signal input in off-hook mode. LIM1 - LIM2
200mA over current detection for device protection.
AIN - AOUT
The transmit signal coming from AIN pin is injected TOFF
in AOUT pin to the 2W/4W internal converter stage. Internal Reference Supply.
The line echo is minimized if R3, connected be- Figure 2
tween LINE and VDR pins is equal to 620Ω.
GAIN 5V
D5
952-04.EPS

Fmod
R1 connected on this pin fixes the transmit gain.
The R1 recommanded value, on a 600Ω AC line D6
termination, is 82Ω.
3/12
4/12
ST952

C8

Tip
AOUT AIN
BLOCK DIAGRAM

27 26
ST952 R8

Output C6
D1 Amplifier LINE
30 HIGH PASS LOW PASS 20 Q1
FILTER FILTER GAIN
31 24 R5
D2
Ring
Fmod R1

C1
D3
1 2W/4W 23
LINI Q3
CONVERTER
2 & HYBRID 22
D4 IDI R6
ST75951 C2

IDG R2
RIN RING CLID 21
3 DETECT REFERENCE R3 Q2 Q4 Q5
Fmod VOLTAGE

19
VDR C3
D5 15 R7
4 OFF-HOOK
CLID & OFF-HOOK CURRENT REFERENCE VDREF C4
SWITCH CONTROL LIMITER VOLTAGE
5 14
D6 IREF
R4
32 25 6 10 11 9 7 8 16 17 18 C5

IDC
C7

LIM2

OHC
LIM1

COM
TER2
TER1

TOFF

LCOM
LCOM
SET

C9
R9

952-05.EPS
ST952

ABSOLUTE MAXIMUM RATING (AGND = DGND = 0V, all voltages with respect to 0V)
Symbol Parameter Value Unit
VMLINE Positive Line Voltage Continuous 14 V

952-02.TBL
Toper Operating Temperature 0, +70 °C
Tstg Storage Temperature -55, +150 °C

THERMAL DATA

952-03T.BL
Symbol Parameter Value Unit
o
Rth (j-a) Junction-ambient Thermal Resistance Max. 80 C/W

ELECTRICAL CHARACTERISTICS (Tamb = 25oC, unless otherwise specified)


Symbol Parameter Test Conditions Min. Typ. Max. Unit
DC AND AC TERMINATION (see Figure 3)
VLINE Line Voltage IL = 20mA 4.1 V
IL = 120mA 10.5 V
ZLOSS Return Loss IL = 20mA, VLAC = -6dBV dB
f = 200 to 4000Hz 24 dB
RECEIVE PATH (IL = 20mA, f = 1kHz, see Figure 4)
Grx Receive Gain VLAC = 0dBV, VTAC = 0 -0.5 0 0.5 dB
Grf Receive Frequency Response VLAC = 0dBV, VTAC = 0
f = 200 to 3400Hz -0.1 +0.1 dB
f = 50 to 200Hz -0.5 +0.5 dB
Rxhd Receive 2nd/3th/4th Harmonic Distortion VLAC = 0dBV, VTAC = 0
f = 150Hz -79 dBV
f = 1000Hz -82 dBV
Thl Trans-Hybrid Loss VLAC = 0, VTAC = -6dBV, 30 35 dB
Fmod = 1.5MHz
Rn Receive Noise Floor VLAC = VTAC = 0, -93 dBV
f = 200-3400Hz, 100Hz BW
TRANSMIT PATH (IL = 20mA, f = 1kHz, VLAC = 0, see Figure 4)
Gtx Transmit Gain VTAC = -6dBV -0.5 0 0.5 dB
Gtf Transmit Frequency Response VTAC = -6dBV, f = 200 to 4000Hz -0.2 +0.2 dB
Txhd Transmit 2nd/3th/4th Harmonic Distortion VTAC = -6dBV, Fmod = 1.5MHz -82 dBV
Txmax Max Line Drive Voltage 3 VPP
Tn Transmit Noise Floor VTAC = 0, -93 dBv
f = 200-3400Hz, 100Hz BW
POWER AND DC LOGIC INPUT (see Figure 5)
ILINE Line Current ST952 Line Pin + Ic(Q5) 10 120 mA
VOFH Hook Switch Input D5 and D6 Input
Active (Off-hook) 2.7 5.25 V
Inactive (On-hook) 0.8 V
VCLID CLID Input D5 Input
Active (CLID On) 2.7 5.25 V
Inactive (On-hook) 0.8 V
CALLER ID RECEIVE PATH (see Figure 6)
GRID CLID Receive Gain VTAC = -15dBV -1 0 +1 dB
ILID CLID Line Current 1 mA
RING INDICATOR (see Figure 7)
952-04.TBL

VRIOF D3 & D4 Ring indicator D3 = D4 = 0 8 V


VRION D3 = D4 = 3VPP 18 V
Note : D3 and D4 are complementary outputs.

5/12
6/12
ST952

Figure 3 : Test 1

1m F

IAC
AOUT AIN
27 26
ST952
S1
VACLINE
Output IL + IAC 600W
Amplifier LINE BC
D1 30 HIGH PASS LOW PASS 20 557
FILTER FILTER GAIN 100m F
D2 31 24 47kW
IL
VLAC

82W
Fmod

1m F
D3 S1 opened :
1 2W/4W 23 BC
CONVERTER LINI 557 - VLINE at IL = 20 & 120mA
2 & HYBRID 22
IDI
47kW

D4 1nF S1 closed :
- ZLOSS measured
VACLINE
IDG 47kW ZTER =
IAC
RING CLID 21
RIN 3 BC BC BC ZTER + 600
DETECT REFERENCE 620W ZLOSS = 20.log
547 547 547 ZTER - 600
Fmod VOLTAGE

19
VDR 47m F
39W

D5 OFF-HOOK 15
VD5/1.5MHz 4 CLID & OFF-HOOK CURRENT VDREF 100nF
REFERENCE
SWITCH CONTROL LIMITER VOLTAGE
VD6/1.5MHz 5 14
D6 IREF
82kW
32 25 6 10 11 9 7 8 16 17 18 4.7m F

IDC
LIM2

OHC
LIM1

COM
TER2
TER1

TOFF

LCOM
LCOM
SET

100nF

952-06.EPS
Figure 4 : Test 2

1m F

AOUT AIN
27 26
ST952
VACLINE
Output
D1 Amplifier BC 100m F
LINE
1.5MHz 30 HIGH PASS LOW PASS 20 557
VTAC GAIN
DEMODULATOR FILTER FILTER 47kW
31 24
600W

D2
20mA

82W
Fmod
VLAC
1m F
D3
1 2W/4W 23 BC
1.5MHz LINI
VRAC CONVERTER 557
DEMODULATOR VRAC
2 & HYBRID 22 Gr = 20.log and VTAC = 0
IDI
47kW

D4 1nF VACLINE
VACLINE
Gt = 20.log and VLAC = 0
IDG 47kW VTAC
RING CLID 21
RIN 3 BC BC
DETECT REFERENCE 620W
BC thl = 20.log VACLINE @ V = 0
LAC
547 547 547 VRAC
Fmod VOLTAGE

19
VDR 47m F
39W

D5 OFF-HOOK 15
5V/1.5MHz 4 CLID & OFF-HOOK CURRENT VDREF 100nF
REFERENCE
SWITCH CONTROL LIMITER VOLTAGE
5V/1.5MHz 5 14
D6 IREF
82kW
32 25 6 10 11 9 7 8 16 17 18 4.7m F

IDC
LIM2

OHC
LIM1

COM
TER2
TER1

TOFF

LCOM
LCOM
SET

100nF

7/12
ST952

952-07.EPS
8/12
ST952

1m F
Figure 5 : Test 3

AOUT AIN
27 26
ST952

Output
Amplifier BC 100m F
LINE
D1 30 HIGH PASS LOW PASS 20 557
FILTER FILTER GAIN
D2 31 24 47kW
600W

ILINE

82W
Fmod

1m F
D3
1 2W/4W 23 BC
CONVERTER LINI 557
2 & HYBRID 22
IDI
47kW

D4 1nF

IDG 47kW
RING CLID 21
RIN 3 BC BC BC
DETECT REFERENCE 620W
547 547 547
Fmod VOLTAGE

19
VDR 47m F
39W

D5 OFF-HOOK 15
VD5/1.5MHz 4 CLID & OFF-HOOK CURRENT VDREF 100nF
REFERENCE
SWITCH CONTROL LIMITER VOLTAGE
VD6/1.5MHz 5 14
D6 IREF
82kW
32 25 6 10 11 9 7 8 16 17 18 4.7m F

IDC
LIM2

OHC
LIM1

COM
TER2
TER1

TOFF

LCOM
LCOM
SET

100nF

952-08.EPS
1m F
Figure 6 : Test 4

AOUT AIN
27 26
ST952
VACLINE
Output
Amplifier BC 100m F
LINE
D1 30 HIGH PASS LOW PASS 20 557
FILTER FILTER GAIN
D2 31 24 47kW
600W

1mA

82W
Fmod
VLAC
1m F
D3
1 2W/4W 23 BC
0.75MHz LINI
VRAC CONVERTER 557
DEMODULATOR
2 & HYBRID 22 VRAC
IDI Grid = 20.log
47kW

D4 1nF VACLINE

IDG 47kW
RING CLID 21
RIN 3 BC BC BC
DETECT REFERENCE 620W
547 547 547
Fmod VOLTAGE

19
VDR 47m F
39W

D5 OFF-HOOK 15
VD5/1.5MHz 4 CLID & OFF-HOOK CURRENT VDREF 100nF
REFERENCE
SWITCH CONTROL LIMITER VOLTAGE
D6 5 14
IREF
82kW
32 25 6 10 11 9 7 8 16 17 18 4.7m F

IDC
LIM2

OHC
LIM1

COM
TER2
TER1

TOFF

LCOM
LCOM
SET

100nF

9/12
ST952

952-09.EPS
ST952

Figure 7 : Test 5
1m F

AOUT AIN
27 26
ST952

Output
Amplifier LINE BC
D1 30 HIGH PASS LOW PASS 20 557
FILTER FILTER GAIN
D2 31 24 47kW

82W
Fmod

1m F
D3 1 2W/4W 23 BC
CONVERTER LINI 557
D4 2 & HYBRID 22

47kW
IDI
1nF

IDG 47kW
RIN RING CLID 21
3 DETECT BC BC BC
REFERENCE 620W
547 547 547
Fmod VOLTAGE
10kW

19
VDR 47m F

39W
Ur
OFF-HOOK 15
D5 4 CLID & OFF-HOOK CURRENT VDREF 100nF
REFERENCE
SWITCH CONTROL LIMITER VOLTAGE
D6 5 14
IREF
82kW
32 25 6 10 11 9 7 8 16 17 18 4.7m F
OHC
LCOM

LCOM

LIM2

TER2

TER1
COM
TOFF

LIM1
IDC

SET

100nF

952-10.EPS
For Ur = V1, no signal on D3/D4
For Ur = V2, 6VPP/1MHz on D3/D4

10/12
ST952

TYPICAL APPLICATION (5V Supply on ST75951)


Tip
10W

SMTPA 47nF
270

ST952
22kW

D4 D5
1m F
Q1 23 LINI
D6 D7 47kW
13V
Ring 82W ST75951
24 GAIN
D1 30 35 D1
Q2 11 OHC
22kW 47kW D2 31 34 D2 MCLK 8

10 COM SCLK 2
47nF Q4 Q5 P
FS 3 R
Q3 17 TER1
O
DIN 46
D3 1 31 D3 C
16 TER2 E
DOUT 47
D4 2 30 D4 S
3 RIN
S
RESET 43
20 LINE O
1nF PWRDWN 11 R
22 IDI
HC1 9
47kW D5 4 27 D5
620W

21 IDG
D6 5 26 D6
9 IDC
LIM2 7
19 VDR
47m F

LIM1 8
15 VDREF
AOUT 27
14 IREF
1m F
100nF

18 SET AIN 26
4.7m F

25 LCOM
82kW
39W

32 LCOM

952-11.EPS
6 TOFF
100nF

11/12
ST952

PACKAGE MECHANICAL DATA


32 PINS - PLASTIC THIN QUAD FLAT PACK (TQFP)
A
A2
e A1
32 25
0,10 mm
.004 inch
1 24 SEATING PLANE

B
E3
E1
E
8 17

c
9 16
D3
D1
D L1
L
0,25 mm

PM-5V.EPS
.010 inch
GAGE PLANE
K

Millimeters Inches
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 1.60 0.063
A1 0.05 0.15 0.002 0.006
A2 1.35 1.40 1.45 0.053 0.055 0.057
B 0.30 0.37 0.45 0.012 0.015 0.018
C 0.09 0.20 0.004 0.008
D 9.00 0.354
D1 7.00 0.276
D3 5.60 0.220
e 0.80 0.031
E 9.00 0.354
E1 7.00 0.276
E3 5.60 0.220
L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1.00 0.039
5V.TBL

K 0o (Min.), 7o (Max.)

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems
without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics

© 1998 STMicroelectronics - All Rights Reserved

Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent.
Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.

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