8051 Timers1

Chapter 3
8051/8031 Family MCU

Architecture
Port P1 Lesson 4 Port P3 Port P2
T2 Timer Counter (8052)

T1 Timer/Counter
SI
Port P0
T0 Timer Counter
WDT
Ch03L4-"Microcontrollers....", Raj
Kamal, from Pearson Education,
2005
A Timer
Timer is a counter getting

constant interval periodic inputs
from a clock source
2005
Timer
A timer Example overflow
interrupt if
not
n-bit counter masked, an
ISR
executes
Example Overflows
after 2n
Clock Inputs period = 1 clock
µs inputs if
initial
for 12 MHz XTAL count bits
all 0s.
2005
A Counter
Counter is a timer getting

irregular interval inputs from
an event source
2005
Counter
A Counter Example overflow
interrupt if
not
n-bit counter masked, an
ISR
executes
Example Overflows
after 2n
Count Inputs from a count
source on the events inputs if
initial
count bits
set = all 0s.
2005
8051/8052 Timing/Counting Devices –
T1 and T0 and T2
2005
Outline
• Timers T1 and T0 and overflows,
masking and priorities of their
interrupts
• T2 (8052)
• Modes 0, 1, 2 and 3
• Timers Control and
2005
Timer-Counter T1/T0 SFRs Register
T1/T0 16-bit in SFRs T1/T0 16-bit in SFRs
8DH 8CH 8BH 8AH
Write/Read upper bits Write/Read lower

bits
2005
TF1 and TF0 bit at
TCON.7 and
TCON.5 and a TF
T1/T0 Timer/Counter resets on an ISR
start
Features stop, reload, ET1 at

internal/external IE.3 = 1
clocking/event-inputs enables T1
interrupt.
Overflow transition to
ET0 at
all bits = 0s
IE.1 = 1
enables T0
interrupt
T1/T0 can gets inputs from external
inputs.
T1/T0 can be externally gated to run
T1/T0 can be stopped, Can be written
for load. Can be read on instruction
for move, store or add or other
executes.
Inputs period = 1 µs for 12 MHz XTAL
when internal timer clocking mode is
used.
T1/T0 Increments by -ve edges when
TR1/TR0 written = 1 at
TCON.6/TCON.4, respectively
Event counter T1 and T0 gets count

inputs from T1 and T0 pin (P3.5 and
P3.4) or from the system Internal clock
PT1 at IP.3 = 1 enables priority high for T1
interrupt. PT0 at IP.1 = 1 enables priority
high for T0 interrupt.
Outline
interrupts
• T2 (8052)
• Modes 0, 1, 2 and 3
• Timers Control
2005
Timer-Count T2 SFRs
T2 16-bit SFRs
TH2 TL2
CDH CCH
Write/Read upper bits
Write/Read lower
-ve edge inputs bits
2005
Six Timer2 Functions
RCLK
Timer Counter
16-bits TCLK 16-bits
Reload the Load
Input Capture
preset from
T2 16-bits at
value again SFRs
SFRs RCAP2H
on overflow RCAP2H
and RCAP2L on
and restart and
an external input
RCAP2L
edge
2005
An Input Capture of Timer Timer
capture
Clock Inputs interrupt if
not
16-bit counter masked, an
ISR
executes
16-bit Capture
Register
An edge forcing coping of the
counter reading into Capture
Register if capture enabled
2005
A Reload of Counter on an input
Count Inputs
Timer
reload
16-bit counter interrupt if
not
16-bit Load masked, an
Register ISR
executes
An edge forcing coping of the
into counter starting value from
Load Register if capture
enabled Ch03L4-"Microcontrollers....", Raj
2005
Reload-Capture T2 SFRs
T2 16-bit SFRs
RCAP2H RCAP2L
CBH CAH
Write/Read upper bits
Write/Read lower
-ve edge input bits
capture
2005
Outline
• Timers T1 and T0 and overflows ,

interrupts
• T2 (8052)
• Modes 0, 1, 2 and 3
• Timers control
2005
Timer-counter T1 16- bits
timer-
8- bits counter
Mode 0 Mode 1 Mode 2 8- bits
TH1 counts after pre TL1 counts the

scaling by factor of 32 count/clock
inputs. TL1
Pre-scaling means the
loads counts
counts or clock-inputs
from TH1 on
divide by 32 before TH1
start and on
gets the inputs.TL1 does
each overflow
prescaling
Timer-counter T1
16- bits
8- bits 8- bits
Mode 0 Mode 1 Mode 2 Mode

3
T1 stopped (frozen) as TH0
functions as 8-bit timer-
counter in place ofT1
TL0 as 8-bit timer-counter T0
Timer-counter T0
16- bits
8- bits 8- bits

3
TH0 counts after pre TL0 counts the
scaling by factor of count/clock inputs
32
Pre-scaling means TL0 loads counts
the counts or clock- from TH0 on start
inputs divide by 32 and on each overflow
before TH0 gets the
inputs TL0 does pre-scaling
Timer-counter T0
16- bits
8- bits 8- bits

3
T1 stopped (frozen) as TH0
T0-Two 8- functions as an 8-bit timer-
bits counter in place ofT1
timers/ TL0 as another 8-bit timer-
counters counter T0
Write 4 mode/control bits in 8-bit
TMOD for the timerT1 and Write 4
mode/control bits in 8-bit TMOD for
the timerT0
2005
TMOD SFR at 89H T1 mode sets =
GT1 Gate C/T1 0, 1, 2 or 3 by
M1-M0
b7 b6 b5-b4 b3 b2 b1-b0
GT0 Gate C/T0
T0 mode sets = 0, 1, 2 or 3
by M1-M0
Set T1/T0 Mode and control bits

2005
GT1 bit = 1 disables T1 gate1 pin input
GT1, T1 runs only by TR1 bit set =
1.When bit = 0, T1 run enables after gate1
pin input = 0 after the TR bit is set
GT0 bit = 1 disables T0 gate0 pin input
GT0, T0 runs only by TR0 bit set =
1.When bit = 0, T0 enables run after gate0
pin input = 0 after the TR bit is set
Define disable/enable T1/T0 gate input
2005
C/T1 bit = 1 disables internal clock inputs,
T1 runs by external count-inputs at T1
pin.When bit = 0, enables internal clock
inputs to T1, disable T1 pin inputs
C/T0 bit = 1 disables internal clock
inputs, T0 runs by external count-inputs
at T0 pin.When bit = 0, enables internal
clock inputs to T0, disables T0 pin inputs.
Defining T1/T0 as counter or timer

2005
Outline
interrupts
• T2 (8052)
• Modes 0, 1, 2 and 3
• Timers control
2005
TCON: T1-T0 Control and status SFR
Flags TCON 8-bit SFR
TF1-TF0
at bit7- IT0-IE0 bit0-bit1
88H
bit5
Bit Addresses 88H-8FH bit5-bit4 set then
define the RCLK-
Write/Read
TCLK for SI baud
TR1-TR0 at bit 6-bit 4 rates using T2 else
run the T1-T0 T1 defines baud
IT1-IE1 bit2-bit3 rate
2005
Timer overflow Flags TF1-TF0 for
T1andT0 overflows
TCON.7 and TCON.5 show the flag
statuses
2005
Timer Run control TR1-TR0 for
T1andT0 run
TCON.6 and TCON.4 control the
running of T1-T0
2005
IE0 bit = 1 at TCON.0 enable interrupt
and = 0 disables at INT0 (GT0) pin
IE1 bit = 1 at TCON.3 enable -ve edge
transition interrupt and = 0 enables level
0 interrupt at INT1 (GT1) pin
Enable/disable Interrupt at INT0 /INT1

pin
2005
IT0 bit = 1 at TCON.0 enable -ve edge
0 interrupt at INT0 pin
IT1 bit = 1 at TCON.2 enable -ve edge
0 interrupt at INT1 pin
Defining Interrupt type at

INT0/INT1 pin
2005
T2 Control and status SFR
Flags T2CON 8-bit SFR
TF2-
CP/RL2 bit0,
EXF2 at C8H EXEN2 bit3
bit7-bit6
Bit Addresses C8H- bit5-bit4 set then
CFH define the RCLK-
Write/Read
TCLK for SI baud
TR2 at bit 2 = 2 runs rates using T2 else
the T2 T1 defines baud
C/T2 bit1 rate
2005
C/T2 bit = 1 at T2CON.1 disables internal
clock inputs, T2runs by external count-
inputs at T2 pin.When bit = 0, enables
internal clock inputs to T1, disable T1 pin
inputs
Defining T2 as counter or timer
2005
Timer overflow Flag TF2 for T2
overflow
T2CON.7 shows the flag status
2005
EXEN at T2CON.2 enables external input
capture or reload by -ve edge at P1.1
T2EX/INT2 pin
Timer Capture Flag EXF2 = 1 a -ve edge at
P1.1 causes input capture of T2 and T2 saves
at RCAP2H-RCAP2L provided EXEN control
bit is 1 and when CP/RL2 (T2CON.0) = 1
(defined for capture)
Timer Capture Flag EXF2 = 1 a -ve edge at
P1.1 pin forces the T2 reload from RCAP2H-
RCAP2L provided EXEN control bit is 1 and
when CP/RL2 (T2CON.0) = 0 (defined for
reload) Ch03L4-"Microcontrollers....", Raj
2005
Summary
Timer DevicesT0 andT1
• T0 functions in 4 modes
• T1 functions in 3 modes
Four modes are 8-bit mode with pre-
scaling by 32, 16-bit mode, 8-bit
auto reload mode and two
independent 8-bit timers mode
Timers T0, T1 and T2 Actions
• T0, T1 and T2 overflows and interrupts
• T2 captures 16-bit T2 in RCAP2H-
RCAP2L on a reload input
• T2 reloads 16-bit from RCAP2H-
RCAP2L on a reload input
• T2 controls RCLK-TCLK in place of T1
for SI device
End of Lesson 4 on
8051/52 Timing Devices –
T0, T1 and T2,
THANK YOU
2005

8051 Timers1

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Chapter 3

8051/8031 Family MCU

T2 Timer Counter (8052)

Timer is a counter getting

Counter is a timer getting

8DH 8CH 8BH 8AH

Write/Read upper bits Write/Read lower

Features stop, reload, ET1 at

Event counter T1 and T0 gets count

• Timers T1 and T0 and overflows ,

Mode 0 Mode 1 Mode 2 8- bits

TH1 counts after pre TL1 counts the

Mode 0 Mode 1 Mode 2 Mode

Mode 0 Mode 1 Mode 2 Mode

Mode 0 Mode 1 Mode 2 Mode

Set T1/T0 Mode and control bits

Defining T1/T0 as counter or timer

Enable/disable Interrupt at INT0 /INT1

Defining Interrupt type at

Defining T2 as counter or timer

T2CON.7 shows the flag status

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