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II. Equipment
EE323 Lab 2 Panel Signal generator
Dual DC supply Dual trace oscilloscope
Decade Box Resistor Digital multimeter
III. Parameter
The transistor parameter, , shows large variations from device to device. It is also
affected by the transistor operating conditions (temperature and bias). For the
theoretical calculations in this laboratory you should use a mid-range value (say =
200)
R3
R1 C1/2 22k
Rdecade 1k 100nF
Q1
R2 C7/8
10k 47F
vs vin
R4 R6
vout
8.2k 3.3k
For the common collector amplifier shown above, perform the following tasks.
LAB REPORT
1. [1 mark] Draw the small signal model for the experimental circuit.
6. [3 marks] Measure the high and low frequency –3dB points for the
circuit. Use a 1k load resistance while making these
measurements. Calculate the theoretical high and low frequency –
3dB points and compare these values with those measured.
R3 R5 R7
22k 3.3k C5/6 100k
0.1F
vout
R1 C1/2
1k 100nF
Q1
R2 C7/8
10k 47F
vs vin
R4 R6 R8
8.2k 3.3k 100
For the common emitter amplifier shown above, perform the following tasks.
LAB REPORT
7. [1 mark] Draw the small signal model for the experimental circuit.
10. [4 marks] Increase the amplitude of the input until you observe
clipping in the output waveform caused by both saturation and cut-off
in the transistor. Record the output voltage levels at which cut-off
and saturation occur. Demonstrate that these values match with the
theoretical expectation.
11. [4 marks] Measure the high and low frequency –3dB points for the
circuit. Use a 10k load resistance for these measurements.
Calculate the theoretical high and low frequency –3dB points and
compare these values with those measured. Comment on how the
bandwidth of the common emitter amplifier compares to that of the
common collector amplifier.
ELEC3240 Electronics L4
Resistors
R1 1k
R2 10k
R3 22k
R4 8.2k
R5 3.3k
R6 3.3k
R7 100k
R8 100
R9 47
R10 1
Other Components
Q1 BC337 NPN BJT: 50 < hFE < 300 for IC = 1mA
Cbc 5pF for VCE 5V; fT 200MHz for IC 1mA
R3 R5 R7
22k 3.3k C5/6 100k
0.1F
R1
C1/2
1k 100nF
Q1
R9
R2 C3/4 C7/8 R8 47
10k 47F 47F 100
R4 R6 C9 R10
8.2k 3.3k 33F 1
ELEC3240 Electronics L5
Perform a “DC Operating Point” analysis of the following circuit. The value of the
drain current will equal the IDSS value for the JFET.
12V
1
12V
VSRC
Q1
3 2N5459
2
GND
Perform a “DC Transfer” analysis of this circuit varying the 5Vneg source from –8 to
0V in steps of 0.1V. By observing when the drain current starts to increase you can
determine the VP value for the JFET.
ELEC3240 Electronics L6
12V
1
Q1 12V
VG 3 2N5459 VSRC
2
5Vneg
VSRC
GND
LAB REPORT
1. [1 mark] Record IDSS value measured.
2. [1 mark] Record VP value measured.
Perform a “Vary Parameter” analysis of the circuit below, varying R2 from 5k to
600k in steps of 5k.
12V
R2
1k
VD
1
Q1 12Vpos
3 2N5459 VSRC
2
VS
R1
6.8k
GND
LAB REPORT
3. [2 marks] Measure and plot the load current / voltage
characteristic for the circuit (i.e. graph of IL versus VL). R2 is
effectively the load for this circuit. So you are to graph the
current through R2 versus the voltage across R2.
4. [1 mark] Calculate the theoretical value that load current should
be regulated to while the FET is operating in is forward active
region.
5. [2 marks] From the graph determine the current source
compliance. (The compliance is the range of voltages for which
the current source behaves as intended). Show what the
theoretical compliance range should be.
ELEC3240 Electronics L7
12V
R1 Rd
3.3k
1000K Cout
VD Vout
1
470n
Cin Q1 12Vpos
Vs Rs Vin VG 3 2N5459 VSRC
100K
2
47n Vso Rl
10KHz
VSIN 20K
R2 Rso Cso
Res1 6.8k
330k 10u
GND
LAB REPORT
6. [2 marks] Set the sinusoidal voltage source to 10mVpk 5kHz by
editing the voltage source model parameters. Perform a
“Transient Analysis” over an appropriate length of time and
observe source and output voltage waveforms. Measure the
voltage gain of the circuit.
7. [1 mark] Calculate the bias current in the FET using the IDSS and
VP values obtained in section III.
8. [1 mark] Calculate the transconductance parameter, gm, for the
small signal model.
9. [1 mark] Calculate the theoretical gain of the amplifier.
10. [4 marks] Increase the amplitude of the source to 2Vpk. Re run
the “Transient Analysis” and observe the voltage levels in the
output waveform at which the JFET enters its cut-off and triode
regions of operation. Demonstrate that these values match with
the theoretical expectation.
11. [4 marks] Measure the frequency response of the circuit by
running an “AC Small Signal Analysis” with a frequency range
1Hz to 200kHz. By observing Vout determine the high and low
frequency –3dB points for the circuit. Calculate the theoretical
high and low frequency –3dBpoints for the circuit (Note for the
JFET Cgs = 2.25pF and Cgd = 6pF).
ELEC3240 Electronics L8
II. Measurement
Construct the circuit below.
+10V
470k 1k Vo
11
9
10
LAB REPORT
1. [1 mark] For the circuit derive an equation for in terms of the voltage
across the collector resistor.
IL
1k Rdecade VL
1 5
2 4
3 3
ELEC3240 Electronics L9
LAB REPORT
3. [2 marks] Measure and plot the load current / voltage characteristic for
the circuit (i.e. graph IL versus VL). RL is effectively the load for this
circuit. So you are to graph the current through RL versus the voltage
across RL.
5. [1 mark] Calculate the theoretical load current for the current mirror,
while operating in its linear region, and compare this to the value
measured.
Repeat the previous measurements but for the current ratio mirror below. This time
vary RDECADE from 100 to 3.1k in steps of 200.
+10V
IL
1k Rdecade VL
1 5 11
2 4 9
3 3 10
LAB REPORT
9. [1 mark] Calculate the theoretical load current for the current mirror,
while operating in its linear region, and compare this to the value
measured.
10. [1 mark] From the Norton resistance measurements for the current
mirror and current ratio mirror estimate a value for the Early voltage
of the transistors.
ELEC3240 Electronics L10
1k 1k
Vout1 Vout2
8 11
Vin1 Vin2
6 9
7 10
10k 10k
10k
1 5
2 4
3 3
-10V
LAB REPORT
11. [3 marks] Connect a signal source (approx. 5Vpk 100Hz) at both vin1
and vin2 and measure the output voltages. Hence, measure the
common mode gain of the differential amplifier. Calculate the
theoretical common mode gain and compare this value with that
measured.
12. [3 marks] Connect a signal source (approx. 5mVpk 100Hz) to vin1 and
short vin2 to 0V. Hence, measure the differential mode gain of the
differential amplifier. Calculate the theoretical differential mode gain
and compare this value with that measured.
ELEC3240 Electronics L11
7 1 2 4
8 11 14
6 9 12
8 14 7 10 13
II. Equipment
EE421 complementary buffer experiment lab panel
Dual DC supply
Signal generator
Dual trace oscilloscope
For all parts of this experiment a 12V power supply should be used on the
complementary buffer experiment lab panel.
LAB REPORT
1. [4 marks] On the same graph record the input and output voltage
signals as a function of time. Identify and explain the key
differences between the input and output waveforms.
2. [2 marks] Change the load to R19 (22). Again graph the input and
output voltage waveforms on the same graph. Explain the effect of
the reduced load resistance on these waveforms.
LAB REPORT
V. Class AB Amplifier
Connect the signal generator to V1 and use R20 (1k) as the load connected to V0.
Use a triangular wave input (approx. 5Vpk 100Hz) as the voltage source.
LAB REPORT
6. [3 marks] On the same graph record the input and output voltage
signals as a function of time. Identify and explain the key
differences between the input and output waveforms. Compare the
amount of crossover distortion in the class B and AB amplifier
results
LAB REPORT
R8 C5
+VC
+VC C6
C1
R9
R2 R1 R15
U1
VO
V2
C2 R16
R10
Q1 -VC
C7
+VC
D1 R3
R17
V1 VO R11
C3
D2 R4
R18
R5 R12 Q3
Q2
V3 VO R19
Q4
R6
C4 R20
R13
R7 R14
C8
-VC
-VC
ELEC3240 Electronics L15
II. Equipment
EE421 op-amp experiment lab panel
Dual DC supply
Signal generator
Dual trace oscilloscope
For all parts of this experiment a 12V power supply should be used on the op-amp
lab panel.
R9
1k
Vin -
U2 Vout
+
R23
1k
LAB REPORT
R21
1M5
-
U2 Vout
+
LAB REPORT
- D1
U2
+ V*
Let Vin be a 5Vrms sine wave. Observe Vin, Vout and V* for two input frequencies (one
very low frequency, and one where the imperfections in the rectifying action are
obvious).
LAB REPORT
5. [2 marks] On the same graph plot Vin, Vout and V* for low
frequencies.
7. [2 marks] On the same graph plot Vin, Vout and V* for high
frequencies.
D4
D1
R11
10k
Vin -
U2 V*
+
Let Vin be a 5Vrms sine wave. Observe Vin, Vout and V* for high input frequencies
only (use the same frequency from part 10).
Warning Be careful of the wiring here. It is easy to get the polarity of the diodes
wrong.
LAB REPORT
9. [2 marks] On the same graph plot Vin, Vout and V* for high
frequencies.