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The MPU performs primarily four operations1. Memory READ: reads data (or instructions) from
memory.2. Memory WRITE: reads data (or instructions) into memory.3. I/O READ: accepts
data from input devices.4. I/O WRITE: send data to output devices.
To communicate with a peripheral (or memory location), the MPU needs to perform
thefollowing steps:
STEP 1: Identify the peripheral or the memory location (with its address)
STEP 2: Transfer data.
STEP 3: Provide timing or synchronization signals.
The 8085 MPU performs these functions using three sets of communication lines called
buses: the addr
ess bus, the data bus and the control bus (figure3.2). These buses are together toform one
group called the system bus
.
Address Bus
Control Bus
1. It comprised of various single lines that carries synchronization signals.
2. It performs the third function: providing time signals
The method by which the address of source of data or the address of destination of result is
given in the instruction is called Addressing Modes.
The term addressing mode refers to the way in which the operand of the instruction is
specified.
2. Register—This mode specifies the register pair that contains data. For example, MOV B,
C moves the contents of register C to register B.
3. Register Indirect—This mode contains a register pair which store the address of data
(the high-order byte of the address in the pair, and the low-order byte in the second). As
an example, LDAX B loads the accumulator with the contents of a memory location
addressed by B, C register pair.
5. Immediate—For an 8-bit datum, this mode uses 2 bytes, with the first byte as the OP
code, followed by 1 byte of data. On the other hand, for 16-bi data, this instruction
contains 3 bytes, with the first as the OP code followed by 2 byte of data. For example,
MVI B, 05 loads B with the value 5, and LXI H, 2050 loads H with 20h and L with 50H.
A JUMP instruction interprets the address that it would branch to in the following ways.
1. Direct—The JUMP instruction, such a JZ ppqq, uses direct addressing and contain 3
byte. The first byte is the OP code, followed by 2 byte of the 16-bit address where it
would branch to unconditionally or based on a condition if satisfied. For example JMP
2020 unconditionally branches to location 2020H.
2. Implied or Inherent Addressing –This JUMB instruction using the mode is 1 byte long.
A 16-bit register pair contains the address of the next instruction to be executed. The
instruction PCHL unconditionally branches to a location address by H, L pairs.
Instruction Cycle:The necessary steps that a CPU carries out to fetch an instruction and
necessary data from the memory,and to execute it constitute an Instruction Cycle.
It is defined as the time required to complete the execution of an instruction.8085
instruction cycle consist of 1-6 machine cycle.
Total time taken to completely execute any instruction.
(b) Explain the instruction set of 8085 with example. (Refer Book at Pg #33)
4. (a) Mention the procedure to find 2’s complement. Give example. (6)
(b) Draw Flow chart and write an assembly language program to multiply two numbers. (8)
(c) Explain the structure of assembly language program. (6)
5. (a) Explain in detail about various types of semiconductor memory. (12)
(b) Distinguish between hard disk and floppy disk. (8)
6. (a) Explain asynchronous data transfer in detail. Discuss the advantage of Parallel
transmission over serial transmission. (12)
(b) Distinguish between I/O mapped I/O and memory mapped I/O. (8)
Memory mapped IO is one where the processor and the IO device share the same memory
location(memory) while IO mapped IO is one where the processor and the IO device have
different memory located to each other.
In memory mapped I/O the I/O devices are mapped(identify for communication) through
memory address. The address of the port will stored in memory locations. In I/O mapped I/O
devices are mapped using the the port address.
Memory-mapped I/O uses the same address bus to address both memory and I/O devices,
and the CPU instructions used are same for accessing the memory and also accessing devices.
In order to accommodate the I/O devices, areas of CPU's addressable space must be reserved
for I/O.
IN IO mapped IO special class of CPU instructions are used for performing I/O./O devices have
a separate address space from general memory, either accomplished by an extra "I/O" pin on
the CPU's physical interface, or an entire bus dedicated to I/O.
In memory-mapped I/O single set of read and write lines are used while in I/O mapped I/O
different set of read and write lines are used.
In memory mapped I/O same set of memory instructions are used whereas in I/O mapped I/O
distinct set of instructions are used by input/output device or memory unit.
In memory mapped I/O decision making is difficult whereas its easy in later one.
memory mapped i/o require single address bus to address both memory and i/o device
whereas
i/o mapped i/o require two different bus
Memory mapped I/o means I/o devices addresses are mapped to memory i.e. these I/O can
be accessed like memory and all instructions related to memory can be used with these
devices. I/O mapped I/O have uniqe addresses and are called port. I/O mapped I/O uses only
two instructions viz IN and OUT. e.g. IN FEh or OUT 7Eh. This means FE h is port number in
hexadecimal number system. similarly 7E. These port numbers will be from 00h to FFh.
In memory mapped I/O the I/O devises are mapped same as internal memory devise. Port
devises are addressed same as memory and Instructions are also same for both. This is main
advantage of memory mapped I/O.
In port I/O the internal memory and I/O devises are mapped (addressed) differently. For fetch
I/O devise it used only two instructions IN and OUT.
4. (a) Explain the use of 1’s and 2’s complement in a binary system with an example. (10)
(b) How will you find 1’s and 2’s complement of a number. With an suitable example explain
the operation of addition and subtraction of a number by using 1’s complement.
5. (a) Explain the memory hierarchy in microprocessor. (10)
(b) Describe various read only memories. (10)
8. Define Active preventive maintenance and passive maintenance. Explain in detail. (20)
2009 Alagappa University B.C.A Computer Application MICROPROCESSOR AND PERSONAL
COMPUTERS Question paper
DISTANCE EDUCATION
B.C.A/B.C.A. (Lateral) DEGREE EXAMINATION, MAY 2009.
MICROPROCESSOR AND PERSONAL COMPUTERS
(2003 onwards)
DISTANCE EDUCATION
B.C.A. DEGREE EXAMINATION, MAY 2008.
MICROPROCESSOR AND PERSONAL COMPUTERS
(2003 onwards)
Time : Three hours Maximum : 100 marks
Answer any FIVE questions.
All questions carry equal marks.
(5 ´ 20 = 100)
(a)Compare Microprocess and Micro computer. (6)
(b) Write briefly on SSI, MSI and VLSI. (14)
(a)Write the general architecture of a microprocessor with illustration. (10)
(b) Discuss in detail on general and special purpose registers. (10)
(a)Write briefly on Interrupts. (8)
(b)Discuss the functional block diagram of 8085. (12)
(a)What are instruction set? Illustrate briefly (6)
(b)Write the addressing modes in 8085 and the functions of instructions. (14)
(a)Write briefly on control Instructions and Instructions cycle. (12)
(b)Explain on information movement instructions and instruction format. (8)
(a)Discuss in detail on ALP and 1s and 2s complement of numbers. (10)
b)Explain briefly on any three semiconductor memory family. (10)
(a)Illustrate in detail on memory mapped I/O and DMA. (10)
(b)Discuss in detail on 80486, SIMMS and EISA. (10)
(a)Explain in detail on BIOS, IDE and SVGA. (8)
(b)Illustrate in detail on Active and Passive preventive maintenance procedures. (12)