Académique Documents
Professionnel Documents
Culture Documents
Alignment Procedure
1. Alignment procedure (for function adjustment)
A. Preparation:
1. Setup input timing ICL-605, 32-Grays pattern.
2. Setup unit and keep it warm up at least 30 minutes.
B. Timing adjustment:
1. Enter factory setting area (press “ENTER”, “EXIT” and then press “SOFTPOWER”).
2. Check the settings to following values:
Contrast = 50
Brightness = 90
Volume = 30
OSD time = 20
Color = sRGB
Language = English
Then, turn off the monitor power.
3. Turn on power enter user area.
D. Color adjustment:
1. Setup input timing ICL-605, white pattern.
2. Measure color temperature by Minolta CA-110 (or equivalent equipment).
3. Alignment the color temperature Bluish, Reddish & sRGB. The color temperature
specification as follows:
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Alignment Procedure
4. Turns off the monitor power.
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F. Command definition:
PC Host will send 0x7C IIC slave address and then following 4 bytes command
I2C Send Command Byte1 Byte2 Byte3 Byte4
Write Contrast CA 55 Data checksum
Write Brightness CA 56 Data checksum
Write Red Gain CA 57 Data checksum
Write Green Gain CA 58 Data checksum
Write Blue Gain CA 59 Data checksum
Read Contrast C3 55 XX checksum
Read Brightness C3 56 XX checksum
Read Red Gain C3 57 XX checksum
Read Green Gain C3 58 XX checksum
Read Blue Gain C3 59 XX checksum
Write C1 (Bluish) R-Gain Data to NVRAM AA 3C Data checksum
Write C1 (Bluish) G-Gain Data to NVRAM AA 3D Data checksum
Write C1 (Bluish) B-Gain Data to NVRAM AA 3E Data checksum
Write C2 (sRGB) R-Gain Data to NVRAM AA 4C Data checksum
Write C2 (sRGB) G-Gain Data to NVRAM AA 4D Data checksum
Write C2 (sRGB) B-Gain Data to NVRAM AA 4E Data checksum
Write C3 (Reddish) R-Gain Data to NVRAM AA 5C Data checksum
Write C3 (Reddish) G-Gain Data to NVRAM AA 5D Data checksum
Write C3 (Reddish) B-Gain Data to NVRAM AA 5E Data checksum
Write User R-Gain Data to NVRAM AA 6C Data checksum
Write User G-Gain Data to NVRAM AA 6D Data checksum
Write User B-Gain Data to NVRAM AA 6E Data checksum
Read C1 (Bluish) R-Gain data from NVRAM A3 3C XX checksum
Read C1 (Bluish) G-Gain data from NVRAM A3 3D XX checksum
Read C1 (Bluish) B-Gain data from NVRAM A3 3E XX checksum
Read C2 (sRGB) R-Gain data from NVRAM A3 4C XX checksum
Read C2 (sRGB) G-Gain data from NVRAM A3 4D XX checksum
Read C2 (sRGB) B-Gain data from NVRAM A3 4E XX checksum
Read C3 (Reddish) R-Gain data from NVRAM A3 5C XX checksum
Read C3 (Reddish) G-Gain data from NVRAM A3 5D XX checksum
Read C3 (Reddish) B-Gain data from NVRAM A3 5E XX checksum
Read User R-Gain data from NVRAM A3 6C XX checksum
Read User G-Gain data from NVRAM A3 6D XX checksum
Read User B-Gain data from NVRAM A3 6E XX checksum
Change Color Temperature to C1 (Bluish) CC 1 XX checksum
Change Color Temperature to C2 (sRGB) CC 2 XX checksum
Change Color Temperature to C3 (Reddish) CC 3 XX checksum
Change Color Temperature to User CC 4 XX checksum
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Alignment Procedure
User mode to factory mode 1A 5A XX checksum
Auto Color (Offset1, Offset2, Gain) 1B 5A XX checksum
Factory mode to User mode 1E 5A XX checksum
Clear user area data 1F 5A XX checksum
On burn in mode CE 1 XX checksum
Off burn in mode CE XX* XX checksum
Change Language Setting 66 0~7 XX checksum
*: Any value except 1 can off burn-in mode
Read EEPROM Bank-0 B0 Address XX checksum
Read EEPROM Bank-1 B1 Address XX checksum
Read EEPROM Bank-2 B2 Address XX checksum
Read EEPROM Bank-3 B3 Address XX checksum
Read EEPROM Bank-4 B4 Address XX checksum
Read EEPROM Bank-5 B5 Address XX checksum
Read EEPROM Bank-6 B6 Address XX checksum
Read EEPROM Bank-7 B7 Address XX checksum
Write EEPROM Bank-0 B8 Address Data checksum
Write EEPROM Bank-1 B9 Address Data checksum
Write EEPROM Bank-2 BA Address Data checksum
Write EEPROM Bank-3 BB Address Data checksum
Write EEPROM Bank-4 BC Address Data checksum
Write EEPROM Bank-5 BD Address Data checksum
Write EEPROM Bank-6 BE Address Data checksum
Write EEPROM Bank-7 BF Address Data checksum
Note A: Byte4(Checksum) = Byte1 + Byte2 + Byte3
Note B: Data = The value write to MCU
Note C: XX = don't care, any value(<=0xFF).
Note D: The Byte-2 definition of “Change Language Setting” is as below,
0=DE, 1=EN, 2=ES, 3=FR, 4=IT, 5=JA, 6=繁中, 7=簡中
When PC Host sends 0x7D command to MCU, MCU must return as following (2 bytes)
Return Code R-Byte1 R-Byte2
Checksum error code FC AA
the above Byte3
Normal return code (/data) FC
If normal return code is exact FCh FC CF
The Table is for alignment machine to read data from EEPROM to check if the alignment process and
write data are correct.
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Read EEPROM Contrast A3 92 XX checksum
Read EEPROM Brightness A3 93 XX checksum
Read EEPROM C/T Point A3 94 XX checksum
Read EEPROM OSD-Hpos A3 95 XX checksum
Read EEPROM OSD-Vpos A3 96 XX checksum
Read EEPROM Language A3 97 XX checksum
Read EEPROM OSD Timer A3 98 XX checksum
Read EEPROM Volume A3 99 XX checksum
Table 1.
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Alignment Procedure
2. Dressing
A. Check the 4 springs and 5 spacers on the BKT
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Alignment Procedure
C. Fix DVI BD with spacers
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Alignment Procedure
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Alignment Procedure
F. Plastic fixture on the interface board and place D-sub cover
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Alignment Procedure
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Alignment Procedure
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Alignment Procedure
P. Contorl board 9pin wire dressing
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Alignment Procedure
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Circuit Operation Theory
I. Introduction:
The Q7T3-FP731-D is a 17” SXGA (1280x1024) , 262 K colors(R, G, B 6-bit data) TFT LCD
monitor with multi-media function. It’s an Dual (analog and digital) interface LCD monitor with a 15 pins
D-sub signal cable and a 24pins DVI-D cable . it’s compliant with VESA specification to offer a smart power
management and power saving function. It also offers OSD menu for users to control the adjustable items and
get some information about this monitor, and the best function is to offer users an easy method to set all
adjustable items well just by pressing one key, we called it “Auto key” which can auto adjusting all controlled
items. Q7T3-FP731-D also offer DDC2 function to meet VESA standard.
Inverter
Interface board
Power
Control board
D-Sub DVI-D
AC power in
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Circuit Operation Theory
MTV312M Clock
64(AJ) Generator
140MHz
D-SUB
ADC
DVI-D 140MHz
XGA
Single Link
TMDS 1280×1024
Mst 8131B
LCM
IIC Keypad
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(b) IC introduction:
1.) DDC (Display Data Channel) function: We use DDC IC to support DDC/2B function. DDC data is
stored in 24C04(EEPROM). Those data related to LCD monitor specification. PC can read them by
“SDA” and “SCL” serial communication for I2C communication for DDC2B.
2.) Mst8131B IC: There are A/D, Scaling, OSD, MCU functions in the Mst8131B IC. Scaling IC is
revolutionary scaling engine, capable of expanding any source resolution to a highly uniform and
sharp image, combined with the critically proven integrated 8 bit triple-ADC and patented Rapid-lock
digital clock recovery system. It also support detect mode and DPMS control. MCU control unit, it
controls all the functions of this interface board, just like the OSD display setting, the adjustable items,
adjusted data storage, the external IIC communication, support DDC2B.
3.) EEPROM: We use 24C04 to store all the adjustable data and user settings.
And use 24C02 to store DVI EDID data.
4.) MTV312M64: To stored the source code which is accessed by MCU to run program.
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A-2.) Power board diagram:
EMI Filter Rectifier and Isolation power Rectifier and filter Audio Amp and
Inverter circuit
LDO regulator
Feedback Isolation
Fig.1
#1 EMI Filter
This circuit (fig. 2) is designed to inhibit electrical and magnetic interference for meeting FCC, VDE,
VCCI standard requirements.
Fig. 2
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#2 Rectifier and filter
AC Voltage (90-264V) is rectified and filtered by BD601, C605 (See Fig 3) and the DC Output voltage is 1.4*(AC input).
(See Fig.3)
Fig. 3
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#3 Switching element and Isolation power transformer
When the Q601 turns on, energy is stored in the transformer. During Q601 turn-off period, the stored
energy is delivered to the secondary of transformer. R607, C607 and D601 is a snubber circuit. R615 is
current sense resistor to control output power. (See Fig.4)
Fig. 4
#4 Rectifier and filter
D701 and C703 are to produce DC output. L701 and C704 are to suppress high Frequency switching spikes.
(See Fig.5)
Fig. 5
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#5 PWM Controller
The PWM controller NCP1200A implements a standard current mode architecture. With an internal structure
operating at a fixed 40KHz. Where the switch time is dictated by the peak current set-point. When the current
set-point falls below a given value. The output power demand diminishes, the IC automatically enters the so-called
skip cycle mode and provides excellent efficiency.
Fig. 6
#6 Feedback circuit
PC123 is a photo-coupler and TL431 is a shunt regulation. They are used to detect the output voltage
change and be the primary and secondary isolation. When output voltage changes, the feedback voltage will
be compared and duty cycle will be decided to control the correct output voltage. (See Fig.7)
Fig. 7
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A-3.) Control board introduction:
The main parts of the control board are a push button, and a LED.
(a) Push button: It’s a simple switch function, pressing it for “ON” to do the auto adjustment
function, releasing it for “OFF” to do nothing.
(c) LED: It indicates the DPMS status of this LCD monitor; green light means DPMS on (Normal
operating condition). Amber light means DPMS off (Power off condition).
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A-4.) Inverter diagram:
1.Block Diagram:
2. General Specification
Input Voltage: 15V
Input Current: 2A max.
ON/OFF Voltage: 3.3V
PWM Duty: 3.3V/47KHz
Output Requirement:
Max. Output Current: 15mA
Min. Output Current: 6mA
Lamp Working Voltage: 600Vrms
Open Lamp Voltage: 1700Vrms
Frequency: 50KHz
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3.Circuit Operation Theorem
3.1 ON/OFF SWITCH
The turn-on voltage was controlled by R756 and R757.The inverter was turned on or off by the switching transistors
Q761 and Q757, Also regulator IC751 is control by Q761 and Q757 decide supply 15V to inverter part or instead.
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3.2 PWM Control circuit
TL1451 is a dual PWM controller.C765 and R765 decide the working frequency.BLT_ADJ signal is from control board,
control pulse width then decide how much energy delivery to CCFL also decide CCFL brightness. Q741 and Q742 be
the buffer to rise the drive capability and the totem poles circuit can improve a capable of driving for Q743.C770 decide
the striking time delay.
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3.3 Oscillator Circuit
Royer circuit uses the characteristic of transformer saturation to oscillate. When the DC power inject,
Q759 or Q760 will turns on, and the current Ic increases. After a period, the transistor will leave the saturation status and Vce
increase. The result causes the voltage of primary coil get lower. Finally the transistor turn off, and another transistor turn on.
These statuses are repeated and the pin7 and pin8 of T751 will get a Sin Wave to turn on CCFL.
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Table of Contents
1. Introduction ...................................................................................................................................4
2.7 Reliability......................................................................................................................................9
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Table of Contents
5. Physical Specifications................................................................................................................18
5.1 Physical Dimension & Appearance ............................................................................................18
5.1.1 Overall Dimensions: .......................................................................................................................................18
5.1.2 Outer Appearance: ..........................................................................................................................................18
5.2 Construction and Materials on outer surface ...........................................................................18
5.3 Base................................................................................................................................................18
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Table of Contents
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1. Introduction
This specification describes a 17.0” color TFT LCD monitor which is supported by dual(analog and DVI) interface
solution and support maximum resolution 1280x1024 at 76 Hz refresh rate. No speakers are expected. Besides, tilt and wall
mount function are equipped. It has the following features:
- User controls:
(a) “Power on/off” switch.
(b) “Exit” key( Back to main menus or leave OSD menu and hot key of Input selection).
(c) “I-key”( For auto adjust vertical position, phase, horizontal position and pixel clock ).
(d) “Enter” key(For enter sub-menus or select items.).
(e) “Left” key (Select left, decreasing adjust and hot key of Contrast adjustment).
(f) “Right” key (Select right, increasing adjust and hot key of Brightness adjustment).
- OSD window for control and information display with 8 languages selection.
- DPMS (Display Power Management System)
- Power on/off indicator.
- High quality advanced zoom function (Scaling function)
- Tilt base : Attached base with 0~25 degree tilt.
-DDC2B function supported.
- A LCD monitor
(a)Head part:
(1) A LCD module(LG M170E01-A5NC).
(2) An AC power and inverter board.
(3) An Interface board.
(4) A control board.
(5) A signal cable with 15pin D-sub and 24 pin DVI connector .
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2.1.2 Relative Humidity
-Operating 10 to 90% Max. ( non-condensing)
-Storage 5 to 95% Max. ( non-condensing)
2.1.3 Altitude
2.2 Transportation
2.2.1 Vibration Test (Package, Non-Operating)
A) Sine-wave vibration for initial resonance sweeps and dwell
* Sine sweep
Frequency (Hz) Status
5 ~ 26.6 0.6G
26.6 ~ 50 0.016"
50 ~ 500 1.5G
Sweep times: 1 sweep / Per Axis (X,Y, and Z Axis )
* One major resonance dwell is required for each axis.
Total dwell time at each resonance point shall be 15 minutes.
B) Random Vibration
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B) Drop Sequence
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1
Surface 1. Top 2
2. Front
3. Bottom
Manufacturing 4
4. Rear
joint
5. Right
6. Left
5
3 -Corner 5-3-2
select at weakness side [the low left(or right) corner of the front panel]
-An edge drop with impact on the shortest edge radiating from corner 5-3-2
-An edge drop with impact on the next shortest edge radiating from corner 5-3-2
-An edge drop with impact on the longest edge radiating from corner 5-3-2
-A flat drop with impact on the rear
-A flat drop with impact on the front
-A flat drop with impact on the right
-A flat drop with impact on the left
-A flat drop with impact on the bottom
-A flat drop with impact on the top
After test, there is no electrical and mechanical damage permitted.
2.0 0.0185
4.0 0.0300
8.0 0.0300
40.0 0.0030
55.0 0.0100
70.0 0.0100
200.0 0.0010
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Duration : 3ms
Acceleration(G) : 75G
2.3 Packing Configuration
2.3.1 Container Specification
a. Shipping Container
20'*8'*8'6
Container Type 40'*8'*8'6" Steel 40'*8'*9'6"
" Steel
b. Air Transport
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Volume (Cubic Meter) 17 19 11
Length 378
Carton Interior
Width 418
Measurement (mm)
Height 139
Length 395
Carton External
Width 456
Measurement (mm)
Height 146
Pallet D
Transport Type Pallet A Pallet B Pallet C
Length X X X X
Air Transport Pallet
Width X X X X
Dimension (mm)
Height X X X X
2.3.4 Container Carrying Capacity
a. Shipping Container
2. The sample for EMI agency approval should be under 4 dB of the limit.
The production pilot run units should be under 3 dB of the limit.
The mass production units should be under 1 dB of the limit.
2.7 Reliability
1. The prediction MTBF of display unit shall be greater than 60,000 hours excluding the lamp.(at 25 ℃)
2. Lamp life time : 40,000 hrs typical at which brightness of lamp is 50% compare to that of
initial value at
7.0mA and 25℃.
2.8 Mechanical Design for TCO 03:
1) Front Frame Reflectance:
* diffuse reflectance: ≦ ±10%
* Gloss≦ ± 2% gloss unit
2) Labeling of plastics:
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Plastic weight > 25g shall be marked in accordance with ISO11469
3) Variety of Plastic:
Type of plastic material is synonymous with the term basic polymer used in ISO1043-1. For blends of plastics e.g.
PC+ABS, all weight ratios are considered to be the same type of material.
4) Painting of Plastic:
Plastic materials weighing more than 25 grams included in the VDU. Different kinds of adapters are defined as
parts of
VDU. Printed wiring board laminates and the flat panel itself are excluded.
With the display operating, the issue of sound measured is contained within 40 dB/A in the audible field.
3. Input / Output Signal Specification
10 6
15 11
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14 V SYNC
15 SCL
This Interface board is designed to operate in any of the following video mode.
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640x480 31.47(N) 60.00(N) 25.18 DOS 1280x1024
Notes:
(1) If the incoming display mode is not supported by this I/F board listed above, the picture can show up or
doesn’t which is unpredictable, even the picture can display but probably isn’t good or clear.
(2) Some signals from graphics board may not function properly.
(3) “P”, “N” stands for “Positive”, “Negative” polarity of incoming HSYNC/VSYNC(input timing).
(4) OSD will show “No Signal” message on the screen as below to indicate it while no display mode inputs.
(5) OSD will show “No Cable Connection” message on the screen as below to indicate it while no cable
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plug in PC.
(6) OSD will show “Out of Range” message on the screen to indicate it while input display mode meet the
following condition
(b) The resolution is 1280x1024 but it frequency of vertical sync (Fv) is large than 77Hz.
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3.7 Panel optical Characteristics
Item Unit Conditions Min. Typ. Max.
Horizontal (Right) 70
60 -
CR = 10 (Left) 70
60
Vertical (Up) 70
60 -
CR = 10 (Down) 70
60
Viewing Angle [degree]
Horizontal (Right) 80
70 -
CR = 5 (Left) 80
70 -
Vertical (Up) 80
70 -
CR = 5 (Down) 80
70 -
Contrast ratio Normal Direction 450
300 -
Raising Time 4
- 5
Response Time (Note 1) [msec] Falling Time
- 12 20
Raising + Falling
- 16 25
Red x
0.61 0.641 0.67
Red y
0.31 0.342 0.37
Green x
Color / Chromaticity 0.26 0.292 0.32
Coordinates (CIE) Green y
0.58 0.611 0.64
Blue x
0.11 0.147 0.17
Blue y
0.04 0.068 0.10
White x 0.28 0.34
0.313
Color Coordinates (CIE) White White y 0.30 0.36
0.329
White Luminance @ CCFL 7.0mA
[cd/m2] 200 260 -
(center)
Luminance Uniformity (Note 2)
[%] 75 80 -
Crosstalk (in 75Hz) (Note 3)
[%] 1.5
Note:
1. Viewing Angle, Contrast Ratio, Response Time, Reflectance, and Chromaticity are measured at panel center.
2. Viewing Angle(θ, ψ)
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Measurement is done on position 1.
Viewing angle origine is the axis normal to the flat panel. Left (L) and Right (R) value
are the maximum angles for which CR=10. Up (U) and (D) value are the maximum
angles for which CR=10.
See figure below
Normal E
È y Ö = 90 , Up
Ö
Ö = 180 , Left x
Ö = 0 , Right
Ö = 270 , Down
4. Response time
TrR measures the transition time of L1 relative luminance from white to black state, from 90% to 10% (see graph
below)
TrD measures the transition time of L1 relative luminance from black to white state, from 10% to 90% (see graph
100%
90%
10%
0% t
TrR TrD
below)
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1/2 1/6 2/3 1/2 1/3 1/6
FULL WHITE
1/6
A A'
1/3
1/2
B B'
184 gray level 2/3
184 gray level
0 gray level
1 2 3
10%
4 5 6
50%
7 8 9
90%
4. Functional specification
All the tests to verify specifications in this section must be performed under the following standard conditions
unless otherwise noted. The standard conditions are:
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(2) Vertical: 270.336 mm
4.1.2 Video Performance
(1) Resolution : 1280 X 1024 pixels Maximum
(2) Contrast ratio : 250(Min.), 500(Typ.)
(3) Response time : 16 mS(Typ.)
(4)Viewing angle : Up:70° Down:70° R/L:70° (At contrast ratio >= 10)
(5)CIE Coordinate: White ( 0.31, 0.33 ) +/- (0.03, 0.03) (at user mode)
(6) Display color: 262k bits color
4.1.3 Light Output
Brightness rating : 260cd/㎡(Typ.) @7.0mA
4.1.4 Brightness Adjustment Range
At contrast ratio control set at maximum level, adjusting Brightness control from minimum to maximum
position, the light output of WHITE pattern shall be increased more than 40cd/㎡.
5. Physical Specifications
5.1 Physical Dimension & Appearance
5.1.1 Overall Dimensions:
375mm (W) X 370mm (H) X 155mm (D)
5.1.2 Outer Appearance:
see Fig.1
5.2 Construction and Materials on outer surface
(1) Materials: Plastic
(2) Color: To be defined for Model
5.3 Base
(1)Tilt: fiest hinge:0°~ 25°
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6. Maintainability Specifications
6.1 General & Requirements
6.1.1 Installation:
From outside of unit with standard tools and documentation provided to user.
6.1.2 Periodic Maintenance:
No periodic maintenance is required.
6.1.3 Repair & Calibration:
Require spare modules or components as specified as followings:
(1) Interface board ASSY
(3) AC-DC converter board ASSY
(4) Control board ASSY
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ITEM State
Power ON
Brightness 90
Contrast 50
OSD- Timeout 20s
OSD-Language English
OSD-Image size Full Screen
OSD-Color temp SRGB MODE
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Trouble Shooting
Q7T3_LS(FP731-DVI) TROUBLE SHOOTING GUIDE
No
Yes
Yes
Yes
Yes
Yes
Yes
Replace panel
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2. BUTTON function:
2.1 Control Board
Yes
Yes
No
Replace Control BD
Is OSD working??
No
Check Interface BD
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3. OSD function:
Check interface BD
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Trouble Shooting
4. Power Board
Y Y
IC751 PIN 9 IS 14-
Check IC751 LED shined?
16V?
N N
N Y
Plug CN701 again or PWM existed?
3.3V existed? IS I/F board connected?
checking I/F BD (BLT_ADJ)
Y Y N
Y
Replace new fuse
N Y
Check CN752, CN753
Insert them again Check IC701 OK? Replace IC701
was pluged properly?
Y
N
Replace IC751,Q751 Y
Checking F601
Replace new fuse
Broke?
Y
Replace
Check IC601 Vcc
IC601,Q602,Q603
existed?
R602
Replace IC602,
IC702,D701 or check
I/F BD
4
Confidential
Q7T3-FP737S Dual function LCD Monitor Service Guide
Trouble Shooting
5. DVI_BD
DVI No picture or picture unstable
No
Yes
Yes
Yes
Yes
Yes
Yes
Replace panel
5
Confidential
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
1.Alignment procedure (for function adjustment)
A. Preparation:
1. Setup input timing VGA_60Hz, Cross-Hatch (General-1) pattern.
2. The monitor power on at first time that will enter Factory OSD mode. (If not, Please press “Menu” and “Exit” plus
“Power” buttons at the same time. A “Factory” word will be showed on the upper left hand side of OSD Main menu.)
Burn in mode have already started. (See Fig 1.). If it hasn’t started, Please choose “BURN IN MODE” tag and select
“On” to enable burn-in mode.
3. Setup unit and keep it warm up at least 30 minutes
B. Timing adjustment:
1. Enter factory setting area (if it isn’t at factory mode, Please press “Menu” and “Exit” plus “Power” buttons at the same
time to enter factory mode.).
2. Burn-In Mode “off”. See Fig 2.
3. Select timing from Table 1. The timing marked with star sign (*) have to be adjusted.
4. Execute “Recall All” (press “Yes”) to clear user area in EEPROM
5. The cursor moves to “AUTO Adjust ” or press “I-Key” to run “AUTO adjustment” function.
6. Check the phase of the image; if phase is not perfect adjust it to the best condition.
7. Adjust the settings to following values:
CONTRAST = 50
BRIGHTNESS = 90
OSD TIME = 20
COLOR = sRGB
8. When Factory mode is disable (burn-in mode “off”) then power off after power on will enter user mode.
1
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
White Balance X+- 0.326+(-) 0.03
220 cd/㎡
(Reddish, 5800K set on OSD) Y+- 0.342+(-) 0.03
White Balance X+- 0.313+(-) 0.03
220 cd/㎡
(sRGB, 6500K set on OSD) Y+- 0.329+(-) 0.03
White Balance X+- 0.283+(-) 0.03
190 cd/㎡
(Bluish, 9300K set on OSD) Y+- 0.297+(-) 0.03
6. Move cursor into “BURN IN MODE” tag and select “Off” to disable burn-in mode.
7. Turns off the monitor power.
F. Command definition:
PC Host will send 0x7C IIC slave address and then following 4 bytes command
I2C Send Command Byte1 Byte2 Byte3 Byte4
Write Contrast CA 55 Data checksum
Write Brightness CA 56 Data checksum
Write Red Gain CA 57 Data checksum
Write Green Gain CA 58 Data checksum
Write Blue Gain CA 59 Data checksum
Read Contrast C3 55 XX checksum
Read Brightness C3 56 XX checksum
Read Red Gain C3 57 XX checksum
Read Green Gain C3 58 XX checksum
Read Blue Gain C3 59 XX checksum
Write Bluish(9300K) R-Gain Data to NVRAM AA 3C Data checksum
Write Bluish(9300K) G-Gain Data to NVRAM AA 3D Data checksum
Write Bluish(9300K) B-Gain Data to NVRAM AA 3E Data checksum
Write sRGB(6500K) R-Gain Data to NVRAM AA 4C Data checksum
Write sRGB(6500K) G-Gain Data to NVRAM AA 4D Data checksum
Write sRGB(6500K) B-Gain Data to NVRAM AA 4E Data checksum
Write Reddish(5800K) R-Gain Data to NVRAM AA 5C Data checksum
Write Reddish(5800K) G-Gain Data to NVRAM AA 5D Data checksum
2
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
Write Reddish(5800K) B-Gain Data to NVRAM AA 5E Data checksum
Write User R-Gain Data to NVRAM AA 6C Data checksum
Write User G-Gain Data to NVRAM AA 6D Data checksum
Write User B-Gain Data to NVRAM AA 6E Data checksum
Read Bluish(9300K) R-Gain data from NVRAM A3 3C XX checksum
Read Bluish(9300K) G-Gain data from NVRAM A3 3D XX checksum
Read Bluish(9300K) B-Gain data from NVRAM A3 3E XX checksum
Read sRGB(6500K) R-Gain data from NVRAM A3 4C XX checksum
Read sRGB(6500K) G-Gain data from NVRAM A3 4D XX checksum
Read sRGB(6500K) B-Gain data from NVRAM A3 4E XX checksum
Read Reddish(5800K) R-Gain data from NVRAM A3 5C XX checksum
Read Reddish(5800K) G-Gain data from NVRAM A3 5D XX checksum
Read Reddish(5800K) B-Gain data from NVRAM A3 5E XX checksum
Read User R-Gain data from NVRAM A3 6C XX checksum
Read User G-Gain data from NVRAM A3 6D XX checksum
Read User B-Gain data from NVRAM A3 6E XX checksum
Change Color Temperature to Bluish CC 1 XX checksum
Change Color Temperature to sRGB CC 2 XX checksum
Change Color Temperature to Reddish CC 3 XX checksum
Change C/T to User CC 4 XX checksum
User mode to factory mode 1A 5A XX checksum
Auto Color (Offset1, Offset2, Gain) 1B 5A XX checksum
Factory mode to User mode 1E 5A XX checksum
Clear user area data 1F 5A XX checksum
Off burn in mode CE 2 XX checksum
Change Language Setting 66 0~7 XX checksum
Note A: Byte4(Checksum) = Byte1 + Byte2 + Byte3
Note B: Data = The value write to MCU
Note C: XX = don't care, any value(<=0xFF).
Note D: The Byte-2 definition of “Change Language Setting” is as below,
0=DE, 1=EN, 2=ES, 3=FR, 4=IT, 5=JA, 6=繁中, 7=簡中
When PC Host sends 0x7D command to MCU, MCU must return as following (2 bytes)
Return Code R-Byte1 R-Byte2
Checksum error code FC AA
3
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
The Table is for alignment machine to read data from EEPROM to check if the alignment process and write data are correct.
Multi-scan
Incoming display mode (Input timing)
operation
4
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
2.Wire Dressing
a. LVDS Cable with clip
5
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
6
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
d. Add 4 Pcs crew to BKT between panel grounding
7
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
f. Spacer
8
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
h. Bracket Cover
9
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
10
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
11
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
3. Add Glue
a. C605
12
Q7T3(AUO Panel) LCD Monitor Service Guide
Alignment Procedure
c. C615
13
Release Notice
1
Form No: ACM0-0B-003-24(010918)
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
Table of Contents
1. INTRODUCTION................................................................................................................................... 3
6. MAINTAINABILITY SPECIFICATIONS........................................................................................ 15
6.1 GENERAL & REQUIREMENTS ............................................................................................................. 15
6.2 MEAN TIME TO REPAIR ...................................................................................................................... 15
6.3 ACCESSIBILITY................................................................................................................................... 16
1
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
Table of Contents
2
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
1. Introduction
This specification describes a 17.0” color TFT LCD monitor which is supported by analog interface solution and support
maximum resolution 1280X1024 at 75Hz refresh rate. It has the following features:
- User controls:
(a) “Power on/off” switch.
(b) “Menu” key: For enter sub-menus or select items.
(c) " EXIT "key: back to main menus、leave OSD or enter volume hot-key function.
(d) " 3 " key: For left adjustment and enter “Contrast” Hot-key function.
(e) " 4 " key: For right adjustment and enter “Brightness” Hot-key function.
(f) “I-Key”: For auto-adjustment picture.
- OSD window for control and information display with 8 languages selection.
- DPMS (Display Power Management System)
- Power on/off indicator.
- Tilt base (with tilt function from 0 to +25 degree).
-DDC2B function supported.
It is composed of the following materials:
-A LCD monitor
(a) Head part:
(1) A LCD module (AU M170EN05).
(2) An Inverter +AC-DC board
(3) An Interface board.
(4) A control board.
(5) A 15pin D-sub connector
(b) Base part:
(1)Tilt base.
- A power cord
- An user menu.
2. Operational Specification
2.1 Environment
2.1.1 Temperature
-Operating +0 to +40 degrees Celsius
-Non-operating -20 to +60 degrees Celsius
2.1.2 Humidity
-Operating 10 to 90% Max. Non-condensing
-Non-operating 10 to 95% Max. Non-condensing
2.1.3 Altitude
-Operating 0 to 3,048m (10,000ft)
-Non-operating 0 to 12,192m (40,000ft)
2.2Transportation
2.2.1 Vibration Test (Package, Non-Operating)
3
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
ACM Spec.
Weight (Kg) Height (cm)
0-9 91
> 9 - 18.2 76
> 18.2 - 27.2 61
> 27.2 - 45.4 46
> 45.4 - 68.1 31
> 68.1 - 113.5 26
B) Drop Sequence
6
1
Surface 1. Top 2
2. Front
3. Bottom
Manufacturing 4
4. Rear
joint
5. Right
6. Left
5
3
4
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
-Corner 5-3-2 select at weakness side [the low left (or right) corner of the front panel]
-An edge drop with impact on the shortest edge radiating from corner 5-3-2
-An edge drop with impact on the next shortest edge radiating from corner 5-3-2
-An edge drop with impact on the longest edge radiating from corner 5-3-2
-A flat drop with impact on the rear
-A flat drop with impact on the front
-A flat drop with impact on the right
-A flat drop with impact on the left
-A flat drop with impact on the bottom
-A flat drop with impact on the top
After test, there is no electrical and mechanical damage permitted.
2.2.3 HALF-SINE SHOCK
Test conditions:
Test unit: 2 sets
Each unit has to withstand 18 shocks.(3 shocks pre face)
No- operation
Half-sine wave
Duration: 3ms
Acceleration (G): 75G
20'*8'*8'6
Container Type 40'*8'*8'6" Steel 40'*8'*9'6"
" Steel
5
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
Useable Interior Dimension Length 5,890 12,000 12,000
b. Air Transport
Length 368
Carton Interior
Width 407
Measurement (mm)
Height 140
Length 385
Carton External
Width 445
Measurement (mm)
Height 147
6
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
Dimension (mm) Width 890 1335 890 1335
Length X X X X
Air Transport Pallet
Width X X X X
Dimension (mm)
Height X X X X
7
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
2. The sample for EMI agency approval should be under 4 dB of the limit.
The production pilot run units should be under 3 dB of the limit.
The mass production units should be under 1 dB of the limit.
2.7 Reliability
1. The prediction MTBF of display unit shall be greater than 60,000 hours excluding the lamp. (at 25 ℃)
2. Lamp lifetime: 30,000 hrs minimum at which brightness of lamp is 50% compare to that of initial value at
7.0mA and 25℃.
8
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
1 5
6 10
11 15
15pin D-sub female
1 RED VIDEO
2 GREEN VIDEO
3 BLUE VIDEO
4 GROUND
5 GROUND
6 RED GROUND
7 GREEN GROUND
8 BLUE GROUND
9 PC5V
10 SYNC GROUND
11 GROUND
12 SDA
13 H SYNC (H+V)
14 V SYNC
15 SCL
Cable length:
1600mm +/- 20mm
3.1.2 Video signals:
RGB separate, Analog 0.7Vp-p/75 Ohm
3.1.3 Sync signal:
- H/V separate, TTL level
- H/V composite, TTL level
3.2 Function
3.2.1 Support timing
This Interface board is designed to operate in any of the following video mode.
Multi-scan
Incoming display mode(Input timing)
operation
Horizontal Vertical Dot Clock Actual display
Resolution Remark
Frequency (KHz) Frequency (Hz) Frequency (MHz) resolution
9
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
832X624 49.72(N) 74.55(N) 57.29 Macintosh
*1024x768 48.36(N) 60.00(N) 65.00 VESA
1024x768 56.48(N) 70.10(N) 75.00 VESA
*1024x768 60.02(P) 75.00(P) 78.75 VESA
1024X768 60.24(N) 74.93(N) 80.00 Macintosh
1152x864 67.50(P) 75.00(P) 108.00 VESA
*1152x870 68.68(N) 75.06(N) 100.00 Macintosh
1152x900 61.80(N) 66.00(N) 94.50 SUN 66
1152x900 71.81(N) 76.14(N) 108.00 SUN
*1280x1024 64.00(P) 60.00(P) 108.00 VESA
1280x1024 75.83(N) 71.53(N) 128.00 IBM1
*1280x1024 80.00(P) 75.00(P) 135.00 VESA
*1280x1024 81.18(N) 76.16(N) 135.09 SPARC2
10
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
3.6 Power Supply Requirement
3.6.1 Input Power Requirements
(1) Input Voltage Range
The unit shall meet all the operating requirements with an input voltage range of 90~264 Vac.
(2) Input Current
Maximum
Input Current Measuring Range
(MAX) 2 Arms 90Vac 〜 264Vac
(3) Frequency Range
The unit shall operate within a frequency range of 47KHz to 63KHz.
(4) Inrush Current
Power supply inrush current shall be less than the ratings of its critical components (including
Power switch, fuse, rectifiers and surge limiting device) for all conditions of line voltage.
(5) Regulator Efficiency
70% minimum (measuring at 115Vac and full load)
(6) Maximum power consumption <45Watts (without Audio).
Power saving mode < 3 Watts.
3.6.2 Output Power Requirements
The power circuit shall supply DC power outputs as followings:
Output Nominal Regulation Load Current Range
1 5V-Fix ±5% 0 ~ 0.8A
2 3.3V-Fix ±5% 0 ~ 0.8A
11
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
Center point at
White Luminance 260 - cd/m²
CCFL 7.0mA
1. Viewing Angle, Contrast Ratio, Response Time, Reflectance, and Chromaticity are measured at panel center.
2. Viewing Angle(θ, ψ)
12
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
2. Contrast Ratio (CR) is defined mathematically as:
Surface Luminance with all white pixels
Contrast Ratio = _____________________________________
Surface Luminance with all black pixels
4. Response time
TrR measures the transition time of L1 relative luminance from white to black state, from 90% to 10% (see graph below)
WHITE BLACK WHITE
100%
90%
10%
0% t
TrR TrD
TrD measures the transition time of L1 relative luminance from black to white state, from 10% to 90% (see graph below)
5. Flicker is measured at cyan dot pattern of Forground RGB (0,0,0) and Background RGB (0,31,31).
2 3
4
9
1 5
8 7 6
13
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
4. Functional specification
All the tests to verify specifications in this section must be performed under the following standard conditions unless
otherwise noted. The standard conditions are:
-Temperature: 5 to 40 degree Celsius
-AC line input voltage: 90 Vac to 264 Vac, 47Hz or 63Hz
-Warm-up time: 30 minutes minimum
14
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
5. Physical Specifications
5.1 Physical Dimension & Appearance
5.1.1 Overall Dimensions: 375mm (W) X 370mm (H) X 155mm (D)
5.1.2 Outer Appearance: see Fig.1
5.3 Base
(1)Tilt: fiest hinge:0°~ 25° , second hinge : 25 °~135°
5.5 Packaging
5.5.1 Carton Dimension: 385mm (W) X455mm (D) X 1478mm (H) (LCD monitor)
5.5.2 Shipping Weight: 6.2kg (LCD monitor)
5.5.3 Shipping Container: 2100 sets per 40 feet container with pallet.
6. Maintainability Specifications
6.1 General & Requirements
6.1.1 Installation: From outside of unit with standard tools and documentation provided to user.
6.1.2 Periodic Maintenance: No periodic maintenance is required.
6.1.3 Repair & Calibration: Require spare modules or components as specified as followings:
(1) Interface board ASSY
(2) AC-DC converter board ASSY
(1) Control board ASSY
15
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
6.3 Accessibility
6.3.1 General:
All panels, covers, and major assemblies are removable without disruption of permanent mounting or fasteners.
6.3.2 Outside Cabinet, access to the following elements
-Operating Controls
-AC Inlet
-Audio in
6.3.3 Cover Removal, Access
All sub assemblies and internally adjustable components may be accessed by removing the base and the rear
cover .
ITEM State
Power OFF
Brightness 90
Contrast 50
OSD- Timeout 20s
OSD-Language English
OSD-Image size Full Screen
OSD-Color temp CU MODE
16
Q7T3(AUO panel) LCD Monitor Service Guide
Engineering Specification
17
5 4 3 2 1
D D
Screw Holes
C C
Optical Points
1
1
5 9 5 9 5 9 5 9 OP1 OP2 OP3 OP4 OP5 OP6 OP7
OP OP OP OP OP OP OP
4 8 4 8 4 8 4 8
3 7 3 7 3 7 3 7
2 6 2 6 2 6 2 6
OP8 OP9 OP10 OP11 OP12 OP13 OP14
H1 H2 H3 H4
OP OP OP OP OP OP OP
HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8
B B
A
Benq Corporation A
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
INTERFACE BOARD
Size PCB P/N PCB Rev. Document Number R ev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004
+3.3V
2
D N1 DN2 D N3
3 3 3
1
B+ R4 56 C2 0.01U 50V K
BLUE+
D R1 D
+3.3V 75
R- R7 22 C3 0.01U 50V K
RED-
2
G+ R8 56 C4 0.01U 50V K
GREEN+
DN100
3
R2
BAV99 75
R10
1
G- 22 C5 0.01U 50V K
GREEN-
+3.3V
D N4 J1
2 1 PC5V TP1 2 1 TP2
TP3 4 3 TP4 R+ R12 56 C6 0.01U 50V K
RED+
BAV70LT1 TP5 6 5 TP6
3
2
8 7 TP7 R3
D1 TP8 10 9 TP9
12 11 TP10 75
Cable-Detect
TZMC5V1 TP11 14 13 R13
C1 16 15 B- 22 C7 0.01U 50V K
BLUE-
1
0.1U
16V K U1 R5 R6
1 8 2.7K 2.7K CON16
A0 VCC
2 A1 WP 7
3 6 R9 47
A2 SCL
4 5 R11 47
VSS SDA
AT24C02A
2
C8 C9
47P 47P D2 D3
50V J 50V J +3.3V
TZMC5V1 TZMC5V1
DSUB_SDA
1
C10
DSUB_SCL 0.1U
C C
16V K
14
14
U2A U2B
R14 1 2 3 4 VS
100
74LVC14A 74LVC14A
14
14
7
7
U 2C U2D
R15 5 6 9 8 HS
100
2
74LVC14A 74LVC14A
D4 R16 D5 R17 C11 C12
7
47P 47P
TZMC5V1 10K TZMC5V1 10K 50V J 50V J
1
+3.3V
+3.3V
B B
2
D N6
D N5 2 1
J2 DVIPC5V
3 BAV99
RX0- RX0M
RX2+ TP12 2 1 TP13 BAV70LT1
RX2-
3
2
RX1+ TP14 4 3 TP15 RX1-
RX0+ TP16 6 5 TP17 D N7
RX0-
1
8 7 3 BAV99
RX0+ RX0P
10 9
2
12 11 TP18
14 13 D N8
1
A2 SCL
2
3 BAV99
RX2- RX2M
D6 D7 D8 4 5
2 VSS SDA DVISDA
TZMC5V1 TZMC5V1 TZMC5V1 DN11 AT24C02A
1
3 BAV99
RX2+ RX2P
1
DN12
1
DVIPC5V 3 BAV99
RXC- RXCM
2
DN13
1
3 BAV99
RXC+ RXCP
1
A A
Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
INTERFACE BOARD
Size PCB P/N P CB Rev. Document Number Rev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004
+3.3V +3.3V
L1 L2
3.3V_SDDS 3.3V_DDDS
BEAD BEAD
1
C15 C16 C18 C19
+ C14 0.1U 0.1U + C17 0.1U 0.1U
22U 16V K 16V K 22U 16V K 16V K
16V 16V
2
+2.5V +3.3V
+3.3V
L3
3.3V_RDDS
BEAD C20
0.1U D CLK R21 0
DCLK_TTL
150
146
144
141
139
188
182
176
155
153
203
134
148
111
129
16V K
88
26
20
37
53
67
81
97
2
D +3.3V C21 C22 D
47P 47P
VDD_RX0_2.5
VDD_RX1_2.5
VDD_RX2_2.5
AVDD_RPLL
AVDD_SDDS
VDD_SDDS_3.3
AVDD_DDDS
VDD_DDDS_3.3
VDD1_ADC_2.5
VDD2_ADC_2.5
CVDD
CVDD
CVDD
CVDD
VDD_DPLL_3.3
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
L4 OPEN OPEN
3.3V_RGB 160 AVDD_ADC
5
BEAD 164
+ C23 C24 C25 C26 C27 AVDD_BLUE
168 AVDD_GREEN
22U 0.1U 0.1U 0.1U 0.1U 172
16V 16V K 16V K 16V K 16V K AVDD_RED
118
4
DCLK/TCON_OCLK D EN
157 SGND_ADC DEN/TCON_ECLK 115 4 R N1 5 DEN_TTL
158 117 D HS 3 6 C N1 C N2 C N3 C N4 CN5 C N6
AGND_ADC DVS/TCON_FSYNC DHS_TTL
161 116 DVS 2 7
AGND_BLUE DHS/TCON_LP DVS_TTL
+3.3V 165 1 8 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN
AGND_GREEN
169 AGND_RED PD47/OB7 110 100 1 100 8 OB7
L5 109 2 7
PD46/OB6 OB6
3.3V_DVI 173 108 3 6
AVDD_IMB PD45/OB5 OB5
1
BEAD 181 107 4 5
AVDD_RX2 PD44/OB4 R N2 OB4
+ C28 C29 C30 C31 C32 187 AVDD_RX1 PD43/OB3 106 1 100 8 OB3
22U 0.1U 0.1U 0.1U 0.1U 193 105 2 7
AVDD_RX0 PD42/OB2 OB2
16V 16V K 16V K 16V K 16V K 196 104 3 6 OB1
2
AVDD_RXC PD41/OB1
PD40/OB0 103 4 5 OB0
175 RN3
AGND_IMB
+2.5V L6 178 AGND_RX2 PD39/OG7 102 1 100 8 OG7
2.5V_RXPL 184 101 2 7
AGND_RX1 PD38/OG6 OG6
1
BEAD C34 190 100 3 6
AGND_RX0 PD37/OG5 OG5
+ C33 0.1U 197 99 4 5
AGND_RXC PD36/OG4 RN4 OG4
22U 16V K 198 AGND_RXPLL PD35/OG3 96 1 100 8 OG3
16V 95 2 7 OG2
2
+3.3V PD34/OG2
PD33/OG1 94 3 6 OG1
199 VDD_RXPLL_2.5 PD32/OG0 93 4 5 OG0
R N5
+3.3V C35 4.7P J
PD31/OR7 92 1 100 8 OR7
149 AVSS_RPLL PD30/OR6 91 2 7 OR6
+3.3V +3.3V +3.3V +3.3V +3.3V 145 90 3 6
AVSS_SDDS PD29/OR5 OR5
140 AVSS_DDDS PD28/OR4 87 4 5 OR4
R22 R24 86 RN6 1 100 8
PD27/OR3 OR3
14.318MHZ Y1 2.7K 85 2 7
PD26/OR2 OR2
1KF R25 R26 R27 R28 R29 113 84 3 6
PPWR PD25/OR1 OR1
114 PBIAS PD24/OR0 83 4 5 OR0
2
PD22/EB6
VOL_ON/OFF 206 GPIO20/HDATA3 PD21/EB5 78 3 6 EB5
R69 51K 207 77 4 5
LVDS_EN GPIO19/HDATA2 PD20/EB4 RN8 EB4
BANK 208 GPIO18/HDATA1 PD19/EB3 76 1 100 8 EB3
1 75 2 7
LED_GRN OPEN
BL_ON 205
GPIO17/HDATA0
GPIO16/HFS
U4 PD18/EB2
PD17/EB1 74 3 6
EB2
EB1
R31 R68 C37 R99 4.7K 204 73 4 5
Cable-Detect GPIO22/HCLK PD16/EB0 R N9 EB0
0.1U
3KF 10K 16V K
DSUB_SCL
R32 0 6 DDC_SCL PD15/EG7 72 1 100 8 EG7
R33 0 7 71 2 7
LED_ORG DSUB_SDA DDC_SDA PD14/EG6 EG6
PD13/EG5 70 3 6 EG5
Res et 5 69 4 5
4
RESETn
GPIO21/IRQn GM2120 PD12/EG4
PD11/EG3 66
65
RN10 1 100
2
8
7
EG4
EG3
PD10/EG2 EG2
P.2 RED+ 171 RED+ PD9/EG1 64 3 6 EG1
+3.3V 170 63 4 5
P.2 RED- RED- PD8/EG0 RN11 EG0
P.2 GREEN+ 167 GREEN+
2
1
Circuit P.2 RX1M 186 RX1- TCON_OINV 121
P.2 RX0P 191 RX0+ TCON_ESP 122
192 123 R34 R35
P.2 RX0M RX0- TCON_EPOL
124
8
+3.3V TCON_EINV 10K 10K
TCON_RSP2 125
3.3V_DVI R36 1KF 174 126 OPEN C N7 C N8 C N9 CN10 CN11 CN12
REXT TCON_RSP3 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN 22P OPEN
TCON_RCLK 127
RMA DDR[0..15] RMADDR15 8 49
ROM_ADDR15 GPIO10/TCON_ROE3 LCD_ON
RMADDR14 9 48
ROM_ADDR14 GPIO9/TCON_ROE2 KEY_EXIT
RMADDR13 10 128
R37 R38 R39 RMADDR12 ROM_ADDR13 TCON_ROE
11 ROM_ADDR12
RMADDR11 12
B 10K 10K 10K RMADDR10 ROM_ADDR11 RXD B
U6 SST 39VF010 13 44
RMDATA[0..7]
VSS_DDDS
VSS_SDDS
VSS_DPLL
A2 ROM_DATA1 N/C
GND_RX2
GND_RX1
GND_RX0
CVSS
CVSS
CVSS
CVSS
CVSS
ROM_OEn 36 131
R52 ROM_OEn Reserved
24 OE VCC 32
10K 22 16 C39
CE GND 0.1U +3.3V
3
21
38
54
68
82
98
112
130
27
89
133
135
202
156
154
177
183
189
147
143
138
16V K
J3
TXD 3
RXD 2
1
32-Pin PLCC Socket CON_3P_S
FLASH/ Prom-Jet Socket
RS232
BOOTSTRAP SIGNALS
ADDRESS NAME SET DESCRIPTION
A A
ROM_ADDR(4:0) USER_BITS(4:0) x Available for reading from a status register
ROM_ADDR5 Reserved x If using 6-wire host protocol, program this bit to 0
ROM_ADDR6 SCLPOL x Determines polarity of HCLK signal
Benq Corporation
ROM_ADDR7 HOST_PROTOCOL 0 If using 6-wire host protocol, program this bit to 1 Project Code Model Name OEM/ODM Model Name
ROM_ADDR8 HOST_PORT_EN 1 GPIO(22:16) is on "Host Port" pins 99.L8372.001 Q7T3-FP767S NA
+2.5V +3.3V
Close to respective power Pins Close to respective power Pins Title
ROM_ADDR9 OCM_START 1 1 = OCM becomes active after OCM_CLK is stable INTERFACE BOARD
ROM_ADDR(12:10) USER_BITS(7:5) x Available for reading from a status register Size PCB P/N P CB Rev. Document Number Rev.
1
C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 C53 C54 C55 C56 C57 C58 C59 C60 <Size> 48.L8301.S11 0
ROM_ADDR13 OSC_SEL 0 0 = XTAL and TCLK pins are connected + C40 + C41 S11 99.L8372.000-C2-204-004
22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
ROM_ADDR14 OCM_ROM_CFG(1) 1 1 = All 48K of ROM is in external ROM 16V 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K 16V K Tuesday, February 11, 2003 3 5
Date: Sheet of
2
14
U2E
11 10 R53 200
LED_GRN
74LVC14A
14
7
U2F
13 12 R54 100 J4
LED_ORG
D 74LVC14A 1 D
2
7
L21 R57 1K 3
KEY_INC L22 R58 1K
KEY_MENU 4
L19 R55 1K 5
KEY_EXIT L20 R56 1K
KEY_DEC 6
L24 R60 1K 7
PW_SW L23 R59 1K
I_KEY 8
9
C63 C64 C61 C62 C66 C65 C67 C68
100P 100P 100P 100P 100P 100P 0.1U 0.1U 2060091109
50V J 50V J 50V J 50V J 50V J 50V J 16V K 16V K
R23
C C
J5
1 PWM output first, it must be "H" when no work.
BRT_ADJ
2 BL_ON
3 LCD_ON
4
5
6
7
8 L15
9 +5V
10
11 L18
12 +3.3V U5
13 IRU1206-25CY
VOLUME
14 VOL_ON/OFF +3.3V
1 3
GND
GND
IN OUT +2.5V
B B
1
20.72060.207
C70 C71 + C79
4
2
0.1U K 0.1U K 10U
16V
2
1
+ C69 + C72
C73 C74 C75 C76 C77 10U C78 10U C81
0.1U 0.1U 0.1U 0.1U 0.1U 16V 0.1U 16V 0.1U
2
Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
A A
INTERFACE BOARD
Size PCB P/N PCB Rev. Document Number R ev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004
+3.3V
IC1
1 56 +5V +5V
VCC TXIN4 ER4
1
3 S D 6
6 51 + C83 C84
EG1 TXIN8 TXIN0 ER0 47U
4 5 0.1U
G D 16V 16V K
EG2 7 50 ER6
2
+3.3V TXIN9 TXIN27
GF4435
EG6 8 TXIN10 LVDS GND 49
3
9 48 R62 1 Q1
VCC TXOUT0- E0- LCD_ON
20K 2N3904
EG7 10 47 E0+
2
TXIN11 TXOUT0+
1
C86 +3.3V
0.1U 11 46 + C85 R63
EG3 TXIN12 TXOUT1- E1-
16V K 10U 10K
12 45 16V
EG4 E1+
2
TXIN13 TXOUT1+ L7
+3.3V 13 44
GND LVDS VCC BEAD
1
EG5 14 TXIN14 LVDS GND 43
C87 + C88
15 42 0.1U 22U
EB0 TXIN15 TXOUT2- E2-
R64 16V K 16V
2
OPEN 16 41
EB6 TXIN16 TXOUT2+ E2+
17 VCC TXCLK OUT- 40 ECLK-
1
EB5 24 TXIN22 PLL GND 33
C +3.3V C89 + C90 C
25 32 0.1U 22U
TXIN23 PWR DWM 16V K 16V
2
26 VCC TXCLK IN 31 DCLK_TTL
J6
LVDS_EN
O0- 2 1 E3+
"L" Falling edge trigger O0+ 4
6
3
5
E3-
O1- ECLK+
"H" Rising edge trigger O1+ 8
10
7
9
ECLK-
O2- E2+
O2+ 12 11 E2-
OCLK- 14 13 E1+
OCLK+ 16 15 E1-
O3- 18 17 E0+
+3.3V 20 19
O3+ E0-
IC2 20D0017210
1 VCC TXIN4 56 OR4
OPEN 16 41
OB6 TXIN16 TXOUT2+ O2+
17 VCC TXCLK OUT- 40 OCLK-
Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3-FP767S NA
Title
INTERFACE BOARD
Size PCB P/N P CB Rev. Document Number Rev.
<Size> 48.L8301.S11 0
S11 99.L8372.000-C2-204-004
No
Yes
Yes
Yes
Yes
Yes
Yes
Replace panel
1
Q7T3(AUO Panel) LCD Monitor Service Guide
Trouble Shooting
2. BUTTON function:
2.1 Control Board
Yes
Yes
No
Replace Control BD
Is OSD working??
No
Check Interface BD
3. OSD function:
Check interface BD
2
Q7T3(AUO Panel) LCD Monitor Service Guide
Trouble Shooting
4. Power Board
Y Y
Replace Q761 IC751 PIN 9 IS 15V? LED shined?
N N
N Y
Plug CN701 again or PWM existed?
3.3V existed? IS I/F board connected?
checking I/F BD (BLT_ADJ)
Y Y N
Y
Replace new fuse
N Y
Check CN752, CN753
Insert them again Check IC701 OK? Replace IC701
was pluged properly?
Y
N
Replace IC751,Q751 Y
Checking F601
Replace new fuse
Broke?
Y
Replace
Check IC601 Vcc
IC601,Q602,Q603
existed?
R602
Replace IC602,
IC702,D701 or check
I/F BD
3
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
I. Introduction:
The Q7T3-FP767 is a 17” SXGA (1280x1024) , 262 K colors(R, G, B 6-bit data) TFT LCD
monitor with multi-media function. It’s an analog interface LCD monitor with a 15 pins D-sub signal
cable and it’s compliant with VESA specification to offer a smart power management and power saving
function. It also offers OSD menu for users to control the adjustable items and get some information
about this monitor, and the best function is to offer users an easy method to set all adjustable items
well just by pressing one key, we called it “Auto key” which can auto adjusting all
controlled items. Q7T3-FP767 also offer DDC2 function to meet VESA standard.
To LVDS
backlight
Interface board LVDS Xmtr x 2
Power sequence
circuit
gm2120
Inverter AC-DC EEPROM
board PW BD
board MCU
Flash ROM
AC DDC IC D-sub
AC Socket
socket connector
Control board
1
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
Interface Board
A/D
MCU
Red
Scaling To
Green
OSD LCD
Blue
module
Vsync
gm2120
Hsync
(/H+V)
ROM
FLASH-
EEPROM
SCL DDC
SDA
(b) IC introduction:
1.) DDC (Display Data Channel) function: We use DDC IC to support DDC/2B function. DDC data
is stored in 24C02(EEPROM). Those data related to LCD monitor specification. PC can read
them by “SDA” and “SCL” serial communication for I²C communication for DDC2B.
2.) Gm2120 IC: There are A/D, Scaling, OSD, MCU functions in the Gm2120 IC. Scaling IC is
revolutionary scaling engine, capable of expanding any source resolution to a highly uniform
and sharp image, combined with the critically proven integrated 8 bit triple-ADC and patented
2
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
Rapid-lock digital clock recovery system. It also support detect mode and DPMS control. MCU
control unit, it controls all the functions of this interface board, just like the OSD display setting,
the adjustable items, adjusted data storage, the external IIC communication, support DDC2B.
3.) EEPROM: We use 24C16 to store all the adjustable data and user settings.
4.) FLASH ROM: To stored the source code which is accessed by MCU to run program.
EMI Filter Rectifier and Isolation power Rectifier and filter Audio Amp and
Inverter circuit
LDO regulator
Feedback Isolation
Fig.1
#1 EMI Filter
This circuit (fig. 2) is designed to inhibit electrical and magnetic interference for meeting FCC,
VDE, VCCI standard requirements.
3
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
Fig. 2
#2 Rectifier and filter
AC Voltage (90-264V) is rectified and filtered by BD601, C605 (See Fig 3) and the DC Output
voltage is 1.4*(AC input). (See Fig.3)
Fig. 3
4
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
Fig. 4
#4 Rectifier and filter
D701 and C703 are to produce DC output. L701 and C704 are to suppress high Frequency switching
spikes. (See Fig.5)
Fig. 5
5
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
#5 PWM Controller
The current mode control IC UC3842B is used to control PWM. When the VCC terminal of it gets
16V, IC601 turns on. +5V will be set up at Pin8 through soft start circuit, which includes R617, C611,
D606 and D605. R616 and C610 generate a fixed frequency saw-tooth wave at Pin4.
Fig. 6
#6 Feedback circuit
PC123 is a photo-coupler and TL431 is a shunt regulation. They are used to detect the output
voltage change and be the primary and secondary isolation. When output voltage changes, the
feedback voltage will be compared and duty cycle will be decided to control the correct output
voltage. (See Fig.7)
Fig. 7
6
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
2. General Specification
Input Voltage: 15V
Input Current: 2A max.
ON/OFF Voltage: 3.3V
PWM Duty: 3.3V/47KHz
Output Requirement:
Max. Output Current: 15mA
Min. Output Current: 6mA
Lamp Working Voltage: 600Vrms
Open Lamp Voltage: 1700Vrms
Frequency: 50KHz
7
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
The turn-on voltage was controlled by R756 and R757.The inverter was turned on or off by the
switching transistors Q761 and Q757, Also regulator IC751 is control by Q761 and Q757 decide
supply 15V to inverter part or instead.
8
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
TL1451 is a dual PWM controller.C765 and R765 decide the working frequency.BLT_ADJ signal is
from control board, control pulse width then decide how much energy delivery to CCFL also decide
CCFL brightness. Q741 and Q742 be the buffer to rise the drive capability and the totem poles circuit
can improve a capable of driving for Q743.C770 decide the striking time delay.
9
Q7T3(AUO Panel) LCD Monitor Service Guide
Circuit Operation Theory
Royer circuit uses the characteristic of transformer saturation to oscillate. When the DC power inject,
Q759 or Q760 will turns on, and the current Ic increases. After a period, the transistor will leave the
saturation status and Vce increase. The result causes the voltage of primary coil get lower. Finally the
transistor turn off, and another transistor turn on. These statuses are repeated and the pin7 and pin8 of T751
will get a Sin Wave to turn on CCFL.
10
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
1.Alignment procedure (for function adjustment)
A. Preparation:
1. Setup input timing VGA_60Hz, Cross-Hatch ( General - I ) pattern.
2. The monitor power on at first time that will enter Factory OSD mode. (If not, Please press “Menu” and “Exit” plus
“Power” buttons at the same time. A “Factory” word will be showed on the upper left hand side of OSD Main menu.)
Burn in mode have already started. (See Fig 1.). If it hasn’t started, Please choose “BURN IN MODE” tag and select
“On” to enable burn-in mode.(See Fig2a ,2b)
3. Setup unit and keep it warm up at least 20 minutes
B. Timing adjustment:
1. Enter factory setting area (if it isn’t at factory mode, Please press “Menu” and “Exit” plus “Power” buttons at the same
time to enter factory mode.).
2. Select timing from Table 1. The timing marked with star sign (*) have to be adjusted.
3. Execute “Recall All” (press “Yes”) to clear user area in EEPROM
4. The cursor moves to “AUTO Adjust ” or press “I-Key” to run “AUTO adjustment” function.(After AUTO adjustment,
Press “Exit key ” to exit “ AUTO Color Balance ” function.
6. Check the phase of the image; if phase is not perfect adjust it to the best condition.
7. Adjust the settings to following values:
CONTRAST = 50
BRIGHTNESS = 90
OSD TIME = 20
COLOR = sRGB
8. When Factory mode is disable (burn-in mode “off”) then power off after power on will enter user mode.
1
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
White Balance X+- 0.326+(-) 0.03 230cd/m
(Reddish, 5800K set on OSD) Y+- 0.342+(-) 0.03
White Balance X+- 0.313+(-) 0.03 230cd/m
(sRGB, 6500K set on OSD) Y+- 0.329+(-) 0.03
White Balance X+- 0.283+(-) 0.03 200cd/m
(Bluish, 9300K set on OSD) Y+- 0.297+(-) 0.03
5. Move cursor into “BURN IN MODE” tag and select “Off” to disable burn-in mode.
6. Turns off the monitor power.
F. Command definition:
PC Host will send 0x7C IIC slave address and then following 4 bytes command
I2C Send Command Byte1 Byte2 Byte3 Byte4
Write Contrast CA 55 Data checksum
Write Brightness CA 56 Data checksum
Write Red Gain CA 57 Data checksum
Write Green Gain CA 58 Data checksum
Write Blue Gain CA 59 Data checksum
Read Contrast C3 55 XX checksum
Read Brightness C3 56 XX checksum
Read Red Gain C3 57 XX checksum
Read Green Gain C3 58 XX checksum
Read Blue Gain C3 59 XX checksum
Write Bluish(9300K) R-Gain Data to NVRAM AA 3C Data checksum
Write Bluish(9300K) G-Gain Data to NVRAM AA 3D Data checksum
Write Bluish(9300K) B-Gain Data to NVRAM AA 3E Data checksum
Write sRGB(6500K) R-Gain Data to NVRAM AA 4C Data checksum
Write sRGB(6500K) G-Gain Data to NVRAM AA 4D Data checksum
Write sRGB(6500K) B-Gain Data to NVRAM AA 4E Data checksum
Write Reddish(5800K) R-Gain Data to NVRAM AA 5C Data checksum
Write Reddish(5800K) G-Gain Data to NVRAM AA 5D Data checksum
2
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
Write Reddish(5800K) B-Gain Data to NVRAM AA 5E Data checksum
Write User R-Gain Data to NVRAM AA 6C Data checksum
Write User G-Gain Data to NVRAM AA 6D Data checksum
Write User B-Gain Data to NVRAM AA 6E Data checksum
Read Bluish(9300K) R-Gain data from NVRAM A3 3C XX checksum
Read Bluish(9300K) G-Gain data from NVRAM A3 3D XX checksum
Read Bluish(9300K) B-Gain data from NVRAM A3 3E XX checksum
Read sRGB(6500K) R-Gain data from NVRAM A3 4C XX checksum
Read sRGB(6500K) G-Gain data from NVRAM A3 4D XX checksum
Read sRGB(6500K) B-Gain data from NVRAM A3 4E XX checksum
Read Reddish(5800K) R-Gain data from NVRAM A3 5C XX checksum
Read Reddish(5800K) G-Gain data from NVRAM A3 5D XX checksum
Read Reddish(5800K) B-Gain data from NVRAM A3 5E XX checksum
Read User R-Gain data from NVRAM A3 6C XX checksum
Read User G-Gain data from NVRAM A3 6D XX checksum
Read User B-Gain data from NVRAM A3 6E XX checksum
Change Color Temperature to Bluish CC 1 XX checksum
Change Color Temperature to sRGB CC 2 XX checksum
Change Color Temperature to Reddish CC 3 XX checksum
Change C/T to User CC 4 XX checksum
User mode to factory mode 1A 5A XX checksum
Auto Color (Offset1, Offset2, Gain) 1B 5A XX checksum
Factory mode to User mode 1E 5A XX checksum
Clear user area data 1F 5A XX checksum
Off burn in mode CE 2 XX checksum
Change Language Setting 66 0~7 XX checksum
Note A: Byte4(Checksum) = Byte1 + Byte2 + Byte3
Note B: Data = The value write to MCU
Note C: XX = don't care, any value(<=0xFF).
Note D: The Byte-2 definition of “Change Language Setting” is as below,
0=DE, 1=EN, 2=ES, 3=FR, 4=IT, 5=JA, 6=繁中, 7=簡中
When PC Host sends 0x7D command to MCU, MCU must return as following (2 bytes)
Return Code R-Byte1 R-Byte2
Checksum error code FC AA
3
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
The Table is for alignment machine to read data from EEPROM to check if the alignment process and write data are correct.
Multi-scan
Incoming display mode (Input timing)
operation
4
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
5
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
6
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
7
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
e. Spacer
8
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
f. Signal cable with clip
g. Bracket Cover
9
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
h. Plug under AC socket
10
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
j. Control BD wire: conductive tape change to Clip
11
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
12
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
3. Add Glue
a. C605
13
Q7T3(CPT Panel)LCD Monitor Service Guide
Alignment Procedure
c. C615
14
Release Notice
1
Form No: ACM0-0B-003-24(010918)
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
I. Introduction:
The Q7T3-CPT is a 17” SXGA (1280x1024) , 26.2 K colors(R, G, B 6-bit data) TFT LCD
monitor without multi-media function. It’s an analog interface LCD monitor with a 15 pins D-sub signal
cable and it’s compliant with VESA specification to offer a smart power management and power saving
function. It also offers OSD menu for users to control the adjustable items and get some information
about this monitor, and the best function is to offer users an easy method to set all adjustable items
well just by pressing one key, we called it “Auto key” which can auto adjusting all
controlled items. Q7T3-CPT also offer DDC2 function to meet VESA standard.
1
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
(b) IC introduction:
1.) DDC (Display Data Channel) function: We use DDC IC to support DDC/2B function. DDC data
is stored in 24C02(EEPROM). Those data related to LCD monitor specification. PC can read
them by “SDA” and “SCL” serial communication for I²C communication for DDC2B.
2.) PW133A IC : There are A/D, Scaling, OSD, MCU functions in the PW133A IC. Scaling IC is
revolutionary scaling engine, capable of expanding any source resolution to a highly uniform
and sharp image, combined with the critically proven integrated 8 bit triple-ADC and patented
Rapid-lock digital clock recovery system. It also support detect mode and DPMS control. MCU
2
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
control unit, it controls all the functions of this interface board, just like the OSD display setting,
the adjustable items, adjusted data storage, the external IIC communication, support DDC2B.
3.) EEPROM: We use 24C16 to store all the adjustable data and user settings.
4.) FLASH ROM: To stored the source code which is accessed by MCU to run program.
EMI Filter Rectifier and Isolation power Rectifier and filter Audio Amp and
Inverter circuit
LDO regulator
Feedback Isolation
Fig.1
#1 EMI Filter
This circuit (fig. 2) is designed to inhibit electrical and magnetic interference for meeting FCC,
VDE, VCCI standard requirements.
3
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
Fig. 2
#2 Rectifier and filter
AC Voltage (90-264V) is rectified and filtered by BD601, C605 (See Fig 3) and the DC Output
voltage is 1.4*(AC input). (See Fig.3)
Fig. 3
4
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
#3 Switching element and Isolation power transformer
When the Q601 turns on, energy is stored in the transformer. During Q601 turn-off period, the
stored energy is delivered to the secondary of transformer. R607, C607 and D601 is a snubber
circuit. R615 is current sense resistor to control output power. (See Fig.4)
Fig. 4
#4 Rectifier and filter
D701 and C703 are to produce DC output. L701 and C704 are to suppress high Frequency switching
spikes. (See Fig.5)
Fig. 5
5
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
#5 PWM Controller
The PWM controller NCP1200A implements a standard current mode architecture. With an internal
structure operating at a fixed 40KHz. Where the switch time is dictated by the peak current set-point.
When the current set-point falls below a given value. The output power demand diminishes, the IC
automatically enters the so-called skip cycle mode and provides excellent efficiency.
Fig. 6
#6 Feedback circuit
PC123 is a photo-coupler and TL431 is a shunt regulation. They are used to detect the output
voltage change and be the primary and secondary isolation. When output voltage changes, the
feedback voltage will be compared and duty cycle will be decided to control the correct output
voltage. (See Fig.7)
Fig. 7
6
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
A-3.) Control board introduction:
The main parts of the control board are a push button, and a LED.
(a) Push button: It’s a simple switch function, pressing it for “ON” to do the auto adjustment
function, releasing it for “OFF” to do nothing.
(c) LED: It indicates the DPMS status of this LCD monitor; green light means DPMS on
(Normal operating condition). Amber light means DPMS off (Power off condition).
7
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
A-4.) Inverter diagram:
1.Block Diagram:
2. General Specification
Input Voltage: 15V
Input Current: 2A max.
ON/OFF Voltage: 3.3V
PWM Duty: 3.3V/47KHz
Output Requirement:
Max. Output Current: 15mA
Min. Output Current: 6mA
Lamp Working Voltage: 600Vrms
Open Lamp Voltage: 1700Vrms
Frequency: 50KHz
8
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
3.Circuit Operation Theorem
3.1 ON/OFF SWITCH
The turn-on voltage was controlled by R756 and R757.The inverter was turned on or off by the
switching transistors Q761 and Q757, Also regulator IC751 is control by Q761 and Q757 decide
supply 15V to inverter part or instead.
9
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
3.2 PWM Control circuit
TL1451 is a dual PWM controller.C765 and R765 decide the working frequency.BLT_ADJ signal is
from control board, control pulse width then decide how much energy delivery to CCFL also decide
CCFL brightness. Q741 and Q742 be the buffer to rise the drive capability and the totem poles circuit
can improve a capable of driving for Q743.C770 decide the striking time delay.
10
Q7T3 (CPT panel) LCD Monitor Service Guide
Circuit Operation Theory
3.3 Oscillator Circuit
Royer circuit uses the characteristic of transformer saturation to oscillate. When the DC power inject,
Q759 or Q760 will turns on, and the current Ic increases. After a period, the transistor will leave the
saturation status and Vce increase. The result causes the voltage of primary coil get lower. Finally the
transistor turn off, and another transistor turn on. These statuses are repeated and the pin7 and pin8 of T751
will get a Sin Wave to turn on CCFL.
11
5 4 3 2 1
3.3V_MCU
Q1
2N3906
3.3V_MCU 2 3
K
C48
0.01U K
J J J J
1
10/9 '03 PC5V TP1 BAV99 BAV99 BAV99 BAV99
A
R1: R1
DN15 DN1 DN2 DN3
K
10K --> 2K. 2K BZV55-C5V1
D
D9 D
TP2
R2 R3 R4
Q2
R5
A
2N3906 75 75 75
16
3.3V_M
PC5V 2 3 J1
6 TP3 R6 100
RED-
11 1 TP4 R+
47 R7 100 C1 47P J
7 RED+
1
TP6 12 2 TP7 G+
8 R8 100 C2 47P J
GREEN-
TP9 13 3 TP10 B+
R9 9 R11 100 C3 47P J
GREEN+
2
4.7K R10 C75 TP11 14 4 TP150
2K 0.1U K 10 C4 47P J
D1 TP12 15 5
3.3V R13 100
BLUE-
DSUB_SDA
1
3
2024012015 R14 100 C5 47P J
A-detect BLUE+
17
R15 1K 1 Q3
PC5V_OFF
2N3904 C6 47P J
DSUB_SCL
K
2 BZV55-C5V1 BZV55-C5V1
D2 D3
A
R16 100
HSYNC
+ - H
+ + L R17 100
VSYNC
K
C
- + Don't care BZV55-C5V1 BZV55-C5V1 C
D4 R18 D5 R19
C8 C9
10K 10K 47P J 47P J
If both PC5V and 3.3_MCU exist:
A
PC5V_OFF should set "LOW" to prevent PC5V from entering
the system.
When only PC5V exists:
PC5V_OFF should set "HIGH" to provide CPU power.
Actually, in the initial state, NO PC5V_OFF, if VGA
3.3V_MCU
cable is connected, PC5V exists --> Q4 will ON.
That will make 3.3_M = 3.3V. 3.3V_MCU DN4
2 1 DVIPC5V
3
BAV70LT1
K
R101
J C10
DVIPC5V RX0- RX0M
0.1U K
K
10 R20 R21
BAV99 R102 U1 4.7K 4.7K
RX0+ DN5 A J RX0P 1 A0 VCC 8
B B
K
10 2 7
BAV99 R103 A1 WP
A
2061106210 DN6 J 3 6 R22 47
RX1- RX1M A2 SCL DVISCL
TP86 RXC-
K
RXC- TP87 RXC+ 10 R23 47
RXC+ 19 20 4 GND SDA 5 DVISDA
17 18 BAV99 R104
A
TP88 RX0- 15 16 TP94 DN7 J C101
RX0- DVISDA RX1+ RX1P 0.01U K AT24C02
TP89 RX0+ 13 14 TP95
DVISCL
K
RX0+ 10
11 12
TP90 RX1- 9 10 TP96 BAV99 R105
A
K
TP92 RX2- 3 4 10K 10
RX2- TP93 RX2+ BAV99 R106
1 2
A
RX2+
RX2+ DN9 J RX2P
J101
K 10
BAV99 R107
A
3.3V_MCU DN10 J
RXC- RXCM
K
10
BAV99 R108
A
DN11 J RXCP
K
D7 D8 RXC+
D6 BZV55-C5V1 10
BAV99
A
A
J D-detect
Benq Corporation A
3.3V_MCU
VAD
VDVI C11 C12 C13 C14 C15 C16 C17
VDPLL 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
VPLL 3.3V_MCU
D +2.5V D
104
114
126
117
55
65
35
45
51
53
11
21
84
94
18
87
97
VDDC
VDDC
VDDC
VDDC
AVDD
AVDD
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
AVDD_MPLL
AVDD_PLL
AVDD_DVI
AVDD_DVI
63 106 3.3V_MCU VAD 3.3V_MCU VPLL
RED+ RIN0 LVACKP/NC TXEC+ L1 L2
RED- 62 RIN0M LVACKM/NC 107 TXEC-
GREEN+ 60 GIN0 LVA2P/RA1P 108 RA1P
1
GREEN- 59 GIN0M LVA2M/RA1N 109 RA1N 220 OHM 220 OHM
1
61 110 + C18
SOGIN0 LVA1P/RA2P RA2P + C19 C20 22U C23
BLUE+ 58 BIN0 LVA1MRA2N 111 RA2N
57 U2 112 22U 0.1U 16V 0.1U
BLUE-
2
BIN0M LVA0P/RA3P RA3P 16V
HSYNC 37 113
2
HSYNC0 LVA0M/RA3N RA3N
VSYNC 38 VSYNC0
29 DDC1_CLK/GPO8 GA1P 98 GA1P
28 99 3.3V_MCU
DDC1_DAT/GPO7 GA1N GA1N
GA2P 100 GA2P
GA2N 101 GA2N
LVA3p/GA3P 102 GA3P
40 103 VDPLL
C RX2P R+ LVA3M/GA3N GA3N C
41 VDVI 3.3V_MCU L4
RX2M R-
RX1P 43 G+ BA1P 88 BA1P
1
RX1M 44 G- BA1N 89 BA1N 220 OHM 220 OHM
46 90 L3 + C45
RX0P B+ BA2P BA2P 22U C24 C27
RX0M 47 B- BA2N 91 BA2N
49 92 16V 0.1U 0.1U
RXCP
2
CK+ BA3P BA3P
RXCM 50 CK- BA3N 93 BA3N
52 REXT
VDVI 16
R25 390 F NC/RB1P RB1P
NC/RB1N 17 RB1N
NC/RB2P 22 RB2P Add C45 for Diagonal noise.
MST8116B 23
NC/RB2N RB2N
66 REFP NC/RB3P 24 RB3P Also reverse L1 and C19.
NC/RB3N 25 RB3N
C28 L1, L3 and L4 change to 0 ohm +2.5V
0.1U 67 8
REFM NC/GB1P GB1P for power ripple reduction.
NC/GB1N 9 GB1N
NC/GB2P 12 GB2P
NC/GB2N 13 GB2N C29 C30 C31 C32
NC/GB3P 14 GB3P Current setting=Direct DDR Bus 0.1U 0.1U 0.1U 0.1U
NC/GB3N 15 GB3N
3 CSZ 69 CSZ/ALE BUStype=High: Direct DDR Bus
B 3 RDZ 71 SCL/RDZ LVB3P/CLKAP 118 CLKAP B
3 WRZ 70 SDA/WRZ LVB3M/CLKAN 119 CLKAN BUStype=Low : 3-wire Bus
RESET R202 100 32 120
HWRESETZ LVBCKMP/NC/CLKBP CLKBP
INT 72 INT LVBCKP/NC/CLKBN 121 CLKBN
LVB2P/NC 122 TXO2+
LVB2M/NC 123 TXO2-
12M LVB1P/NC/BB1P 124 BB1P
R65 LVB1M/NC/BB1N 125 BB1N
LVB0P/NC/BB2P 128 BB2P
BRT_ADJ LVB0M/NC/BB2N 1 BB2N pin 68: NC (MST suggested), 10/14.
73 PWM0 NC/BB3P 4 BB3P
10K 74 PWM1 NC/BB3N 5 BB3N
C34
NC/ESP 75 ESP ** R28 & C33 are reserved for ESD
1
Benq Corporation
34 XOUT GPO4 79 GPO4
C36
4.7P C AD0 30 AD0
3 77 R26 Project Code Model Name OEM/ODM Model Name
BYPASS AD1 AD1
2 78 4.7K
AVSS_LPLL AD2 AD2 99.L8372.001 Q7T3 <OEM/ODM>
AVSS_MPLL
A 31 A
0.1U AD3 AD3
AVSS_PLL
AVSS_DVI
AVSS_DVI
AVSS_DVI
116
68
56
64
36
54
39
42
48
10
20
85
95
19
86
96
3.3V_MCU
1
2
3
4
8
7
6
5
RN4
4.7K
4.7K
RN7
8
7
6
5
3.3V_M
ENTER
1
2
3
4
INC
DEC
EXIT
C43 R30 R31
3.3V_M 0.1U K 4.7K 4.7K
3.3V_MCU U4
LED_ORG
D
1 A0 VCC 8 D
3.3V_M LED_GRN
2 A1 WP 7
8
7
6
5
C44
4.7K
3.3V_M S CL
44
43
42
41
40
3 A2 SCL 6
1
0.22U K
RN3
4 5 S DA
NC
NC
VDD3
DA0/P5.0
DA1/P5.1
DA2/P5.2
VSYNC
HSYNC
DA3/P5.3
DA4/P5.4
DA5/P5.5
GND SDA
1
2
3
4
AT24C04N-10SI-2.7
3.3V_MCU 3.3V_M 7 39
RST DA8/HLFHO
C301 8 38
要靠近Scaler VDD DA9/HALFV
R88 4.7K 9 37
C301 P6.3/AD3 HBLANK/P4.1
R301 U5
12M 10 VSS VBLANK/P4.0 36 MUTE
0 C46 11 35
0.1U K X2 DA7/HCLAMP
22P J Y2 R308 12 SOCKET P/N: 22.10079.044 34 I-KEY
1M X1 DA6/P5.6
R301要靠近MCU C47 12MHZ
13 33
ISDA/P3.4/T0 P6.7/DA13 BLT_ON
HSDA/P3.1/Txd
1
2
3
4
Delete:
RN5
P3.2/INT0
4.7K
P6.1/AD1
P6.0/AD0
Change PWR_OFF to VOL_ON_OFF on P6.2.
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
8
7
6
5
C S DA C
18
19
20
21
22
23
24
25
26
27
28
S CL
R307
VOLUME DSUB_SDA
AD0
10K R43 100
PC5V_OFF
RESET D-detect
1
2
3
4
AD1
RN2
INT
4.7K
AD2
AD3 CSZ
WRZ
8
7
6
5
RDZ 3.3V_M
1
2
3
4
1
2
3
4
RN6
4.7K
3.3V_MCU
RN1
4.7K
8
7
6
5
8
7
6
5
3.3V_MCU R77
220
3.3V_MCU
3.3V_MCU
R76
220
3
R303
1k Q6
LED_GRN 1
R0603 2N3904 CON1
2
3
R302 TP26 1
1k Q7 TP27
MUTE LED_ORG 1
2N3904
2
3
R0603
4
2
5
200ms 200ms 6
7
1K 8
L12 R46 TP28 9
B INC L13 R47 1K TP29 B
ENTER L10 R44 1K TP30
VOL_ON_OFF EXIT L11 R45 1K TP31 2060091109
DEC L301 R3041K TP32
PW_SW L302 R3051K TP33
I-KEY
J4
+5V TP151 2 1 TP152 3.3V_MCU 3.3V_MCU +2.5V R309 0
BLT_ON BRT_ADJ
4 3 TP157
L5 6 5
8 7 L6 GMT
TP153 10 9 220 OHM U6
12 11 TP154 1 3
Z30 TP155 TP156 VIN VOUT
14 13
GND
GND
VOLUME MUTE
1
1
2072060207 + C57
+ C71 + C60 G950T65U C61
2
G1
C73 C77 C80 C76 C79 C78 C74 0.1U K 22U 25V 0.1U K
2
47U 25V 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 0.1U K 47U 25V
2
A A
Benq Corporation
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3 <OEM/ODM>
Title
INTERFACE BOARD
+5V
5V_PANEL
R57
D
100K LCD_PW
Q4
1
G AO3401
D + C68 D
+5V
S
3
22U 25V
2
R61 20K 1 Q5
PANEL_ON
2N3904 G(1)
D(3)
2
C69 S(2)
0.1U K
C 20K2085030 C
TP64 G2
TXO0- TP43 G2
BB2N 30 30
TXO0+ TP44 29
BB2P 29
TXO1- TP45 28
BB1N 28
TXO1+ TP46 27
BB1P 27
TXO2- TP47 26
TXO2- 26
TXO2+ TP48 25
TXO2+ 25
24 24
TXOC- TP49 23
CLKBN 23
TXOC+ TP50 22
CLKBP 22
TP51 21
CLKAN 21
TP52 20
CLKAP 20
TXE0- TP53 19
RA3N 19
TXE0+ TP54 18
RA3P 18
17 17
TXE1- TP55 16
RA2N 16
TXE1+ TP56 15
RA2P 15
14 14
B TXE2- TP57 B
RA1N 13 13
TXE2+ TP58 12
RA1P 12
TXEC- TP59 11
TXEC- 11
TXEC+ TP60 10
TXEC+ 10
TXE3- TP61 9
GA3N 9
TXE3+ TP62 8
GA3P 8
7 7
6 6
5 5
4 4
5V_PANEL TP63 3 3
Benq Corporation
2 2
1 1
G1 G1
Project Code Model Name OEM/ODM Model Name
J5 <OEM/ODM>
C401 99.L8372.001 Q7T3
0.1U K Title
A
INTERFACE BOARD A
D D
C C
1
1
5 9 5 9 5 9 5 9 OP8 OP9 OP10 OP11 OP12 OP13 OP14
OP OP OP OP OP OP OP
4 8 4 8 4 8 4 8
3 7 3 7 3 7 3 7
2 6 2 6 2 6 2 6
H1 H2 H3 H4
B B
A
Benq Corporation A
Project Code Model Name OEM/ODM Model Name
99.L8372.001 Q7T3 <OEM/ODM>
Title
INTERFACE BOARD
D D
20K2167050
TP99 G2
50
RA3N FB0N TP100 49
RA3N
RA3P FB0P TP101 48
RA3P
47
RA2N FB1N TP102 46
RA2N
RA2P FB1P TP103 45
RA2P
44
RA1N FB2N TP104 43
RA1N
RA1P FB2P TP105 42
RA1P
41
GA3N FG0P
FG0N TP106 40
GA3N
GA3P TP107 39
GA3P
38
GA2N FG1N TP108 37
GA2N
GA2P FG1P TP109 36
GA2P
C 35 C
GA1N FG2N TP110 34
GA1N
GA1P FG2P TP111 33
GA1P
32
TP112 31
CLKAP
TP113 30
CLKAN
29
BA3N FR 0N TP114 28
BA3N
BA3P FR0P TP115 27
BA3P
26
BA2N FR 1N TP116 25
BA2N
BA2P FR1P TP117 24
BA2P
23
BA1N FR 2N TP118 22
BA1N
22 BA1P FR2P TP119 21
BA1P
RN8 20
OSP 5 4 TP120 19
OSP
6 3 LP TP121 18
GPO1
7 2 POL TP122 17
GPO0
ESP 8 1 TP123 16
ESP
22 15
5 4 CLKV TP124 14
GPO3 20K2167030
6 3 STV TP125 13
GPO2
7 2 OE TP126 12 TP127 G2
GPO4
B 8 1 11 30 B
10 RB3N B0N TP128 29
RB3N
RN9 9 RB3P B0P TP129 28
RB3P
8 27
7 RB2N B1N TP130 26
RB2N
LCD_PW 6 RB2P B1P TP131 25
RB2P
TP132 5 24
4 RB1N B2N TP133 23
RB1N
3 RB1P B2P TP135 22
RB1P
2 21
1 GB3N BG0N TP136 20
GB3N
G1 GB3P BG0P TP137 19
GB3P
C602 18
0.1U K J7 GB2N BG1N TP138 17
GB2N
GB2P BG1P TP139 16
GB2P
15
GB1N BG2N TP140 14
GB1N
GB1P BG2P TP141 13
GB1P
12
Benq Corporation
TP142 11
CLKBP
TP143 10
CLKBN
9
BB3N BR0N TP144 8 Project Code Model Name OEM/ODM Model Name
BB3N
BB3P BR0P TP145 7
BB3P 99.L8372.001 Q7T3 <OEM/ODM>
A 6 A
BB2N BR1N TP146 5 Title
BB2N
BB2P BR1P TP147 4 INTERFACE BOARD
BB2P
3
BB1N BR2N TP148 2 Size PCB P/N PCB Rev. Document Number R ev.
BB1N
BB1P BR2P TP149 1 <Size>
BB1P 48.L8301.S72 S72 99.L8372.000-C3-304-006 0
G1
J6 Date: Tuesday, December 23, 2003 Sheet 6 of 6
Prepared By Reviewed By Approved By
ANGEL HU ARSENIO LIU ARIES CHU
5 4 3 2 1
Q7T3(CPT panel) LCD Monitor Service Guide
Trouble Shooting
Q7T3-CPT TROUBLE SHOOTING GUIDE
No
Yes
Yes
Yes
Yes
Yes
Yes
Replace panel
1
Q7T3(CPT panel) LCD Monitor Service Guide
Trouble Shooting
2. BUTTON function:
Yes
Yes
No
Replace Control BD
Is OSD working??
No
Check Interface BD
3. OSD function:
Check interface BD
2
Q7T3(CPT panel) LCD Monitor Service Guide
Trouble Shooting
4. Power Board
Y Y
Replace Q761 IC751 PIN 9 IS 15V? LED shined?
N N
N Y
Plug CN701 again or PWM existed?
3.3V existed? IS I/F board connected?
checking I/F BD (BLT_ADJ)
Y Y N
Y
Replace new fuse
N Y
Check CN752, CN753
Insert them again Check IC701 OK? Replace IC701
was pluged properly?
Y
N
Replace IC751,Q751 Y
Checking F601
Replace new fuse
Broke?
Y
Replace
Check IC601 Vcc
IC601,ZD601,C606,
existed?
C611
Replace IC602,
IC702,D702 or check
I/F BD