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Ailing Cai

Email: calellen@yahoo.com, phone: 919-599-78633

To obtain the Yield/Failure Analysis Engineer position in the semiconductor indu
Work Experience ________________________
Maxim Integrated Products, Inc.-Yield analysis and failure analysis on silicon m
ixed signal products as a member of technical staff-2006 to 2009
* Performing data analysis and data correlation of the yield loss
* Improving the defect density and process excursions by working with the test e
ngineers, process integration engineers and designers
* Determining the root cause of the yield loss on mixed signal products
* Failure analysis(FA) skills including micro probing, deprocessing, using liqui
d crystal to identify the short; using infrared emission microscopy with InGaAs
detector and laser stimulation technique to do the fault isolation; using singl
e-beam focused ion beam(FIB) to do the circuit edit
* Achievements: Finding the barrier metal layer issue causing the VCC to GND sho
rt by performing the FA
* Finding the contact to gate short due to the stepper misalignment issue
by performing the FA
* Finding the settle time issue of product of PD58 by performing the benc
h test
Intel Corporation-Low yield analysis (LYA) for the Yield Department of Intel's P
ortland Technology Development (PTD) as a Sr. process engnieer-2005 to 2006
* Responsible for analyzing the yield impact of process changes and excursions
* Extensive use of statistical tools and software
* Responsible for understanding of SRAM yield issues and back end process yield
issues, and interpreting defect data from dual-beam FIB and TEM
North Carolina State University-Ph.D. student-2000 to 2005
* Research focused on opto-electronic device simulation, design, fabrication and
* Investigated a new application of GaN thin films to the fabrication of Mach-Ze
hnder waveguide interferometers
* Performed on diffused waveguide fabrication and characterization
* Simulation, design and layout of asymmetric-twin waveguide integrated with las
er by using BeamPROPTM software
* Fabrication of CMOS devices, nanostructures and GaN waveguide devices in clean
room environment for 5 years
* Utilized various characterization and process equipment including atomic force
microscopy (AFM), scanning electron microscopy (SEM), cathodoluminescence (CL),
optical transmission spectrophotometer, Hall Effect measurement, prism coupling
system, contact aligner for photolithography, reactive ion etching system, and
e-beam evaporation system
Missouri State University-Master's degree student-1998 to 2000
* Research focused on the growth and characterization of gallium nitride thin fi
lms on 6H-SiC by molecular beam epitaxy (MBE)
* Gained experience with various characterization techniques including Auger ele
ctron spectroscopy (AES), low-energy electron diffraction (LEED), x-ray photoele
ctron spectroscopy (XPS), scanning tunneling microscopy (STM), and photoluminesc
ence (PL)
* Instructed undergraduate physics labs to approximately 50 students per semeste

Education _____________________________________________________
Ph.D., Electrical Engineering, North Carolina State University, July 2005, GPA:
M.S., Materials Science, Missouri State University, May 2000, GPA: 3.9
B.S., Applied Physics, Beijing University of Aeronautics and Astronautics, July
1992, GPA: 3.3