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Overview
Laker provides an open environment to realize SDL (Schematic Driven Layout) flow. Circuit designers can convert the database of Laker-AMS to Laker. Laker will keep the original schematic of design, and integrate with rich L3 functions to help layout engineer to finish the physical design. The purpose of this application note is to explain the steps involved in importing the database of Laker-AMS into Laker.
File Required
In order to import the database of Laker-AMS into Laker, the user is required to provide the following: The database of Laker-AMS. Laker Technology File. Model Map File - explained as follows.
2. Specify the options for importing process. The Import Laker-AMS form appears after the command is invoked. User may input the filename and library information into this form. The individual inputs are as follows.
The following inputs are required in this form: AMS Design Directory - the directory of Laker-AMS database. AMS INI File - the local environment file of Laker-AMS. AMS Master INI File - the default environment file of Laker-AMS. Run Directory - typically the current working directory (.), or specify the directory path. Library Name - the target design library to be translated to. W/L Scale - Set a scale factor to evaluate the final width and length of transistors in the schematic. The default value is 1. Technology File -
ASCII file: user can choose to load the Laker tech file (typical .tf suffix). Attach to library: User can choose to attach from other library. With respect to Case Sensitivity, users have the options of Preserve, Upper, or Lower to retain the case sensitivity in cell names. Laker also provides the Extract port swapping information option, which allows user to extract the swapping information of equivalent ports from the imported netlist data during EDIF In process. Model Map File - mapping information for Laker-AMS and Laker. Laker provides the Extract Schematic Editing Commands option. While importing a design to a new or an existing library, Laker will compare the hierarchy of new netlist and old netlist. This option extracts the commands that you have done for changing the hierarchy of design in the reference library and save this information in a command file (*.cmd). If you have further questions or concerns on this topic, please feel free to contact your local Silicon Canvas AE.
[PARAMETER] #Library Layout #name cell sdfLib inv [CELL_TYPE] #Cell Cell #name Type Nmos NMOS nmos4 NMOS Pmos PMOS pmos4 PMOS Pnp PNP Npn NPN Cap C Res R Diode D Ipin INPUT Opin OUTPUT [SYMBOL] #MODEL_TYPE M M [M_FACTOR] # Factor M M
[ELEMENT_PREFIX] #MODEL_TYPE MODEL_NAME M PMOS M NMOS C CAP* R RES X NAND2 [PORTMAP] #Device M PORT_MAP_LIST { A:A1 B:B1}
Name WM wm LM lm MM mm
Rename w w l l m m