About Amitabha Sinha (Director, SET[SCHOOL OF ENGINEERING AND TECHNOLOGY]) Prof. Sinha obtained his Ph.

D degree in Computer Science and Engineering from IIT, Delhi and has worked in senior positions in the industry and in academia for the last 25 years. He was Head, DSP (Digital Signal Processing) group of the R&D center of CMC Ltd. and Vice-President of HFCL. Prof. Sinha has taught at Oakland University, U.S.A., erstwhile B.E. College, Howrah (now BESU) and BITS, Pilani. He was a member of the advisory board of the Dept. of Science and Technology, Govt. of West Bengal. He is a member of IEEE and has chaired sessions of IEEE. His areas of expertise are embedded computer systems, application specific digital circuit design using FPGAs, DSP (Digital Signal Processing), parallel architecture and parallel processing for signal and imaging applications. He cofounded a U.S. based start up company ESP microDesign working on developing IPR in the area of Reconfigurable DSP Processor.

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LIST OF PUBLICATIONS ( Last three years) Journals: 1.Satrughna Singha and Amitabha Sinha, Survey of Various Number Systems and Their Applications, International Journal of Computer Science and Communication, Volume-1, Number-1, pp. 73-76, January-June 2010. 2.Satrughna Singha, S. Chakraborty and Amitabha Sinha, Theory and Applications of the Double-Base Number System Using Bases 2 and 5 , International Journal of Computer Science and Communication, Volume-1, Number-1, pp. 97-100, January-June 2010. 3.Aniruddha Ghosh, Satrughna Singha and Amitabha Sinha, A Novel Architecture of Mixed Number System MAC Unit For Digital Signal Processors, International Journal of Computer Science and Communication, Volume-1, Number-2, pp. 175-179, July-December 2010. Referred IEEE Proceedings ( published in IEEE explore) 1.Subhashis Maitra ,Amitabha Sinha, Efficient Utilization of MAC Unit Using Mixed Number System accepted for publication in the proc. 2010 International Congress on Computer Applications and Computational Science (CACS 2010), to be held on 4-6 December 2010, Singapore. 2. Atri Sanyal, Swapan Kumar Samaddar, Amitabha Sinha , A Generalized Architecture for Linear Transform , Proc. IEEE International Conference on CNC 2010, Oct 04-05, 2010 , Calicut , Kerala, India . 3. Sharbari Banerjee ,Amitabha Sinha , A Reconfigurable Digital Signal Processor using Residue Number System,Proc. 10th Intl. conf. on Information Science , Signal Processing and their applications, 10-13 may, 2010 , Kualalumpur, Malaysia. 4.S.Banerjee, A.Sinha ,Performance Analysis of different DSP Algorithms on Advanced Microcontroller & FPGA , IEEE Intl' conference on Advances in Computational tools for Engineering Applications (ACTEA) , July 15-17,2009 , Lebanon. 5.Amrita Saha , Amitabha Sinha An FPGA Based Architecture of A Novel Reconfigurable Radio Processor for Software Defined Radio, Proc.2009 International Conference on Education Technology and Computer (ICETC 2009) ,April 17 - 20, 2009, Singapore.

6.Sinha,A., Maitra,S., Sinha P., Mukherjee,K., Newton, K.,Triple Base Number Systems A Novel Concept for Performance Enhancement of Digital Signal Processors,TENCON-2008, November 19-21, 2008 , Hyderabad. 7.Amitabha Sinha , Subhashis Maitra , Pavel Sinha , Ken Newton, Kishanu Mukherjee , Binary to Triple Base Number Conversion System-An Efficient Techniques to Convert Binary Number to Triple Base Number,International Symposium on Electronics and Telecommunications ETC 08, Eighth Edition, Sept.25-28,2008,Timisoara.,Romania. 8.Amrita Saha ,Amitabha Sinha, Radio Processor -A New Reconfigurable Architecture for Software Defined Radio, Proc. International conference on Computer Science and Information Technology 2008 (ICCSIT 2008) , August 29 -September 2, 2008, Singapore,pp.709-713. . 9.Partha Pratim Kundu, Oishila Bandopadhaya , A Sinha, "An Efficient Architecture of RNS Based Wallace Tree Multiplier for DSP Applications", Proc. 2008 IEEE Midwest Symposium on Circuits and Systems(MWSCAS) , August 10-13, 2008 , Knoxville, USA ,pp.221-224 , ISBN: 978-1-4244-2166-4. 10.Subhashis Maitra and Amitabha Sinha, Architecture of a Mixed Radix umber Systems- A new Approach of Designing Digital Filter ,Proc. IASTED international Conference on Signal & image Processing, August 16-20 ,2008 ,Kailua -Kona, Hi,U.S.A. 11.Subhashis Maitra and Amitabha Sinha ,Architecture of Double Base Mixed Radix Number System- a New Concept of Designing Digital Filter ,Proc. 6th Symposium on Communication Systems Networks and Digital Signal Processing , Graz University of Technology , Graz, Austria. 12Joyanta Basu , Md. Sahidullah and Amitabha Sinha A New Generalized Reconfigurable Architecture for Digital Signal Processor , 15th intl conf. on advanced computing and communication (ADCON-2007) , Dec.18-21 ,2007,Guahati, India. 13.Subhashis Maitra, Amitabha Sinha , A Single Digit Triple Base Number System A New Concept for Implementing High Performance Multiplier Unit for DSP Applications , Proc. IEEE Sixth intl conference on Information, Communication & Signal Processing , 10-13 Dec. 2007,Singapore, pp 1-5. ISBN: 978-14244-0983-9 . 14.Pavel Sinha, Saibal Sarkar , Amitabha Sinha ,Dhruba Basu ,Architecture of a Configurable Centered Discrete Fractional Fourier Transform Processor , Proc.50th IEEE intl Midwest symp. On circuits & systems , Aug.5-8,2007, Montreal, Canada . 15.A.S. Korotkov,D.V. Morozov,M.M. Pilipko and Amitabha Sinha Delta-Sigma ADC for ternary Code System ( Part I : Modulation realization) , accepted in Proc. IEEE intl symposium on Signals,Circuits & Systems ,July 12-13, 2007, Lasi, Romania. 16. A.S. Korotkov,D.V. Morozov,M.M. Pilipko and Amitabha Sinha Delta-Sigma ADC for ternary Code System ( Part II : Modulation realization) , accepted in Proc. IEEE intl symposium on Signals,Circuits & Systems .July 12-13, 2007, Lasi, Romania.