BSIMIMG Model Version 102-70 (Level=78, 201) BSIM-IMG Independent Mult-Gate MOSFET Model
17.2 BSIM-IMG Model Version 102.7.0 (Level=78, 301)
17.2.1 Introduction
The BSIM-IMG 102.7.0 models the independent double-gate structure as a four terminal
device, containing the source (s), drain (d), front gate (fi), and back gate (bg) terminals. The
two gates (¢.g., Infg, 2-bg) are allowed to have different workfunctions (Ay), As) and
dielectric thicknesses (Ty.13 Ta2)- They can also be biased separately at different voltages,
Physical surface-potential-based formulations are derived in both intrinsic and extrinsic
models of BSIM-IMG. Surface potentials and integrated charge densities at the source and
drain ends are obtained by solving the Poisson's equation in a fully-depleted, lightly-doped
body and calculating with efficient analytical approximations. Since the surface potential
equation is derived based on Poisson's equation, the model captures volume inversion effects,
very well and shows excellent scalability compared with 2D device simulation
To meet the requirements of future devices, new parameters has been included to model
devices consisting of novel materials. This includes parameters for non-silicon channel
devices and High-K gate insulators.
Threshold Voltage (V)
“1
Back Gate Bias (V)
Figure 17-2 Threshold Voltage (Vy,) versus back-gate bias (Vpq) for different gate lengths in NMOS transistor
with p-type substrate (p-wel), Symbols: TCAD; Lines: Model
The back gate of a planar double-gate SOI FET is often used for tuning device threshold
voltage (Vs). Therefore, the effect of back-gate on Vg, must also be addressed by the model
The threshold voltage of FDSOI transistor is extracted from constant current method as
shown in Figure 17-2. When the back gate bias (V..) is low, the threshold voltage follow a
linear relationship. For higher back-gate bias, however, the back-gate effect slows down as a
result of back surface accumulation,
The strength of back-gate control is often quantified as y, defined as:
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