System on Chip Fundamentals

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Agenda Introduction to SOC SOC General Architecture SOC Hardware SOC Software SOC Programming SOC in FPGA Q&A

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Introduction to SOC Refers to integrating all components of a Electronic system into a single Chip The SoC chip consists of atleast two or more complex Micro-electronic components integrated into different single Dies Complex functionalities previously required heterogeneous components to be connected on a PCB is integrated within one single silicon chip. It may contain Digital, Analog, Mixed signal and radio Frequency functions.

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Introduction to SOC Contd.. Microcontrollers typically have under 100K of RAM (often just a few Kbytes) and often really are single-chip-systems. SOC is typically used with more powerful processors, capable of running software such as Windows or Linux, which need external memory chips (flash, RAM) to be useful, and which are used with various external peripherals. SOC is believed to be more cost effective since it increases the yield of the fabrication and because its packaging is simpler
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Introduction to SOC Contd.. Typically SOC incorporates

-- A programmable processor -- on-chip memory -- Accelerated Functional units -- Peripheral devices

SOC gives advantage in

-- Space and power reductions -- Increased performance -- Design Reuse to reduce Time to market -- Proven and tested solutions with Ready to use IPs

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SOC Architecture

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SOC Architecture A typical SoC consists of: One Microcontroller, Microprocessor or DSP core(s). Some SoCs called multiprocessor System-on-Chip (MPSoC) include more than one processor core. Memory blocks including a selection of ROM, RAM, EEPROM and Flash. Timing sources including Oscillators and Phase locked loops.

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SOC Architecture Peripherals including Counter-Timers, realtime timers and power-on reset generators External interfaces including industry standards such as USB, Ethernet, USART, SPI. SoC will have Analog interfaces including ADCs and DACs SoC will have Voltage Regulators and Power management circuits

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SOC Hardware Design Flow

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SOC Hardware internal blocks The Main blocks in SOC are

-- Processor and Co-Processor -- Memory -- Communication Bus -- Timing resources -- Analog Interfaces -- Power Management -- Peripherals

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SOC Hardware Processor and CO-Processor

A SOC Syatem may be a single processor based system or multi processor based system. In signle processor based system one processor will be doing all the processing activity and in Multiprocessor based system multiple processors will be sharing the load so it will be much faster. Here Processor does all the Arithmatic and logical functionalities. In Multi processor Based system as the load will be shared the processing will be much faster. In some SoC based platforms the co-processor will be high end network processor which will handle the packet processing in High end communication systems All these Processors will be accesible through JTAG interface.

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SOC Hardware Memory

In Memory the SOC will be accessible to internal memory and also the external memory components like SRAM,SDRAM,DDR SDRAM etc During the programming, instructions are stored in program (FLASH) memory in a way which is familiar to microcontroller. CPU fetches one instruction at a time from program memory, decodes it and executes appropriate operations. CPU unit has internal registers PC, SP, A, X and F, as well as ALU unit and instruction decoding unit, that are associated to instruction execution process.

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SOC Hardware Internal Registers of CPU

Program counter (PC) is used as a pointer to the next program instruction that should be executed. With each new instruction value of program counter is being set to point on the next instruction in program memory, which is going to be decoded and executed. Stack pointer (SP) points to the address of SRAM memory where data is written to or read from in case of PUSH and POP instructions respectively. When these instructions occur value stored in SP is internally incremented or decremented. Accumulator register (A) is the main register which handles all arithmetical, logical or data transfer operations.

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SOC Hardware Internal Registers of CPU

Index register (X) could behave as register A in large number of instructions. Also, register X is used in the case of index addressing. Flag register (F) contains bits which describe result of a previously executed instruction. It also has a role during selection of a RAM memory page in case when PSoC microcontroller has more than 256 bytes of RAM. Bit Flag Zero (Z) marks that accumulator stores a zero, while Carry (C) marks that there has been carrying during arithmetic or logic operations. Arithmetic logic unit (ALU) is a standard part of a CPU, which is used for arithmetic operations like addition, subtracting and shifting (left or right), as well as logic operations. Data handled by instructions could be stored in internal registers A and X, or in RAM data memory
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SOC Hardware Address space

SoC have three address spaces:
-- ROM -- RAM -- Registers

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SOC Hardware Communication Bus

Internal blocks are connected by either a proprietary or industry-standard bus such as the AMBA bus from ARM. DMA controllers route data directly between external Interfaces and memory, by-passing the processor core and thereby increasing the data throughput of the SoC. The important aspect of a SoC is not only which components or blocks it houses, but also how they are interconnected. AMBA is a solution for the blocks to interface with each other.

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SOC Hardware Timing Resources

Frequency generator -- Frequency generator is vital to CPU unit functioning, as well as programmable blocks. Each of programmable components has certain demands regarding speed. SoCs have a system for generation of different frequency signals, which is done by graphically selecting appropriate parameters.

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SOC Hardware Analog Interfaces -Some of input-output pins, beside their standard use can perform analog input or output operation. Any pin of port P0 as well as lower four pins of port P2 can be used as analog input. Inputs of port P0 are connected to analog blocks over analog multiplexers, while in case of port P2 they are connected directly to programmable SC blocks. Pins P2[4] and P2[6] can serve as external referent voltage inputs. Outputs from analog blocks can be connected to 4 output buffers, which are connected to P0[2],P0[3],P0[4] and P0[5] pins.

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SOC Hardware Power Management

-Processor signal frequency CPUCLK is directly connected with the instruction execution speed of the microcontroller. Doubling the frequency, program executes approximately twice faster. On the other hand, higher frequency doesnt necessary always mean better overall performances. Main disadvantage in rising the frequency is its unwanted effect on microcontroller power consumption Major power saving can be achieved by bringing microcontroller to sleep mode while microcontroller does no important role. Saving is achieved because of all the frequencies, except CPU32K and SLEEP become inactive, while processor stops instruction execution. Microcontroller could be woken up from sleep mode only by reset or a interrupt.

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SOC Peripherals Most Common Peripherals for SoCs include...

-- UART -- USB -- CAN -- USART -- SPI -- I2C -- Ethernet -- ADC -- DAC -- PIO

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SOC Peripherals UART

-A universal asynchronous receiver/transmitter is a type of "asynchronous receiver/transmitter that translates data between parallel and serial forms. UARTs are commonly used in conjunction with other communication standards such as RS-232. The "universal" designation indicates that the data format and transmission speeds are configurable. To communicate over UART, we just need three basic signals which are namely, RXD (receive), TXD (transmit), GND (common ground). So to interface MAX232 with any microcontrollers we just need the basic signals.

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SOC Peripherals UART

-In Microcontroller based system there will be various registers to set the UART communication where the registers include -- Flag registers : To set the Various flags on errors -- Enable registers : to interrupt enabling for Receive and transmit data, Parity mode ,stop bits and so on. -- Baud Registers : Higher Byte and lower byte define the baud rate of the UART communication system -- Data Register : To transmit data serial we need to put the data to send in 8-bit UDR (UART Data Register) and poll the empty transmit buffer to set. While receiving data we wait for the receive flag, when its set the data received can be read from the UDR register.

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SOC Peripherals USART

-The Universal Synchronous Asynchronous Receiver Transmitter (USART) module is one of the two serial I/O modules (other is the SSP module). The USART is also known as a Serial Communications Interface or SCI. The USART can be configured in the following modes: Asynchronous (full duplex) Synchronous - Master (half duplex) Synchronous - Slave (half duplex) In Asynchronous this mode, the USART uses standard non return-to-zero (NRZ) format (one start bit, eight or nine data bits and one stop bit). In Synchronous Master mode, the data is transmitted in a halfduplex manner, i.e. Transmission and reception do not occur at the same time. When transmitting data, the reception is inhibitedand vice versa.

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SOC Peripherals USART

-Synchronous slave mode differs from the Master mode in the fact that the shift clock is supplied externally at the TX/CK pin (instead of being supplied internally in master mode). This allows the device to transfer or receive data while in SLEEP mode.

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SOC Peripherals USB

-Universal Serial Bus (USB) is a specification to establish communication between devices and a host controller . USB can connect peripherals such as mice , keyboards, digital cameras, printers, personal media players, flash drives, Network Adapters, and external hard drives. For many of those devices, USB has become the standard connection method USB device communication is based on pipes (logical channels). A pipe is a connection from the host controller to a logical entity, found on a device, and named an endpoint. The term endpoint is occasionally incorrectly used for referring to the pipe. However, while an endpoint exists on the device permanently, a pipe is only formed when the host makes a connection to the endpoint. The original USB 1.0 specification had a data transfer rate of 12 Mbit/s. USB2.0 with 480Mbit/s.

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SOC Peripherals USB

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SOC Peripherals USB

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SOC Peripherals CAN

-- Controllerarea network (CAN or CAN-bus) is a vehicle bus standard designed to allow microcontrollers and devices to communicate with each other within a vehicle without a host computer. -- CAN is a message based protocol, designed specifically for automotive applications but now also used in other areas such as industrial automation and medical equipment. -- CAN controller (hardware with a synchronous clock). Receiving: the CAN controller stores received bits serially from the bus until an entire message is available, which can then be fetched by the host processor (usually after the CAN controller has triggered an interrupt). Sending: the host processor stores its transmit messages to a CAN controller, which transmits the bits serially onto the bus.
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SOC Peripherals CAN

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SOC Peripherals SPI

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The SPI module is a synchronous serial interface that is useful for communicating with external peripherals and other microcontroller devices. These peripheral devices may be Serial EEPROMs, Shift registers, display drivers, A/D Converters, etc. The PIC32 SPI module Is compatible with Motorola SPI and SIOP interfaces. SPI has following interface pins like Chip select, Serial data input, serial data output and serial clock.

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SOC Peripherals SPI

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SOC Peripherals I2C

-IC (Inter-Integrated Circuit) generically referred to as "two-wire interface is a multi-master serial single-ended computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system IC uses only two bidirectional open-drain lines, Serial Data Line(SDA) and Serial Clock (SCL), pulled up with resistors. Typical voltages used are +5 V or +3.3 V although systems with other voltages are permitted. Data transfer is initiated with the START bit (S) when SDA is pulled low while SCL stays high. Then, SDA sets the transferred bit while SCL is low (blue) and the data is sampled (received) when SCL rises (green). When the transfer is complete, a STOP bit (P) is sent by releasing the data line to allow it to be pulled up while SCL is constantly high.

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SOC Peripherals Ethernet -- The Ethernet controller is a bus master module that interfaces with an off-chip Physical Layer (PHY) to implement a complete Ethernet node in a system. Supports 10/100 Mbps data transfer rates Supports full-duplex and half-duplex operation

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SOC Peripherals Ethernet

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SOC Peripherals ADC

-- The Analog-to-Digital (A/D) Converter inside SOC includes the following features: Successive Approximation Register (SAR) conversion Conversion speed or sampling Rate Analog input pins External voltage reference input pins Sample and Hold Amplifier (SHA) Automatic Channel Scan mode 16-word conversion result buffer Operation during CPU Sleep and Idle modes

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SOC Peripherals ADC

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SOC Peripherals DAC

-The SoC contain Digital to Analog Convertors (DACs). Each DAC will be of 8-bit and can be configured for either voltage or current output. The DACs support CapSense, power supply regulation, and waveform generation. Each DAC has the following features. Adjustable voltage or current output in 255 steps Programmable step size (range selection) Source and sink option for current output 8 Msps conversion rate for current output 1 Msps conversion rate for voltage output

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SOC Peripherals DAC

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SOC Peripherals GPIO

-Provides interfaces to the CPU, digital peripherals, analog peripherals, interrupts, LCD segment drive, Features only provided on the GPIO pins: LCD segment drive on LCD equipped devices CapSense on CapSense equipped devices[10] Analog input and output capability Continuous 100 A clamp current capability Standard drive strength down to 1.71 V

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SOC Peripherals GPIO

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SOC Software Building Hardware Platform

Programmable Component selection : Components sorted in several groups, like AD converters, amplifiers, analog communications, counters, etc. After group selection, necessary component for project should be selected with double-click, or right-click on select. In the case of successful selection, appropriate graphical symbol would be shown

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SOC Software Building Hardware Platform

Interconnection View : Previously selected components are still unusable, until they are placed in digital or analog programmable blocks, and until appropriate parameters are set.

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SOC Software Building Hardware Platform

Global Parameters : It is used for general parameters selection. This method of setting is similar to configuration words on other microcontrollers, but with more versatility. Click on any of the parameters opens pull-down menu with given options

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SOC Software Building Hardware Platform

Component and Pin Parameters : Peripherals in SoC microcontroller are very flexible, so it is required to set the way of their operation. Typically this is done by selecting frequency of the signal, connecting it with some other blocks and internal connection lines. Also, component specific parameters can be set. Pin drive mode selection can be done graphically by selecting appropriate parameters in column Drive or software by setting appropriate registers.

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SOC Software Building Software Application

Application Editor : Application Editor is used for writing programs, which can be done using assembly or C. Application Editor itself, bears much resemblance to IDE-s of other standard 8-bit microcontrollers. Left side window holds list of files that are contained in current project. Most important file for users is called main.

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SOC Programming In System Programming

Programming : In system programming is done through The host programmer which talks to the SoC through the devices internal Test Controller (TC). The TC is the interface that provides access to the SoC Debug On-chip (DoC) module, which in turn provides access to the device memory and registers. Using the TC and DoC, the host programmer writes to SRAM, sets internal registers, and programs the devices flash.

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SOC Programming SWD Programming

-- Programming : SWD Interface SWD protocol is functionally equivalent to ARMs SWD protocol. There are two signals in SWD interface: data signal (SWDIO) and a clock for data signal (SWDCK). The host programmer always drives the clock line, whereas either the programmer or the target device drives the data line.

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SOC in FPGA (NIOS II) NIOS II Architecture

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SOC in FPGA (MICO32) MICO32 Architecture

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Q&A

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Thank You

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