Three-Level Voltage Source Inverter Abstract.

This paper presents the simulation results of a Double Three Level Voltage Source Inverter controlled by means of a double current hysteresis band technique. The presented control strategy will be applied to a 1.2 MW three-level VSI to drive a multipole Permanent Magnet Synchronous Generator in a Wind-Generation Plant. A current strategy is chosen for this application in order to control the electromagnetic torque in the generator and the power factor at the front-end inverter. The neutral point voltage control, which is one of the critical aspects in this kind of topology, can be easily achieved by means of progressive variation of the hysteresis bands limits. I. INTRODUCTION The advantages of the Three-Level Voltage Source Inverter topology (Figure 1) are well known and have been applied in medium and high power applications in the last years [Mertens 1999, Buschman 1997, Steinke. 1989]. The reduction of switching frequency and the increment of the voltage supported by each device are very attractive features. The switching frequency can be reduced four times with the same output current distortion when compared with a conventional two level voltage inverter.

This paper presents the simulation results of a high power double VSI driving a multipole Permanent Magnet Synchronous Generator (PMSG) connected to the grid. The rating power and DC voltage value (3 kV.) imply that the best option will be a Three-Level VSI topology based on the use of 2.5 kV IGBT modules.

The most extended control system for three-level inverters is the application of the Space Vector Modulation (SVM) technique [Bacigalupo 1997, Marchesoni. 1992 and Walczyna 1993]. This method gives a very good line current with a low switching frequency and also permits the possibility of controlling the neutral point voltage, which is a very important issue in this topology. However very complex calculations are needed for this strategy, especially for the neutral point voltage control, and a powerful microprocessor or DSP is required. An important modification to this technique can be achieved by means of combining natural sampling methods with the SVM principles [Mertens 1999, Heras 2001]. In this case an easy way to balance neutral point voltage can also be achieved. All the previous mentioned techniques are based on voltage control strategies. However, it is interesting for the mentioned application, to control the electromagnetic torque in the generator and also being capable of regulating both the active and reactive power supplied to the network. Therefore, a current strategy appears as a good choice to control both inverters. Saber simulator has been used to simulate all the complete system. The current control technique presented in this paper permits good performance of both converters, with very easy and fast control of the neutral point voltage and a small line current THD for an average switching frequency of around 1 kHz. 3-PHASE PULSE WIDTH MODULATED (PWM) INVERTER After completion of this lesson the reader will be able to: (i) Explain the philosophy behind PWM inverters. (ii) Understand the advantages and disadvantages of PWM inverters. (iii) Compare the quality of output voltage produced by different PWM inverters (iv) Decide on voltage and current ratings of inverter switches. Pulse width modulated (PWM) inverters are among the most used power-electronic circuits in practical applications. These inverters are capable of producing ac voltages of variable magnitude as well as variable frequency. The quality of output voltage can also be greatly enhanced, when compared with those of square wave inverters discussed in Lesson-35. The PWM inverters are very commonly used in adjustable speed ac motor drive loads where one needs to feed the motor with variable voltage, variable frequency supply. For wide variation in drive speed, the frequency of the applied ac voltage needs to be varied over a wide range. The applied voltage also needs to vary almost linearly with the frequency. PWM inverters can be of single phase as well as three phase types. Their principle of operation remains similar and hence in this lesson the emphasis has been put on the more general, 3-phase type PWM inverter.

There are several different PWM techniques, differing in their methods of implementation. However in all these techniques the aim is to generate an output voltage, which after some filtering, would result in a good quality sinusoidal voltage waveform of desired fundamental frequency and magnitude. As will be discussed later in this chapter, for the inverter topology considered here, it may not be possible to reduce the overall voltage distortion due to harmonics but by proper switching control the magnitudes of lower order harmonic voltages can be reduced, often at the cost of increasing the magnitudes of higher order harmonic voltages. Such a situation is acceptable in most cases as the harmonic voltages of higher frequencies can be satisfactorily filtered using lower sizes of filter chokes and capacitors. Many of the loads, like motor loads have an inherent quality to suppress high frequency harmonic currents and hence an external filter may not be necessary. To judge the quality of voltage produced by a PWM inverter, a detailed harmonic analysis of the voltage waveform needs to be done. In the following discussions some of the results of harmonic analysis done in the previous lessons have been borrowed. In Lesson-35, while discussing the 3-phase square wave inverter it was shown that the magnitudes of fundamental components of the inverter pole voltage (voltage between the output of an inverter leg and the mid potential point of the input dc supply) and the load phase voltage are identical provided the load is a balanced 3-phase load. In fact, after removing 3 and multiples of 3 harmonics from the pole voltage waveform one obtains the corresponding load phase voltage waveform. The pole voltage waveforms of 3-phase inverter are simpler to visualize and analyze and hence in this lesson the harmonic analysis of load phase and line voltage waveforms is done via the harmonic analysis of the pole voltages. It is implicit that the load phase and line voltages will not be affected by the 3 and multiples of 3 harmonic components that may be present in the pole voltage waveforms. Nature Of Pole Voltage Waveforms Output By PWM Inverters Unlike in square wave inverters the switches of PWM inverters are turned on and off at significantly higher frequencies than the fundamental frequency of the output voltage waveform. The typical pole voltage waveform of a PWM inverter is shown in Fig. 36.1 over one cycle of output voltage. In a threephase inverter the other two pole voltages have identical shapes but they are displaced in time by one third of an output cycle. Compared to the square pole voltage waveform seen in Lesson-35, the pole voltage waveform of the PWM inverter changes polarity several times during each half cycle. The time instances at which the voltage polarities reverse have been referred here as notch angles. It may be noted that the instantaneous magnitude of pole voltage waveform remains fixed at half the input dc voltage (E ). When
dc rd rd rd rd

upper switch (S ), connected to the positive dc bus is on, the pole voltage is + 0.5 E and when the lower
U dc

switch (S ), connected to the negative dc bus, is on the instantaneous pole voltage is - 0.5 E . The
L dc

switching transition time has been neglected in accordance with the assumption of ideal switches. It is to be remembered that in voltage source inverters, meant to feed an inductive type load, the upper and lower

switches of the inverter pole conduct in a complementary manner. That is, when upper switch is on the lower is off and vice-versa. Both upper and lower switches

should not remain on simultaneously as this will cause short circuit across the dc bus. On the other hand one of these two switches in each pole (leg) must always conduct to provide continuity of current through inductive loads. A sudden disruption in inductive load current will cause a large voltage spike that may damage the inverter circuit and the load. Harmonic Analysis Of Pole Voltage Waveform The pole voltage waveform shown in Fig. 36.1 has half wave odd symmetry and quarter-wave mirror symmetry. The half wave odd symmetry of any repetitive waveform f( t), repeating after every 2 / duration, is defined by f( t) = - f( + t). Such a symmetry in the waveform amounts to absence of dc and even harmonic components from the waveform. All inverter output voltages maintain half wave odd symmetry to eliminate the unwanted dc voltage and the even harmonics. The half wave odd symmetry followed by quarter wave mirror symmetry, defined by f( t) = f( - t), results in presence of only sine components in the Fourier series representation of the waveform. It may be verified that quarter wave symmetry may not hold good once the time origin is shifted arbitrarily. However the half-wave odd symmetry is maintained in spite of shifting of time origin. This is quite expected, as by just shifting the time origin new (even) harmonic frequencies will not creep up in the voltage waveform, whereas by shifting time origin the sine wave may become cosine or may have some other phase-shift. The quarter wave symmetry talked above is not necessary for improvement of the output waveform quality; it merely simplifies the Fourier analysis of the pole voltage waveform. It may also be noted that the quarter wave symmetry is not achieved at the cost of compromising the inverters output capability (in terms of magnitude and quality of achievable output voltage).

With the assumed quarter wave mirror symmetry and half wave odd symmetry the waveform shown in Fig. 36.1 may be decomposed in terms of its Fourier components as below:-

whereVAO is the instantaneous magnitude of the pole voltage shown in Fig. 36.1 and is the peak magnitude of its nAOVnb harmonic component. Because of the half wave and quarter wave symmetry of the waveform, mentioned before, the pole voltage has only odd harmonics and has only sinusoidal components in the Fourier expansion. Thus the pole voltage will have fundamental, third, fifth, seventh, ninth, eleventh and other odd harmonics. The peak magnitude of n harmonic voltage is given as:
th th

Now, as described in the beginning of this lesson, the third and multiples of third harmonics do not show up in the load phase and line voltage waveforms of a balanced 3-phase load. Most of the three phase loads of interest are of balanced type and for such loads one need not worry about triplen (3 and multiples of 3 ) harmonic distortion of the pole voltages. The peak magnitudes of fundamental () and three other lowest order harmonic voltages that matter most to the load can be written as:
rd rd

It can be seen that the 3 and 9 harmonics have been not considered, as they will not appear in the load side phase and line voltages. Most of the industrial loads are inductive in nature with an

rd

th

inherent quality to attenuate currents due to higher order harmonic voltages. Thus after fundamental voltage, the other significant voltages for the load are 5 , 7 and 11 etc. Generally, only the fundamental frequency component in the output voltage is of interest and all other harmonic voltages are undesirable. As such one would like to eliminate as many low order harmonics as possible. Accordingly the fundamental voltage magnitude () may be set at the desired value and the magnitudes of fifth (), seventh () and eleventh () harmonics may be set to zero. These voltage magnitudes when substituted in the expressions given by Eqns. 36.3 to 36.6 will lead to the solutions of the notch angles. One may like to eliminate many more unwanted harmonic frequencies from the load voltage waveform but this will require introduction of more notch angles per quarter cycle of the pole voltage. In fact if there are k notch angles per quarter cycle, k number of equations may be written each of which determines the magnitude of a particular harmonic voltage. Now, each time a notch angle is encountered in the pole voltage waveform, the top and bottom switches of that particular pole undergo a switching transition (on to off or vice versa). The switching frequency (f1b5b7b11b ) of the inverter switches can be equated to
sw th th th

f =2kf
sw

where one turn-on and one turn-off has been taken as one switching cycle, k is the number of notches per quarter cycle and f is the frequency of fundamental component in the output voltage. Thus it
1

can be seen that a better quality output waveform (in terms of elimination of more numbers of unwanted harmonic voltages) comes at the cost of increasing the switching frequency of the inverter. The switching frequency is directly proportional to the switching losses in the inverter switches. Also, the switch must be capable of being switched on and off at the required frequency. The IGBT switches used in medium power inverters are generally switched at a frequency of 20 kHz or more. With a switching frequency of 20 kHz and the output (fundamental) frequency of 50 Hz there will be up to 200 notches per quarter cycle of the output waveform. The load voltage can thus be made virtually free of low order harmonics and the load current (for an inductive load) can be expected to have a good quality sinusoidal waveform. The switching frequency of 20 kHz is important in another sense too. The range of audible noise for human beings extends from few Hertz to 20 kHz. Thus if the switching frequency is 20 kHz or beyond, the switching frequency related audible noise will not be present when the inverter operates. The inverter operation can then be very quite. If the inverter operates at low frequency, the connecting wires to the switches etc. also carry low frequency current producing low frequency vibrations (due to interaction of current with the stray magnetic field produced by other conductors etc.) and result in audible noise. Similarly low frequency current through inductors and transformers also produce audible noise. The humming or whistling type noise due to low switching frequency may at times be too annoying and unacceptable.

Voltage Source Inverter VSI General transresch Antriebssysteme Berlin supplies components and equipment, preferably for closed-loop speed control of electric motors in a power range from a few kilowatts up to several megawatts. Activities include development and application, planning and design, production planning, supply, commissioning, customer training and after-sales service. The companys customer represent almost all branches of industry, above all, however, plant manufacturers and, increasingly, motor manufacturers. Its products are being used throughout the world. The range of products and services for variable-speed electric drives of transresch Antriebssysteme Berlin covers power and frequency converters and complete drive systems. The drive systems include motors, their power/frequency converters and transformers and switchgear, controls and programmable controllers in the drive environment. History Since its founding the company has gone through numerous changes regarding its legal status, ownership and in this connection corporate identity. The 50 years of history are closely connected with the development of power electronics, semiconductor technology and drive technology in Germany. transresch Antriebssysteme Berlin GmbH was founded on 31 March 1999 on a partnership agreement by the purchase of a limited private company shell to carry on business under optimized conditions. It was registered in the Commercial Register B of Berlin-Charlottenburg under no. 69701 on the 27th May 1999. The traditional converter and drive business is now carried on by an independent company with the same staff and the same range of products and services. transresch Antriebssysteme Berlin thus boasts the knowhow of more than 50 years development and manufacture of power and frequency converters for variable-speed drive systems and staff experience in the most diverse fields of application. Products and Services Extensive development work over many years has resulted in a wide range of very advanced converters available today under the well-known thyresch
st

trademark. This range includes, among other

things, rectifiers up to and exceeding 5 megawatts, frequency converters in various circuit configurations up to 5,8 megawatts and converters for special applications, for example, dynamic reactive-power compensation and process power supplies. transresch Antriebssysteme Berlin is a certified member of the ABB Drives Alliance Group and therefore authorized to use the ABB inverter technology in the low and medium voltage range with Direct Torque Control (DTC) for a improved control accuracy by making speed encoders unnecessary.

The products of transresch Antriebssysteme Berlin satisfy all national and international standards applicable to power and frequency converters and are manufactured and documented to ISO 9001. A competitive edge is the availability of customer- and branch-specific special designs in addition to the high-grade power and frequency converters for standard applications and a quick and high-quality service. A large number of references on high-demanding applications throughout the world bears testimony to the know-how and competence of transresch Antriebssysteme Berlin. Constant improvement of the converters is necessary to constantly increase customer advantage and to strengthen the market position and is, therefore, a key business objective.

Voltage Source Inverter Voltage source inverters are used to regulate the speed of three-phase squirrel cage motors by changes the frequency and the voltage and consist of input rectifier, DC link and output converter. They are available for low voltage range and medium voltage range. Low Voltage Inverter The three-phase low voltage air cooled frequency inverter is a cabinet built single or multi drive designed for industrial applications and for customised solutions too and is available in 1-quadrant and 4quadrant operation for 6-pulse and 12-pulse mains supply connection. The used semi-conductors are diodes and IGBTs. For three-phase, three-level rectifier systems (cf. Fig. 1) a control of the input phase currents and of the output voltage has to be provided. Furthermore, a balancing of the partial output voltages and/or a control of the output voltage center point potential (cf. M in Fig. 1) has to be implemented. In general there are two categories of current controllers used for three-level rectifier control, conventional carrier-based controllers (CCC, which are usually denominated as average current mode control for single phase systems) and the conventional hysteresis control (CHC). The CCC employs in each phase a P-type controller, a PWM triangular carrier and a comparator to generate the gate drive signal of the corresponding transistor. The main advantages of the carrier-based method are a fixed frequency, which simplifies the EMI filter design and the natural center point stability. However, the CCC requires a controloriented modeling of the system and a mains voltage precontrol signal in order to insure a sinusoidal input current shape with low control error.In addition, the CCC has a relatively low dynamic performance and requires additional control effort to compensate for non-idealities such as differences in the switch delay times. In contrast, the CHC derives the transistor gate drive signal from a direct comparison of the actual line current and the current reference. This technique is easier to implement than a carrier-based controller and does not require any control system analysis. The CHC also shows high dynamics and is highly robust. However, it is characterized by the disadvantage of a non-constant switching frequency and/or irregular switching.

The actual switching frequency depends on the input inductance of the PWM mains side inductors, on the width of the hysteresis band and on the operating conditions, such as the input and output voltage levels. Furthermore, the CHC has no natural stability of the output center point voltage .Therefore, both control methods present advantages and drawbacks. For three-phase two-level PWM rectifier systems with CHC additional circuitry has been proposed to limit the maximum switching frequency or to keep it even In particular proposes a hysteresis control method for two-level PWM inverters that eliminates the interaction between the phases thus allowing aphase-locked loop control of the modulation frequency of the switches. An analogous approach would be interesting for three-phase threelevel rectifiers (cf. Fig. 1). This paper proposes such control concept, which decouples the three phases by extending the actual phase currents by a zero sequence current component and results in a virtual connection of the mains star point N and of the output center point M. Accordingly, the proposed current control is named Decoupling Hysteresis Control (DHC). The decoupling provides a more regular switching and a natural stability of the output center point. Furthermore, the advantages of the conventional hysteresis control such as excellent dynamic performance, low complexity of implementation, and direct compensation of non-idealities (e.g. of gate drive and switching delay times and power semiconductor onstate voltage drops) are maintained.

INTRODUCTION: Electricity plays an important role in modern society since it was first used about one century ago. To utilize electricity for all kinds of tasks, many different electrical and electronic devices have been invented. Among these, the DC-AC converter is one of the most important power electronic devices. One of the most widely used strategies for controlling the AC output of power electronic converters is the technique known as pulse width modulation (PWM), which arise the duty cycle of the converter switches at a high switching frequency to achieve a target average low-frequency output voltage or current. A traditional sine-triangle PWM as shown in Figure1.1. Three significantly different PWM methods for determining the converter switching ON times have been usefully proposed for fixed-frequency modulation systems.

In many applications, such as industrial heating, lighting control, soft start induction motors and speed controllers for fans and pumps requires variable ac voltage from fixed ac source. The phase angle control of regulators has been widely used for these requirements. It offers some advantages such as simplicity and ability of controlling large amount of power economically. However, delayed firing angle causes discontinuity and plentiful harmonics in load current and a lagging power factor occurs at the ac side when the firing angle increased.

However, this increases the power loss in the circuit and is difficult, expensive, bulky and inefficient for high-power applications. The ac chopper with zero current voltage switching (ZCS-ZVS) was proposed . Its output voltage regulator needs to vary switching-off time controlled by PWM signal. Thus, it is required to use frequency control to achieve the soft switching and the general control systems use the PWM techniques producing switching-on time. From above reasons, this paper proposes the resonant dc link in PWM ac chopper.

1 METHODS OF PWM:

1. Naturally sampled PWM: Switching at the intersection of a target reference waveform and a highfrequency carrier. 2. Regular sampled PWM: Switching at the intersection between a regularly sampled reference waveform and a high-frequency carrier. 3. Direct PWM: Switching so that the integrated area of the target reference waveform over the carrier interval is the same as the integrated area of the converter switched output. Other PWM methods are variations of these three basic PWM methods. Even the well-known space vector modulation strategy, which is often claimed to be a completely different modulation approach, is really just a variation of regular sampled PWM which specifies the same switched pulse widths but places them a little differently in each carrier interval.

Fig:1.1 Sine-triangle PWM control

Fig1.2 out put voltage

In recent years, multilevel converters have been developed for several reasons. 1. Industry has begun to demand higher power equipment, which now reaches the megawatt level. Controlled AC drives in the megawatt range are usually connected to the medium-voltage network. Today, it is hard to connect a single power semiconductor switch directly to medium voltage grids (15 kV). 2. Multilevel converters can solve problems with some present bi-level PWM adjustable-speed drives (ASDs). ASDs usually employ a front-end diode rectifier and a converter with PWM controlled switching devices to convert the DC voltage to variable frequency and variable voltage for motor speed control. Motor damage and failure have been reported by industry as a result of some ASD converters high-voltage change rate (dv/dt) which produce a common-mode voltage across the motor windings. High-frequency switching an exacerbate the problem because of the numerous times this common mode voltage is impressed upon the motor each cycle. The main problems are reported as motor bearing failure and motor winding insulation breakdown because of circulating currents, dielectric stresses, voltage surge, and corona discharge. The failure of some ASDs is because the voltage change rate (dv/dt) sometimes can be high enough to induce corona discharge between the winding layers. 3. With the development of modern power electronic devices, these can switch at higher frequency and higher voltages, which can generate broadband electro-magnetic interference (EMI). Although the highfrequency switching can increase the motor running efficiency and is well above the acoustic noise level, the (dv/dt) associated dielectric stresses between insulated winding turns are also greatly increased.

The multilevel converter is one of the more promising techniques for mitigating the as mentioned before in problems. Multilevel converters utilize several DC voltages to synthesize a desired AC voltage. For this reason, multilevel converters can reduce (dv/dt) to conquer the motor failure problem and EMI problem. Multilevel converters also have emerged as the solution for working with higher voltage levels. Multilevel converters include an array of power semiconductors and capacitor voltage sources, which generate output voltages with stepped waveforms. The commutation of the switches permits the addition of the capacitor voltages, which reach high voltage at the output, while the power semiconductors must withstand only reduced voltages. CONCEPT OF MULTILEVEL INVERTER:

3.1 Applications of Multilevel inverter: As mentioned earlier, multilevel inverters utilize several dc voltages to synthesize a desired ac voltage. For this reason, multilevel inverters can be implemented using distributed energy resources such as photovoltaic and fuel cells. Energy storage devices like ultra capacitors and batteries can also be used with multilevel inverters. Many people feel that distributed energy resources will become increasingly prevalent in the future. As a result, one notable application of multilevel inverters being considered is connecting the as mentioned before energy resources with an ac power grid. If a multilevel converter is made to either draw or supply purely reactive power, then the multilevel converter can be used as a reactive power compensator. For example, a multilevel converter being used as a reactive power compensator might be placed in parallel with a load connected to an ac system. Using a multi-level converter as a reactive power compensator can help to improve the power factor of a load. It was mentioned earlier that it is possible to determine the switching angles of the multilevel converter such that certain higher order harmonics are either minimized or eliminated altogether. The switching angles can also be varied in order to inject certain harmonics into an ac system. For example, consider once again a multilevel converter placed in parallel with a load connected to an ac system. If the load draws a current containing a high amount of harmonic distortion, the multilevel converter can be used to provide some of these harmonics. As a result, the ac system can provide a more sinusoidal current. If the dc sources of the Multilevel converter are banks of batteries or capacitors, the multilevel converter can also be used to provide ride-through capability under emergency conditions. This application is extremely useful when voltage sags or load swings are experienced at the utility connection. Multilevel converters can also be used to construct a high voltage dc back-to-back intertie. For example, two diode-clamped multilevel converters can be used to produce such a system.

One multilevel converter acts as a rectifier for the utility interface. The other multilevel converter acts as an inverter to supply the desired ac load. One idea behind using a back-to-back intertie is to connect two asynchronous systems. The intertie can be used as a frequency changer, a phase shifter, or a power flow controller. Since the back to-back intertie system can be used as a frequency changer, it would seem reasonable that a multilevel converter can also be used as an Adjustable Speed Drive (ASD). The input from the ac source can be a constant, defined frequency. The output of the ASD can be connected to an ac load whose frequency can vary. Another possible application of multilevel converters is their use in Electric Vehicles (EVs) and Hybrid Electric Vehicles (HEVs). One reason is that multilevel converters, EVs, and HEVs are all ideally suited for utilization of a large number of relatively small-sized energy sources, such as batteries and fuel cells. Also, multilevel converters generally allow for smaller components, thus reducing weight. 3.2 Advantages/Disadvantages of Multilevel Converters: One additional advantage of multilevel converters concerns switch ratings. Since multilevel converters usually utilize a large number of dc sources, switches are required to block smaller voltages. Since switch stresses are reduced, required switch ratings are lowered. As a result, cost is reduced. The ability of multilevel converters to utilize a large number of dc sources provides another advantage. Utilization of a large number of dc sources allows for multilevel converters to produce high voltages and thus high power ratings. One distinct benefit is the idea that no transformers are needed to produce these high voltages, whereas traditional 12, 24, and 48-pulse inverters require transformers. Transformers are bulky and expensive. Furthermore, complicated connections of these transformers are sometimes required. Another advantage of multilevel converters concerns the idea of reliability. If a component fails on a multilevel converter, most of the time the converter will still be usable, albeit at a reduced power level. Furthermore, multilevel converters tend to have switching redundancies. In other words, there might be more than one way to produce the desired voltage. Another advantage of multilevel converters concerns application practicality. As an example,

consider designing an inverter for a large HEV. Such an application would require excessively large components to deal with the relatively large working voltages and currents. These large components are expensive, bulky, and generally not reliable. However, multilevel converters allow for the utilization of smaller, more reliable.

TOPOLOGY OF MULTILEVEL INVERTERS: 4.1 Diode-Clamped Converter: The simplest diode-clamped converter is commonly known as the neutral point clamped converter (NPC) which was introduced by Nabae et al. The NPC consists of two pairs of series switches (upper and lower) in parallel with two series capacitors where the anode of the upper diode is connected to the midpoint (neutral) of the capacitors and its cathode to the midpoint of the upper pair of switches; the cathode of the lower diode is connected to the midpoint of the capacitors and divides the main DC voltage into smaller voltages. In this example, the main DC voltage is divided into two. If the point O is taken as the ground reference, the three possible phase voltage outputs are, -1/2Vdc, 0, or 1/2Vdc . The line-line voltages of two legs with the capacitors are: Vdc, 1/2Vdc, 0, -1/2Vdc or Vdc. To generate a three-phase voltage, three phases are necessary. The five-level output voltage can be generated by controlling the switches. Table 2-1 shows the proper switching states. The switches (Sa1 and Sa1) and (Sa2 and Sa2) are complementary pairs. When Sa1 is on (Sa1 = 1), Sa1 is off (Sa1 = 0). Other switch pairs are similar. Figure 4.1 shows a two-phase diode-clamped multilevel converter. Some disadvantages of the diodeclamped multilevel converter may be observed. Using extra diodes in series becomes impractical when the number of levels m increases, requiring (m-1)(m-2) diodes per phase if all the diodes have equal blocking voltages. Note that the voltages for diodes in different positions are not balanced. For example, diode Da2 must block two capacitor voltages, Da(m-2) must block (m-2) capacitor voltages. Also, the switch duty cycle is different for some of the switches requiring different current ratings. In addition, the capacitors do not share the same discharge or charge current resulting in a voltage imbalance of the series capacitors. The capacitor voltage imbalance can be controlled by using a back-to-back topology, connecting resistors in parallel with capacitors, or using redundant voltage states. The advantages for the diode-clamped converter are the following: (1) A large number of levels yields a small harmonic distortion. (2) All phases share the same DC bus. (3) Reactive power flow can be controlled. (4) Control is simple.

Figure 4.1:Three Level Neutral point diode-clamped inverter

Figure 4.2: Two-phase diode-clamped multilevel inverter

The disadvantages are the following: (1) Different voltage ratings for clamping diodes are required. (2) Real power flow is difficult because of the capacitors imbalance. (3) Different current ratings for switches are required due to their conduction duty cycle. 4.2 Capacitor-Clamped Converter: The capacitor-clamped multilevel converter or flying-capacitor converter is similar to the diodeclamped topology, which is shown in Figure 4.2. However, the capacitor-clamped multilevel topology allows more flexibility in waveform synthesis and balancing voltage across the clamped capacitors. For a three-level capacitor-clamped multilevel converter, if the O point is taken as the ground reference, a single phase can produce three output levels -1/2Vdc, 0 and 1/2Vdc Likewise for the diode-clamped converter structure, a three-phase converter needs three phases.

The advantages of the capacitor-clamped multilevel converter are: (1) Large m allows the capacitors extra energy during long discharge transient. (2) Flexible switch redundancy for balancing different voltage levels (3) A large number of levels yields a small harmonic distortion. (4) Active and reactive power flow can be controlled

Figure 4.3 Three Level capacitor-clamped multilevel Inverter The disadvantages are: (1) Large number of capacitors are bulky and more expensive than the clamping diodes used in the diode-clamped multilevel converter. (2) Control for maintaining the capacitors voltage balance is complicated. (3) Poor switching utilization and efficiency for real power transmission. Table 1.2 shows the possible switch combinations to generate the five-level output waveform. An output voltage can be produced by using different combinations of switches. The topology allows increased flexibility in how the majority of the voltage levels may be chosen. In addition, the switches may be chosen to charge or discharge the clamped capacitors, which balance the capacitor voltage. The general m -level capacitor-clamped multilevel converter has an m-level output phase voltage. Thus, two phases would produce a (2m-1) level output voltage, or line voltage, which is shown in Figure 4.4. Similar to the diodeclamped multilevel converter, the capacitors have different ratings. These capacitors result in a bulky and expensive converter when compared to the diode-clamped converter.

4.3 Cascaded H-bridge Converter: A cascaded H-bridge converter is several H-bridges in series configuration, A single H-bridge is shown in Figure 4.5. A single H-bridge is a three-level converter. The four switches S1, S2, S3 and S4are controlled to generate three discrete outputs Vout with levels Vdc ,0and -Vdc .When S1and S4 are on, the output is Vdc ; when S2 and S3 are on, the output is Vdc ;when either pair S1 and S2 or S3 and S4 are on, the output is 0. A H-bridge cascaded multilevel converter with s separate DC sources is shown in Figure4.6. A staircase sinusoidal waveform can be generated by combining specified output levels, which is shown in Figure 4.7 The number of output phase voltage levels m in a cascade converter with s separate DC sources is m=2s+1. Load balance control for each H-bridge and each DC source can be acquired by rotating the switching angles to the H-bridges. The advantages for cascaded multilevel H-bridge converter are the following: (1) The series structure allows a scalable, modularized circuit layout and packaging due to the identical structure of each H-bridge. (2) No extra clamping diodes or voltage balancing capacitors is necessary.

Figure 4.4 Single H-bridge topology

Figure 4.5 Staircase sinusoidal waveform generated by H-bridge cascaded multilevelconverter (3) Switching redundancy for inner voltage levels is possible because the phase voltage is the sum of each bridges output.

The disadvantage for cascaded multilevel H-bridge converter is the following: Needs separate DC sources; Another kind of cascaded multilevel converters with transformers using standard three-phase bi-level converters has recently been proposed. The circuit is shown in Figure 2.8. The converter uses output transformers to add different voltages. In order for the converter output voltages to be added up, the outputs of the three converters need to be synchronized with a separation of 120 between each phase. For example, obtaining a three-level voltage between outputs a and b, the output voltage can be synthesized by Vab= Va1-b1+Vb1-a2+Va2-b2. An isolated transformer is used to provide voltage boost. With three converters synchronized, the voltages Va1-b1, Vb1-a2, Va2-b2, are all in phase; thus, the output level can be tripled. Comparison among Three Multilevel Inverters in Application Aspects In high power system, the multilevel inverters can appropriately replace the exist system that use traditional multi-pulse converters without the need for transformers. All three multilevel inverters can be used in reactive power compensation without having the voltage unbalance problem. In back-to-back intertie application, however, it is not possible to use multilevel inverter using cascaded-inverters with SDCSs because a short circuit will be introduced when two back-to-back inverter are not switching synchronously. To overcome such a problem, a transformer having one primary winding and several secondary windings can be used. On the other hand, the structure of separated dc sources is well suited for various renewable energy sources such as fuel cell, photovoltaic, biomass, etc. This structure is, therefore, suited for an ac power supply in vehicle

system utilities. In the adjustable speed drive application, the multilevel inverters can be used for a utility compatible adjustable speed drive (ASD) with the input from the utility constant frequency ac source and the output to the variable frequency ac load. The major differences, when using the same structure for ASDs and for back-to-back interties, are the control design and the size of the capacitor. Because the ASD needs to operate at different frequencies, the dc link capacitor needs to be large enough to avoid a large voltage swing under transient state. Table 4.3 compares the power component requirements per phase leg among thethree multilevel voltage source inverter mentioned above. Table 1.3 shows that the number of main switches and main diodes, needed by the inverters to achieve the same number of voltage levels, is the same. Clamping diodes do not need in flying-capacitor and cascaded-inverter configuration, while balancing capacitors do not need in diode clamp and cascaded-inverter configuration. Implicitly, the multilevel converter using cascaded-inverters requires the least number of components. Table 4.3 Comparison of power component requirements per phase leg among three multilevel Inverters Another advantage of cascaded-inverter is circuit layout flexibility. Modularized circuit layout and packaging is possible because each level has the same structure, and there are no extra clamping diodes or voltage balancing capacitor. The number of output voltage levels can be easily adjusted by adding or removing the full-bridge cells.

CONTROL METHODS OF AN INVERTER: 5.1. Classification of Modulation Strategies: The modulation methods used in multilevel converters can be classified according to switching frequency as shown in Figure 1.10. Methods that work with high switching frequencies have many commutations for the power semiconductors in one cycle of the fundamental output voltage. The popular methods for high switching frequency methods are classic carrier based sinusoidal PWM (SPWM) and space vector PWM. The popular methods for low switching frequency methods are space vector modulation (SVM) method and selective harmonic elimination method. A very popular method with high switching frequency in industrial applications is the classic carrier-based sinusoidal PWM (SPWM) that uses the phase-shifting technique to increase the effective switching frequency. Therefore, the harmonics in the load voltage can be reduced.

Figure 5.1 Classification of multilevel modulation methods Another interesting method is the SVM strategy, which has been used in three-level converters. Methods that work with low switching frequencies generally perform one or two commutations of the power semiconductors during one cycle of the output voltages to generate a staircase waveform. Representatives of this family are the multilevel selective harmonic elimination based on elimination theory and the space-vector control (SVC). 5.2 NEED FOR THE CONTROL OF THE INVERTER: In many industrial applications, it is often required to vary the output voltage of the inverter due to the following reasons:  To compensate for the variations in the input voltage.  To compensate for the regulation of the inverters.  To supply some special loads which need variation of voltage with frequency, such as an induction motor. The inverter output voltage can be controlled by various techniques. 5.3 TECHNIQUES OF PWM:  Single pulse width modulation.  Multi pulse-width modulation.  Minimum ripple current modulation  Sinusoidal pulse width modulation (SINE-PWM).  Hysteresis band current control PWM.  Selected harmonic elimination PWM (SHE-PWM).  Space vector pulse width modulation (SVPWM).

5.3.1 SINGLE PULSE WIDTH MODULATION: In single-pulse-width-modulation control, there is only one pulse per half cycle and the width of the pulse is varied to control the inverter output voltage. Here the gating signals are generated by comparing a rectangular reference signal of amplitude (Ar) with a triangular carrier wave of amplitude (Ac). The ratio of Ar to Ac is a control variable and is defined as the amplitude modulation index or modulation index M. 5.3.2 MULTI PULSE WIDTH MODULATION: The harmonic contents can be reduced by using several pulses in each half-cycle of the output voltage. The generation of gating signals for turning on and off of the switching device is made by comparing a reference signal with a triangular carrier wave. The modulation index controls the output voltage. This type of modulation is also known as uniform pulse-width-modulation (UPWM).The number of pulses per half cycle is found from p=Fc/2Fo= mf/2(mf is the frequency modulation ration or carrier ratio). 5.3.3 MINIMUM RIPPLE CURRENT MODULATION: One of the disadvantages of the harmonic injection PWM is that the elimination of lower order harmonics considerably boosts the next higher level of harmonics. Since the harmonic loss in a machine is dictated by the ripple current, it is this parameter that should be minimized instead of emphasizing the individual harmonics. 5.3.4 SINUSOIDAL PULSE WIDTH MODULATION: Pulse width modulation (PWM) techniques are effective means to control the output voltage frequency and magnitude. It has been the subject of intensive research during the last few decades. Especially, the space-vector PWM is used for three-phase converter applications. Here we mainly consider the carrier based PWM approaches that are often applied to the single phase applications. 5.3.5 HYSTERESIS BAND CURRENT CONTROL PWM: Hysteresis band control PWM is basically an instantaneous feedback current control method of PWM where the actual current continually tracks the command current within a hysteresis band. 5.3.6 SELECTED HARMONIC ELIMINATION PWM (SHE-PWM): In the selected harmonic elimination PWM method the undesirable lower order harmonics of a square wave can be eliminated and the fundamental voltage can be controlled as well by what is known as selected harmonic elimination PWM (SHE-PWM).

5.3.7 SPACE VECTOR PULSE WIDTH MODULATION (SVPWM): The space vector pulse width modulation technique is an advanced, computation-intensive PWM method and is possibly the best among the all other PWM techniques. A few advantages of the SVPWM technique are discussed in the following section. Unlike the conventional PWM method the space vector pulse width modulation technique produces lesser amount of harmonics. The total harmonic distortion (THD) of the output waveform is reduced by 47% than the sinusoidal PWM. The switching losses are reduced by 30%. The output crest voltage is increased by 1.115 times than that of the conventional sinePWM method. If the inverter is used for the drives then this method gives higher torque and higher efficiency for the motors. It gives 15% better utilization.

TWO LEVEL INVERTER: The VSI can be further divided into single-phase inverter and three-phase inverter. Single-phase inverter is required to supply single-phase AC load with a high power quality or less harmonic distortion. Figure 6.1 below shows the most popular four-switch full bridge single-phase inverter topology:

Figure 6.1 Single-phase full bridge inverter As shown in Figure 1.9, the inverter consists of two legs (A, B) and supplies a single-phase AC output voltage Vout to the load. Two equal value capacitors are connected in series across the input DC side and their junction can be connected to ground. This ensures a voltage of Vd across each capacitor. A certain switching algorithm can be applied to each of the four switch modules T1, T2, T3, and T4 in order to control the inverter to generate desired sinusoidal output with desired frequency and magnitude.

30 4 OPERATION OF THREE-PHASE THREE-LEVEL INVERTER

FIG:6.5 Power circuit for three-phase three-level inverter The figure shown above gives the basic circuit for the three-level inverter. It is diode clamped inverter. The circuit employs 12 power switching devices (Sa1-Sa4) and 6 clamped diodes (D1-D6). And the dc-bus voltage is split into three-level by two seriesconnected bulk capacitors can be defined as the neutral point O. as the result of the diodeclamped the dc-bus voltage Vdc/2. Thus, the voltage stress of the switching device is greatly reduced. The output voltage Vao has three different states: +Vdc/2, 0, -Vdc/2. Here takes phase-A as an example for voltage. For voltage Vdc/2, Sa3 and Sa4 need to be turned on. We can define these states as 2, 1, and 0, respectively. Then, the switching variable Sa is shown in table1. be similar to three-phase two-level inverter, the switching states of each bridge leg of three-phase three-level inverter is described by using switching variables Sa, Sb and Sc. Whereas the difference is that, in three-level inverter each bridge leg has three different switching states.

31

6.4.1 SINUSOIDAL PWM FOR A THREE-LEVEL INVERTER: If the fundamental output voltage and corresponding power level of the PWM inverter are to be increased to a high value, the dc link voltage Vdc must be increased and the devices must be connected in series. By using matched devices in series, static voltage sharing may be somewhat easy, but dynamic voltage sharing during switching is always difficult. The problem may be solved by using a multi-level inverter or neutral point clamped (NPC), inverter. Here in this project we are mainly concerned to a threelevel inverter and it is confined to the three-level inverter. As shown in figure three-level, three-phase inverter using MOSFET devices. In the figure, the dc link capacitor C has been split to create the neutral point 0. Since the operation of all the phase groups is essentially identical, consider only the operation of the half-bridge for phase A. A pair of devices with bypass diodes is connected in series with an additional diode connected between the neutral point and the center of the pair as shown. The devices Sa1 and Sa2 function as main devices(like a two-level inverter), the Sa2 and Sa3 function as auxiliary devices which help to clamp the output potential to the neutral point with the help of clamping diodes D1 and D2. All the PWM techniques discussed so far can be applied to this inverter. The main devices (Sa1 and Sa4) generate the Va0 wave, whereas the auxiliary devices (Sa3 and Sa2) are driven complementary to the respective main devices. With such control, each output potential is clamped to the neutral potential in the off periods of the PWM control. Evidently, the positive phase current +ia will be carried by devices D1 and Sa2 at the neutral clamping condition. On the other hand, negative phase current ia will be carried by D1 and D2 when Vao is positive, by Sa3 and Sa4 when Vao is negative, and by Sa3 and diode at the neutral clamping condition. This operation mode gives three voltage levels (+0.5Vdc, 0, and -0.5Vdc) at the Vao wave as shown in the figure of phase voltage below. Like wise the wave forms for all the other phases are generated and the resultant line-line voltages are obtained.

32

SINUSOIDAL PWM: The implementation of a three-level inverter by sine-PWM is carried out by the same principle as that of a two-level inverter. Here we have two carrier waves are these two carrier waves are compared with the single sinusoidal wave and corresponding pulses are generated which are to be supplied to the inverter gate devices. And for the other phases the sinusoidal wave is displaced by an angle 2 /3 and 4 /3. Let us see an example for a single leg of a three-level inverter bridge. The sinusoidal with frequency Fo is taken and two carrier waves, i.e., a carrier wave which is starting at 0 time period and the other carrier wave is a negative going one and is the negative going carrier wave with frequency Fs i.e., switching frequency. The magnitude of the carrier wave is always greater than the reference wave. The positive going carrier wave generates the pulses for the devices by which the inverter phase generate a positive voltage. The negative going carrier wave generates the pulses for the inverter which in turn give the negative phase voltage in a particular leg. The above procedure can be shown in the figure below. It is shown in the figure for a single phase of one leg. From the above procedure we can obtain the pulses for the two devices of a single leg but totally we want four set of pulses for a single leg in order to generate the required output wave form. The other two set of pulses are generated by taking the negation of the above obtained two set of pulses. Following conditions are fulfilled in order to generate the pulses for the inverter legs: Sinusoidal > carrier 1 then the pulse will be1 else 0 Sinusoidal < carrier 2 then the pulse will be 1 else 0

33

FIG 6.6 Sine-PWM switching pattern for three-level inverter Similarly the same logic is employed to the other two legs but with a phase displacements of 2 /3 and 4 /3 for sinusoidal reference wave for other two legs for the two-phase b and c respectively.

34

7.1 SELECTIVE HARMONIC ELIMINATED PULSE WIDTH MODULATION (SHE PWM): Since the advent of the family of new semiconductors, tremendous interest has been renewed in inverter technology. The ability of switching devices having turn-off times in the range of a few microseconds or submicroseconds , has increased the flexibility of achieving a practically sinusoidal output by employing sophisticated switching patterns in inverter circuit. Selective harmonic eliminated PWM technique is introduced by Patel . The idea of such a method is that the basic square-wave output is chopped a number of times, which are obtained by proper off-line calculations. A general method of harmonic elimination in the half-bridge inverter will be discussed here. Fig 7.1 shows a general output waveform with 2N chops per half-cycle.

7.1 Two level SHE PWM

35 The Selective Harmonic Eliminated PWM (SHE PWM) technique is currently applied in conventional three-level inverter circuits. The concept of the SHE PWMtechnique will be presented in this chapter. It needed to be compared to the optimizedharmonic stepped-waveform technique in several aspects. Mainly, the harmonic components and the harmonic characteristics wil The SHE PWM technique is currently used to synthesize an output waveform ofboth a halfbridge and a full-bridge inverter. In this thesis, a three-level SHE PWM generated by a fullbridge inverter is considered. A full-bridge or H-bridge voltage source inverter, which comprises four switches and one dc source, is depicted in Fig. 7.1. Three states of an output waveform such as positive, negative, and zero, can be obtained. Fig 7.2 shows a generalized three-level SHE PWM waveform, which is synthesized by using the inverter circuit shown in Fig 7.2. The output waveform is chopped N times per quarter. Each switch is, therefore, switched N times per cycle to generate such a waveform.

Figure 7.2 A full-bridge voltage source inverter

36

Figure 7.3 Generalized three-level SHE PWM waveform. The H-bridge inverter as discussed above has three states of operation. Consider the generalized three-level SHE PWM waveform shown in Fig. 7.3. Let N be the number of switching angles per quarter-cycle. The output waveform is assumed to be odd quarterwave symmetry, whose amplitude equals E. The Fourier Series of the SHE PWM Waveform Because of odd quarter-wave symmetry, the dc component and the even harmonics are equal to zero. Patel and Hoft presented the Fourier series of the threelevel. TWO-LEVEL VERSUS THREE-LEVEL PWM INVERTERS As described in section the three-phase bridge inverter consisting of six switches (shown in Lesson-35) can output pole voltages of only two levels +0.5E and -0.5E . In contrast to a
dc dc

two-level inverter, a three-level inverter is capable of producing three different pole-voltage levels, namely, +0.5E , zero and -0.5E . The circuit details of three-level inverter will not be
dc dc

discussed

37 in this course but it can easily be shown that the three-level inverter will have better harmonic spectrum in comparison to the two-level inverter. As described by Eqn. (36.8) in section 36.3, any reduction in the fundamental output voltage magnitude of a two level inverter results in increased rms magnitude of unwanted ripple in the output waveform. Now, let Eqn. (36.8) be considered in relation to a three-level inverter. Since the pole voltage can now have zero level too, the rms magnitude of the pole voltage can be brought below 0.5E . For lower magnitude of
dc

fundamental pole-voltage, as given by Eqn. (36.9), suitable intervals of zero voltage level may be introduced such that with lowering of fundamental voltage the rms of the overall pole voltage also reduces. Thus the rms of the ripple voltage, in case of three-level inverter, can be made lower than that of the two-level inverter. The three-level versus two-level comparison can be applicable to a single-phase PWM inverter too. Consider the single-phase full bridge circuit shown in Fig.36.3. For this circuit if all the time one of the two diagonal pair of switches, (Sw1 and Sw4) or (Sw2 and Sw3), conduct the load voltage will have two levels; +E or E. By suitably switching between one diagonal pair to another diagonal pair one can obtain a PWM waveform similar to the pole voltage waveform of a three-phase PWM inverter (only change is in the voltage magnitude). Now if the allowed switching combination includes conduction of Sw1 along with Sw3 (or Sw2 along with Sw4) the load voltage may have three-levels, i.e., +E, zero and E. As with a three-phase inverter, the single phase PWM inverter too will have lower voltage distortion in case of three-level load voltage (than the corresponding distortion in two level output). 36.6 Considerations On Switch Voltage And Current Ratings As in square wave inverter the switches of PWM inverter must also be rated for the maximum dc link voltage. There will, however, be a significant difference in the switch current ratings of the square wave and PWM inverter for comparable magnitudes of inverters output current. This is due to the increased switching losses in the PWM inverter. Since the switches in PWM inverter operate at much higher frequencies than in square wave inverter, the switching losses in the former are comparable to the conduction losses. This calls for suitable de-rating of the switch current rating. For medium power rated inverters mostly IGBT switches (with fast acting anti-parallel diodes) are used. Generally molded blocks of six switches and six diodes, connected

38 bridge fashion with their power and control terminals brought out, are commercially available. These molded blocks come with isolated metallic case that need to be mounted on suitably sized heat sinks for dissipation of thermal losses in the switch. The switch manufacturers provide the turn-on and turn-off loss data for the switches for different magnitudes of dc link voltage, switch current and gate-to-emitter voltages. Similarly conduction loss data for the switches and the diodes are also provided. The thermal resistance data (thermal resistance between case and semiconductor-junction) for the switches and diodes are also provided. The heat-sink manufacturers provide data / guide lines for calculating the thermal resistance between heat sink and ambient. The inverter designer needs to do a detailed analysis of the worst-case thermal losses and temperature rise and need to limit the switch current accordingly. In PWM inverters, because of large number of switching per output cycle, the load current frequently jumps from controlled switch (say, IGBT) to diode and hence the diodes of the switches must also be rated to carry the peak magnitude of load current. It is to be kept in mind that in PWM inverters the load current polarity changes only according to the output frequency and not according to the switching frequency. For load power factor close to one, as the PWM inverters output voltage decreases the diode conduction duration increases.

39

CONCLUSIONS Simulation results with Saber of a three level inverter with a double hysteresis-band current strategy are presented in this paper. The strategy has been validated in the following respects: A reduced harmonic distortion and a small switching frequency have been achieved, both in the network and in the machine side converters. For the same harmonic distortion, the switching frequency can be divided by four, compared to use of a two-level converter. An easy way to control the DC middle point voltage, based on the double hysteresis-band strategy, has been proposed and tested. Developed simulations have shown that when DC middle point is connected to the neutral, a better currents control and for the DC middle point voltage is achieved. This control strategy can be easily implemented in a DSP with a brief program. A voltage phase estimator has been developed . Based on its estimation the inverter regulates the reactive power supplied to the grid. A machine voltage control is applied to the generator in order to reduce the output voltage. This feature permits an inverter power rating reduction.