MOTOROLA

r sEMlcoNDucToR";
TECHNICALDATA

MC68882
TechnicalSummary
HCMOSEnhanced
Floating-Point
Goprocessor
The MC68882floating-pointcoprocessorfully implementsthe lEl
for Binary Floating-Point Arithmetic (754) for use with the Motor
Familyof micioprocessors. An upgradeof the MC68881,'itis pin a
compatiblewith an optimizedmicroprocessorunit (MPU) interfac
in excessof 1.5times the performanceof the MC68881.lt is implem
VLSItechnologyto give systemsdesignersthe highestpossiblef
in a physically'smalldevice.

Intended primarily for use as a coprocessorto the MC68020/MC(

MPU,the MC68882providesa logicalextensionto the main MPU
processingcapabilities.This extensionis achievedby providing .
performanceffoating-pointarithrneticunit and a set of floating-poi
istersthat are analogousto the use of the integerdata registers.Tl
instructionset is a natural extensionof all earlier members of i
Family,and it supportsall addressingmodes of the host MPU.
flexiblebus interfaceof the M68000Family,the MC68882can be us
of the M68000MPU devicesand as a peripheralto non-M68000p

The major featuresof the Mc68882are as follows:

o Eightgeneral-purpose floating-pointdata registers,each supporting
80-bit extended-precision real data format (a 64-bit mantissaplus .
bit and a 1s-bitsignedexponent)
o A 67-bit arithmeticunit to alfow very fast calculations,with intermr
precisiongreaterthan the extended-precision format
o A 67-bit barrelshifterfor high-speedshiftingoperations(for norma
etc.)

This document contains information on a new product. Specifications and information herein are subject to change wit

5-96 tffi8OOO.FAMILYtrETERENCE
Mfi$UAL MOTOROLA
 "---%

'''':'''-";+S&'fifi,.l|l::':'**-*"*!ffi$1sFF?ae:-"r..1

o Speciaf-purposehardwarefor high-speedconversionof binary real

ory operandsto a.nd'fromthe internalextendedformat
o Reducedcoprocessorinterfaceoverheadto increasethroughput
o 46 instructions,including35 arithmeticoperations
. Fulfconformationto the IEEE754standard,includingall requirement
suggestions
o Supportof functionsnot definedby the IEEE 7s4standard,including
set of trigonometricand transcendentalfunctions
o Seven data types: byte, word and long-word integers; single-, do
real numbers; and packedbinary-codeddc
and extended-pr,ecision
(BCD)string real numbers
o 22 constantsavailablein the on-chip ROM, includirg ?r,e, and pow
10
o Virtual memory/machineoperations
o Efficientmechanismsfor procedurecalls,contextswitches,and intr
handling
. Concurrentinstructionexecutionwith the main processor
. Concurrentinstructionexecutionof multiplefloating-pointinstructir
o Use with any host processoron an 8-, 16-,or 32-bitdata bus

THECOPROCESSOR
CONCEPT
The MC68882functions as a coprocessorin systems where the MC€
MC68030is the main processor.lt functionsas a peripheralprocesso
tems where the main processoris the MC68000,MC6S008,or MC680'

The MC68882utilizesthe M68000 Family coprocessorinterfaceto pl

logical extensionof the MC68020/MC68030registersand instruction
mannertransparentto the programmer.The programmerperceivestt
MC68882executionmodel as if both devicesare implementedon onr

MOTOROLA MANUAL
M68MO FAMILYREFERENCE 5,.97
 A fundamentalgoal of the M68000Family coprocessorinterfaceir
the programmerwith an executionmodel based upon sequential
executionby the MC68020/MC68030 and the MC68882,For optimu
ance, however,the coprocessorinterfaceallows concurrentopera
MC68882with respectto the MC68020/MC68030 whenever possible
the programmer'smodel,the coprocessorinterfaceis designedto
closelyas possible,nonconcurrentoperationbetweenthe MC680:
and the MC68882.

The MC68882is a non-DMA type coprocessorusing a subset of t

purpose coprocessorinterfacesupported by the MC68A20MCGS0:
of the interfaceimplementedin the MC68882are as follows:
. The main processor(s)and MC68882communicatevia standi
bus cycles.
. The main processor(s) and MCOSB&2 communicationsare nol
upon the architectureof the individualdevices(e.g.,instructi
caches,addressingmodes).
o The main processor(s)and MC688B2may operateat differentcl
o MC68882instructionsutilizeall addressingmodes provided I
processor.
o All effectiveaddressesare calculatedby the main processorat
of the coprocessor.
. All data transfersare performed by the main processorat tht
the Mc68892.
. Overlapped(concurrent)instructionexecutionenhancesthrout
maintainingthe programmer'smodel of sequentialinstructior
. Coprocessordetectionof exceptionsrequiringa trap to be takr
iced by the main processorat the reguestof the MC68882.
. Support of virtual memorylmachinesystems is provided via
and FRESTORE instructions.
o Up to eight coprocessorsmay residein a srTstem
simultaneous
coprocessorsof the same type are allowed.
o Systems may use software emulation of the MC68882withor
bling or refinking user software.

s-98 M88OMFAMILYREFERENCE
MANUAL MOTOROLA
 --

HARDWARE
OVERVIEW
The MCOS882isa high-performance floating-pointdevicedesignedto i
with the MC68020/MC68030 as a coprocessor.This devicefully supp
MCGS020/MC68030 virtualmachinearchitectureand is imptementedin ]
Motorola'slow-powersmall-geometryprocess.This processallowsCIV
HMOS (high-density NMOS)gatesto be combinedon the samedevice
structuresare usedwhere speedand low power are required,and HMC
tures are used where minimum siliconarea is desired.Usingthis tecl
increasesspeed while using low-power consumption,yet still confi
MC68881to a reasonablysmall die size.

The MC68882canalso be usedas a peripheralprocessorin systemsw

M C 6 8 0 2 0 1 M C 6 8 0 3i s0 n o t t h e m a i n p r o c e s s o r( e . 9 . , M C 6 8 0 0 0 ,M (
MC68010),The configurationof the MC68882as a peripheralproct
coprocessormay be completelytransparentto user software (i.e.,tf
object code may be executedin either configuration).

The architectureof the MC68882appearsto the user as a logicalexte

the M68000Family architecture.Becauseof the coupling of the copl
interface,the MC68020/MC68030 programmercan view the MC68882r
as though the registerswere resident in the MC68020/MC68030.
MC680201MC68030 and an MC68882function as one processorwith (
teger data registers,eight addressregisters,and eight floating-pointc
isterssupportingsevenfloating-pointand integerdata types.

The MC68882programmingmodel, shown in Figures1-6, consistsof

lowing features:
o Eight 80-bit floating-pointdata registers(FPO-FP7\.These regis
analogousto the integerdata registers(D0-D7l andare completely
purpose(i.e.,any instructioncan use any register).
o A 32-bit control registercontainsenable bits for each class of e>
trap and mode bits for settingthe user-selectableroundingand p
modes.
o A 32-bit status registercontainsfloating-pointcondition codes,r
bits, and exceptionstatus information.
o A 32-bitinstructionaddressregistercontainsthe main processorI
'
addressof the last floating-pointinstructionthat was executed.
dress is used in exceptionhandlingto locatethe instructionthat
the exception.

MOTOROLA M68O(X} MANUAL

FAMILYREFERENCE 5-99
 FPO
I
FP1

FP2

FP3
FLoATI{GPoNNT
DATAREGTSTERS
FP4

FP5

FP6

FPl

FFCRCO.TTROL
REGISTER

CONDITION ouonEhn EXCEPNON ACCRTED FPSRSTAruSREGISTER

CODE STATI.}S EXCE-mON

FHARITSTRT'CIION
ADDRESS
REGISTER

Figure1. ProgrammingModel

BSUN sNAtl OPERR OVFL UNFL DZ INHE INEX1

II.IE)(ACT DECIMATINPI'T
ti€(AcT@ERATto{
DIVIDE BYZErc
tfr\DEtrLOUV
ovERFLOU{
@ERAI\DERROR
SIGMU}GI{OTANIJMBER
BRAl,lC I't/SEtONUI'IORDERED

Figure2. ExceptionStatus/EnableByte

5-100 M68OOO MANUAT

FAMILYREFERENCE MOTOROLA
 PREC RiD 0

RCX,$fDlt-lG
IIODE:
OOTONEAREST
01 TOI'ARDZERO
10 TOWARD INFINITY
MINI.|S
11 TOWARD PLUSII.IFINITY

ROtf.lDll,lc PRECI
SlO.l:
M EXTENDED
01 slNGLE
t0 DotBLE
11 (UilDEF|NED, RESERVED)

Figure3. Mode GontrolByte

0 N z I NAI{

I NOTANt.[ilBERORU]{ORDERED
tlstNtw
ZERO
NEGATIVE

Figure 4. Gondition Code Byte

s OUONENT

SEVENTEASTSIGNIFICAI.{T
BITSOFOI'OTIENT
SIGNOFOUOTIENT

Figure5. OuotientByte

roP OVFL U}fL DZ ll.lEx 0

ll,lE)(ACT
DIVIDE 8YZERO
UhDERFLOW
OVERFLOW
IT.TVAIJDOPERATION

Figure 6. Accrued Exception Byte

MOTOROLA M68OOO
FAMILYREFERENCE
MANUAL 5-101
 The connectionbetweenthe MCOS020/MC68030 and the MC68882is t
extensionof the M68000bus interface.The MC68882is connected?s i
cessor to the MC68020/MC68030, and the selection of the MC68882i
on a chip select,which is decodedfrom the MC68020/MC68030 functio
and addressbus. Figure 7 illustratesthe MPU/coprocessor configurati

BUSEXTEI.ISI

Figure 7. Tvpical CoprocessorGonfiguration

As shown in Figure8, the MC68882is internallydivided into three prc

elements:the bus interfaceunit (BlU),the conversionunit (CU),and tl
metic processingunit (APU). The BIU communicateswith the M
MC68030,the CU performs data conversionfor binary real data form
the APU executesall MC68882instructions.

5-102 MANUAL
[,F8OM FAMIIV REFERENCE MOTOROLA
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M.OTOROLA M68OOO
FAMILY REFERENCE
MANUAL 5-103
 The BIU containsthe coprocessorinterfaceregisters(ClRs).In a
registerselect and DSACKtiming control logic and the status fl
monitor the statusof communicationswith the main processorat
in the BlU.

The CU containsspeciaf-purposehardwarethat performs data for

sions between binary real data formats to and from the intern
format. The CU relievesthe APU of a significantwork load anc
MC68882to executedata movement and preparationfunctions (
with arithmeticand transcendentalcalculations.

The eight, 80-bit,ffoating-pointdata registers(FPO-FP7\ and the 32

status,and instructionaddressregisters(FPCR,FPSRand FPIAR)
in the APU. In addition,the APU containsa high-speed67-bitari'
usedfor both mantissaand exponentcalculatiol'ts, a barrelshiftert
from 1-67 bits in one machinecycle, ?nd ROMconstants(for use by
algorithmsor userprograms).The controlsectionof the APU conta
generator,? two-levelmicrocodesequencer,the microcodeROM,,
circuitry.The built-in self-testcapabilitiesof the MC68882enhanr
and ease manufacturingrequirements;however,these diagnost
are not accessibleoutsidethe specialtest environmentsupported
equipment.

BUSINTERFACE
UNIT
Afl communicationsbetweenthe MC680201MC68030 and the MC'
via standardM68000Familybus transfers.The MC68882is designe
on 8-, 16-,or 32-bitdata buses.

The MC68Sszcontains a numberof ClRsthat are addressedin the st

as memory by the main processor.The M68000Familycoprocesr
is implementedvia a protocolof readingand writing to these regi
main processor.The MC68020/MC68030 implementsthis general-
processorinterfaceprotocol in hardwareand microcode.

when'the Mc68 0201Mc68030 detectsa general-tvp€Mc68882ins'

MC68020/MC68030 writes the instructionto the memory-mappel
CIRand readsthe responseClR.In this response,the BlU encodes
any additional action required of the MC680201MC68030 on bt
MC68882.For example,the response:rnoy requestthat the MC680.
fetch an operandfrom the evaluatedeffectiveaddressand transfer
to the operand ClR. Once the MC6802AMC68030 fulfills the cop
quest(s),the MC68020/MC68030 is free to fetch and'executesuL
structions.

5-104 M68OOO
FAMILY REFERENCE
MANUAL MOTOROLA
 The only difference between a coprocessorbus transfer and an
transfer is that the MC68020/MC68030 issuesa CPU addressspi
code during the cycle function codes are generatedby the MOt
processorsto identifyeight separateaddressspaces.Thus,the mem
ClRsdo not infringeupon instructionor data addressspaces.Th
MC68030placesa coprocessorlD field from the coprocessorinstt
three of the upper addresslines during coprocessoraccesses.Thir
CPU addressspacefunction code are decodedto selectone of (
cessorsin the system.

Sincethe coprocessorinterfaceprotocol is basedsolely on bus tr

protocolis easilyemulatedby softwarewhen the MC68882is used
eral with any processorcapableof memory-mappedl/O over an tV
bus. When used as a peripheralprocessorwith the MC68008,t\
MC68010,all MC68882instructionsare trapped by the main pro(
exceptionhandlerat executiontime. Thus, the softwareemulatio
processorinterfaceprotocolcan be totallytransparentto the user.T
can providea performanceoption for Mc68000-based designsby c
main processorto the MC680201MC68030, The softwaremigrateswit
to the next-generationequipmentusing the MC68020/MC68030.

Sincethe bus is asynchronous,the MC68882need not run at the

speedas the main processor;therefore,total system performance
tomized.Thus,the floating-pointperformancecan be selectedto
ular price/performance runningthe MC68882at slow
specifications,
clockspeedsthan the MPU clock.

COPROCESSOR
INTERFACE
The M68000Family coprocessorinterfaceis an integralpart of tl
and MC68020/MC68030 designs.The interfacepartitionsMPU and
operationsso that the MC680201MC68030 does not haveto complt
coprocessorinstructionsand the MC68882does not have to dul
processorfunctions(suchas effectiveaddressevaluation).

This partitioningprovidesan orthogonalextensionof the instru

permitting MC68882instructionsto utilize all MC68O20IMC6803C
modes and to generateexecutiontime exceptiontraps. Thus, fr
grammer'sview, the MPU and coprocessorappearto be integt
single chip. While the executionof most MC68882instructionsn
lapped with the executionof MC68020/MC68030 instructions,co
completelytransparentto the programmer.The MC68020/MC68031
and programflow (trace)modes are fully supportedby the MCOI
M68000Familycoprocessorinterface.

MOTOROLA FAMILYREFERENCE
M68OOO MANUAL 5-105
 Although the M68000Famifycoprocessorinterfacepermits coprocessc
bus masters,the MC68882is never a bus master.The MC68882requr
the MC680201MC68030 fetch all operandsand store all results.In this r
the MC680201MC68030 32-bitdata bus provideshigh-speedtransferof 1
point operandsand resultswhile simplifyingthe designof the MC688

Sincethe coprocessorinterfaceis basedsolely upon bus cycles(to a

CPUspace)and the MC68882is nevera bus master,the MC68882can br
on eitherthe logicalor physicalside of the systemmemory mansgernr
Sincethe memory managementunit of the MC68030is on-chip,the [V
is alwayson the physicalsideof the memory managementunit in an [V
system.

The virtual machinearchitectureof the MC680201MC68030 is supporte

coprocessorinterfaceand the MC68882through the FSAVEand FRI
instructions.lf the MC680201MC68030 detectsa pagefault and/ora task1
the MC68020/MC68030 can force the MC68882to stop whatever opel
in progressat any time and savethe MC68882internalstatein memory
the executionof a floating-pointinstruction,the MC68882can stop a
termined points as well as at the completionof the instruction.

The sizeof the savedinternalstateof the MC68882is dependentupon:

state at the time FSAVEis executed.lf the MC68882is in the reset sta
FSAVEis received,only one word of state is transferredto memory, wl
be examinedby the operatingsystemto determinethat the coproces
grammer'smodel is empty. lf the coprocessoris in the idle statewher
is received,only a few words of internal state are transferredto me
executingan instructionin the busy state, it may be necessaryto s
entire internalstateof the machine.Instructionscompletingexecutior
time than it takes to save the larger state in mid-instructionare alk
completeexecutionand then save the idle state.Thus, the size of th
internalstateis keptto a minimum.The abilityto utilizeseveralinterr
sizesgreatly reducesthe averagecontextswitchingtime.

The FRESTORE instructionpermitsreloadingof an internalstatethat wt

earlierand continuesany operationthat was previouslysuspended.FRI
of the null stateframe re-establishes
defaultregistervalues,a functioni
to the MC68882hardware reset.

5-106 M68OOO MANUAL

FAMILY REFERENCE MOTOROLA
 PERFORMANCE
MC68882 ENTS
ENHANCEM
The high performanceof the MC68882is the result of executi
floating-pointinstructionsconcurrently.Concurrencyutilizesthe
efficientlyby decreasingits idle time.

When the MC68882receivesan instructioh,the BIU and the CU can ini'

instruction,fetch the necessaryoperands,and convert them to the
extendedformat even though the APU is busy completingexecutiont
vious instruction.Althoughthe MC68881can only instructthe main pr
to wait if the APU is busy, the MC68882CU can proceedwith the next
tion. When the APU is finally ready to perform the calculation,it ca
immediatelywithout incurringdelay due to data movementand prel
functions.

Another factor in obtainingincreasedperformancein the MC68882is

timized FMOVEinstructionsfor BCD real data formats.These FMOVE
tions executetwice as fast as the correspondingFMOVEinstruction
MC68881. The FMOVEinstructionsare alsopotentiallyfully concurrent
be completelyexecutedduring the executionof a previousinstructior

The MCOS882 also has a more optimized coprocessor interface t

MC68881.lf an arithmeticinstructionhas data formats of single, do
extendedprecision,the dialogsare designedto increasethe potential
with subsequentinstructions.This overlap can significantlydecreast
fective instructionexecutiontime.

DATAFORMATS
OPERAND
The MC68882supportsthe following data formats:
Byte Integer(B)
Word Integer(W)
Long-WordInteger(L)
S i n g l e - P r e c i s i oRne a l( S )
Double-Precision Real(D)
Extended-Precision Real(X)
PackedBCDString Real(P)
The capitalletterscontainedin parenthesesdenote suffixesadded to
tions in the assemblylanguagesourcethat specifythe data format to I

MOTOROLA MANUAL
FAMII.Y REFERENCE
M68OOO 5-107
INTEGER
DATAFORMATS :

The three integerdata formats (byte,word, and long word) are t

twos-complementdata formats supportedin the M68000Familyi
Wheneveran integeris used in a floating.pointoperatioh,the intt
maticallyconvertedby the MC68882to an extended-precision fl
number before being used. For example,to add an integerconste
the number containedin floating-pointdata register3 (FP3),tf
instructioncan be used:
FADD.W#5,FP3
(The Motorolaassemblersyntax " #" is used to
denoteimmediateaddressing:)
The ability to effectivelyuse integersin floating-pointoperations
memorysincean integerrepresentation of a number,if representab
smallerthan the equivalentfloating-pointrepresentation.

FLOATING-POINT
DATAFORMATS
The floating-pointdataformats,singleprecision(32 bits)and dout
(64 bits),are definedby the lEEE754standard.Thesedataformatsi
floating-pointformatsand shouldbe usedfor most calculationsin
numbers.Table l liststhe exponentand mantissasizefor single,
extendedprecision.The exponentis biased,and the mantissais
m a g n i t u d ef o r m . S i n c es i n g l ea n d d o u b l e p r e c i s i o nr e q u i r en o r m
bers,the most significantbit of the mantissais implied as a on(
included,thus giving one extra bit of precision.

Table 1. Exponent and Mantissa Sizes

Data Exponent Mantissa
Format Bits Bits Bias
Single 8 zs(+r) 127
Double 11 52(+1) 1023
Extended 15 64 16383

The extended-precision data format is also in conformancewith the ll

standard,but the standarddoes not specifythis format to the bit le,
does for single and double pr"ecision. The memory format on the M
c o n s i s t so f 9 0 b i t s ( t h r e el o n g w o r d s ) . O n l yg 0 b i t s a r e a c t u a l l yu s e d ;t l
1 6 b i t s a r e f o r f u t u r ee x p a n d a b i l i tay n d f o r l o n g - w o r da l i g n m e n to f {
pointdatastructures. Extendedformat hasa 1s-bitexponent,a64-bitm
a n d a 1 - b i tm a n t i s s as i g n .

5-108 M68OOO
FAMILYREFERENCE
MANUAL MOTOROLA
 Extended-precision numbersare intendedfor use as temporarrT vari
mediatevalues,or in areaswhere extra precisionis needed.^ For
compilermight selec{extended-precision arithmeticfor evaluatior
side of an equationwith mixed.sizeddata and then convertthe ar
data type on the left side of the equation.Extended-precisiondatt
stored in large arraysdue to the amount of memory required by

PACKEDBCDSTRINGDATA FORMAT
This data format allows packedBCDstringsto be transferredto a
MC68882. The stringsconsistof a 3-digitbase-10exponentand a 1'
10 rnantissa.Boththe exponentand mantissahavea separatesign
are packed BCD;an entirestring fits in 96 bits (threelong words).
formats, when packedBCD strings are suppliedto the MC68882
are automaticallyconvertedto extended-precision realvalues,allot
BCD numbersto be used as inputs to any operation.For examplt
FADD.P #-6.023E+ 24,FP5

BCD numbers can be output from the MC68882in aformat rea(

printing by a program generatedby a high-levellanguagecomF
ample,

This instructionconvertsthe floating-pointdata register3 (FP3)c

a packedBCDstringwith five digitsto the right of the decimalpoin
F format).

DATAFORMATSUMMARY
All dataformatspreviously
describedaresupportedorthogonally
meticandtranscendentaloperations MC680
andby all appropr:iate
addressing modes.Forexample,all of the followinginstructions
FADD.B #O,FPO
FADD.W D2,FP3
FADD.L BIGINT,FPT
FADD.S #3.14159,FP5
FADD.D (SP}+,FP6
FADD.X t(ffiMP-PTR,A7ll,FP3
FADD.P #1.23E25,FP0

MOTOR'OLA MANUAL
fAMILY REFEHENCE
M68OOO 5-109
 Most on-chipcalcufationsare performedin the extended-precision forr
the eight floating-pointdata registersalways contain extended-precis
ues. Alf operands used are convertedto extended precisionby the t!
before a specificoperation is performed,and all results are in extent
cision. The use of extended precision ensures maxirfum accuracy
sacrificing performance.

Referto Figure I for a summary of the memory formats for the sev
formats supported by the MC68882.

BYTEIMEGER

15

E**'NTEGER

32HTS Lq{G-UVORE
II.{TEGER

&BIT a$T
EXP. FRACTIO}I Sll.Gl.EREAL

I srcNoFFRAcTToN

11-BtT 52BIT
EXP. FRACNON DO|.JBI.E
REAL

EXTENDEO
REAL

I rMPucrr
BTNARY
PorNT

PACKED
BCDREAL

l- n pucNTDEcTMAL
porNT
I I I'
| -| 2 B|TS,USEDONLYFORflNFtNtTyORNAitS,ZEROOTHERWTSE
I StcNOFEXPONENT
I_ SIGNOFMA}.INSSA
'UNLESS
ABtNARy-To-DEctMAL
coNVERStoN
ovERrtowoccuRs

Figure 9. Data Format Summary

5-110 MO8Ofi}FAT,IILY
REFERENCE
MANTIAL MOTOROLA
 ,INSTRUCTION
SET
:
The MC688S2lnstructionset is organizedinto six major classes:
1. Moves between the MC68882and memory or the MC680201I
and out)
2. Move multiple registers(in and out)
3. Monadicoperations
4. Dyadicoperations
5. Branch,set, or trap conditionally
6. Miscellaneous ' j

MOVES
On all rnoves from memorv (or.frorn an MC68020/MC68030 data
the MC68882,data is converted from the' source data forrnat to
extended-precision format. On all moves from the MC68882to ml
an MC680201MC68030 data register), data is converted from
extended-precisionformat to the destinationdata format. Note'tha'
ment instructionsperform arithmetic operationssince the resu
roundedto the precisionselectedin the FPCRmode control byte.
rounded using the selectedrounding mode and is checkedfor o
u nderflow.

The syntaxfor the move is as follows:

FMOVE.(fmt) <ea>,FPn Move to MC68882
FMOVE.(fmt) FPm,(ea) Move from MC68882
FMOVE.X FPm,FPn Move within MC68882
where <ea> is an MC68020/MC68030 effectiveaddressoperahd,..
data format size,and FPm and FPnare floating-pointdata registe

MOVEMULTIPLE
REGISTERS
The floating-pointmove multiple instructionson the MCOS882 al
the integer counterpartson the M68000 Family processors.An'
floating-pointregistersFP0-FP7can be moved to or from memc
instruction.These registersare always moved as 96-bit extendedr
conversion(no possibilityof conversionerrors).Some examples
multipleinstructionare as follows:
FMOVEM <ea>,FPO-FP31FP7
FMOVEM FP2|FP41FP6,{ea)

MOTOROLA MANUAL
M68flXI FAMILYREFERENCE 5-1:l1
 The move multiple instructionsare useful during context switchr
rupts to save or restorethe state of a program. These moves ar€
at the start and end of a procedureto save and restore the regist
calling routine. To reduce procedurecall overhead,the list of re1
saved or restoredcan be containedin a data register,thus enabli
optimizationby allowing a calledroutineto save as,few registers
Note that no rounding or overflow/underflowcheckingis perform
operations.

MONADICOPERATIONS
Monadicoperationshaveone operand.Thisoperandmay be in a ff
'
data register,memorv, or in an MC680201MC68030 data register.
always stored in a floating-pointdata register. For example, thr
squareroot is one of the following:
FSORT.(frnt> <ea>,FPn
FSORT.X FPm,FPn
FSORT.X FPn

5-112 ITIT6SU{X}
FAMILY REFERENCE
MANUAL MOTOROLA
 The availableMC68882 monadicoperations areas follows:
FABS AbsoluteValue
FACOS Arc Cosine
FASIN Arc Sine
FATAN Arc Tangent
FATANH Hyperbolic Arc Tangent
FCOS Cosine
FCOSH Hyperbolic Cosine
FETOX e to the x Power
FETOXM1 e to the x Power- 1
FGETEXP GetExponent
FGETMANGetMantissa
FINT IntegerPart
FLINTRZ IntegerPart(Truncated)
FLOG 10 LogBase10
FLOG2 Log Base2
FLOGN Log Basee
FLOGNP1 Log Basee of (x+ 1)
FNEG Negate
FSIN Sine
FSINCOS Simultaneous SineandCosine
FSINH Hyperbolic Sine
FSORT SquareRoot
FTAN Tangent
FTANH Hyperbolic Tangent
FTENTOX 10to the x Power
FTST Test
FTWOTOX2 to the x Power

MOTOROLA MANUAL
FAMILY REFERENCE.
M68OOO 5-113
 DYADICOPERATIONS
Dyadicoperationshave two operandseach.The first operandis i
point data register,mem ory,or an MC68020/MC68030 data register,
operandis the contentsof a floating-pointdata register.The destir
same floating-pointdata registerused for the second operand.F
the syntaxfor floating-pointadd is as follows:
FADD.<fmt) <ea>,FPn
FADD.X FPm,FPn

The availableMC68882dyadic operationsare as folfows:

FADD Add
FCMP Compare
FDIV Divide
FMOD M o d u l oR e m a i n d e r
FMUL Multiply
FREM I E E ER e m a i n d e r
FSCALE ScaleExponent
FSGLDfV Single-Precision Divide
FSGLMUL S i n g l e - P r e c i s i oMnu l t i p l y
FSUB Subtract

BRANCH,
SET,ANDTRAPON CONDITION
The floating-pointbranch,set,and trap on conditioninstructionsir
by the MC68882aresimilarto the equivalentintegerinstructionsof
Family processors,except more conditionsexist due to the speci
IEEEfloating-pointarithmetic.When a conditionalinstructionis e:
MC68882 performs the necessarycondition checking and rep
MC680201MC68030 whetherthe conditionis true or false.The MC680
then takesthe appropriateaction.Sincethe MC68882and MCOBO:
are closelycoupled,the floating-pointbranchoperationsexecuter

The MC68882conditionaloperationsare as follows:

FBcc Branch
FDBcc Decrementand Branch
FScc Set Accordingto Condition
FTRAPcc Trap on Condition(with an OptionalParameter
where cc is one of the 32 floating-pointconditionaltest specifit
Table2.

5-114 M68OOO
FAMILY REFERENCE
MANUAL MOTOROLA
 Table2. Floating-Point
Conditional
fest Specifiers
Mnemonic Definition
NOTE
The following conditional tests do not set the BSUN
bit in the status register exception byte under any
circumsta nces.

F False
EO Equal
OGT OrderedGreaterThan
OGE OrderedGreaterThanor Equal
OLT OrderedLessThan
OLE OrderedLessThan or Equal
OGL OrderedGreateror LessThan
OR Ordered
UN Unordered
UEO Unorderedor Equal
UGT Unorderedor GreaterThan
UGE Unorderedor Greateror Equal
ULT Unorderedor LessThan
ULE Unorderedor Lessor Equal
NE Not Equal
T True
NOTE
All the followingconditionaltestssetthe BSUNbit
E
in the statusregisterexceptionbyteif the NANcon-
ditioncodebit is setwhen a conditionalinstruction
is executed.
SF SignalingFalse
SEO SignalingEqual
GT GreaterThan
GE GreaterThanor Equal
LT LessThan
LE LessThanor Equal
GL Greateror LessThan
GLE Greater,Less,or Equal
NGI-E Not (Greater,Less,or Equal)
NGL Not (Greateror Less)
NLE Not (Lessor Equal)
NLT Not (LessThan)
NGE Not (Greateror Equal)
NGT Not (GreaterThan)
SNE SignalingNot Equal
ST SignalinTg rue

MOTOROLA M68OOO
FAMILYREFERENGE
MANUAL 5-115
MISCELLAN
EOUSINSTRUCTIONS
Miscellaneousinstructions
includemovesto andfrom the status,
instructionaddressregisters.
Also includedarethe virtualmemr
FSAVEand FRESTORE instructions
that saveand restorethe inte
the Mc68882:
FMOVE <ea>,FPcr Moveto ControlRegister(s)
FMOVE FPcr,<ea> Movefrom ControlRegister(s)
FSAVE <ea> VirtualMachineStateSave
FRESTORE <ea> VirtualMachineStateRestore

ADDRESSING
MODES
The MC68882does not perform address calculations.Thus, if the t!
instructsthe MC680201MC68030 to transfer an operand via the copl
interface,the MC68020/MC68030 performs the addressingmode calc
requestedin the instruction.In this case,the instructionis encodedsp€
for the MC68020/MC68030, and the execution of the MC68882is det
only on the value of the command word written to the MC68882by tl
processor.

This interfaceis flexible and allows any addressingmode to be us

floating-pointinstructions.For the M68000Family,these addressing
includeimmediate,postincrement,predecrement,data or addressreg
rect, and the indexed/indirectaddressingmodes of the MC68020|M
Some addressing modes are restrictedfor instructions consistent!
MGS000Family architecturaldefinitions (e.g., prograrn counter rela
dressingis not allowedfor a destinationoperand).

The orthogonalinstructionset of the MC68882and the flexible branc

addressingmodesof the MC680201MC68030 allow a programmeror a c
to think of the MC68882as though it were part of the MC68020/MC68
specialrestrictionsare imposedby the coprocessorinterface,and floatir
arithmeticis coded exactlylike integerarithmetic.

5-116 M68MO FAMILY REFERENCE

UIANUAL MOTOROLA
 Using the MC68882in an existing MC68881socketdoes not require h
changesnor user-softwaremodifications.lmplementationof multiple'
point instructionexecutionconcurrencygives the MC08882a performi
vantageover the MC68881.However,to guaranteethat the floating-F
ception model maintainsthe preceptsof a sequentialexecutionmodt
systems-levelsoftware modificationsare needed to upgrade the sy
operate properly with an MC68882.

First,notethat the MC68882idle and busy stateframes (generatedby thr

instruction)are both 32 bytes larger than those of the MC08881.Tht
for the exceptionaloperand,the operandregisterword, and the BIU fl
from the top of the saved idle state frame are 32 bytes more than thi
MC68881.However,a unique format word is generatedby the MC68
abfing the system software to detectthis difference.The unique form
prevents a saved MC68881context from being restored into an MC68
vice versa.

Second,the branchor set on unordered(BSUN),signalingnot-a-number

operanderror (OPERR), overflow(OVFL),divide by zero(DZ),and inexa
(INEX)floating-pointexceptionhandlersmust have these minimum
ments:
1. FSAVEmust be executedbeforeany other floating-pointinstruct
2. A BSETor similar instructionsets bit 27 of the BIU flag word (lo
the saved idle state frame).
3. FRESTORE
must be executedbefore RTE.
Theserequirementsare not applicableto interrupthandlersthat do not
any floating-pointinstructions.For interrupthandlersthat have floatil
instructions,only requirements1 and 3 must be implemented.

MOTOROLA M68OOO
FAMITYREFERENCE
MANUAL 5-117
 FUNCTIONAL
SIGNALDESCRIPTIONS
The following paragraphscontaina brief descriptionof the input an(
signalsfor the MC68882floating-point
coprocessor.The signalsarefunt
organizedinto groupsas shown in Figure10.

Figure10.FunctionalSignalGroups

NOTE
The terms assertionand negationare used extensively to, avoid
.onfusionyhen describllgactive-low and active-high sign
tOrmassertor assertionis usedto indicatethat a signalis activeor

signalis inactiveor false.

i:"#[j;
ffi;lfff T'i:f,'#i:,,T:'j:H::ffi
;:'Jff
BUS(AO-A4I
ADDRESS
These active-highinputs are used by the main processorto se
locationsin the CPU addressspace.These lines control the regis:
(seeTable3).

5 - 11 8 M6800OFAMIIV REFERENCE
il'IANUAL s40ToRot_A
 Table3. Goprocessorlnterface
RegisterSelection
A4=AO Offset width TYpe Register
0000x $00 16 Read Response
0001x $02 16 Write Control
0010x $04 16 Read Save
0 0 11 x $06 16 nlw Restore
0100x $08 16 (Reserved)
0 1 0 1 x $0A 16 Write Command
0110x $0c 16 (Reserved)
0:l11x $0E 16 Write Condition
100xx $10 32 nn[ Operand
1010x $14 16 Read RegisterSelect
1 0 1 1 x $16 16 (Reserved)
11Oxx $18 32 Read InstructionAddress
1 1 1 x x $1C 32 nnil OperandAddress

Whenthe MC68882 is configuredto operateoveran 8-bitdatabus,thr

is usedas an addresssignalfor byteaccessesof the ClRs.Whenthe IV
ls configured
to operateovera 16-or32-bitdatabus,boththe A0andl
pinsarestrappedhigh and/orlow as listedin Table4.

Table4. DataBus SizeConfiguration

AO m Data Bus
Low 8-Bit
Low High 16-Bit
High High 32-Bit

DATABUS(DO-D31}
This 32-bit, bidirectional,three-statebus serves as the general-p
path betweenthe MC68020/MC68030 and the MC68882,Regardles:
the MCOS882is operated as a coprocessoror a peripherafprocess
processortransfersof instructioninformation, operand data, stal
tion, and reguestsfor service occur as standard M68000 bus cyclt

The MC68882will operate over an 8-, 16-,or 32-bitdata bus. Dept

the system data bus configuration,A0 and SIZEare configuredsp
the applicablebus configuration.(Referto ADDRESSBUS (A0-A
(SlEl for further details).

MOTOROLA MESOOO
FAISILYREFEREilCCMATUUAL 5-119
 slzE(slzEl
This active-lowinput is used in conjunctionwith the A0 pin to cr
MC68882for,operationover an 8-, 16-, or,32-bitdata bus. When tl
is configuredto operateover a 16- or 32-bitdata bus, ffiE and A0 I
high and/or low as listed in Table4.

ADDRESS (re}
STROBE
This active-lowinput indicatesa valid addresson the address br
signalsfor chip select(6) and read/write(RAil).

(CSI
CHIPSELECT
This active-lowinput enablesthe main processoraccessto the M(
When operatingthe MC68882as a peripheralprocessor,the chip-sr
is system dependent(i.e.,like the chip selecton any peripheral).

H (RM}
READ/WRITE
This input indicatesthe directionof a bus transaction(read/write)
processor.A logic high (1)indicatesa readfrom the MC68882,ant
(0) indicatesa write to the MC68882.The RRVsignal must be val
is asserted

DATASTROBE{DSI
This active-lowinput indicatesis valid data on the data bus during
cycle.

(DSACKO,
DATATRANSFERAND SIZEACKNOT'\ILEDGE DSACK1I
Theseactive-low,three-state
outputsindicatethe completionof a !!q
themainprocessor.TheMc68882assertsbothffiandDffiI
assertionof CS.

ff the bus cycleis a main processorread,the MC68882 assertsDSA(

EmmT to indicateinformation on the databusis valid.(BothDffiK
may be assertedin advanceof the validdatabeingplacedon the bur
buscyc|eisamainprocessorwritetotheMc68882,Dw0andDs
usedto acknowledge of the databy the MC68882.
acceptance

5-120 M68OOO
FAMILY REFERENCE
MANUAL MOTOROLA
 The MC68882 afsousesDSCK-Oand meKT signalsto dynamically
to the MC68020/MC68030 the port size(databus width) on a cycle-l
basis.Depending uponwhichof the ESACKxpins is assertedin a gi'
cycle,the MC680201MC68030 assumesdata has beentransferredto/,
8-, 16-,or 32-bitdataport.Table5 liststhe DSCKx assertions that a
by the MC68882 for the variousbus cyclesoverthe variousdatabus
urations.

Table5. DSACKx,
Assertions
Data Bus A4 DSACKl DSACKO Comments
'Low
32-Bit 1 Low Valid Dataon D31-D0
32-Bit 0 Low High Val d Dataon D31-D16
16-Bit x Low High Val d Dataon D31-D16or D15-D0
8-Bit x High Low Val d Dataon D31-D24,D23-D16,D15-D8,or D7-D0
Atl x High High InsertWait Statesin CurrentBus Cycle

Table 5 indicatesthat all accessesover a 32-bit bus where A4 equals:

to 16-bitregisters.The MC68882implementsall 16-bitClRson data linesI
(to eliminatethe needfor on-chipmultipfexers);however,the MC680201N
expects 16-bit registersthat are located in a32-bit port at odd word ad
G
(At : 1)to be implementedon datalinesD0-D15.Foraccesses to theser
when configured for 32-bit bus operation,the MC68882generatesI
signalsas listed in Table 5 to inform the MC68O2AMC68030 of valid
Dl6:D31 insteadof D0-D15.

An externalholdingresistoris requiredto maintainDSACK0 andDSAC

betweenbuscyc|es.Toreducettresigna|risetime,Dffiandm
activelypulledup (negated) by the MC68882 followingthe risingedg
or D5, andbothmm linesarethenthree-stated (placedin the high
ancestate)to avoidinterference with the nextbus cycle.

RESET(RESET}
This active-lowinput causesthe MC68882to initi alizethe floating-po
registersto non-signalingnot-a-numbers (NANs)and clearsthe floatil
control, status,and instructionaddressregisters.

When performinga power-up reset,externalcircuitryshould keep RE

sertedfor a minimum of four clockcyclesafterVCCis within tolerance,€
correctinitializationof the MC68882when power is applied.For comp
with all M68000Familydevices,100 ms should be used as the minim

MOTOROLA M68fi}O FAMITYREFERENCE

MANUAL 5-121
 When performing a reset of the MC6888^after VCC has been with
for more than the initial power-uptime, RESETmust have an ast
width which is greaterthan two clockcycles.For compatibilitywitl
Familydevices,10 clockcyclesshould be used as the minimum.

CLOCK(CLK}
The MC68882clock input is a TTl-compatiblesignalthat is interni
f o r d e v e l o p m e n to f t h e i n t e r n a lc l o c k s i g n a l s .T h e c l o c k i n p u t :
constant-frequency squarewave with no stretchingor shapingte,
quired. The clock should not be gated off at any time and must
m i n i m u m a n d m a x i m u m p e r i o da n d p u l s e - w i d t ht i m e s .

(ffi}
SENSEDEVICE
l ND pin or as
T h i s p i n m a y b e u s e d o p t i o n a l l ya s a n a d d i t i o n a G
to externalhardwarethat the MC68882is presentin the system.1
internallyconnectedto the GND of the die, but it is not necessar

E it to the externalground for correctdeviceoperation.lf a pullup rer

shouldbe largerthan10 O) is connectedto this pin location,exterr
may sensethe presenceof the MC68882in a system.

(VCCand GNDI
POWER
These pins providethe supply voltage and system referencelev,
ternal circuitryof the MCOS882Careshould be takento reduceth
on these pins with appropriatecapacitivedecoupling.

NO CONNECT(NC}
One pin of the MC68882packageis designatedas a no connect(N(
for future use by Motorola,this pin should not be used for signe
connectedto VCCor GND.

5-122 MANUAL
FAMILY REFERENCE
M68OOO MOTOROLA
SIGNALSUMMARY
Table6 providesa summaryof all MC68882signalsdescribedin 1
paragraphs.

Table 6. Signal Summary

Signal Name Mnemonic InpuUOutput Active State Three State
AddressBus AO-A4 Input High
DataBus Do-D13 Input/Output H gh Yes
Size m nput Low
AddressStrobe AS nput Low
ChipSelect CS nput Low
ReadAffrite R^/v nput High/Low
DataStrobe DS nput Low
Data Transfer and Size Acknowledge mere, DSAcKI Output Low Yes
Reset RESET Input Low
Clock CLK Input
Sense Device SENSE Input/Output Low No
PowerInput vcc Input
Grou nd GND Input

METHODS
INTERFACING
The following paragraphsdescribehow to connectan MC68882tc
Family processor.

INTERFACING
MC6S882TO MC68020/MC68030
The following paragraphsdescribehow to connectthe MC68S82to i
MC68030for coprocessoroperationvia an 8-, 16-,or 32-bitdata k

32-Bit Data Bus GoprocessorConnection

Figure11 illustratesthe coprocessorinterfaceconnectionof an M(
MC680201MC68030 vi a a32-bitdata bus. The MC68882is configur€
over a 32-bitdata bus when both A0 and SiE are connectedto \

MOTOROLA MANUAL
FAMILY REFERENCE
M68OOO. 5-123
 FCz-FCo
A31-420
A19-A16
cs
A1SA13
At2-A5 ffi
A4-41 A4.41
AO AO
o
92
E A S tr
t
o
D s DS
I R/W Rm
B
= 031024 031-D21
Dn-016 DA-U6
Dls-D8 Dl$08
D7.DO D7-m

DSACKO DSAC|O
DSACKl DffiT

MAINPROCESSOR COFMCESSOR
CLOCK CLOCK

Figure11.32-BitDataBusCoprocessor
Connestion

16-Bit Data Bus CoprocessorGonnestion

Figure12 tllustratesthe coprocessorinterfaceconnectionof an MC
MC680201MC68030 via a 16-bitdata bus. The MC68882is configure
over a 16-bitdata bus when S|ZE is connectedto VCC and A0 is c
GND.The 16leastsignificantdata pins (D0-D15)must be connect
most significantdata pins (Dt6-D31)when the MC68882is confil
erate over a 16-bitdata bus (i.e.,connectD0 to Dl6, Dl'to D17,.
to D31).The DSACKxpins of the two devicesare directlyconnectt
itisnotnecessarytoconnectffiresincetheMc6s882never
this configuration.

5-124 M68OOO MANUAL

FAMILYREFERENCE MOTOROLA
 FCz-F@
431-420
A19-416
A1SA13
412-As SIZE
44.41 44.41
AO AO
(\l

is F s
DE F
lrr,
F 6
=

R/i[- Hrw-

l,lAlNPROCESSOR coPRocEssoR
CLOCK CLOCK

Figure 12.16.BitData Bus CoprocessorConnection

8-Bit DataBusGoprocessor,Connection
Figure 13 illustratesthe connectionof an MC68882to an MC680
as a coprocessorover a,n8'.bitdata bus. The MC68882is configure
over an 8-bit data bus when ffiE is connectedto GND.The 24 lear
data pins (D0-D231must be connectedto the eight most significa
(D24-D31)when the MC68882is configuredto operateover an 8-
(i.e.,connectD0 to D8, D16, and,D24;D1 to D9, D17,and D25i .,
D15,D23,and D31).The DSACKxping of thrygSgyices are directll
although it is not necessaryto connect DSACK1since the MC(
assertsit in this configuration.

MOTOROLA M68OOO
FAMILYREFERENCE
MANUAL 5-125
 FC2.FCI
431-420
A1$A16 6
415-A13
. 412-A5 SE
A1-41 44.41
, l p AO
o
6D
E A S tr
E o E DS
g R m Bm.
6
= m1-024 031{)2{
DE-016 DE-016
01$08 01$08
o7-00 07-D0

DSACKO DSAOO
DSACKl DSAOfi

MAINPROCESSOR coPRocEssoR
CLOCK cLocf(

Figure 13.&Bit Data Bus Gopreessor,Gonnestion

MC68882TO MC68000/MC6800SIr$C6s01
0 INTERFACTNG
Thefbllowingparagraphs
describehow to connectthe MC68882 to t
MC680S8/MC68010 processorfor operation'ES,
o per,ipheral
via an
databus.

l6.Bit Data Bus PeripheralProcessorConnection

Figure14,llustratesthe connectionof an MC68882to an MC68000
as a peripheralprocessorover a 16-bitdata bus. The MC68882is
to operate over a 16-bit data bus when S|ZE is connectedto VCt
connectedto GND.The 16 leastsignificantdata pins (D0-D15)r
n e c t e dt o t h e 1 6 m o s t s i g n i f i c a ndt a t a p i n s ( D t 6 - D 3 1 ) w h e nt h e
configuredto operateover a 16-bitdata bus (i.e.,connectD0 to Dl(
. . . €tndD15to D31).The DS-K1 ptn of the MC68882is connectedtr
pin of the main processor';DSACKOis not used.

5-126 MO8MOFAfiilILYREFERENCE
MAfrR'AL MOTOROLA
 FC2-Fm CHIP
$1-Aa0. SELECT
A19-A16 DECODE
A1$A13 (SYSTEM
412-As DEPENDENT)

A4-41
P
F A S t r $
=
g
E D S
9a
=
r"Ds
I R/w R/W

031-D24
DA-016
Dl$08 D1$08
D7-DO D7-m

DSACKO
DSACKl DSACKl

AI
MAINPROCESSOR
a

COPROCESSOR
CLOCK OLOCK

Figure 14. 16-Bit Data Bus Peripheral

ProcessorGonnection

When connectedas a peripheralprocessor,the MC68ilL2chip-sele

systemdependent.lf the MC68000is usedas the main processor,t
6 must be decoded in the supervisoror user data spaces.Hov
MC68010is used for the main processor,the MOVESinstructionr
to emulate any CPU space accessthat the MC68020/MC68030 g
coprocessorcommunications. Thus,the CS decodelogicfor such s
be the same as in an MC680201MC68030 system so that the MCOI
use any part of the data addressspaces.

8-Bit Data Bus PeripheralProcessorGonnection

Figure15 illustratesthe connectionof an MC68882toan MC68008
eral processorover an 8-bit data bus. The MC68882is configurel
over an 8-bitdatabuswhen ffiE is connectedto GND.The eight lear
data pins (D0-D7)must be connectedto the 24 most significantpi
when the MC68882is configuredto operateover an 8-bit data bus (
D 0 t o D 8 ,D 1 6 ,a n d D 2 4 ;D 1 t o D g , D 1 7 ,a n d D 2 S ;. . . a n d D 7 t o D '
D31).The DSAffi pin of the MC68882is connectedto the DTAC
MC6800;DSffiT is not used.

MOTOROLA M68OOO
FAI'HLYREFERET{CE,MANUAL 5-127
 as a peripheraf
Whenconnected processor,
the MC68882 chip-selectdr
systemdependent,
and CS must be decodedin the supervisoror ul
spaces.

FC2-FO cl-$P
419416 SETECT
DECODE
A1$413 (sYsTEM es
412-As DEPEiDENT)

slE
A&41 A4-41
AO AO
g A s t r
(lI

g
g o T ^
trct
= =
6
RW- Rfr'

MAINPROCESSOR coPnocEssoR
CLOCK CLOCK

Figure15.8-Bit DataBus Peripheral

ProcessorConnestion

5-128 M68OOO
FAMILYREFEREfTICE
MANUAL MOTOROLA
 ELECTRICAL FICATIONS
SPECI

MAXIMUMRATINGS
This devicecontainscircuitryto pro-
Rating Symbol Value Unit tect the inputs againstdamagedue
SupplyVoltage Vcc - 0 . 3t o + 7. 0 V to high static voltages or electric
fields; however, it is advised that
lnput Voltage vin - 0.3to + 7.0 V normalprecautionsbe takento avoid
OperatingTemperature Tn 0to70 oc applicationof any voltagehigherthan
maximum-ratedvoltagesto this high-
StorageTemperature Tsto -55to +150 oc impedancecircuit.Reliabilityof op-
erationis enhancedif unusedinputs
are tied to an appropriatelogic volt-
age level (e.9.,eitherGND or Vgg).
THERMALCHARACTERISTICS
Gharacteristic Symbol Value Rating
ThermalResistance- Ceramic 'c^ru
Junctionto Ambient olR 33
Junctionto Case o.rc 15
ThermalResistance -- PLCC
Junctionto Ambient olR 45
Junctionto Case 0.lC TBD
TBD- To Be Determined

MOTOROLA M68OOO
FAMILYREFERENCE
MANUAL 5-129
POWERCONSIDERATIONS
The averagechip-junctiontemperature,T.1,in oCcan be obtained
TJ-TR+(PO.oJA) (1)
where:
TR =Ambient Temperature,oC
0.ln - PackageThermal Resistance,
J u nction-to-Ambient, oCAff
PO - PINT+Pt/O
Ptrut : ICCx VCC,Watts - Chip lnternal Power
PllO - Powe,rDissipationon Input and Output
Pins- User Determined
For most applicationsPIIO<PINTand can be neglected.

The following is an approximaterelationshipbetween PO and Tl (if PyO is

neglected):
PD-K+(T.l +273'Cl ( 21
S o f v i n gE q u a t i o n s( 1 ) a n d ( 2 1t o r K g i v e s :
K- Pg . (Tn +273"C)+ oJA . PD2 (3)
where K is a constantpertainingto the particularpart. K can be determined
from Equation(3) by measuringPO(at equilibrium)for a knownT4. Usingthis
value of K, the valuesof PD and T; can be obtainedby s o l v i n gE q u a t i o n s( 1 )
and (21iterativelyfor any value of T4.

The total thermal resistanceof a package(0.1N can be separatedi

components,OgCand 0CA,representingthe barrierto heatflow from tl
conductorjunction to the package(case)surface(0.tC)and from the
the outsideambient (0CR).Theseterms are relatedby the equation:
oJA-oJC+oCA (41

OJCis device relatedand cannot be influencedby the user. However

user dependentand can be minimizedby such thermal manageme
niquesas heatsinks,ambientair cooling,Ehdthermalconvection,Tht
thermal managementon the part of the user can significantlyreduce
that OJAapproximatelyequals0.1C.Substitutionof OJgfor OlR in Equr
junctiontemperature.
will resultin a lower semiconductor

Valuesfor thermal resistancepresentedin this document,unless es1

were derivedusingthe proceduredescribedin MotorolaReliabilityRepr
"Thermal
Resistance MeasurementMethodfor MCOSXXMicrocompol
vices,"and are providedfor designpurposesonly.Thermalmeasurem
complexand dependenton procedureand setup.User-derived values
mal resistancemay differ,

5-130 M68OOO
FAMILY REFERENCE
MANUAL MOTOROLA
AC ELECTRICAL
SPECIFICATIONS
DEFINITIONS
The AC specificationspresentedconsistof output deloys,input sel
times,and signalskewtimes.All signalsare specifiedrelativeto an
edge of the clock input and, possibly,relativeto one or more oth

The measurementof the AC specifications is definedby the wavefr

in Figure16.To test the parametersguaranteedby Motorola,inp
driven to the voltage levelsspecifiedin Figure 16. Outputsare sF
m i n i m u ma n d / o rm a x i m u ml i m i t s ,a s a p p r o p r i a t eo,o d a r e m e a s u r €
Inputsare specifiedwith minimum and, as appropriate,maximur
hold times,and are measuredas shown.Finally,the measuremenl
to-signalspecificationsare also shown.

Notethat the testinglevelsusedto verify conformanceto the AC s;

does not affectthe guaranteedDC operationof the deviceas sp€
DC electricalcharacteristics.

MOTOROLA M68OOO
FAMILY REFERENCE
MANUAL 5-131
 2.0v

VATJD
2.0v 2.0v VAI.JD
oUTPUTS(1)
Ot,TPUTn OUTPUTn + 1
0.8v 0.8v

VATJD
2.0v e0v
VAI.JD
oUTPUTS(2) OUTPUTn dTIPUT n+l
0.8v 0.8v

DHVETO ->.
2.4V
TNPUTS(3)Cr.J(
DRIVE
TO >
0.5v

< nFto
TNPUTS(4)
< $ff;ro

A[ STGNALS(5)

NOTES:
1. This ouput timingis applicableto all parametersspecifiedrelativeto the risingedge of the dock.
2. This outputtimingis applicableto all parametersspecifiedrelativeto the fallingedge of the clock.
3. This inpt timingis applicableto all parametersspecifiedrelativeto the risingedge of the dock.
4. This input timingis applicableto all parametersspecifiedrelativeto the fallingedge of the clock.
5. This timingis applicableto all parametersspeciftedrelativeto the assertion/negation of anothersignal.
LEGEND:
A. Maximumouput delayspecification.
B. Minimumoutputholdtime.
C. Minimuminputsetuptimespecification.
D. Minimuminputholdtime specification.
E. Signalvalidto signalvalidspecification (maximumor minimum).
F. Signalvalidto signalinvalidspeciftcation (maximumor minimum).

Figure 16. Drive Levels and Test Points for AC Specifications

5-132 M68OOO
FAMILY REFERENCE
MANUAL MOTOROTA
DC ELECTRICALSPECIFICATIONSUcc=5,0
vdc!so/o;
GND=o
vdc;rA=
Gharacteristic Symbol Min Max Unit
InputHighVoltage Vtn 2.0 vcc V
Input Low Voltage Vt GND - 0.5 0.8 V
Input LeakageCurrent@ 5.25V cLK,RE=, r4ruUo:l4 lin 10 pA
CS, DS,AS, SIZE
W-?(off state)Inputcurrent(L 2.4v/0.4v DSAffi, DgTm, D0-D31 Itsr 20 tA
Output High Voltage(lOH- -a00 p.A) DffiKO, mTm, von
D0-Dg1 2.4 V
OutputLowVoltage(lOt-= 5.3mA) D$ere, DSEem,D0-D31 vor 0.5 V
OutputLow Current(VOl= GND) sreE lol 500 pA
PowerDissipation Po 0.75 W
Cglacitance*(Vin= 0, TA: 25oC,f - 1 MHz) cin 2A pF
Output Load Capacitance C1 130 pF
*capacitanceis periodicallysampledrather
than 100/otested.

AC ELECTRICAL
SPECIFICATIONSCLOCKINPUT
(VCC= 5.0Vdct 5olo;GND= 0 Vdc; TA = 0 to 70'C;see Figure 17]|

16.67MHz 20 MHz 25 MHz 33.33MHz tlO MHz' 50 MHz

Num Charasteristic
Min Max Min Max Min Max Min Max Min Max Min Max Unit
Frequencyof Operation 8 1 6 . 6 712.5 20 12.5 25 16.7 33.33 25 40 25 50 MHz
1 CycleTime 60 125 50 80 40 80 30 60 25 40 20 40 ns
2,3 lock PulseWidth (Measuredfrom 24 95 20 54 15 59 14 66 1 1 . 5 29 9.5 30.5 n s
1.5V to 1.5V for 33 MHz)
4,5 Riseand FallTimes 5 5 4 3 2 2 ns

NOTE: Timingmeasureln€nBare referencedto and froma low voltageof 0.8V and a highvoltageof 2.0V,unlel
otherwisenoted.The voltageswingthroughthis rangeshouldstartoutsideand passthroughthe ranges
the rise or fall will be linearbetweenO.gVand 2.0V.

Figure17.ClockInputTimingDiagram

MOTOROLA M68(X)OFAMILYREFERENCE
MANUAL 5-133
AC ELECTRICAL - READANDWRITECYI
SPECIFICATIONS
( v c c : 5 . 0 V d c + 5 % ;G N D = 0V d c ;T A - 0 t o 7 0 " C s; e eF i g u r e s1 8 ,1 9 ,a n d 2 0 )

16.67Mllz20 MHz 25 MHz 3:1.33MHz 4{l MHz 50 MHz

Num Charasteristic
Min Max Min Max Min Max. Min Max Min Max Min Max Unit
65 AddressVald to AF Asserted 15 10 5 5 2 2 ns
6A5 AddressValid to OSAsserted(Read) 1 5 10 5 5 2 2 NE

685 AddressValid to OSAsserted(Write) 50 50 35 26 18 18 ns

TG AS Negatedto AddressInvalid 10 10 5 5 2 2 ns
7A6 DS Negated to Address Invalid 10 10 5 5 2 2 ns
gs CS ruegatedto AS Asserted 0 0 0 0 0 0 ns
gAs F ruegatedto DS AssertEd(Read) 0 0 0 0 0 0 'ns

8B CSAssertedto DS Asserted(Write) 30 25 20 15 10 10 ns
9 AS Negated to CS Negated 10 10 5 5 2 2 ns
9A DS Negated to CS Negated 10 10 5 5 2 2 ns
1 0 nlW Hign to RS Asserted(Read) 15 10 5 ',t5 3 3, n8
1 0 A nlW Higftto OSAsserted(Read) 15 10 5 5 3 3 ns
1 0 8 RlW tow to OS Asserted (Write) 35 30 25 25 23 23 ns
1 1 AS Negatedto RAil Low (Read)or AS 1 0 10 5 5 2 2 ns
Negatedto RAIVHigh (Write)
1 1 AF Negatedto ntw tow (Head)or ffi 10 10 5 5 2 2 ns
, Negatedto RAil High (write)

5-134 MO8MOFAMITYREFERETUCE
MANUAT MOTOROLA
AC ELECTRICAL _ READAND WRITECYI
SPECIFICATIONS
(Continued)

16.67MHz 20 MHz 25 MHz 33.33MHz 40 MHz 50 MHz

Num Characteristic
Min Max Min Max Min Max Min Max Min Max Min Max Unit
12 DSWidth Asserted(Write) 40 38 30 23 13 13 ns
1 3 OSWiOttrNegated 40 38 30 23 13 13 ns
t 3A4 DS Negatedto AS Assetted 30 30- 25 18 14 14 ns
142 CS, DS Assened to Datd-OutVatid 80 60 45 30 25 20 ns
(Read)
1 5 DS Negatedto Data€ut invatid(Read) 0 0 0 0 0 0 ns
1 6 DS Negatedto Data-OutHigh 50 30 30 20 20 20 ns
lmpedance(Read)
1 7 Data-lnValid to DS Asserted(Write) 15 10 5 5 2 2 ns
1 8 DS Negatedto Data-lnInvalid(Write) 1 5 10 5 5 2 2 ns
192 SilFT rrue to DSCKOandDSAERi ' 50'
35 25 20 15 15 ns
Asserted
t gA7 DSACKO
Assertedto DffiKT -15 15 - 1 0 1 0 - 10 1 0 5 3 3 ns
(Skew)
Asserted
20 DMCKDorDWT Aisertedro Data. 50 43 32 17 10 5 ns
OutValid
2 f mFT Fatseto 6SERd anoDffii 50 30 30 20 20 20 ns
Negated

228 SilFT Fatse

to ffiffiandDSffiT 70 40 40 30 30 30 ns
H i g h l mp e d a n ce

293,8STARTTrue to ClockHigh 0 0 0 0 0 0 ns
(Synchronous Read)
243 ClockLow to Data-OutVafid 105 80 60 45 36 36 ns
{SynchronousRead)
2s3'8STARTTrue to Data-OutValid 105+ 80+ 60+ 45+ 36+ 3 6 + ns
(Synchronous
Readl ; 2.5 ; 2.5 1 . 5 2.5 ; 2.5 1 . 5 2.5 ; 2 . 5 Clks
263 lockLowto DEACKandDSEKT 75 55 45 30 23 23 ns
(Synchronous
Asserted Read)
273,8STAffiTrueto DffiK anoDSeKi 75+ 55+ 45+ 30+ 23+ 23+ ns
(Synchronous
Asserted Read) ; 2.5 1.5 2.5 ; 2.5 ; 2.5 1 . 5 2.5 ; 2.5 Clks
NOTES:
1. Timing measurernents are rBferenced to and from a low voltageof 0.8 V and a high voltageof 2.0V
noted.The voltageswing through this rangeshould start outside,and passthrough,the rangesu
fall will be linearbetween0.8 V'and2.0V.
2. Thesespecificationsonly ipplv if the MC68S82has completedalt interral operationsinitiatedby the
previousbus cyclewhen F was negated.
3. Synchronousreadcyclesoccuronly when the saveor responseCIRlocationsare read.
4. This specification only appliesto systemsin which back-to-back accesses (read-writeor write-write)<
can occur.When the MC68882is us€d as a'coprocessortothe MC68020/MC68030, this can.occurwh
mode is lmmediate.
5. lf the SiE pin is nof strappedto eitherVCCor GND,it must havethe same setuptimes as do addrr
6. lf the SIZEpin is nof strappedto "j$gdgi or GruO,it must havethe same hold times as do addrer
7. This number is reducedto 5 ns if DSere and DffiRT haveequal loads.
8. STARTis not an externalsignal; rather,it is the logicalconditionthat indicatesthe start of an a,
equationfor this condition is STEffi: CS+ RS + R/W-.DS.
9. lf a subsequentaccessis not a FPCPaccess,G must be negatedbeforethe assertionof AS and/c
FPCPaccess.Theseggecifications replacethe old specifications8 and 8A. (The old specificationsi
cases,transitionsin CS must not occursimultaneously with transitionsof AS or DS.This is not a rr
MC68882.)

MOTOROLA M6S(X'O
FAMILYREFERENCE
MANUAL 5-135
 Figure18.AsynchronousReadCycleTiming Diagram

5-136 MANUAL
il,Iffi(Xp FAMILYREFERENCE MOTORO]A
 Figure19.Asynchronous
Write CycleTimingDiagram

MOTOROI,A M68Oq'FAMITYREFERENCE
MANUAL 5-137
 CLOCK

M.AO

nrw

AS

DS

START

DSACKl

DSACKO

Figure20. SynchronousReadGycleTiming Diagram

5-138 M68OOO
FAMILY REFERENCE
MANUAL MOTOROLA
 PINASSIGNMENTS

PINGRIDARRAY
68.LEAD

K o o o o o o o
D27
o
D26
o o
D24 D22
A1 R/W GND DSACK1D3O DA

J o o CS a DSACKO
o o D28 o D25
o GND
o Dno D21o
A3 Vcc 031
H o o o o o o
VCC cND D19
A S M A O

G o o o o
D2o D18
DS A4

F o o o o
SIZE GND 017 016

E o o o o
Vcc GND
NC VCC

D o o D12
o o
D15
RESETGND
c o o o o
D9
GND
o Do1 4
013
GND C[J(

B o o o o DZ
VCC GND GND
o D5o GND
o VCC
o o 011
010
o
SEttSE

A o
Vcc
o
GND
o
D0
oD1 o
D3
o
D4
oDG o
D7
o o
D8 GND

1 2 3 4 5 6 7 8 9 1 0

MOTOROLA MANUAL
FAMILYREFERENCE
M68OOO 5-139
 68.LEADPLASTICLEADEDCHIPCARR]ER

9 I e x I I EI I s
r ElElAa,8,=
DN AO
D21 A1
D20 A2
Dl9 A3
018 M
017 AS
016 DS
GND GND
vcc stzE
vgc hc
015 hc
Dl4 i'lO
Dl3 GND
Dl2 mET

E 011
010
D9
GND
cl,J(
hc

g t e Er I E I I 5 r i He e z e e
luJ
lo

5-140 MOSOOO
FAMILYREFERENCE
MANUAL MOTOROLA