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27C128
A4 6 23 A11
• Factory programming available A3 7 22 OE
• Auto-insertion-compatible plastic packages A2 8 21 A10
A1 9 20 CE
• Auto ID aids automated programming A0 10 19 O7
• Separate chip enable and output enable controls O0 11 18 O6
O1 12 17 O5
• High speed “express” programming algorithm O2 13 16 O4
• Organized 16K x 8: JEDEC standard pinouts VSS 14 15 O3
A12
Vcc
PGM
A13
V PP
A7
NU
• Available for the following temperature ranges:
32
31
30
4
1
- Commercial: 0˚C to +70˚C A6 5 29 A8
- Industrial: -40˚C to +85˚C A5 6 28 A9
A4 A11
27C128
7 27
- Automotive: -40˚C to +125˚C A3 8 26 NC
A2 9 25 OE
DESCRIPTION A1
A0
10
11
24
23
A10
CE
NC 12 22 O7
The Microchip Technology Inc. 27C128 is a CMOS O0 13 21 O6
128K bit (electrically) Programmable Read Only Mem-
14
15
16
17
18
19
20
VSS
O1
O2
O3
O4
O5
NU
VCC and input voltages w.r.t. VSS ........ -0.6V to +7.25V A0-A13 Address Inputs
VPP voltage w.r.t. VSS during CE Chip Enable
programming .......................................... -0.6V to +14V
OE Output Enable
Voltage on A9 w.r.t. VSS ...................... -0.6V to +13.5V
Output voltage w.r.t. VSS ............... -0.6V to VCC +1.0V PGM Program Enable
AC Testing Waveform: VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V
Output Load: 1 TTL Load + 100 pF
Input Rise and Fall Times: 10 ns
Ambient Temperature: Commercial: Tamb = 0˚C to +70˚C
Industrial: Tamb = -40˚C to +85˚C
Extended (Automotive): Tamb = -40°C to +125°C
Address to Output Delay tACC — 120 — 150 — 170 — 200 — 250 ns CE=OE=VIL
CE to Output Delay tCE — 120 — 150 — 170 — 200 — 250 ns OE=VIL
OE to Output Delay tOE — 65 — 70 — 70 — 75 — 100 ns CE=VIL
CE or OE to O/P High tOFF 0 50 0 50 0 50 0 55 0 60 ns
Impedance
Output Hold from tOH 0 — 0 — 0 — 0 — 0 — ns
Address CE or OE,
whichever occurs first
VIH
Address Address Valid
VIL
VIH
CE
VIL
t CE(2)
VIH
OE
VIL t OFF(1,3)
t OE(2)
t OH
VOH
Outputs High Z High Z
Valid Output
O0 - O7
VOL
t ACC
for Program, Program Verify AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V
and Program Inhibit Modes Ambient Temperature: Tamb=25°C± 5°C
VCC= 6.5V ± 0.25V, VPP = VH = 13.0V ± 0.25V
Program Verify
V IH
Address Address Stable
V IL
t AS
V IH tAH
High Z
Data Data In Stable Data Out Valid
V IL
t DS t DH tDF
(2)
13.0 V (3)
V PP
5.0 V t VPS
6.5 V (3)
V CC
5.0 V t VCS
V IH
CE
V IL
t CES
V IH
PGM
V IL
t PW tOES
V IH tOE
(2)
OE t OPW
V IL
Notes: (1) The input timing reference is 0.8V for VIL and 2.0V for VIH.
(2) t DF and tOE are characteristics of the device but must be accommodated by the programmer.
(3) Vcc = 6.5V ±0.25V, V PP = VH = 13.0V ±0.25V for Express algorithm.
1.2 Read Mode For Read operations, if the addresses are stable, the
address access time (tACC) is equal to the delay from
(See Timing Diagrams and AC Characteristics) CE to output (tCE). Data is transferred to the output
Read Mode is accessed when after a delay from the falling edge of OE (tOE).
Conditions:
Tamb = 25˚C ±5˚C Start
VCC = 6.5 ±0.25V
VPP = 13.0 ±0.25V
ADDR = First Location
VCC = 6.5V
VPP = 13.0V
X=0
Verify Pass
Byte
Fail
No Yes Device
X = 10 ? Failed
Last Yes
Address?
No
Increment Address
All
Device Yes bytes No
Device
Passed = original Failed
data?
27C128 –25 I /P
Package: L = Plastic Leaded Chip Carrier (PLCC)
P = Plastic DIP (600 Mil)
SO = Plastic SOIC (300 Mil)
Access 12 = 120 ns
Time: 15 = 150 ns
17 = 170 ns
20 = 200 ns
25 = 250 ns