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Relion 670 series

Line differential protection RED670 Technical reference manual

Document ID: 1MRK505183-UEN Issued: June 2010 Revision: C Product version: 1.1

Copyright 2010 ABB. All rights reserved

Copyright
This document and parts thereof must not be reproduced or copied without written permission from ABB, and the contents thereof must not be imparted to a third party, nor used for any unauthorized purpose. The software or hardware described in this document is furnished under a license and may be used or disclosed only in accordance with the terms of such license.

Trademarks
ABB and Relion are registered trademarks of ABB Group. All other brand or product names mentioned in this document may be trademarks or registered trademarks of their respective holders.

Warranty
Please inquire about the terms of warranty from your nearest ABB representative.
ABB AB Substation Automation Products SE-721 59 Vsters Sweden Telephone: +46 (0) 21 32 50 00 Facsimile: +46 (0) 21 14 69 18 http://www.abb.com/substationautomation

Disclaimer
The data, examples and diagrams in this manual are included solely for the concept or product description and are not to be deemed as a statement of guaranteed properties. All persons responsible for applying the equipment addressed in this manual must satisfy themselves that each intended application is suitable and acceptable, including that any applicable safety or other operational requirements are complied with. In particular, any risks in applications where a system failure and/ or product failure would create a risk for harm to property or persons (including but not limited to personal injuries or death) shall be the sole responsibility of the person or entity applying the equipment, and those so responsible are hereby requested to ensure that all measures are taken to exclude or mitigate such risks. This document has been carefully checked by ABB but deviations cannot be completely ruled out. In case any errors are detected, the reader is kindly requested to notify the manufacturer. Other than under explicit contractual commitments, in no event shall ABB be responsible or liable for any loss or damage resulting from the use of this manual or the application of the equipment.

Conformity
This product complies with the directive of the Council of the European Communities on the approximation of the laws of the Member States relating to electromagnetic compatibility (EMC Directive 2004/108/EC) and concerning electrical equipment for use within specified voltage limits (Low-voltage directive 2006/95/EC). This conformity is proved by tests conducted by ABB AB in accordance with the generic standard EN 50263 for the EMC directive, and with the standards EN 60255-5 and/or EN 50178 for the low voltage directive. This product is designed and produced for industrial use.

Table of contents

Table of contents
Section 1 Introduction.....................................................................29
Introduction to the technical reference manual.................................29 About the complete set of manuals for an IED............................29 About the technical reference manual.........................................30 This manual.................................................................................31 Introduction.............................................................................31 Principle of operation..............................................................31 Input and output signals.........................................................34 Function block........................................................................34 Setting parameters.................................................................34 Technical data........................................................................35 Intended audience.......................................................................35 Related documents......................................................................35 Revision notes.............................................................................36

Section 2

Analog inputs..................................................................37
Introduction.......................................................................................37 Operation principle...........................................................................37 Function block..................................................................................38 Setting parameters...........................................................................39

Section 3

Local HMI.......................................................................45
Human machine interface ................................................................45 Small size HMI..................................................................................47 Small............................................................................................47 Design.........................................................................................47 Medium size graphic HMI.................................................................49 Medium........................................................................................49 Design.........................................................................................49 Keypad.............................................................................................51 LED...................................................................................................52 Introduction..................................................................................52 Status indication LEDs................................................................52 Indication LEDs...........................................................................52 Local HMI related functions..............................................................53 Introduction..................................................................................53 General setting parameters.........................................................54 Status indication LEDs................................................................54 Design....................................................................................54 Function block........................................................................54
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Input and output signals.........................................................54 Indication LEDs...........................................................................55 Introduction.............................................................................55 Design....................................................................................55 Function block........................................................................62 Input and output signals.........................................................62 Setting parameters.................................................................62

Section 4

Basic IED functions........................................................65


Authorization.....................................................................................65 Principle of operation...................................................................65 Authorization handling in the IED...........................................67 Self supervision with internal event list.............................................67 Introduction..................................................................................67 Principle of operation...................................................................68 Internal signals.......................................................................69 Run-time model......................................................................71 Function block.............................................................................72 Output signals..............................................................................72 Setting parameters......................................................................72 Technical data.............................................................................73 Time synchronization........................................................................73 Introduction..................................................................................73 Principle of operation...................................................................73 General concepts...................................................................73 Real-time clock (RTC) operation............................................76 Synchronization alternatives..................................................77 Process bus IEC 61850-9-2LE synchronization.....................80 Function block.............................................................................80 Output signals..............................................................................81 Setting parameters......................................................................81 Technical data.............................................................................84 Parameter setting groups.................................................................84 Introduction..................................................................................84 Principle of operation...................................................................84 Function block.............................................................................85 Input and output signals..............................................................86 Setting parameters......................................................................86 ChangeLock function CHNGLCK.....................................................86 Introduction..................................................................................87 Principle of operation...................................................................87 Function block.............................................................................87 Input and output signals..............................................................87 Setting parameters......................................................................88

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Test mode functionality TEST..........................................................88 Introduction..................................................................................88 Principle of operation...................................................................88 Function block.............................................................................90 Input and output signals..............................................................90 Setting parameters......................................................................91 IED identifiers...................................................................................91 Introduction..................................................................................91 Setting parameters......................................................................91 Product information..........................................................................92 Introduction..................................................................................92 Setting parameters......................................................................92 Application...................................................................................92 Factory defined settings.........................................................92 Signal matrix for binary inputs SMBI................................................93 Introduction..................................................................................93 Principle of operation...................................................................93 Function block.............................................................................93 Input and output signals..............................................................94 Signal matrix for binary outputs SMBO ...........................................94 Introduction..................................................................................94 Principle of operation...................................................................95 Function block.............................................................................95 Input and output signals..............................................................95 Signal matrix for mA inputs SMMI....................................................95 Introduction..................................................................................96 Principle of operation...................................................................96 Function block.............................................................................96 Input and output signals..............................................................96 Signal matrix for analog inputs SMAI...............................................97 Introduction..................................................................................97 Principle of operation...................................................................97 Frequency values........................................................................97 Function block.............................................................................98 Input and output signals..............................................................99 Setting parameters....................................................................100 Summation block 3 phase 3PHSUM..............................................102 Introduction................................................................................102 Principle of operation.................................................................102 Function block...........................................................................103 Input and output signals............................................................103 Setting parameters....................................................................103 Authority status ATHSTAT.............................................................104
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Introduction................................................................................104 Principle of operation.................................................................104 Function block...........................................................................104 Output signals............................................................................104 Setting parameters....................................................................105

Section 5

Differential protection...................................................107
Line differential protection..............................................................107 Introduction................................................................................107 Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF...............................................................................107 Line differential protection 3 or 6 CT sets, with in-zone transformers LT3CPDIF, LT6CPDIF....................................109 Analog signal transfer for line differential protection............109 Principle of operation.................................................................110 Algorithm and logic...............................................................110 Time synchronization...........................................................116 Analog signal communication for line differential protection..............................................................................118 Open CT detection feature...................................................121 Binary signal transfer............................................................122 Line differential coordination function LDLPDIF ..................123 Function block...........................................................................123 Input and output signals............................................................125 Setting parameters....................................................................131 Technical data...........................................................................141 1Ph High impedance differential protection HZPDIF .....................141 Introduction................................................................................142 Principle of operation.................................................................142 Logic diagram.......................................................................142 Function block...........................................................................143 Input and output signals............................................................143 Setting parameters....................................................................143 Technical data...........................................................................144

Section 6

Impedance protection ..................................................145


Distance measuring zones, quadrilateral characteristic ZMQPDIS, ZMQAPDIS, ZDRDIR...................................................145 Introduction................................................................................145 Principle of operation.................................................................146 Full scheme measurement...................................................146 Impedance characteristic.....................................................147 Minimum operating current...................................................151 Measuring principles............................................................151

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Directional impedance element for quadrilateral characteristics......................................................................154 Simplified logic diagrams......................................................156 Function block...........................................................................159 Input and output signals............................................................160 Setting parameters....................................................................161 Technical data...........................................................................163 Distance measuring zone, quadrilateral characteristic for series compensated lines ZMCPDIS, ZMCAPDIS, ZDSRDIR.......164 Introduction................................................................................165 Principle of operation.................................................................166 Full scheme measurement...................................................166 Impedance characteristic.....................................................166 Minimum operating current...................................................170 Measuring principles............................................................170 Directionality for series compensation..................................173 Simplified logic diagrams......................................................175 Function block...........................................................................178 Input and output signals............................................................179 Setting parameters....................................................................181 Technical data...........................................................................184 Phase selection, quadrilateral characteristic with fixed angle FDPSPDIS......................................................................................184 Introduction................................................................................185 Principle of operation.................................................................185 Phase-to-earth fault..............................................................187 Phase-to-phase fault............................................................189 Three-phase faults...............................................................190 Load encroachment..............................................................191 Minimum operate currents....................................................194 Simplified logic diagrams......................................................194 Function block...........................................................................199 Input and output signals............................................................200 Setting parameters....................................................................201 Technical data...........................................................................202 Full-scheme distance measuring, Mho characteristic ZMHPDIS ......................................................................................202 Introduction................................................................................202 Principle of operation.................................................................203 Full scheme measurement...................................................203 Impedance characteristic.....................................................204 Basic operation characteristics.............................................205 Theory of operation..............................................................206 Function block...........................................................................216
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Input and output signals............................................................216 Setting parameters....................................................................217 Technical data...........................................................................218 Full-scheme distance protection, quadrilateral for earth faults ZMMPDIS, ZMMAPDIS..................................................................219 Introduction................................................................................219 Principle of operation.................................................................220 Full scheme measurement...................................................220 Impedance characteristic.....................................................221 Minimum operating current...................................................223 Measuring principles............................................................224 Directional lines....................................................................226 Simplified logic diagrams......................................................228 Function block...........................................................................231 Input and output signals............................................................231 Setting parameters....................................................................232 Technical data...........................................................................234 Directional impedance element for mho characteristic and additional distance protection directional function for earth faults ZDMRDIR, ZDARDIR...........................................................234 Introduction................................................................................235 Principle of operation.................................................................235 Directional impedance element for mho characteristic ZDMRDIR.............................................................................235 Additional distance protection directional function for earth faults ZDARDIR ..........................................................238 Function block...........................................................................240 Input and output signals............................................................240 Setting parameters....................................................................241 Mho impedance supervision logic ZSMGAPC................................242 Introduction................................................................................242 Principle of operation.................................................................243 Fault inception detection......................................................243 Function block...........................................................................244 Input and output signals............................................................244 Setting parameters....................................................................245 Faulty phase identification with load encroachment FMPSPDIS.....................................................................................245 Introduction................................................................................246 Principle of operation.................................................................246 The phase selection function................................................246 Function block...........................................................................257 Input and output signals............................................................258 Setting parameters....................................................................258
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Technical data...........................................................................259 Power swing detection ZMRPSB ...................................................259 Introduction................................................................................259 Principle of operation.................................................................260 Resistive reach in forward direction.....................................261 Resistive reach in reverse direction.....................................262 Reactive reach in forward and reverse direction..................262 Basic detection logic.............................................................263 Operating and inhibit conditions...........................................265 Function block...........................................................................266 Input and output signals............................................................266 Setting parameters....................................................................267 Technical data...........................................................................268 Power swing logic ZMRPSL ..........................................................268 Introduction................................................................................268 Principle of operation.................................................................268 Communication and tripping logic........................................268 Blocking logic.......................................................................269 Function block...........................................................................271 Input and output signals............................................................271 Setting parameters....................................................................272 Pole slip protection PSPPPAM ......................................................272 Introduction................................................................................272 Principle of operation.................................................................272 Function block...........................................................................276 Input and output signals............................................................276 Setting parameters....................................................................277 Technical data...........................................................................277 Automatic switch onto fault logic, voltage and current based ZCVPSOF ......................................................................................278 Introduction................................................................................278 Principle of operation.................................................................278 Function block...........................................................................280 Input and output signals............................................................280 Setting parameters....................................................................280 Technical data...........................................................................281 Phase preference logic PPLPHIZ...................................................281 Introduction................................................................................281 Principle of operation.................................................................281 Function block...........................................................................284 Input and output signals............................................................284 Setting parameters....................................................................285

Section 7
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Current protection.........................................................287
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Instantaneous phase overcurrent protection PHPIOC ..................287 Introduction................................................................................287 Principle of operation.................................................................287 Function block...........................................................................288 Input and output signals............................................................288 Setting parameters....................................................................288 Technical data...........................................................................289 Four step phase overcurrent protection OC4PTOC ......................289 Introduction................................................................................289 Principle of operation.................................................................289 Function block...........................................................................294 Input and output signals............................................................294 Setting parameters....................................................................296 Technical data...........................................................................301 Instantaneous residual overcurrent protection EFPIOC ................301 Introduction................................................................................302 Principle of operation.................................................................302 Function block...........................................................................302 Input and output signals............................................................303 Setting parameters....................................................................303 Technical data...........................................................................303 Four step residual overcurrent protection EF4PTOC ....................304 Introduction................................................................................304 Principle of operation.................................................................305 Operating quantity within the function..................................305 Internal polarizing.................................................................306 External polarizing for earth-fault function............................308 Base quantities within the protection....................................308 Internal earth-fault protection structure................................308 Four residual overcurrent steps............................................308 Directional supervision element with integrated directional comparison function............................................310 Second harmonic blocking element.....................................312 Switch on to fault feature......................................................314 Function block...........................................................................316 Input and output signals............................................................317 Setting parameters....................................................................318 Technical data...........................................................................323 Sensitive directional residual overcurrent and power protection SDEPSDE .....................................................................................323 Introduction................................................................................324 Principle of operation.................................................................325 Function inputs.....................................................................325 Function block...........................................................................331
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Input and output signals............................................................332 Setting parameters....................................................................333 Technical data...........................................................................335 Thermal overload protection, one time constant LPTTR ...............336 Introduction................................................................................336 Principle of operation.................................................................336 Function block...........................................................................339 Input and output signals............................................................339 Setting parameters....................................................................339 Technical data...........................................................................340 Breaker failure protection CCRBRF ..............................................340 Introduction................................................................................341 Principle of operation.................................................................341 Function block...........................................................................344 Input and output signals............................................................345 Setting parameters....................................................................345 Technical data...........................................................................346 Stub protection STBPTOC ............................................................347 Introduction................................................................................347 Principle of operation.................................................................347 Function block...........................................................................348 Input and output signals............................................................348 Setting parameters....................................................................349 Technical data...........................................................................349 Pole discordance protection CCRPLD ..........................................349 Introduction................................................................................350 Principle of operation.................................................................350 Pole discordance signaling from circuit breaker...................353 Unsymmetrical current detection..........................................353 Function block...........................................................................353 Input and output signals............................................................354 Setting parameters....................................................................354 Technical data...........................................................................355 Directional underpower protection GUPPDUP...............................355 Introduction................................................................................355 Principle of operation.................................................................356 Low pass filtering..................................................................358 Calibration of analog inputs..................................................358 Function block...........................................................................359 Input and output signals............................................................360 Setting parameters....................................................................360 Technical data...........................................................................361 Directional overpower protection GOPPDOP ................................362
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Introduction................................................................................362 Principle of operation.................................................................363 Low pass filtering..................................................................365 Calibration of analog inputs..................................................365 Function block...........................................................................366 Input and output signals............................................................367 Setting parameters....................................................................367 Technical data...........................................................................369 Broken conductor check BRCPTOC .............................................369 Introduction................................................................................369 Principle of operation.................................................................369 Function block...........................................................................370 Input and output signals............................................................371 Setting parameters....................................................................371 Technical data...........................................................................371

Section 8

Voltage protection........................................................373
Two step undervoltage protection UV2PTUV ................................373 Introduction................................................................................373 Principle of operation.................................................................373 Measurement principle.........................................................374 Time delay............................................................................374 Blocking................................................................................379 Design..................................................................................380 Function block...........................................................................382 Input and output signals............................................................382 Setting parameters....................................................................383 Technical data...........................................................................385 Two step overvoltage protection OV2PTOV ..................................386 Introduction................................................................................386 Principle of operation.................................................................386 Measurement principle.........................................................387 Time delay............................................................................387 Blocking................................................................................393 Design..................................................................................393 Function block...........................................................................395 Input and output signals............................................................395 Setting parameters....................................................................396 Technical data...........................................................................398 Two step residual overvoltage protection ROV2PTOV .................398 Introduction................................................................................398 Principle of operation.................................................................399 Measurement principle.........................................................399 Time delay............................................................................399

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Blocking................................................................................404 Design..................................................................................404 Function block...........................................................................405 Input and output signals............................................................406 Setting parameters....................................................................406 Technical data...........................................................................408 Overexcitation protection OEXPVPH ............................................408 Introduction................................................................................408 Principle of operation.................................................................409 Measured voltage.................................................................411 Operate time of the overexcitation protection.......................412 Cooling.................................................................................415 Overexcitation protection function measurands...................415 Overexcitation alarm............................................................416 Logic diagram.......................................................................417 Function block...........................................................................417 Input and output signals............................................................417 Setting parameters....................................................................418 Technical data...........................................................................419 Voltage differential protection VDCPTOV ......................................419 Introduction................................................................................419 Principle of operation.................................................................420 Function block...........................................................................421 Input and output signals............................................................422 Setting parameters....................................................................422 Technical data...........................................................................423 Loss of voltage check LOVPTUV ..................................................423 Introduction................................................................................423 Principle of operation.................................................................423 Function block...........................................................................425 Input and output signals............................................................426 Setting parameters....................................................................426 Technical data...........................................................................426

Section 9

Frequency protection....................................................427
Underfrequency protection SAPTUF .............................................427 Introduction................................................................................427 Principle of operation.................................................................427 Measurement principle.........................................................428 Time delay............................................................................428 Voltage dependent time delay..............................................428 Blocking................................................................................430 Design..................................................................................430 Function block...........................................................................431
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Input and output signals............................................................431 Setting parameters....................................................................431 Technical data...........................................................................432 Overfrequency protection SAPTOF ...............................................432 Introduction................................................................................433 Principle of operation.................................................................433 Measurement principle.........................................................433 Time delay............................................................................433 Blocking................................................................................434 Design..................................................................................434 Function block...........................................................................435 Input and output signals............................................................435 Setting parameters....................................................................435 Technical data...........................................................................436 Rate-of-change frequency protection SAPFRC .............................436 Introduction................................................................................436 Principle of operation.................................................................436 Measurement principle.........................................................437 Time delay............................................................................437 Blocking................................................................................437 Design..................................................................................438 Function block...........................................................................439 Input and output signals............................................................439 Setting parameters....................................................................439 Technical data...........................................................................440

Section 10 Multipurpose protection................................................441


General current and voltage protection CVGAPC..........................441 Introduction................................................................................441 Principle of operation.................................................................441 Measured quantities within CVGAPC...................................441 Base quantities for CVGAPC function..................................444 Built-in overcurrent protection steps.....................................444 Built-in undercurrent protection steps...................................449 Built-in overvoltage protection steps....................................450 Built-in undervoltage protection steps..................................450 Logic diagram.......................................................................450 Function block...........................................................................455 Input and output signals............................................................456 Setting parameters....................................................................457 Technical data...........................................................................464

Section 11 Secondary system supervision.....................................467


Current circuit supervision CCSRDIF ............................................467
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Introduction................................................................................467 Principle of operation.................................................................467 Function block...........................................................................469 Input and output signals............................................................469 Setting parameters....................................................................470 Technical data...........................................................................470 Fuse failure supervision SDDRFUF...............................................470 Introduction................................................................................470 Principle of operation.................................................................471 Zero and negative sequence detection................................471 Delta current and delta voltage detection.............................473 Dead line detection...............................................................476 Main logic.............................................................................476 Function block...........................................................................480 Input and output signals............................................................480 Setting parameters....................................................................480 Technical data...........................................................................481

Section 12 Control..........................................................................483
Synchrocheck, energizing check, and synchronizing SESRSYN......................................................................................483 Introduction................................................................................483 Principle of operation.................................................................484 Basic functionality.................................................................484 Logic diagrams.....................................................................484 Function block...........................................................................493 Input and output signals............................................................493 Setting parameters....................................................................496 Technical data...........................................................................498 Autorecloser SMBRREC ...............................................................498 Introduction................................................................................499 Principle of operation.................................................................499 Logic Diagrams....................................................................499 Auto-reclosing operation Off and On....................................499 Auto-reclosing mode selection.............................................499 Start auto-reclosing and conditions for start of a reclosing cycle......................................................................500 Control of the auto-reclosing open time for shot 1...............501 Long trip signal.....................................................................501 Time sequence diagrams.....................................................508 Function block...........................................................................511 Input and output signals............................................................511 Setting parameters....................................................................513 Technical data...........................................................................515
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Apparatus control APC...................................................................515 Introduction................................................................................515 Principle of operation.................................................................515 Error handling............................................................................516 Bay control QCBAY...................................................................518 Introduction...........................................................................518 Principle of operation............................................................518 Function block......................................................................520 Input and output signals.......................................................520 Setting parameters...............................................................521 Local/Remote switch.................................................................521 Introduction...........................................................................521 Principle of operation............................................................521 Function block......................................................................522 Input and output signals.......................................................523 Setting parameters...............................................................524 Switch controller SCSWI...........................................................524 Introduction...........................................................................524 Principle of operation............................................................524 Function block......................................................................529 Input and output signals.......................................................529 Setting parameters...............................................................531 Circuit breaker SXCBR..............................................................531 Introduction...........................................................................531 Principle of operation............................................................531 Function block......................................................................535 Input and output signals.......................................................535 Setting parameters...............................................................536 Circuit switch SXSWI.................................................................536 Introduction...........................................................................537 Principle of operation............................................................537 Function block......................................................................541 Input and output signals.......................................................541 Setting parameters...............................................................542 Bay reserve QCRSV..................................................................542 Introduction...........................................................................542 Principle of operation............................................................542 Function block......................................................................544 Input and output signals.......................................................545 Setting parameters...............................................................546 Reservation input RESIN...........................................................546 Introduction...........................................................................546 Principle of operation............................................................546
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Function block......................................................................548 Input and output signals.......................................................549 Setting parameters...............................................................550 Interlocking ....................................................................................550 Introduction................................................................................550 Principle of operation.................................................................550 Logical node for interlocking SCILO .........................................553 Introduction...........................................................................553 Logic diagram.......................................................................553 Function block......................................................................554 Input and output signals.......................................................554 Interlocking for busbar earthing switch BB_ES .........................554 Introduction...........................................................................555 Function block......................................................................555 Logic diagram.......................................................................555 Input and output signals.......................................................555 Interlocking for bus-section breaker A1A2_BS..........................556 Introduction...........................................................................556 Function block......................................................................557 Logic diagram.......................................................................558 Input and output signals.......................................................559 Interlocking for bus-section disconnector A1A2_DC ................560 Introduction...........................................................................561 Function block......................................................................561 Logic diagram.......................................................................562 Input and output signals.......................................................562 Interlocking for bus-coupler bay ABC_BC ................................563 Introduction...........................................................................563 Function block......................................................................564 Logic diagram.......................................................................565 Input and output signals.......................................................567 Interlocking for 1 1/2 CB BH .....................................................570 Introduction...........................................................................570 Function blocks....................................................................571 Logic diagrams.....................................................................573 Input and output signals.......................................................578 Interlocking for double CB bay DB ...........................................582 Introduction...........................................................................582 Function block......................................................................583 Logic diagrams.....................................................................585 Input and output signals ......................................................588 Interlocking for line bay ABC_LINE ..........................................591 Introduction...........................................................................591
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Function block......................................................................592 Logic diagram.......................................................................593 Input and output signals.......................................................598 Interlocking for transformer bay AB_TRAFO ............................600 Introduction...........................................................................601 Function block......................................................................602 Logic diagram.......................................................................603 Input and output signals.......................................................604 Position evaluation POS_EVAL.................................................606 Introduction...........................................................................606 Logic diagram.......................................................................606 Function block......................................................................607 Input and output signals.......................................................607 Logic rotating switch for function selection and LHMI presentation SLGGIO.....................................................................607 Introduction................................................................................607 Principle of operation.................................................................607 Functionality and behaviour ................................................609 Graphical display..................................................................609 Function block...........................................................................611 Input and output signals............................................................611 Setting parameters....................................................................612 Selector mini switch VSGGIO.........................................................613 Introduction................................................................................613 Principle of operation.................................................................613 Function block...........................................................................614 Input and output signals............................................................614 Setting parameters....................................................................615 Generic double point function block DPGGIO................................615 Introduction................................................................................615 Principle of operation.................................................................615 Function block...........................................................................616 Input and output signals............................................................616 Settings......................................................................................616 Single point generic control 8 signals SPC8GGIO.........................616 Introduction................................................................................616 Principle of operation.................................................................617 Function block...........................................................................617 Input and output signals............................................................617 Setting parameters....................................................................618 AutomationBits, command function for DNP3.0 AUTOBITS..........618 Introduction................................................................................619 Principle of operation.................................................................619
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Function block...........................................................................620 Input and output signals............................................................620 Setting parameters....................................................................621 Single command, 16 signals SINGLECMD....................................635 Introduction................................................................................635 Principle of operation.................................................................635 Function block...........................................................................636 Input and output signals............................................................636 Setting parameters....................................................................637

Section 13 Scheme communication...............................................639


Scheme communication logic for distance or overcurrent protection ZCPSCH .......................................................................639 Introduction................................................................................639 Principle of operation.................................................................640 Blocking scheme..................................................................640 Permissive underreaching scheme......................................640 Permissive overreaching scheme........................................641 Unblocking scheme..............................................................641 Intertrip scheme....................................................................642 Simplified logic diagram.......................................................642 Function block...........................................................................644 Input and output signals............................................................644 Setting parameters....................................................................645 Technical data...........................................................................645 Phase segregated scheme communication logic for distance protection ZC1PPSCH ...................................................................646 Introduction................................................................................646 Principle of operation.................................................................646 Blocking scheme..................................................................647 Permissive underreach scheme...........................................647 Permissive overreach scheme.............................................648 Unblocking scheme..............................................................648 Intertrip scheme....................................................................648 Simplified logic diagram.......................................................649 Function block...........................................................................650 Input and output signals............................................................650 Setting parameters....................................................................652 Technical data...........................................................................652 Current reversal and weak-end infeed logic for distance protection ZCRWPSCH .................................................................652 Introduction................................................................................652 Principle of operation.................................................................653 Current reversal logic...........................................................653
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Weak-end infeed logic..........................................................653 Function block...........................................................................655 Input and output signals............................................................655 Setting parameters....................................................................656 Technical data...........................................................................656 Local acceleration logic ZCLCPLAL...............................................656 Introduction................................................................................657 Principle of operation.................................................................657 Zone extension.....................................................................657 Loss-of-Load acceleration....................................................658 Function block...........................................................................658 Input and output signals............................................................659 Setting parameters....................................................................659 Scheme communication logic for residual overcurrent protection ECPSCH .......................................................................660 Introduction................................................................................660 Introduction...........................................................................660 Principle of operation.................................................................660 Blocking scheme..................................................................661 Permissive under/overreaching scheme..............................662 Unblocking scheme..............................................................663 Function block...........................................................................664 Input and output signals............................................................665 Setting parameters....................................................................665 Technical data...........................................................................666 Current reversal and weak-end infeed logic for residual overcurrent protection ECRWPSCH ..............................................666 Introduction................................................................................666 Principle of operation.................................................................667 Directional comparison logic function...................................667 Fault current reversal logic...................................................667 Weak-end infeed logic..........................................................668 Function block...........................................................................669 Input and output signals............................................................669 Setting parameters....................................................................670 Technical data...........................................................................670 Current reversal and weak-end infeed logic for phase segregated communication ZC1WPSCH ......................................671 Introduction................................................................................671 Principle of operation.................................................................671 Current reversal logic ..........................................................671 Function block...........................................................................673 Input and output signals............................................................674 Setting parameters....................................................................675
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Technical data...........................................................................675

Section 14 Logic.............................................................................677
Tripping logic SMPPTRC ...............................................................677 Introduction................................................................................677 Principle of operation.................................................................677 Logic diagram.......................................................................679 Function block...........................................................................683 Input and output signals............................................................683 Setting parameters....................................................................684 Technical data...........................................................................685 Trip matrix logic TMAGGIO............................................................685 Introduction................................................................................685 Principle of operation.................................................................685 Function block...........................................................................687 Input and output signals............................................................687 Setting parameters....................................................................688 Configurable logic blocks................................................................689 Introduction................................................................................689 Inverter function block INV........................................................689 OR function block OR................................................................690 AND function block AND...........................................................691 Timer function block TIMER......................................................691 Pulse timer function block PULSETIMER..................................692 Exclusive OR function block XOR.............................................692 Loop delay function block LOOPDELAY...................................693 Set-reset with memory function block SRMEMORY.................693 Controllable gate function block GATE......................................694 Settable timer function block TIMERSET..................................695 Technical data...........................................................................696 Fixed signal function block FXDSIGN............................................696 Principle of operation.................................................................696 Function block...........................................................................697 Input and output signals............................................................697 Setting parameters....................................................................697 Boolean 16 to Integer conversion B16I..........................................697 Introduction................................................................................697 Principle of operation.................................................................698 Function block...........................................................................698 Input and output signals............................................................698 Setting parameters....................................................................699 Boolean 16 to Integer conversion with logic node representation B16IGGIO...............................................................699 Introduction................................................................................699
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Principle of operation.................................................................699 Function block...........................................................................700 Input and output signals............................................................700 Setting parameters....................................................................701 Integer to Boolean 16 conversion IB16..........................................701 Introduction................................................................................701 Principle of operation.................................................................701 Function block...........................................................................701 Input and output signals............................................................702 Setting parameters....................................................................702 Integer to Boolean 16 conversion with logic node representation IB16GGIO...............................................................702 Introduction................................................................................703 Principle of operation.................................................................703 Function block...........................................................................703 Input and output signals............................................................703 Setting parameters....................................................................704

Section 15 Monitoring.....................................................................705
Measurements................................................................................705 Introduction................................................................................706 Principle of operation.................................................................707 Measurement supervision....................................................707 Measurements CVMMXU.....................................................711 Phase current measurement CMMXU.................................716 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU..............................................................717 Voltage and current sequence measurements VMSQI, CMSQI..................................................................................717 Function block...........................................................................717 Input and output signals............................................................719 Setting parameters....................................................................722 Technical data...........................................................................735 Event counter CNTGGIO................................................................736 Introduction................................................................................736 Principle of operation.................................................................736 Reporting..............................................................................736 Design..................................................................................737 Function block...........................................................................737 Input signals..............................................................................737 Setting parameters....................................................................738 Technical data...........................................................................738 Event function EVENT....................................................................738 Introduction................................................................................738
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Principle of operation.................................................................738 Function block...........................................................................740 Input and output signals............................................................740 Setting parameters....................................................................741 Logical signal status report BINSTATREP.....................................743 Introduction................................................................................743 Principle of operation.................................................................743 Function block...........................................................................744 Input and output signals............................................................744 Setting parameters....................................................................745 Fault locator LMBRFLO..................................................................745 Introduction................................................................................746 Principle of operation.................................................................746 Measuring Principle..............................................................747 Accurate algorithm for measurement of distance to fault.....747 The non-compensated impedance model............................751 IEC 60870-5-103..................................................................752 Function block...........................................................................752 Input and output signals............................................................752 Setting parameters....................................................................753 Technical data...........................................................................754 Measured value expander block RANGE_XP................................754 Introduction................................................................................754 Principle of operation.................................................................754 Function block...........................................................................755 Input and output signals............................................................755 Disturbance report DRPRDRE.......................................................755 Introduction................................................................................756 Principle of operation.................................................................756 Function block...........................................................................763 Input and output signals............................................................765 Setting parameters....................................................................766 Technical data...........................................................................776 Event list.........................................................................................776 Introduction................................................................................776 Principle of operation.................................................................776 Function block...........................................................................777 Input signals..............................................................................777 Technical data...........................................................................777 Indications......................................................................................777 Introduction................................................................................777 Principle of operation.................................................................778 Function block...........................................................................779
21 Technical reference manual

Table of contents

Input signals..............................................................................779 Technical data...........................................................................779 Event recorder ...............................................................................779 Introduction................................................................................779 Principle of operation.................................................................779 Function block...........................................................................780 Input signals..............................................................................780 Technical data...........................................................................780 Trip value recorder.........................................................................780 Introduction................................................................................780 Principle of operation.................................................................781 Function block...........................................................................781 Input signals..............................................................................781 Technical data...........................................................................782 Disturbance recorder......................................................................782 Introduction................................................................................782 Principle of operation.................................................................782 Memory and storage............................................................783 IEC 60870-5-103..................................................................784 Function block...........................................................................785 Input and output signals............................................................785 Setting parameters....................................................................785 Technical data...........................................................................785

Section 16 Metering.......................................................................787
Pulse-counter logic PCGGIO..........................................................787 Introduction................................................................................787 Principle of operation.................................................................787 Function block...........................................................................789 Input and output signals............................................................790 Setting parameters....................................................................790 Technical data...........................................................................791 Function for energy calculation and demand handling ETPMMTR......................................................................................791 Introduction................................................................................791 Principle of operation.................................................................791 Function block...........................................................................792 Input and output signals............................................................792 Setting parameters....................................................................793

Section 17 Station communication.................................................795


Overview.........................................................................................795 IEC 61850-8-1 communication protocol.........................................795 Introduction................................................................................795
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Table of contents

IEC 61850 generic communication I/O functions SPGGIO, SP16GGIO................................................................................795 Introduction...........................................................................796 Principle of operation............................................................796 Function block......................................................................796 Input and output signals.......................................................796 Setting parameters...............................................................797 IEC 61850 generic communication I/O functions MVGGIO.......797 Principle of operation............................................................797 Function block......................................................................798 Input and output signals.......................................................798 Setting parameters...............................................................798 Setting parameters....................................................................799 Technical data...........................................................................799 IEC 61850-9-2LE communication protocol.....................................799 Introduction................................................................................799 Principle of operation.................................................................799 Function block...........................................................................801 Output signals............................................................................802 Setting parameters....................................................................802 Technical data...........................................................................803 LON communication protocol.........................................................803 Introduction................................................................................803 Principle of operation.................................................................803 Setting parameters....................................................................821 Technical data...........................................................................821 SPA communication protocol.........................................................821 Introduction................................................................................821 Principle of operation.................................................................822 Communication ports...........................................................829 Design.......................................................................................829 Setting parameters....................................................................830 Technical data...........................................................................830 IEC 60870-5-103 communication protocol.....................................830 Introduction................................................................................830 Principle of operation.................................................................830 General.................................................................................830 Communication ports...........................................................840 Function block...........................................................................840 Input and output signals............................................................843 Setting parameters....................................................................848 Technical data...........................................................................850 Horizontal communication via GOOSE for interlocking GOOSEINTLKRCV.........................................................................851
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Table of contents

Function block...........................................................................851 Input and output signals............................................................851 Setting parameters....................................................................853 Goose binary receive GOOSEBINRCV..........................................854 Function block...........................................................................854 Input and output signals............................................................854 Setting parameters....................................................................855 Multiple command and transmit MULTICMDRCV, MULTICMDSND.............................................................................855 Introduction................................................................................856 Principle of operation.................................................................856 Design.......................................................................................856 General.................................................................................856 Function block...........................................................................857 Input and output signals............................................................858 Setting parameters....................................................................859

Section 18 Remote communication................................................861


Binary signal transfer......................................................................861 Introduction................................................................................861 Principle of operation.................................................................861 Function block...........................................................................863 Input and output signals............................................................863 Setting parameters....................................................................865 Transmission of analog data from LDCM LDCMTransmit..............867 Function block...........................................................................867 Input and output signals............................................................868

Section 19 Hardware......................................................................869
Overview.........................................................................................869 Variants of case and local HMI display size..............................869 Case from the rear side.............................................................872 Hardware modules.........................................................................877 Overview....................................................................................877 Combined backplane module (CBM).........................................878 Introduction...........................................................................878 Functionality.........................................................................878 Design..................................................................................878 Universal backplane module (UBM)..........................................880 Introduction...........................................................................880 Functionality.........................................................................880 Design..................................................................................880 Numeric processing module (NUM)..........................................882 Introduction...........................................................................882
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Table of contents

Functionality.........................................................................883 Block diagram.......................................................................884 Power supply module (PSM).....................................................884 Introduction...........................................................................884 Design..................................................................................884 Technical data......................................................................885 Local human-machine interface (Local HMI).............................885 Transformer input module (TRM)..............................................885 Introduction...........................................................................886 Design..................................................................................886 Technical data......................................................................886 Analog digital conversion module, with time synchronization (ADM) .............................................................887 Introduction...........................................................................887 Design..................................................................................887 Binary input module (BIM).........................................................889 Introduction...........................................................................889 Design..................................................................................889 Technical data......................................................................893 Binary output modules (BOM)...................................................893 Introduction...........................................................................893 Design..................................................................................893 Technical data......................................................................895 Static binary output module (SOM)...........................................896 Introduction...........................................................................896 Design..................................................................................896 Technical data......................................................................898 Binary input/output module (IOM)..............................................899 Introduction...........................................................................899 Design..................................................................................900 Technical data......................................................................902 mA input module (MIM).............................................................903 Introduction...........................................................................903 Design..................................................................................903 Technical data......................................................................904 Serial and LON communication module (SLM) ........................905 Introduction...........................................................................905 Design..................................................................................905 Technical data......................................................................906 Galvanic RS485 communication module...................................907 Introduction...........................................................................907 Design..................................................................................907 Technical data......................................................................909
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Table of contents

Optical ethernet module (OEM).................................................909 Introduction...........................................................................909 Functionality.........................................................................909 Design..................................................................................909 Technical data......................................................................910 Line data communication module (LDCM)................................910 Introduction...........................................................................910 Design..................................................................................911 Technical data......................................................................912 Galvanic X.21 line data communication (X.21-LDCM)..............913 Introduction...........................................................................913 Design..................................................................................913 Functionality.........................................................................915 Technical data......................................................................916 GPS time synchronization module (GSM).................................916 Introduction...........................................................................916 Design..................................................................................916 Technical data......................................................................918 GPS antenna.............................................................................919 Introduction...........................................................................919 Design..................................................................................919 Technical data......................................................................920 IRIG-B time synchronization module IRIG-B.............................921 Introduction...........................................................................921 Design..................................................................................921 Technical data......................................................................922 Dimensions.....................................................................................923 Case without rear cover.............................................................923 Case with rear cover..................................................................925 Flush mounting dimensions.......................................................927 Side-by-side flush mounting dimensions...................................928 Wall mounting dimensions.........................................................929 External resistor unit for high impedance differential protection...................................................................................929 Mounting alternatives.....................................................................930 Flush mounting..........................................................................930 Overview..............................................................................930 Mounting procedure for flush mounting................................932 19 panel rack mounting............................................................933 Overview..............................................................................933 Mounting procedure for 19 panel rack mounting.................934 Wall mounting............................................................................934 Overview..............................................................................934
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Table of contents

Mounting procedure for wall mounting.................................935 How to reach the rear side of the IED..................................936 Side-by-side 19 rack mounting.................................................936 Overview..............................................................................936 Mounting procedure for side-by-side rack mounting............937 IED in the 670 series mounted with a RHGS6 case.............937 Side-by-side flush mounting......................................................938 Overview..............................................................................938 Mounting procedure for side-by-side flush mounting...........939 Technical data................................................................................939 Enclosure...................................................................................939 Connection system....................................................................940 Influencing factors.....................................................................940 Type tests according to standard..............................................941

Section 20 Labels...........................................................................945
Different labels................................................................................945

Section 21 Connection diagrams...................................................949 Section 22 Inverse time characteristics..........................................965


Application......................................................................................965 Principle of operation......................................................................968 Mode of operation......................................................................968 Inverse characteristics....................................................................973

Section 23 Glossary.......................................................................999

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Section 1 Introduction

Section 1

Introduction

About this chapter


This chapter explains concepts and conventions used in this manual and provides information necessary to understand the contents of the manual.

1.1
1.1.1

Introduction to the technical reference manual


About the complete set of manuals for an IED
The users manual (UM) is a complete set of five different manuals:
Decommissioning deinstalling & disposal
IEC09000744-1-en.vsd
IEC09000744 V1 EN

Planning & purchase

Commissioning

Engineering

Engineeringmanual Installation and Commissioning manual Operators manual Application manual Technical reference manual

The Application Manual (AM) contains application descriptions, setting guidelines and setting parameters sorted per function. The application manual should be used to find out when and for what purpose a typical protection function could be used. The manual should also be used when calculating settings. The Technical Reference Manual (TRM) contains application and functionality descriptions and it lists function blocks, logic diagrams, input and output signals, setting parameters and technical data sorted per function. The technical reference
29 Technical reference manual

Operation

Installing

Maintenance

Section 1 Introduction

1MRK505183-UEN C

manual should be used as a technical reference during the engineering phase, installation and commissioning phase, and during normal service. The Installation and Commissioning Manual (ICM) contains instructions on how to install and commission the protection IED. The manual can also be used as a reference during periodic testing. The manual covers procedures for mechanical and electrical installation, energizing and checking of external circuitry, setting and configuration as well as verifying settings and performing directional tests. The chapters are organized in the chronological order (indicated by chapter/section numbers) in which the protection IED should be installed and commissioned. The Operators Manual (OM) contains instructions on how to operate the protection IED during normal service once it has been commissioned. The operators manual can be used to find out how to handle disturbances or how to view calculated and measured network data in order to determine the cause of a fault. The Engineering Manual (EM) contains instructions on how to engineer the IEDs using the different tools in PCM600. The manual provides instructions on how to set up a PCM600 project and insert IEDs to the project structure. The manual also recommends a sequence for engineering of protection and control functions, LHMI functions as well as communication engineering for IEC 61850 and DNP3.

1.1.2

About the technical reference manual


The following chapters are included in the technical reference manual. Local HMI describes the control panel on the IED and explains display characteristics, control keys and various local HMI features. Basic IED functions presents functions for all protection types that are included in all IEDs, for example, time synchronization, self supervision with event list, test mode and other general functions. Differential protection describes differential functions and restricted earth fault protection. Impedance protection describes functions for distance zones with their quadrilateral characteristics, phase selection with load encroachment, power swing detection and similar. Current protection describes functions, for example, over current protection, breaker failure protection and pole discordance. Voltage protection describes functions for under voltage and over voltage protection and residual over voltage protection. Frequency protection describes functions for over frequency, under frequency and rate of change of frequency protection. Multipurpose protection describes the general protection function for current and voltage. Secondary system supervision describes current based functions for current circuit supervision and fuse failure supervision. Control describes control functions, for example, synchronization and energizing check and other product specific functions. Scheme communication describes functions related to current reversal and weak end infeed logic.
Technical reference manual

30

1MRK505183-UEN C

Section 1 Introduction

Logic describes trip logic and related functions. Monitoring describes measurement related functions that are used to provide data regarding relevant quantities, events and faults, for example. Metering describes pulse counter logic. Station communication describes Ethernet based communication in general, including the use of IEC 61850 and horizontal communication via GOOSE. Remote communication describes binary and analog signal transfer, and the associated hardware. Hardware describes the IED and its components. Connection diagrams provides terminal wiring diagrams and information regarding connections to and from the IED. Inverse time characteristics describes and explains inverse time delay, inverse time curves and their effects. Glossary is a list of terms, acronyms and abbreviations used in ABB technical documentation.

1.1.3

This manual
The description of each IED related function follows the same structure (where applicable). The different sections are outlined below.

1.1.3.1

Introduction
Outlines the implementation of a particular protection function.

1.1.3.2

Principle of operation
Describes how the function works, presents a general background to algorithms and measurement techniques. Logic diagrams are used to illustrate functionality.

Logic diagrams

Logic diagrams describe the signal logic inside the function block and are bordered by dashed lines. Signal names Input and output logic signals consist of two groups of letters separated by two dashes. The first group consists of up to four letters and presents the abbreviated name for the corresponding function. The second group presents the functionality of the particular signal. According to this explanation, the meaning of the signal BLKTR in figure 4 is as follows: BLKTR informs the user that the signal will BLOCK the TRIP command from the under-voltage function, when its value is a logical one (1).

Input signals are always on the left hand side, and output signals on the right hand side. Settings are not displayed.

31 Technical reference manual

Section 1 Introduction

1MRK505183-UEN C

Input and output signals In a logic diagram, input and output signal paths are shown as a lines that touch the outer border of the diagram. Input and output signals can be configured using the ACT tool. They can be connected to the inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2, STL3. Setting parameters Signals in frames with a shaded area on their right hand side represent setting parameter signals. These parameters can only be set via the PST or LHMI. Their values are high (1) only when the corresponding setting parameter is set to the symbolic value specified within the frame. Example is the signal Block TUV=Yes. Their logical values correspond automatically to the selected setting value. Internal signals Internal signals are illustrated graphically and end approximately 2 mm from the frame edge. If an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the signal name to indicate where the signal starts and continues, see figure 1.
BLKTR TEST TEST Block TUV=Yes BLOCK VTSU BLOCK-int. STUL1N BLOCK-int. STUL2N BLOCK-int. STUL3N & & >1 & t & TRIP START STL1 STL2 STL3 & >1

BLOCK-int.

xx04000375.vsd
IEC04000375 V1 EN

Figure 1:
32

Logic diagram example with -int signals

Technical reference manual

1MRK505183-UEN C

Section 1 Introduction
External signals Signal paths that extend beyond the logic diagram and continue in another diagram have the suffix -cont., see figure 2 and figure 3.
STZMPP-cont.

STCND & & & & & &

>1

STNDL1L2-cont. STNDL2L3-cont. STNDL3L1-cont. STNDL1N-cont. STNDL2N-cont. STNDL3N-cont. >1 STNDPE-cont.

1L1L2 1L2L3 1L3L1 1L1N 1L2N 1L3N

>1 1--VTSZ 1--BLOCK >1 & 1--STND BLK-cont.


xx04000376.vsd
IEC04000376 V1 EN

Figure 2:

Logic diagram example with an outgoing -cont signal

STNDL1N-cont. STNDL2N-cont. STNDL3N-cont. STNDL1L2-cont. STNDL2L3-cont. STNDL3L1-cont.

>1 & >1 & & & 15 ms t 15 ms t 15 ms t 15 ms t STL1 STL2 STL3 START

>1 >1

BLK-cont.
xx04000377.vsd
IEC04000377 V1 EN

Figure 3:

Logic diagram example with an incoming -cont signal

33 Technical reference manual

Section 1 Introduction
1.1.3.3 Input and output signals

1MRK505183-UEN C

Input and output signals are presented in two separate tables. Each table consists of two columns. The first column contains the name of the signal and the second column contains the description of the signal.

1.1.3.4

Function block
Each function block is illustrated graphically. Input signals are always on the left hand side and output signals on the right hand side. Settings are not displayed. Special kinds of settings are sometimes available. These are supposed to be connected to constants in the configuration scheme and are therefore depicted as inputs. Such signals will be found in the signal list but described in the settings table. The ^ character in front of an input or output signal name in the function block symbol given for a function, indicates that the user can set a signal name of their own in PCM600. The * character after an input or output signal name in the function block symbol given for a function, indicates that the signal must be connected to another function block in the application configuration to achieve a valid application configuration.
IEC 61850 - 8 -1 Logical Node

Mandatory signal (*) Outputs


PCGGIO

Inputs
BLOCK READ_VAL BI_PULSE* RS_CNT INVALID RESTART BLOCKED NEW_VAL ^SCAL_VAL en05000511-1-en.vsd

User defined name (^)

Diagram Number
IEC05000511 V2 EN

Figure 4:

Example of a function block

1.1.3.5

Setting parameters
These are presented in tables and include all parameters associated with the function in question.

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1MRK505183-UEN C

Section 1 Introduction
Technical data
The technical data section provides specific technical information about the function or hardware described.

1.1.3.6

1.1.4

Intended audience
General
This manual addresses system engineers, installation and commissioning personnel, who use technical data during engineering, installation and commissioning, and in normal service.

Requirements
The system engineer must have a thorough knowledge of protection systems, protection equipment, protection functions and the configured functional logics in the protective devices. The installation and commissioning personnel must have a basic knowledge in the handling electronic equipment.

1.1.5
Documents related to RED670 Operators manual

Related documents
Identity number 1MRK 505 184-UEN 1MRK 505 185-UEN 1MRK 505 183-UEN 1MRK 505 186-UEN 1MRK 505 188-BEN SA2005-001281 1MRK 002 801-BA 1MRK 002 801-CA 1MRK 002 801-DA 1MRK 002 801-EA 1MRK 004 500-82 1MRK 004 500-83 1MRK 004 500-84 1MRK 004 500-85 1MRK 505 175-WEN

Installation and commissioning manual Technical reference manual Application manual Buyers guide Sample specification Connection diagram, Single breaker arr. Three phase tripping arr. Connection diagram, Single breaker arr. Single phase tripping arr. Connection diagram, Multi breaker arr. Three phase tripping arr. Connection diagram, Multi breaker arr. Single phase tripping arr. Configuration diagram A, Single breaker with single or double busbars Configuration diagram B, Single breakers with single or double busbars Configuration diagram C, Multi breakers such as 1 1/2 or ring busbar arr. Configuration diagram D, Multi breakers such as 1 1/2 or ring busbar arr. Setting example 1, 230 kV Short cable line with 1 1/2CB arr.

Connection and Installation components Test system, COMBITEST Accessories for IED 670 Getting started guide IED 670 SPA and LON signal list for IED 670, ver. 1.1 Table continues on next page

1MRK 513 003-BEN 1MRK 512 001-BEN 1MRK 514 012-BEN 1MRK 500 080-UEN 1MRK 500 083-WEN

35 Technical reference manual

Section 1 Introduction

1MRK505183-UEN C

IEC 61850 Data objects list for IED 670, ver. 1.1 Generic IEC 61850 IED Connectivity package Protection and Control IED Manager PCM 600 Installation sheet Engineering guide IED 670 products

1MRK 500 084-WEN 1KHA001027-UEN 1MRS755552 1MRK 511 179-UEN

More information can be found on www.abb.com/substationautomation.

1.1.6

Revision notes
Revision C Description No functionality added. Changes made in content due to problem reports.

36 Technical reference manual

1MRK505183-UEN C

Section 2 Analog inputs

Section 2

Analog inputs

2.1

Introduction
Analog input channels must be configured and set properly to get correct measurement results and correct protection operations. For power measuring and all directional and differential functions the directions of the input currents must be defined properly. Measuring and protection algorithms in the IED use primary system quantities. Set values are done in primary quantities as well and it is important to set the data about the connected current and voltage transformers properly. A reference PhaseAngleRef can be defined to facilitate service values reading. This analog channels phase angle will always be fixed to zero degree and all other angle information will be shown in relation to this analog input. During testing and commissioning of the IED the reference channel can be changed to facilitate testing and service values reading. The IED has the ability to receive analog values from primary equipment, that are sampled by Merging units (MU) connected to a process bus, via the IEC 61850-9-2 LE protocol.

The availability of VT inputs depends on the ordered transformer input module (TRM) type.

2.2

Operation principle
The direction of a current to the IED depends on the connection of the CT. The main CTs are typically star connected and can be connected with the star point to the object or from the object. This information must be set to the IED. Directional conventions for current or power, for example Positive value of current or power means quantity direction into the object. Negative value of current or power means quantity direction out from the object.

Directional conventions for directional functions (see figure 5)

37 Technical reference manual

Section 2 Analog inputs

1MRK505183-UEN C

Forward means direction into the object. Reverse means direction out from the object.
Definition of direction for directional functions Reverse Forward Definition of direction for directional functions Forward Reverse

Protected Object Line, transformer, etc


e.g. P, Q, I Measured quantity is positive when flowing towards the object Set parameter CTStarPoint Correct Setting is "ToObject" e.g. P, Q, I Measured quantity is positive when flowing towards the object Set parameter CTStarPoint Correct Setting is "FromObject" en05000456.vsd
IEC05000456 V1 EN

Figure 5:

Internal convention of the directionality in the IED

The correct setting of the primary CT direction CTStarPoint is set to FromObject or ToObject. Positive quantities flow towards the object. Direction is defined as Forward and looks towards the object.

The ratios of the main CTs and VTs must be known to use primary system quantities for settings and calculation in the IED, The user has to set the rated secondary and primary currents and voltages of the CTs and VTs to provide the IED with this information. The CT and VT ratio and the name on respective channel is done under Main menu/General settings/Analog module in the Parameter Settings tool.

2.3

Function block
The function blocks are not represented in the configuration tool. The signals appear only in the SMT tool when a TRM is included in the configuration with the function selector tool. In the SMT tool they can be mapped to the desired virtual input (SMAI) of the IED and used internally in the configuration.

38 Technical reference manual

1MRK505183-UEN C

Section 2 Analog inputs

2.4

Setting parameters
Dependent on ordered IED type.

Table 1:
Name PhaseAngleRef

AISVBAS Non group settings (basic)


Values (Range) TRM40-Ch1 TRM40-Ch2 TRM40-Ch3 TRM40-Ch4 TRM40-Ch5 TRM40-Ch6 TRM40-Ch7 TRM40-Ch8 TRM40-Ch9 TRM40-Ch10 TRM40-Ch11 TRM40-Ch12 TRM41-Ch1 TRM41-Ch2 TRM41-Ch3 TRM41-Ch4 TRM41-Ch5 TRM41-Ch6 TRM41-Ch7 TRM41-Ch8 TRM41-Ch9 TRM41-Ch10 TRM41-Ch11 TRM41-Ch12 MU1-L1I MU1-L2I MU1-L3I MU1-L4I MU1-L1U MU1-L2U MU1-L3U MU1-L4U MU2-L1I MU2-L2I MU2-L3I MU2-L4I MU2-L1U MU2-L2U MU2-L3U MU2-L4U MU3-L1I MU3-L2I MU3-L3I MU3-L4I MU3-L1U MU3-L2U MU3-L3U MU3-L4U Unit Step Default TRM40-Ch1 Description Reference channel for phase angle presentation

39 Technical reference manual

Section 2 Analog inputs

1MRK505183-UEN C

Table 2:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2 CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 CTStarPoint7 CTsec7 CTprim7 CTStarPoint8 CTsec8 CTprim8 CTStarPoint9 CTsec9 CTprim9 CTStarPoint10 CTsec10 CTprim10 CTStarPoint11 CTsec11

TRM_12I Non group settings (basic)


Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 Unit A A A A A A A A A A A A A A A A A A A A A Step 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Default ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current

Table continues on next page 40 Technical reference manual

1MRK505183-UEN C

Section 2 Analog inputs


Values (Range) 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 Unit A A A Step 1 1 1 Default 3000 ToObject 1 3000 Description Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

Name CTprim11 CTStarPoint12 CTsec12 CTprim12

Table 3:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2 CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 VTsec7 VTprim7 VTsec8 VTprim8 VTsec9 VTprim9 VTsec10 VTprim10 VTsec11

TRM_6I_6U Non group settings (basic)


Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 Unit A A A A A A A A A A A A V kV V kV V kV V kV V Step 1 1 1 1 1 1 1 1 1 1 1 1 0.001 0.05 0.001 0.05 0.001 0.05 0.001 0.05 0.001 Default ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 110.000 400.00 110.000 400.00 110.000 400.00 110.000 400.00 110.000 Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage

Table continues on next page

41 Technical reference manual

Section 2 Analog inputs


Name VTprim11 VTsec12 VTprim12 Values (Range) 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 Unit kV V kV Step 0.05 0.001 0.05 Default 400.00 110.000 400.00 Description

1MRK505183-UEN C

Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

Table 4:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2 CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6

TRM_6I Non group settings (basic)


Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 Unit A A A A A A A A A A A A Step 1 1 1 1 1 1 1 1 1 1 1 1 Default ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

Table 5:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2

TRM_7I_5U Non group settings (basic)


Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 Unit A A A A Step 1 1 1 1 Default ToObject 1 3000 ToObject 1 3000 Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

Table continues on next page

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Section 2 Analog inputs


Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 Unit A A A A A A A A A A V kV V kV V kV V kV V kV Step 1 1 1 1 1 1 1 1 1 1 0.001 0.05 0.001 0.05 0.001 0.05 0.001 0.05 0.001 0.05 Default ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 110.000 400.00 110.000 400.00 110.000 400.00 110.000 400.00 110.000 400.00 Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

Name CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 CTStarPoint7 CTsec7 CTprim7 VTsec8 VTprim8 VTsec9 VTprim9 VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12

Table 6:
Name CTStarPoint1 CTsec1 CTprim1 CTStarPoint2 CTsec2 CTprim2

TRM_9I_3U Non group settings (basic)


Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 Unit A A A A Step 1 1 1 1 Default ToObject 1 3000 ToObject 1 3000 Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

Table continues on next page

43 Technical reference manual

Section 2 Analog inputs


Name CTStarPoint3 CTsec3 CTprim3 CTStarPoint4 CTsec4 CTprim4 CTStarPoint5 CTsec5 CTprim5 CTStarPoint6 CTsec6 CTprim6 CTStarPoint7 CTsec7 CTprim7 CTStarPoint8 CTsec8 CTprim8 CTStarPoint9 CTsec9 CTprim9 VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12 Values (Range) FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 Unit A A A A A A A A A A A A A A V kV V kV V kV Step 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0.001 0.05 0.001 0.05 0.001 0.05 Default ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 ToObject 1 3000 110.000 400.00 110.000 400.00 110.000 400.00 Description

1MRK505183-UEN C

ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

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Section 3 Local HMI

Section 3

Local HMI

About this chapter


This chapter describes the structure and use of local HMI, which is the control panel at the IED.

3.1

Human machine interface


The local human machine interface is available in a small and a medium sized model. The difference between the two models is the size of the LCD. The small size LCD can display seven lines of text and the medium size LCD can display the single line diagram with up to 15 objects on each page. Up to 12 single line diagram pages can be defined, depending on the product capability. The local HMI is divided into zones with different functionality. Status indication LEDs. Alarm indication LEDs, which consist of 15 LEDs (6 red and 9 yellow) with user printable label. All LEDs are configurable from PCM600. Liquid crystal display (LCD). Keypad with push buttons for control and navigation purposes, switch for selection between local and remote control and reset. Isolated RJ45 communication port.

45 Technical reference manual

Section 3 Local HMI

1MRK505183-UEN C

IEC05000055-LITEN V1 EN

Figure 6:

Small, alpha numeric HMI

IEC05000056-LITEN V1 EN

Figure 7:

Medium graphic HMI, 15 controllable objects

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Section 3 Local HMI

3.2
3.2.1

Small size HMI


Small
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19 case. The LCD on the small HMI measures 32 x 90 mm and displays 7 lines with up to 40 characters per line. The first line displays the product name and the last line displays date and time. The remaining 5 lines are dynamic. This LCD has no graphic display potential.

3.2.2

Design
The local HMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of the small local HMI are shown in figure 8

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Section 3 Local HMI

1MRK505183-UEN C

8
IEC05000055-CALLOUT V1 EN

en05000055.eps

Figure 8:

Small graphic HMI

1 Status indication LEDs 2 LCD 3 Indication LEDs 4 Label 5 Local/Remote LEDs 6 RJ45 port 7 Communication indication LED 8 Keypad

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Section 3 Local HMI

3.3
3.3.1

Medium size graphic HMI


Medium
The following case sizes can be equipped with the medium size LCD: 1/2 x 19 3/4 x 19 1/1 x 19

This is a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines with up to 40 characters per line. To display the single line diagram, this LCD is required.

3.3.2

Design
The different parts of the medium size local HMI are shown in figure 9. The local HMI exists in an IEC version and in an ANSI version. The difference is on the keypad operation buttons and the yellow LED designation.

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8
IEC05000056-CALLOUT V1 EN

en05000056.eps

Figure 9:

Medium size graphic HMI

1 Status indication LEDs 2 LCD 3 Indication LEDs 4 Label 5 Local/Remote LEDs 6 RJ45 port 7 Communication indication LED 8 Keypad

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Section 3 Local HMI

3.4

Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in all IEDs. LCD screens and other details may differ but the way the keys function is identical.

IEC05000153 V1 EN

Figure 10:

The HMI keypad.

Table 7 describes the HMI keys that are used to operate the IED.
Table 7:
Key

HMI keys on the front of the IED


Function Press to close or energize a breaker or disconnector.

IEC05000101 V1 EN

Press to open a breaker or disconnector.


IEC05000102 V1 EN

Press to open two sub menus: Key operation and IED information.
IEC05000103 V1 EN

Press to clear entries, cancel commands or edit.


IEC05000104 V1 EN

Press to open the main menu and to move to the default screen.
IEC05000105 V1 EN

Press to set the IED in local or remote control mode.


IEC05000106 V1 EN

Press to open the reset screen.


IEC05000107 V1 EN

Press to start the editing mode and confirm setting changes, when in editing mode.
IEC05000108 V1 EN

Table continues on next page

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Section 3 Local HMI


Key Function

1MRK505183-UEN C

Press to navigate forward between screens and move right in editing mode.
IEC05000109 V1 EN

Press to navigate backwards between screens and move left in editing mode.
IEC05000110 V1 EN

Press to move up in the single line diagram and in the menu tree.
IEC05000111 V1 EN

Press to move down in the single line diagram and in the menu tree.
IEC05000112 V1 EN

3.5
3.5.1

LED
Introduction
The LED module is a unidirectional means of communicating. This means that events may occur that activate a LED in order to draw the operators attention to something that has occurred and needs some sort of action.

3.5.2

Status indication LEDs


The three LEDs above the LCD provide information as shown in the table below.
LED Indication Green: Steady Flashing Dark Yellow: Steady Flashing Red: Steady Trip command issued Dist. rep. triggered Terminal in test mode In service Internal failure No power supply Information

3.5.3

Indication LEDs
The LED indication module comprising 15 LEDs is standard in 670 series. Its main purpose is to present an immediate visual information for protection indications or alarm signals.

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Section 3 Local HMI

Alarm indication LEDs and hardware associated LEDs are located on the right hand side of the front panel. Alarm LEDs are located on the right of the LCD screen and show steady or flashing light. Steady light indicates normal operation. Flashing light indicates alarm.

Alarm LEDs can be configured in PCM600 and depend on the binary logic. Therefore they can not be configured on the local HMI. Typical examples of alarm LEDs Bay controller failure CB close blocked Interlocking bypassed Differential protection trip SF6 Gas refill Position error CB spring charge alarm Oil temperature alarm Thermal overload trip

The RJ45 port has a yellow LED indicating that communication has been established between the IED and a computer. The Local/Remote key on the front panel has two LEDs indicating whether local or remote control of the IED is active.

3.6
3.6.1

Local HMI related functions


Introduction
The local HMI can be adapted to the application configuration and to user preferences. Function block LocalHMI Function block LEDGEN Setting parameters

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Section 3 Local HMI 3.6.2


Table 8:
Name Language DisplayTimeout AutoRepeat ContrastLevel DefaultScreen EvListSrtOrder SymbolFont

1MRK505183-UEN C

General setting parameters


SCREEN Non group settings (basic)
Values (Range) English OptionalLanguage 10 - 120 Off On -10 - 20 0-0 Latest on top Oldest on top IEC ANSI Unit Min % Step 10 1 1 Default English 60 On 0 0 Latest on top IEC Description Local HMI language Local HMI display timeout Activation of auto-repeat (On) or not (Off) Contrast level for display Default screen Sort order of event list Symbol font for Single Line Diagram

3.6.3
3.6.3.1

Status indication LEDs


Design
The function block LocalHMI controls and supplies information about the status of the status indication LEDs. The input and output signals of local HMI are configured with PCM600. The function block can be used if any of the signals are required in a configuration logic. See section "Status indication LEDs" for information about the LEDs.

3.6.3.2

Function block
LocalHMI CLRLEDS HMI-ON RED-S YELLOW-S YELLOW-F CLRPULSE LEDSCLRD IEC05000773-2-en.vsd
IEC05000773 V2 EN

Figure 11:

LocalHMI function block

3.6.3.3

Input and output signals


Table 9:
Name CLRLEDS

LocalHMI Input signals


Type BOOLEAN Default 0 Description Input to clear the LCD-HMI LEDs

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Section 3 Local HMI

Table 10:
Name HMI-ON RED-S YELLOW-S YELLOW-F CLRPULSE LEDSCLRD

LocalHMI Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Backlight of the LCD display is active Red LED on the LCD-HMI is steady Yellow LED on the LCD-HMI is steady Yellow LED on the LCD-HMI is flashing A pulse is provided when the LEDs on the LCDHMI are cleared Active when the LEDs on the LCD-HMI are not active

3.6.4
3.6.4.1

Indication LEDs
Introduction
The function block LEDGEN controls and supplies information about the status of the indication LEDs. The input and output signals of LEDGEN are configured with PCM600. The input signal for each LED is selected individually with the Signal Matrix Tool in PCM600. LEDs (number 16) for trip indications are red. LEDs (number 715) for start indications are yellow.

Each indication LED on the local HMI can be set individually to operate in six different sequences Two sequences operate as follow type. Four sequences operate as latch type. Two of the latching sequence types are intended to be used as a protection indication system, either in collecting or restarting mode, with reset functionality. Two of the latching sequence types are intended to be used as signaling system in collecting (coll) mode with an acknowledgment functionality.

The light from the LEDs can be steady (-S) or flashing (-F). See the technical reference manual for more information.

3.6.4.2

Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in some of the modes of LEDGEN. The latest LED picture appears immediately after the IED is successfully restarted.

Operating modes
Collecting mode
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LEDs which are used in collecting mode of operation are accumulated continuously until the unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified alarm system.

Re-starting mode In the re-starting mode of operation each new start resets all previous active LEDs and activates only those which appear during one disturbance. Only LEDs defined for re-starting mode with the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a new disturbance. A disturbance is defined to end a settable time after the reset of the activated input signals or when the maximum time limit has elapsed.

Acknowledgment/reset
From local HMI Active indications can be acknowledged or reset manually. Manual acknowledgment and manual reset have the same meaning and is a common signal for all the operating sequences and LEDs. The function is positive edge triggered, not level triggered. The acknowledged or reset is performed via the reset button and menus on the local HMI. See the operator's manual for more information.

From function input Active indications can also be acknowledged or reset from an input, RESET, to the function. This input can, for example, be configured to a binary input operated from an external push button. The function is positive edge triggered, not level triggered. This means that even if the button is continuously pressed, the acknowledgment or reset only affects indications active at the moment when the button is first pressed.

Automatic reset Automatic reset can only be performed for indications defined for restarting mode with the latched sequence type 6 (LatchedReset-S). When automatic reset of the LEDs has been performed, still persisting indications will be indicated with a steady light.

Operating sequences

The operating sequences can be of type Follow or Latched. For the Follow type the LED follows the input signal completely. For the Latched type each LED latches to the corresponding input signal until it is reset.

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Figure 12 show the function of available sequences that are selectable for each LED separately. The acknowledgment or reset function is not applicable for sequence 1 and 2 (Follow type). Sequence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Sequence 5 is working according to Latched type and collecting mode. Sequence 6 is working according to Latched type and re-starting mode.

The letters S and F in the sequence names have the meaning S = Steady and F = Flashing. At the activation of the input signal, the indication operates according to the selected sequence diagrams. In the sequence diagrams the LEDs have the characteristics as shown in figure 12.
= No indication = Steady light = Flash
en05000506.vsd
IEC05000506 V1 EN

Figure 12:

Symbols used in the sequence diagrams

Sequence 1 (Follow-S) This sequence follows all the time, with a steady light, the corresponding input signals. It does not react on acknowledgment or reset. Every LED is independent of the other LEDs in its operation.
Activating signal

LED
IEC01000228_2_en.vsd
IEC01000228 V2 EN

Figure 13:

Operating sequence 1 (Follow-S)

Sequence 2 (Follow-F) This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing steady light. Sequence 3 (LatchedAck-F-S) This sequence has a latched function and works in collecting mode. Every LED is independent of the other LEDs in its operation. At the activation of the input signal, the indication starts flashing. After acknowledgment the indication disappears if

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1MRK505183-UEN C

the signal is not present any more. If the signal is still present after acknowledgment it gets a steady light.
Activating signal

LED

Acknow.
en01000231.vsd
IEC01000231 V1 EN

Figure 14:

Operating sequence 3 (LatchedAck-F-S)

Sequence 4 (LatchedAck-S-F) This sequence has the same functionality as sequence 3, but steady and flashing light have been alternated. Sequence 5 (LatchedColl-S) This sequence has a latched function and works in collecting mode. At the activation of the input signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that indications that are still activated will not be affected by the reset that is, immediately after the positive edge of the reset has been executed a new reading and storing of active signals is performed. Every LED is independent of the other LEDs in its operation.
Activating signal

LED

Reset
IEC01000235_2_en.vsd
IEC01000235 V2 EN

Figure 15:

Operating sequence 5 (LatchedColl-S)

Sequence 6 (LatchedReset-S) In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically reset at a new disturbance when activating any input signal for other LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still activated will not be affected by manual reset, that is, immediately after the positive edge of that the manual reset has been executed a new reading and storing

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Section 3 Local HMI

of active signals is performed. LEDs set for sequence 6 are completely independent in its operation of LEDs set for other sequences. Definition of a disturbance A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a settable time, tRestart, has elapsed after that all activating signals for the LEDs set as LatchedReset-S have reset. However if all activating signals have reset and some signal again becomes active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new disturbance start will be issued first when all signals have reset after tRestart has elapsed. A diagram of this functionality is shown in figure 16.
From disturbance length control per LED set to sequence 6

New disturbance

&

tRestart t

& 1 &

en01000237.vsd
IEC01000237 V1 EN

Figure 16:

Activation of new disturbance

In order not to have a lock-up of the indications in the case of a persisting signal each LED is provided with a timer, tMax, after which time the influence on the definition of a disturbance of that specific LED is inhibited. This functionality is shown i diagram in figure 17.
Activating signal To LED

AND tMax t

To disturbance length control

en05000507.vsd
IEC05000507 V1 EN

Figure 17:

Length control of activating signals

Timing diagram for sequence 6 Figure 18 shows the timing diagram for two indications within one disturbance.

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Disturbance
tRestart

Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


IEC01000239 V2 EN

IEC01000239_2-en.vsd

Figure 18:

Operating sequence 6 (LatchedReset-S), two indications within same disturbance

Figure 19 shows the timing diagram for a new indication after tRestart time has elapsed.
Disturbance tRestart Activating signal 1 Activating signal 2 Disturbance tRestart

LED 1

LED 2 Automatic reset Manual reset


IEC01000240_2_en.vsd
IEC01000240 V2 EN

Figure 19:

Operating sequence 6 (LatchedReset-S), two different disturbances

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Section 3 Local HMI

Figure 20 shows the timing diagram when a new indication appears after the first one has reset but before tRestart has elapsed.
Disturbance tRestart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


IEC01000241_2_en.vsd
IEC01000241 V2 EN

Figure 20:

Operating sequence 6 (LatchedReset-S), two indications within same disturbance but with reset of activating signal between

Figure 21 shows the timing diagram for manual reset.


Disturbance tRestart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


IEC01000242_2_en.vsd
IEC01000242 V2 EN

Figure 21:

Operating sequence 6 (LatchedReset-S), manual reset


61

Technical reference manual

Section 3 Local HMI


3.6.4.3 Function block
LEDGEN BLOCK RESET LEDTEST NEWIND ACK

1MRK505183-UEN C

IEC05000508_2_en.vsd
IEC05000508 V2 EN

Figure 22:

LEDGEN function block

3.6.4.4

Input and output signals


Table 11:
Name BLOCK RESET LEDTEST

LEDGEN Input signals


Type BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Input to block the operation of the LED-unit Input to acknowledge/reset the indications of the LED-unit Input for external LED test

Table 12:
Name NEWIND ACK

LEDGEN Output signals


Type BOOLEAN BOOLEAN Description A new signal on any of the indication inputs occurs A pulse is provided when the LEDs are acknowledged

3.6.4.5
Table 13:
Name Operation tRestart tMax SeqTypeLED1

Setting parameters
LEDGEN Non group settings (basic)
Values (Range) Off On 0.0 - 100.0 0.0 - 100.0 Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Unit s s Step 0.1 0.1 Default Off 0.0 0.0 Follow-S Description Operation mode for the LED function Defines the disturbance length Maximum time for the definition of a disturbance Sequence type for LED 1

SeqTypeLED2

Follow-S

Sequence type for LED 2

Table continues on next page

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Section 3 Local HMI


Values (Range) Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Unit Step Default Follow-S Description Sequence type for LED 3

Name SeqTypeLED3

SeqTypeLED4

Follow-S

Sequence type for LED 4

SeqTypeLED5

Follow-S

Sequence type for LED 5

SeqTypeLED6

Follow-S

Sequence type for LED 6

SeqTypeLED7

Follow-S

Sequence type for LED 7

SeqTypeLED8

Follow-S

sequence type for LED 8

SeqTypeLED9

Follow-S

Sequence type for LED 9

SeqTypeLED10

Follow-S

Sequence type for LED 10

SeqTypeLED11

Follow-S

Sequence type for LED 11

Table continues on next page

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Section 3 Local HMI


Name SeqTypeLED12 Values (Range) Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Unit Step Default Follow-S Description

1MRK505183-UEN C

Sequence type for LED 12

SeqTypeLED13

Follow-S

Sequence type for LED 13

SeqTypeLED14

Follow-S

Sequence type for LED 14

SeqTypeLED15

Follow-S

Sequence type for LED 15

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Section 4 Basic IED functions

Section 4

Basic IED functions

About this chapter


This chapter presents functions that are basic to all 670 series IEDs. Typical functions in this category are time synchronization, self supervision and test mode.

4.1

Authorization
To safeguard the interests of our customers, both the IED and the tools that are accessing the IED are protected, subject of authorization handling. The concept of authorization, as it is implemented in the IED and in PCM600 is based on the following facts: There are two types of access points to the IED: local, through the local HMI remote, through the communication ports

4.1.1

Principle of operation
There are different levels (or types) of users that can access or operate different areas of the IED and tools functionality. The pre-defined user types are given in table below. Be sure that the user logged on to the IED has the access required when writing particular data to the IED from PCM600. The meaning of the legends used in the table: R= Read W= Write - = No access rights

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Table 14:
Access rights

Pre-defined user types


Guest R Super User R/W SPA Guest R System Operator R/W Protection Engineer R/W Design Engineer R/W User Administrator R

Basic setting possibilities (change setting group, control settings, limit supervision) Advanced setting possibilities (for example protection settings) Basic control possibilities (process control, no bypass) Advanced control possibilities (process control including interlock trigg) Basic command handling (for example clear LEDs, manual trigg) Advanced command handling (for example clear disturbance record) Basic configuration possibilities (I/ O-configuration in SMT) Advanced configuration possibilities (application configuration including SMT, GDE and CMT) File loading (database loading from XML-file) File dumping (database dumping to XML-file) File transfer (FTP file transfer) File transfer (limited) (FTP file transfer) File Transfer (SPA File Transfer) Database access for normal user User administration (user management FTP File Transfer) User administration (user management SPA File Transfer)

R R R

R/W R/W R/W

R R/W R/W

R R/W R/W

R/W R/W R/W

R/W R/W R/W

R R R

R R R R

R/W R/W R/W R/W

R R R R

R/W R R R

R/W R/W R R

R/W R/W R/W R/W

R R/W R/W R/W

R R R -

R/W R/W R/W R/W R/W R/W R/W R/W

R R R -

R/W R/W R/W R -

R/W R/W R/W R -

R/W R/W R/W R/W R/W R/W R -

R/W R/W R/W R/W R/W R/W -

The IED users can be created, deleted and edited only with the User Management Tool (UMT) within PCM600. The user can only LogOn or LogOff on the local HMI on the IED, there are no users, groups or functions that can be defined on local HMI. Only characters A - Z, a - z and 0 - 9 should be used in user names and passwords.

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At least one user must be included in the UserAdministrator group to be able to write users, created in PCM600, to IED.

4.1.1.1

Authorization handling in the IED


At delivery the default user is the SuperUser. No Log on is required to operate the IED until a user has been created with the User Management Tool. Once a user is created and downloaded to the IED, that user can perform a Log on, introducing the password assigned in the tool. If there is no user created, an attempt to log on will display a message box: No user defined! If one user leaves the IED without logging off, then after the timeout (set in Main menu/Settings/General Settings/HMI/Screen/Display Timeout) elapses, the IED returns to Guest state, when only reading is possible. The display time out is set to 60 minutes at delivery. If there are one or more users created with the User Management Tool and downloaded into the IED, then, when a user intentionally attempts a Log on or when the user attempts to perform an operation that is password protected, the Log on window will appear. The cursor is focused on the User identity field, so upon pressing the E key, the user can change the user name, by browsing the list of users, with the up and down arrows. After choosing the right user name, the user must press the E key again. When it comes to password, upon pressing the E key, the following character will show up: $. The user must scroll for every letter in the password. After all the letters are introduced (passwords are case sensitive) choose OK and press the E key again. If everything is alright at a voluntary Log on, the local HMI returns to the Authorization screen. If the Log on is OK, when required to change for example a password protected setting, the local HMI returns to the actual setting folder. If the Log on has failed, then the Log on window opens again, until either the user makes it right or presses Cancel.

4.2
4.2.1

Self supervision with internal event list


Introduction
Self supervision with internal event list function listens and reacts to internal system events, generated by the different built-in self-supervision elements. The internal events are saved in an internal event list.

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The self-supervision operates continuously and includes:

1MRK505183-UEN C

Normal micro-processor watchdog function. Checking of digitized measuring signals. Other alarms, for example hardware and time synchronization.

The self-supervision function status can be monitored from the local HMI, from the Event Viewer in PCM600 or from a SMS/SCS system. Under the Diagnostics menu in the local HMI the present information from the selfsupervision function can be reviewed. The information can be found under Main menu/Diagnostics/Internal events or Main menu/Diagnostics/IED status/ General. The information from the self-supervision function is also available in the Event Viewer in PCM600. A self-supervision summary can be obtained by means of the potential free alarm contact (INTERNAL FAIL) located on the power supply module. The function of this output relay is an OR-function between the INT-FAIL signal see figure 24 and a couple of more severe faults that can occur in the IED, see figure 23

IEC04000520 V1 EN

Figure 23:

Hardware self-supervision, potential-free alarm contact

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IO fail IO stopped IO started

OR

Set Reset e.g. IOM2 Error e.g. IO (n) Error

e.g. BIM 1 Error

OR OR OR

LON ERROR FTF fatal error Watchdog RTE fatal error RTE Appl-fail RTE OK IEC61850 not ready RTCERROR RTC OK TIMESYNCHERROR Time reset SYNCH OK Settings changed Set Reset OR Set Reset 1 second pulse Set Reset OR

Internal FAIL

NUMFAIL Internal WARN OR NUMWARNING RTCERROR

TIMESYNCHERROR SETCHGD

en04000519-1.vsd
IEC04000519 V2 EN

Figure 24:

Software self-supervision, IES (IntErrorSign) function block

Some signals are available from the INTERRSIG function block. The signals from this function block are sent as events to the station level of the control system. The signals from the INTERRSIG function block can also be connected to binary outputs for signalization via output relays or they can be used as conditions for other functions if required/desired. Individual error signals from I/O modules can be obtained from respective module in the Signal Matrix tool. Error signals from time synchronization can be obtained from the time synchronization block TIME.

4.2.2.1

Internal signals
Self supervision provides several status signals, that tells about the condition of the IED. As they provide information about the internal status of the IED, they are also called internal signals. The internal signals can be divided into two groups. Standard signals are always presented in the IED, see table 15. Hardware dependent internal signals are collected depending on the hardware configuration, see table 16.

Explanations of internal signals are listed in table 17.

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Table 15:
Name of signal FAIL WARNING NUMFAIL NUMWARNING RTCERROR

Self-supervision's standard internal signals


Description Internal Fail status Internal Warning status CPU module Fail status CPU module Warning status Real Time Clock status Time Synchronization status Runtime Execution Error status IEC 61850 Error status SW Watchdog Error status LON/Mip Device Error status Runtime Application Error status Settings changed Setting groups changed Fault Tolerant Filesystem status

TIMESYNCHERROR RTEERROR IEC61850ERROR WATCHDOG LMDERROR APPERROR SETCHGD SETGRPCHGD FTFERROR

Table 16:
Card PSM ADOne BIM BOM IOM MIM LDCM

Self-supervision's hardware dependent internal signals


Name of signal PSM-Error ADOne-Error BIM-Error BOM-Error IOM-Error MIM-Error LDCM-Error Description Power Supply Module Error status Analog In Module Error status Binary In Module Error status Binary Out Module Error status In/Out Module Error status Millampere Input Module Error status Line Differential Communication Error status

Table 17:
Name of signal FAIL

Explanations of internal signals


Reasons for activation This signal will be active if one or more of the following internal signals are active; NUMFAIL, LMDERROR, WATCHDOG, APPERROR, RTEERROR, FTFERROR, or any of the HW dependent signals This signal will be active if one or more of the following internal signals are active; RTCERROR, IEC61850ERROR, TIMESYNCHERROR This signal will be active if one or more of the following internal signals are active; WATCHDOG, APPERROR, RTEERROR, FTFERROR This signal will be active if one or more of the following internal signals are active; RTCERROR, IEC61850ERROR This signal will be active when there is a hardware error with the real time clock.

WARNING

NUMFAIL

NUMWARNING RTCERROR Table continues on next page 70

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Name of signal TIMESYNCHERROR Reasons for activation This signal will be active when the source of the time synchronization is lost, or when the time system has to make a time reset. This signal will be active if the Runtime Engine failed to do some actions with the application threads. The actions can be loading of settings or parameters for components, changing of setting groups, loading or unloading of application threads. This signal will be active if the IEC 61850 stack did not succeed in some actions like reading IEC 61850 configuration, startup, for example This signal will be activated when the terminal has been under too heavy load for at least 5 minutes. The operating systems background task is used for the measurements. LON network interface, MIP/DPS, is in an unrecoverable error state. This signal will be active if one or more of the application threads are not in the state that Runtime Engine expects. The states can be CREATED, INITIALIZED, RUNNING, for example This signal will generate an Internal Event to the Internal Event list if any settings are changed. This signal will generate an Internal Event to the Internal Event list if any setting groups are changed. This signal will be active if both the working file and the backup file are corrupted and can not be recovered.

RTEERROR

IEC61850ERROR

WATCHDOG

LMDERROR APPERROR

SETCHGD SETGRPCHGD FTFERROR

4.2.2.2

Run-time model
The analog signals to the A/D converter is internally distributed into two different converters, one with low amplification and one with high amplification, see figure 25.
ADx Adx_Low
x1 u1 x2

Adx_High
x1 u1 x2

Adx Controller

en05000296-2-en.vsd
IEC05000296 V2 EN

Figure 25:

Simplified drawing of A/D converter for the IED.

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The technique to split the analog input signal into two A/D converters with different amplification makes it possible to supervise the incoming signals under normal conditions where the signals from the two converters should be identical. An alarm is given if the signals are out of the boundaries. Another benefit is that it improves the dynamic performance of the A/D conversion. The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One of the tasks for the controller is to perform a validation of the input signals. This is done in a validation filter which has mainly two objects: First is the validation part that checks that the A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals that shall be sent to the CPU, that is the signal that has the most suitable level, the ADx_LO or the 16 times higherADx_HI. When the signal is within measurable limits on both channels, a direct comparison of the two channels can be performed. If the validation fails, the CPU will be informed and an alarm will be given. The ADx_Controller also supervise other parts of the A/D converter.

4.2.3

Function block

IEC09000787 V1 EN

Figure 26:

INTERRSIG function block

4.2.4

Output signals
Table 18:
Name FAIL WARNING CPUFAIL CPUWARN

INTERRSIG Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Internal fail Internal warning CPU fail CPU warning

4.2.5

Setting parameters
The function does not have any parameters available in the local HMI or PCM600.

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Table 19:
Data Recording manner List size

4.2.6

Self supervision with internal event list


Value Continuous, event controlled 1000 events, first in-first out

4.3
4.3.1

Time synchronization
Introduction
Use the time synchronization source selector to select a common source of absolute time for the IED when it is a part of a protection system. This makes comparison of events and disturbance data between all IEDs in a station automation system possible. A common source shall be used for IED and merging unit when IEC 61850-9-2LE process bus communication is used. Micro SCADA OPC server should not be used as a time synchronization source.

4.3.2
4.3.2.1

Principle of operation
General concepts Time definitions

The error of a clock is the difference between the actual time of the clock, and the time the clock is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means how much the error increases, that is how much the clock gains or loses time. A disciplined (trained) clock knows its own faults and tries to compensate for them.

Design of the time system (clock synchronization)

The time system is based on a software clock, which can be adjusted from external time sources and a hardware clock. The protection and control modules will be timed from a hardware clock, which runs independently from the software clock. See figure 27.

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External Synchronization sources Off LON SPA Min. pulse GPS SNTP DNP IRIG-B PPS TimeRegulator (Setting, see technical reference manual)

Time tagging and general synchronisation Protection and control functions

Communication

Events

SW-time Connected when GPS-time is used for differential protection

Off GPS IRIG-B PPS

TimeRegulator (fast or slow)

Synchronization for differential protection (ECHO-mode or GPS) HW-time

A/D converter

Diff.communication

Transducers* *IEC 61850-9-2


IEC08000287-2-en.vsd

IEC08000287 V2 EN

Figure 27:

Design of time system (clock synchronization)

All time tagging is performed by the software clock. When for example a status signal is changed in the protection system with the function based on free running hardware clock, the event is time tagged by the software clock when it reaches the event recorder. Thus the hardware clock can run independently. The echo mode for the differential protection is based on the hardware clock. Thus, there is no need to synchronize the hardware clock and the software clock. The synchronization of the hardware clock and the software clock is necessary only when GPS or IRIG B 00X with optical fibre, IEEE 1344 is used for differential protection. The two clock systems are synchronized by a special clock synchronization unit with two modes, fast and slow. A special feature, an automatic fast clock time regulator is used. The automatic fast mode makes the synchronization time as short as possible during start-up or at interruptions/ disturbances in the GPS timing. The setting fast or slow is also available on the local HMI. If a GPS clock is used for other 670 series IEDs than line differential RED670, the hardware and software clocks are not synchronized

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Fast clock synchronization mode
At startup and after interruptions in the GPS or IRIG B time signal, the clock deviation between the GPS time and the internal differential time system can be substantial. A new startup is also required after for example maintenance of the auxiliary voltage system. When the time difference is >16us, the differential function is blocked and the time regulator for the hardware clock is automatically using a fast mode to synchronize the clock systems. The time adjustment is made with an exponential function, i.e. big time adjustment steps in the beginning, then smaller steps until a time deviation between the GPS time and the differential time system of >16us has been reached. Then the differential function is enabled and the synchronization remains in fast mode or switches to slow mode, depending on the setting.

Slow clock synchronization mode


During normal service, a setting with slow synchronization mode is normally used, which prevents the hardware clock to make too big time steps, >16s, emanating from the differential protection requirement of correct timing.

Synchronization principle

From a general point of view synchronization can be seen as a hierarchical structure. A function is synchronized from a higher level and provides synchronization to lower levels.

Synchronization from a higher level

Function

Optional synchronization of modules at a lower level

IEC09000342-1-en.vsd
IEC09000342 V1 EN

Figure 28:

Synchronization principle

A function is said to be synchronized when it periodically receives synchronization messages from a higher level. As the level decreases, the accuracy of the synchronization decreases as well. A function can have several potential sources of synchronization, with different maximum errors, which give the function the possibility to choose the source with the best quality, and to adjust its internal clock after this source. The maximum error of a clock can be defined as:

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The maximum error of the last used synchronization message The time since the last used synchronization message The rate accuracy of the internal clock in the function.

4.3.2.2

Real-time clock (RTC) operation


The IED has a built-in real-time clock (RTC) with a resolution of one second. The clock has a built-in calendar that handles leap years through 2038.

Real-time clock at power off

During power off, the system time in the IED is kept by a capacitor-backed realtime clock that will provide 35 ppm accuracy for 5 days. This means that if the power is off, the time in the IED may drift with 3 seconds per day, during 5 days, and after this time the time will be lost completely.

Real-time clock at startup Time synchronization startup procedure


The first message that contains the full time (as for instance LON, SNTP and GPS) gives an accurate time to the IED. After the initial setting of the clock, one of three things happens with each of the coming synchronization messages configured as fine: If the synchronization message, which is similar to the other messages, has an offset compared to the internal time in the IED, the message is used directly for synchronization, that is, for adjusting the internal clock to obtain zero offset at the next coming time message. If the synchronization message has an offset that is large compared to the other messages, a spike-filter in the IED removes this time-message. If the synchronization message has an offset that is large, and the following message also has a large offset, the spike filter does not act and the offset in the synchronization message is compared to a threshold that defaults to 100 milliseconds. If the offset is more than the threshold, the IED is brought into a safe state and the clock is set to the correct time. If the offset is lower than the threshold, the clock is adjusted with 1000 ppm until the offset is removed. With an adjustment of 1000 ppm, it takes 100 seconds or 1.7 minutes to remove an offset of 100 milliseconds.

Synchronization messages configured as coarse are only used for initial setting of the time. After this has been done, the messages are checked against the internal time and only an offset of more than 10 seconds resets the time.

Rate accuracy

In the IED, the rate accuracy at cold start is 100 ppm but if the IED is synchronized for a while, the rate accuracy is approximately 1 ppm if the surrounding temperature is constant. Normally, it takes 20 minutes to reach full accuracy.

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Time-out on synchronization sources

All synchronization interfaces has a time-out and a configured interface must receive time-messages regularly in order not to give an error signal (TSYNCERR). Normally, the time-out is set so that one message can be lost without getting a TSYNCERR, but if more than one message is lost, a TSYNCERR is given.

4.3.2.3

Synchronization alternatives
Three main alternatives of external time synchronization are available. Either the synchronization message is applied via any of the communication ports of the IED as a telegram message including date and time or as a minute pulse, connected to a binary input, or via GPS. The minute pulse is used to fine tune already existing time in the IEDs.

Synchronization via SNTP

SNTP provides a ping-pong method of synchronization. A message is sent from an IED to an SNTP server, and the SNTP server returns the message after filling in a reception time and a transmission time. SNTP operates via the normal Ethernet network that connects IEDs together in an IEC 61850 network. For SNTP to operate properly, there must be an SNTP-server present, preferably in the same station. The SNTP synchronization provides an accuracy that gives 1 ms accuracy for binary inputs. The IED itself can be set as an SNTP-time server. SNTP server requirements The SNTP server to be used is connected to the local network, that is not more than 4-5 switches or routers away from the IED. The SNTP server is dedicated for its task, or at least equipped with a real-time operating system, that is not a PC with SNTP server software. The SNTP server should be stable, that is, either synchronized from a stable source like GPS, or local without synchronization. Using a local SNTP server without synchronization as primary or secondary server in a redundant configuration is not recommended.

Synchronization via Serial Communication Module (SLM)

On the serial buses (both LON and SPA) two types of synchronization messages are sent. Coarse message is sent every minute and comprises complete date and time, that is, year, month, day, hours, minutes, seconds and milliseconds. Fine message is sent every second and comprises only seconds and milliseconds.

IEC60870-5-103 is not used to synchronize the IED, but instead the offset between the local time in the IED and the time received from 103 is added to all times (in events and so on) sent via 103. In this way the IED acts as it is synchronized from various 103 sessions at the same time. Actually, there is a local time for each 103 session. The SLM module is located on the AD conversion Module (ADM).

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Synchronization via Built-in-GPS

1MRK505183-UEN C

The built in GPS clock modules receives and decodes time information from the global positioning system. The modules are located on the GPS time synchronization Module (GSM).

Synchronization via binary input

The IED accepts minute pulses to a binary input. These minute pulses can be generated from, for example station master clock. If the station master clock is not synchronized from a world wide source, time will be a relative time valid for the substation. Both positive and negative edge on the signal can be accepted. This signal is also considered as a fine time synchronization signal. The minute pulse is connected to any channel on any Binary Input Module in the IED. The electrical characteristic is thereby the same as for any other binary input. If the objective of synchronization is to achieve a relative time within the substation and if no station master clock with minute pulse output is available, a simple minute pulse generator can be designed and used for synchronization of the IEDs. The minute pulse generator can be created using the logical elements and timers available in the IED. The definition of a minute pulse is that it occurs one minute after the last pulse. As only the flanks are detected, the flank of the minute pulse shall occur one minute after the last flank. Binary minute pulses are checked with reference to frequency. Pulse data: Period time (a) should be 60 seconds. Pulse length (b): Minimum pulse length should be >50 ms. Maximum pulse length is optional.

Amplitude (c) - please refer to section "Binary input module (BIM)".

Deviations in the period time larger than 50 ms will cause TSYNCERR.

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a b

c
en05000251.vsd
IEC05000251 V1 EN

Figure 29:

Binary minute pulses

The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is received within two minutes a SYNCERR will be given. If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute pulse will be registered first 60 s - 50 ms after the last contact bounce. If the minute pulses are perfect, for example, it is exactly 60 seconds between the pulses, contact bounces might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces occurs more than 50 ms, for example, it is less than 59950 ms between the two most adjacent positive (or negative) flanks, the minute pulse will not be accepted. Binary synchronization example An IED is configured to use only binary input, and a valid binary input is applied to a binary input card. The HMI is used to tell the IED the approximate time and the minute pulse is used to synchronize the IED thereafter. The definition of a minute pulse is that it occurs one minute after the previous minute pulse, so the first minute pulse is not used at all. The second minute pulse will probably be rejected due to the spike filter. The third pulse will give the IED a good time and will reset the time so that the fourth minute pulse will occur on a minute border. After the first three minutes, the time in the IED will be good if the coarse time is set properly via the HMI or the RTC backup still keeps the time since last up-time. If the minute pulse is removed for instance for an hour, the internal time will drift by maximum the error rate in the internal clock. If the minute pulse is returned, the first pulse automatically is rejected. The second pulse will possibly be rejected due to the spike filter. The third pulse will either synchronize the time, if the time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time is set, the application will be brought to a safe state before the time is set. If the time is adjusted, the time will reach its destination within 1.7 minutes. Synchronization via IRIG-B The DNP3 communication can be the source for the course time synchronization, while the fine time synchronization needs a source with higher accuracy.

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IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the year in this format. The B in IRIG-B states that 100 bits per second are transmitted, and the message is sent every second. After IRIG-B there numbers stating if and how the signal is modulated and the information transmitted. To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic BNC connector and one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface, and IRIG-B 00x messages can be supplied via either the galvanic interface or the optical interface, where x (in 00x or 12x) means a number in the range of 1-7. 00 means that a base band is used, and the information can be fed into the IRIGB module via the BNC contact or an optical fiber. 12 means that a 1 kHz modulation is used. In this case the information must go into the module via the BNC connector. If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the year. If x is 0, 1, 2 or 3, the information contains only the time within the year, and year information has to come from PCM600 or local HMI. The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B clocks, as IRIG-B previously did not have any year information. IEEE1344 is compatible with IRIG-B and contains year information and information of the timezone. It is recommended to use IEEE 1344 for supplying time information to the IRIG-B module. In this case, send also the local time in the messages, as this local time plus the TZ Offset supplied in the message equals UTC at all times.

4.3.2.4

Process bus IEC 61850-9-2LE synchronization


For the time synchronization of the process bus communication (IEC 61850-9-2LE protocol) an optical PPS or IRIG-B signal can be used. This signal should emanate from either an external GPS clock, or from the merging unit. An optical PPS signal can be supplied to the optical interface of the IRIG-B module.

4.3.3

Function block
TIMEERR TSYNCERR RTCERR IEC05000425-2-en.vsd
IEC05000425 V2 EN

Figure 30:

TIMEERR function block

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Table 20:
Name TSYNCERR RTCERR

4.3.4

TIMEERR Output signals


Type BOOLEAN BOOLEAN Description Time synchronization error Real time clock error

4.3.5

Setting parameters
Path in the local HMI is located under Main menu/Setting/Time Path in PCM600 is located under Main menu/Settings/Time/Synchronization

Table 21:
Name CoarseSyncSrc

TIMESYNCHGEN Non group settings (basic)


Values (Range) Off SPA LON SNTP DNP Off SPA LON BIN GPS GPS+SPA GPS+LON GPS+BIN SNTP GPS+SNTP IRIG-B GPS+IRIG-B PPS Off SNTP-Server Slow Fast Unit Step Default Off Description Coarse time synchronization source

FineSyncSource

Off

Fine time synchronization source

SyncMaster TimeAdjustRate

Off Slow

Activate IEDas synchronization master Adjust rate for time synchronization

Table 22:
Name ModulePosition BinaryInput BinDetection

SYNCHBIN Non group settings (basic)


Values (Range) 3 - 16 1 - 16 PositiveEdge NegativeEdge Unit Step 1 1 Default 3 1 PositiveEdge Description Hardware position of IO module for time synchronization Binary input number for time synchronization Positive or negative edge detection

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Table 23:
Name ServerIP-Add RedServIP-Add

SYNCHSNTP Non group settings (basic)


Values (Range) 0 - 18 0 - 18 Unit IP Address IP Address Step 1 1 Default 0.0.0.0 0.0.0.0 Description Server IP-address Redundant server IP-address

Table 24:
Name MonthInYear

DSTBEGIN Non group settings (basic)


Values (Range) January February March April May June July August September October November December Sunday Monday Tuesday Wednesday Thursday Friday Saturday Last First Second Third Fourth 0 - 86400 Unit Step Default March Description Month in year when daylight time starts

DayInWeek

Sunday

Day in week when daylight time starts

WeekInMonth

Last

Week in month when daylight time starts

UTCTimeOfDay

3600

UTC Time of day in seconds when daylight time starts

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Table 25:
Name MonthInYear

DSTEND Non group settings (basic)


Values (Range) January February March April May June July August September October November December Sunday Monday Tuesday Wednesday Thursday Friday Saturday Last First Second Third Fourth 0 - 86400 Unit Step Default October Description Month in year when daylight time ends

DayInWeek

Sunday

Day in week when daylight time ends

WeekInMonth

Last

Week in month when daylight time ends

UTCTimeOfDay

3600

UTC Time of day in seconds when daylight time ends

Table 26:
Name NoHalfHourUTC

TIMEZONE Non group settings (basic)


Values (Range) -24 - 24 Unit Step 1 Default 0 Description Number of half-hours from UTC

Table 27:
Name SynchType TimeDomain Encoding

SYNCHIRIG-B Non group settings (basic)


Values (Range) BNC Opto LocalTime UTC IRIG-B 1344 1344TZ MinusTZ PlusTZ Unit Step Default Opto LocalTime IRIG-B Description Type of synchronization Time domain Type of encoding

TimeZoneAs1344

PlusTZ

Time zone as in 1344 standard

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Table 28:
Function Time tagging resolution, events and sampled measurement values Time tagging error with synchronization once/min (minute pulse synchronization), events and sampled measurement values Time tagging error with SNTP synchronization, sampled measurement values

1MRK505183-UEN C

Time synchronization, time tagging


Value 1 ms 1.0 ms typically 1.0 ms typically

4.4
4.4.1

Parameter setting groups


Introduction
Use the six sets of settings to optimize IED operation for different system conditions. By creating and switching between fine tuned setting sets, either from the local HMI or configurable binary inputs, results in a highly adaptable IED that can cope with a variety of system scenarios.

4.4.2

Principle of operation
Parameter setting groups ActiveGroup function has six functional inputs, each corresponding to one of the setting groups stored in the IED. Activation of any of these inputs changes the active setting group. Seven functional output signals are available for configuration purposes, so that up to date information on the active setting group is always available. A setting group is selected by using the local HMI, from a front connected personal computer, remotely from the station control or station monitoring system or by activating the corresponding input to the ActiveGroup function block. Each input of the function block can be configured to connect to any of the binary inputs in the IED. To do this PCM600 must be used. The external control signals are used for activating a suitable setting group when adaptive functionality is necessary. Input signals that should activate setting groups must be either permanent or a pulse exceeding 400 ms. More than one input may be activated at the same time. In such cases the lower order setting group has priority. This means that if for example both group four and group two are set to activate, group two will be the one activated. Every time the active group is changed, the output signal SETCHGD is sending a pulse. The parameter MAXSETGR defines the maximum number of setting groups in use to switch between.

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ACTIVATE GROUP 6 ACTIVATE GROUP 5 ACTIVATE GROUP 4 ACTIVATE GROUP 3 ACTIVATE GROUP 2 +RL2 ACTIVATE GROUP 1 IOx-Bly1 IOx-Bly2 IOx-Bly3 IOx-Bly4 IOx-Bly5 IOx-Bly6 ActiveGroup ACTGRP1 GRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6 GRP2 GRP3 GRP4 GRP5 GRP6 SETCHGD

en05000119.vsd
IEC05000119 V2 EN

Figure 31:

Connection of the function to external circuits

The above example also includes seven output signals, for confirmation of which group that is active. SETGRPS function block has an input where the number of setting groups used is defined. Switching can only be done within that number of groups. The number of setting groups selected to be used will be filtered so only the setting groups used will be shown on the Parameter Setting Tool.

4.4.3

Function block
ActiveGroup ACTGRP1 GRP1 ACTGRP2 GRP2 ACTGRP3 GRP3 ACTGRP4 GRP4 ACTGRP5 GRP5 ACTGRP6 GRP6 SETCHGD IEC05000433_2_en.vsd
IEC05000433 V2 EN

Figure 32:

ActiveGroup function block

SETGRPS MAXSETGR IEC05000716_2_en.vsd


IEC05000716 V2 EN

Figure 33:

SETGRPS function block

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Table 29:
Name ACTGRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6

1MRK505183-UEN C

ActiveGroup Input signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 Description Selects setting group 1 as active Selects setting group 2 as active Selects setting group 3 as active Selects setting group 4 as active Selects setting group 5 as active Selects setting group 6 as active

Table 30:
Name GRP1 GRP2 GRP3 GRP4 GRP5 GRP6 SETCHGD

ActiveGroup Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Setting group 1 is active Setting group 2 is active Setting group 3 is active Setting group 4 is active Setting group 5 is active Setting group 6 is active Pulse when setting changed

4.4.5
Table 31:
Name t

Setting parameters
ActiveGroup Non group settings (basic)
Values (Range) 0.0 - 10.0 Unit s Step 0.1 Default 1.0 Description Pulse length of pulse when setting changed

Table 32:
Name ActiveSetGrp

SETGRPS Non group settings (basic)


Values (Range) SettingGroup1 SettingGroup2 SettingGroup3 SettingGroup4 SettingGroup5 SettingGroup6 1-6 Unit Step Default SettingGroup1 Description ActiveSettingGroup

MAXSETGR

No

Max number of setting groups 1-6

4.5

ChangeLock function CHNGLCK

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Change lock function (CHNGLCK) is used to block further changes to the IED configuration and settings once the commissioning is complete. The purpose is to block inadvertent IED configuration changes beyond a certain point in time.

4.5.1

4.5.2

Principle of operation
The Change lock function (CHNGLCK) is configured using ACT. The function, when activated, will still allow the following changes of the IED state that does not involve reconfiguring of the IED: Monitoring Reading events Resetting events Reading disturbance data Clear disturbances Reset LEDs Reset counters and other runtime component states Control operations Set system time Enter and exit from test mode Change of active setting group

The binary input signal LOCK controlling the function is defined in ACT or SMT:
Binary input 1 0 Function Activated Deactivated

4.5.3

Function block
CHNGLCK LOCK IEC09000946-1-en.vsd
IEC09000946 V1 EN

Figure 34:

CHNGLCK function block

4.5.4

Input and output signals


Table 33:
Name LOCK

CHNGLCK Input signals


Type BOOLEAN Default 0 Description Parameter change lock

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Table 34:
Name Operation

1MRK505183-UEN C

Setting parameters
CHNGLCK Non group settings (basic)
Values (Range) LockHMI and Com LockHMI, EnableCom EnableHMI, LockCom Unit Step Default LockHMI and Com Description Operation mode of change lock

4.6
4.6.1

Test mode functionality TEST


Introduction
When the Test mode functionality TESTMODE function is activated, protection functions in the IED are automatically blocked. It is then possible to unblock the protection functions individually from the local HMI or the Parameter Setting tool to perform required tests. When leaving TESTMODE, all blockings are removed and the IED resumes normal operation. However, if during TESTMODE operation, power is removed and later restored, the IED will remain in TESTMODE with the same protection functions blocked or unblocked as before the power was removed. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus mistakes are avoided.

4.6.2

Principle of operation
Put the IED into test mode to test functions in the IED. Set the IED in test mode by configuration, activating the input signal of the function block TESTMODE. setting TestMode to On in the local HMI, under Main menu/TEST/IED test mode.

While the IED is in test mode, the ACTIVE output of the function block TESTMODE is activated. The other outputs of the function block TESTMODE shows the generator of the Test mode: On state input from configuration (OUTPUT output is activated) or setting from local HMI (SETTING output is activated). While the IED is in test mode, the yellow START LED will flash and all functions are blocked. Any function can be unblocked individually regarding functionality and event signalling. Most of the functions in the IED can individually be blocked by means of settings from the local HMI. To enable these blockings the IED must be set in test mode (output ACTIVE is activated), see example in figure 35. When leaving the test
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mode, that is entering normal mode, these blockings are disabled and everything is set to normal operation. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus no mistakes are possible. The blocked functions will still be blocked next time entering the test mode, if the blockings were not reset. The blocking of a function concerns all output signals from the actual function, so no outputs will be activated. When a binary input is used to set the IED in test mode and a parameter, that requires restart of the application, is changed, the IED will re-enter test mode and all functions will be blocked, also functions that were unblocked before the change. During the reentering to test mode, all functions will be temporarily unblocked for a short time, which might lead to unwanted operations. This is only valid if the IED is put in TEST mode by a binary input, not by local HMI. The TESTMODE function block might be used to automatically block functions when a test handle is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) can supply a binary input which in turn is configured to the TESTMODE function block. Each of the protection functions includes the blocking from the TESTMODE function block. A typical example from the undervoltage function is shown in figure 35. The functions can also be blocked from sending events over IEC 61850 station bus to prevent filling station and SCADA databases with test events, for example during a maintenance test.

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Disconnection

Normal voltage U1< U2<

tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466.vsd
IEC05000466 V1 EN

tBlkUV2 < t2,t2Min

Figure 35:

Example of blocking the time delayed undervoltage protection function.

4.6.3

Function block
TESTMODE INPUT ACTIVE OUTPUT SETTING NOEVENT

IEC09000219-1.vsd
IEC09000219 V1 EN

Figure 36:

TESTMODE function block

4.6.4

Input and output signals


Table 35:
Name INPUT

TESTMODE Input signals


Type BOOLEAN Default 0 Description Sets terminal in test mode when active

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Table 36:
Name ACTIVE OUTPUT SETTING NOEVENT

TESTMODE Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Terminal in test mode when active Test input is active Test mode setting is (On) or not (Off) Event disabled during testmode

4.6.5
Table 37:
Name TestMode EventDisable CmdTestBit

Setting parameters
TESTMODE Non group settings (basic)
Values (Range) Off On Off On Off On Unit Step Default Off Off Off Description Test mode in operation (On) or not (Off) Event disable during testmode Command bit for test required or not during testmode

4.7
4.7.1

IED identifiers
Introduction
IED identifiers (TERMINALID) function allows the user to identify the individual IED in the system, not only in the substation, but in a whole region or a country. Use only characters A-Z, a-z and 0-9 in station, object and unit names.

4.7.2
Table 38:
Name StationName StationNumber ObjectName ObjectNumber UnitName UnitNumber

Setting parameters
TERMINALID Non group settings (basic)
Values (Range) 0 - 18 0 - 99999 0 - 18 0 - 99999 0 - 18 0 - 99999 Unit Step 1 1 1 1 1 1 Default Station name 0 Object name 0 Unit name 0 Description Station name Station number Object name Object number Unit name Unit number

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4.8
4.8.1

Product information
Introduction
The Product identifiers function identifies the IED. The function has seven pre-set, settings that are unchangeable but nevertheless very important: IEDProdType ProductDef FirmwareVer SerialNo OrderingNo ProductionDate

The settings are visible on the local HMI , under Main menu/Diagnostics/IED status/Product identifiers They are very helpful in case of support process (such as repair or maintenance).

4.8.2

Setting parameters
The function does not have any parameters available in the local HMI or PCM600.

4.8.3
4.8.3.1

Application
Factory defined settings
The factory defined settings are very useful for identifying a specific version and very helpful in the case of maintenance, repair, interchanging IEDs between different Substation Automation Systems and upgrading. The factory made settings can not be changed by the customer. They can only be viewed. The settings are found in the local HMI under Main menu/Diagnostics/IED status/Product identifiers The following identifiers are available: IEDProdType Describes the type of the IED (like REL, REC or RET). Example: REL670 Describes the release number, from the production. Example: 1.1.r01 Describes the firmware version. Example: 1.4.51 Firmware versions numbers are running independently from the release production numbers. For every release numbers (like 1.4.51) ProductDef FirmwareVer

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there can be one or more firmware versions, depending on the small issues corrected in between releases. IEDMainFunType Main function type code according to IEC 60870-5-103. Example: 128 (meaning line protection).

SerialNo OrderingNo ProductionDate

4.9
4.9.1

Signal matrix for binary inputs SMBI


Introduction
The Signal matrix for binary inputs (SMBI) function is used within the Application Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get information about how binary inputs are brought in for one IED configuration.

4.9.2

Principle of operation
The Signal matrix for binary inputs (SMBI) function , see figure 37, receives its inputs from the real (hardware) binary inputs via the Signal Matrix Tool (SMT), and makes them available to the rest of the configuration via its outputs, BI1 to BI10. The inputs and outputs, as well as the whole block, can be given a user defined name. These names will be represented in SMT as information which signals shall be connected between physical IO and SMBI function. The input/ output user defined name will also appear on the respective output/input signal.

4.9.3

Function block
SMBI ^VIN1 ^VIN2 ^VIN3 ^VIN4 ^VIN5 ^VIN6 ^VIN7 ^VIN8 ^VIN9 ^VIN10 ^BI1 ^BI2 ^BI3 ^BI4 ^BI5 ^BI6 ^BI7 ^BI8 ^BI9 ^BI10 IEC05000434-2-en.vsd
IEC05000434 V2 EN

Figure 37:

SMBI function block

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Table 39:
Name VIn1 VIn2 VIn3 VIn4 VIn5 VIn6 VIn7 VIn8 VIn9 VIn10

1MRK505183-UEN C

SMBI Input signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 Description SMT Connect input SMT Connect input SMT Connect input SMT Connect input SMT Connect input SMT Connect input SMT Connect input SMT Connect input SMT Connect input SMT Connect input

Table 40:
Name BI1 BI2 BI3 BI4 BI5 BI6 BI7 BI8 BI9 BI10

SMBI Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Binary input 1 Binary input 2 Binary input 3 Binary input 4 Binary input 5 Binary input 6 Binary input 7 Binary input 8 Binary input 9 Binary input 10

4.10
4.10.1

Signal matrix for binary outputs SMBO


Introduction
The Signal matrix for binary outputs (SMBO) function is used within the Application Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get information about how binary inputs are sent from one IED configuration.

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The Signal matrix for binary outputs (SMBO) function , see figure 38, receives logical signal from the IED configuration, which is transferring to the real (hardware) outputs, via the Signal Matrix Tool (SMT). The inputs in SMBO are BO1 to BO10 and they, as well as the whole function block, can be tag-named. The name tags will appear in SMT as information which signals shall be connected between physical IO and the SMBO.

4.10.2

4.10.3

Function block
SMBO BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 ^BO1 ^BO2 ^BO3 ^BO4 ^BO5 ^BO6 ^BO7 ^BO8 ^BO9 ^BO10 IEC05000439-2-en.vsd
IEC05000439 V2 EN

Figure 38:

SMBO function block

4.10.4

Input and output signals


Table 41:
Name BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10

SMBO Input signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 1 1 1 1 1 1 1 1 1 1 Description Signal name for BO1 in Signal Matrix Tool Signal name for BO2 in Signal Matrix Tool Signal name for BO3 in Signal Matrix Tool Signal name for BO4 in Signal Matrix Tool Signal name for BO5 in Signal Matrix Tool Signal name for BO6 in Signal Matrix Tool Signal name for BO7 in Signal Matrix Tool Signal name for BO8 in Signal Matrix Tool Signal name for BO9 in Signal Matrix Tool Signal name for BO10 in Signal Matrix Tool

4.11

Signal matrix for mA inputs SMMI

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The Signal matrix for mA inputs (SMMI) function is used within the Application Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get information about how milliamp (mA) inputs are brought in for one IED configuration.

4.11.2

Principle of operation
The Signal matrix for mA inputs (SMMI) function, see figure 39, receives its inputs from the real (hardware) mA inputs via the Signal Matrix Tool (SMT), and makes them available to the rest of the configuration via its analog outputs, named AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags will be represented in SMT. The outputs on SMMI are normally connected to the IEC61850 generic communication I/O functions (MVGGIO) function for further use of the mA signals.

4.11.3

Function block
SMMI ^VIN1 ^VIN2 ^VIN3 ^VIN4 ^VIN5 ^VIN6 AI1 AI2 AI3 AI4 AI5 AI6 IEC05000440-2-en.vsd
IEC05000440 V2 EN

Figure 39:

SMMI function block

4.11.4

Input and output signals


Table 42:
Name VIn1 VIn2 VIn3 VIn4 VIn5 VIn6

SMMI Input signals


Type REAL REAL REAL REAL REAL REAL Default 0 0 0 0 0 0 Description SMT connected milliampere input SMT connected milliampere input SMT connected milliampere input SMT connected milliampere input SMT connected milliampere input SMT connected milliampere input

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Table 43:
Name AI1 AI2 AI3 AI4 AI5 AI6

SMMI Output signals


Type REAL REAL REAL REAL REAL REAL Description Analog milliampere input 1 Analog milliampere input 2 Analog milliampere input 3 Analog milliampere input 4 Analog milliampere input 5 Analog milliampere input 6

4.12
4.12.1

Signal matrix for analog inputs SMAI


Introduction
Signal matrix for analog inputs function SMAI (or the pre-processing function) is used within PCM600 in direct relation with the Signal Matrix tool or the Application Configuration tool. Signal Matrix tool represents the way analog inputs are brought in for one IED configuration.

4.12.2

Principle of operation
Every Signal matrix for analog inputs function (SMAI) can receive four analog signals (three phases and one neutral value), either voltage or current, see figure 41 and figure 42. SMAI outputs give information about every aspect of the 3ph analog signals acquired (phase angle, RMS value, frequency and frequency derivates etc. 244 values in total). The BLOCK input will reset all outputs to 0. The output signal AI1 to AI4 are direct output of the, in SMT, connected input to GRPxL1, GRPxL2, GRPxL3 and GRPxN, x=1-12. AIN is always the neutral current, calculated residual sum or the signal connected to GRPxN. Note that function block will always calculate the residual sum of current/voltage if the input is not connected in SMT. Applications with a few exceptions shall always be connected to AI3P.

4.12.3

Frequency values
The frequency functions includes a functionality based on level of positive sequence voltage, IntBlockLevel, to validate if the frequency measurement is valid or not. If positive sequence voltage is lower than IntBlockLevel the function is blocked. IntBlockLevel, is set in % of UBase/3 If SMAI setting ConnectionType is Ph-Ph at least two of the inputs GRPxL1, GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence voltage. If SMAI setting ConnectionType is Ph-N, all three inputs GRPxL1,
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GRPxL2 and GRPxL3 must be connected in order to calculate positive sequence voltage. If only one phase-phase voltage is available and SMAI setting ConnectionType is Ph-Ph the user is advised to connect two (not three) of the inputs GRPxL1, GRPxL2 and GRPxL3 to the same voltage input as shown in figure 40 to make SMAI calculating a positive sequence voltage (that is input voltage/3).

IEC10000060-1-en.vsd
IEC10000060 V1 EN

Figure 40:

Connection example

The above described scenario does not work if SMAI setting ConnectionType is Ph-N. If only one phase-earth voltage is available, the same type of connection can be used but the SMAI ConnectionType setting must still be Ph-Ph and this has to be accounted for when setting IntBlockLevel. If SMAI setting ConnectionType is Ph-N and the same voltage is connected to all three SMAI inputs, the positive sequence voltage will be zero and the frequency functions will not work properly.

The outputs from the above configured SMAI block shall only be used for Overfrequency protection (SAPTOF), Underfrequency protection (SAPTUF) and Rate-of-change frequency protection (SAPFRC) due to that all other information except frequency and positive sequence voltage might be wrongly calculated.

4.12.4

Function block
SMAI1 BLOCK DFTSPFC ^GRP1L1 ^GRP1L2 ^GRP1L3 ^GRP1N TYPE SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN IEC05000705-2-en.vsd
IEC05000705 V2 EN

Figure 41:

SMAI1 function block

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SMAI2 BLOCK ^GRP2L1 ^GRP2L2 ^GRP2L3 ^GRP2N TYPE AI3P AI1 AI2 AI3 AI4 AIN IEC07000130-2-en.vsd
IEC07000130 V2 EN

Figure 42:

SMAI2 function block

4.12.5

Input and output signals


Table 44:
Name BLOCK DFTSPFC GRP1L1 GRP1L2 GRP1L3 GRP1N

SMAI1 Input signals


Type BOOLEAN REAL STRING STRING STRING STRING Default 0 20.0 Description Block group 1 Number of samples per fundamental cycle used for DFT calculation Sample input to be used for group 1 phase L1 calculations Sample input to be used for group 1 phase L2 calculations Sample input to be used for group 1 phase L3 calculations Sample input to be used for group 1 residual calculations

Table 45:
Name SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN

SMAI1 Output signals


Type REAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Description Number of samples per fundamental cycle from internal DFT reference function Group 1 analog input 3-phase group Group 1 analog input 1 Group 1 analog input 2 Group 1 analog input 3 Group 1 analog input 4 Group 1 analog input residual for disturbance recorder

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Table 46:
Name BLOCK GRP2L1 GRP2L2 GRP2L3 GRP2N

SMAI2 Input signals


Type BOOLEAN STRING STRING STRING STRING Default 0 Description Block group 2 Sample input to be used for group 2 phase L1 calculations Sample input to be used for group 2 phase L2 calculations Sample input to be used for group 2 phase L3 calculations Sample input to be used for group 2 residual calculations

Table 47:
Name AI3P AI1 AI2 AI3 AI4 AIN

SMAI2 Output signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Description Group 2 analog input 3-phase group Group 2 analog input 1 Group 2 analog input 2 Group 2 analog input 3 Group 2 analog input 4 Group 2 analog input residual for disturbance recorder

4.12.6

Setting parameters
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available. Internal nominal frequency DFT reference is then the reference.

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Table 48:
Name DFTRefExtOut

SMAI1 Non group settings (basic)


Values (Range) InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref Ph-N Ph-Ph 1-2 Unit Step Default InternalDFTRef Description DFT reference for external output

DFTReference

InternalDFTRef

DFT reference

ConnectionType TYPE

Ch

Ph-N 1

Input connection type 1=Voltage, 2=Current

Table 49:
Name Negation

SMAI1 Non group settings (advanced)


Values (Range) Off NegateN Negate3Ph Negate3Ph+N 5 - 200 0.05 - 2000.00 Unit Step Default Off Description Negation

MinValFreqMeas UBase

% kV

1 0.05

10 400.00

Limit for frequency calculation in % of UBase Base voltage

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Table 50:
Name DFTReference

SMAI2 Non group settings (basic)


Values (Range) InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref Ph-N Ph-Ph 1-2 Unit Step Default InternalDFTRef Description DFT reference

ConnectionType TYPE

Ch

Ph-N 1

Input connection type 1=Voltage, 2=Current

Table 51:
Name Negation

SMAI2 Non group settings (advanced)


Values (Range) Off NegateN Negate3Ph Negate3Ph+N 5 - 200 0.05 - 2000.00 Unit Step Default Off Description Negation

MinValFreqMeas UBase

% kV

1 0.05

10 400.00

Limit for frequency calculation in % of UBase Base voltage

4.13
4.13.1

Summation block 3 phase 3PHSUM


Introduction
Summation block 3 phase function 3PHSUM is used to get the sum of two sets of three-phase analog signals (of the same type) for those IED functions that might need it.

4.13.2

Principle of operation
Summation block 3 phase 3PHSUM receives the three-phase signals from Signal matrix for analog inputs function (SMAI). In the same way, the BLOCK input will reset all the outputs of the function to 0.

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3PHSUM BLOCK DFTSPFC G1AI3P* G2AI3P* AI3P AI1 AI2 AI3 AI4 IEC05000441-2-en.vsd
IEC05000441 V2 EN

4.13.3

Figure 43:

3PHSUM function block

4.13.4

Input and output signals


Table 52:
Name BLOCK DFTSPFC G1AI3P G2AI3P

3PHSUM Input signals


Type BOOLEAN REAL GROUP SIGNAL GROUP SIGNAL Default 0 0 Description Block Number of samples per fundamental cycle used for DFT calculation Group 1 analog input 3-phase group Group 2 analog input 3-phase group

Table 53:
Name AI3P AI1 AI2 AI3 AI4

3PHSUM Output signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Description Group analog input 3-phase group Group 1 analog input Group 2 analog input Group 3 analog input Group 4 analog input

4.13.5

Setting parameters
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available.

Table 54:
Name SummationType

3PHSUM Non group settings (basic)


Values (Range) Group1+Group2 Group1-Group2 Group2-Group1 -(Group1+Group2) InternalDFTRef AdDFTRefCh1 External DFT ref Unit Step Default Group1+Group2 Description Summation type

DFTReference

InternalDFTRef

DFT reference

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Table 55:
Name FreqMeasMinVal UBase

3PHSUM Non group settings (advanced)


Values (Range) 5 - 200 0.05 - 2000.00 Unit % kV Step 1 0.05 Default 10 400.00 Description Amplitude limit for frequency calculation in % of Ubase Base voltage

4.14
4.14.1

Authority status ATHSTAT


Introduction
Authority status (ATHSTAT) function is an indication function block for user log on activity.

4.14.2

Principle of operation
Authority status (ATHSTAT) function informs about two events related to the IED and the user authorization: the fact that at least one user has tried to log on wrongly into the IED and it was blocked (the output USRBLKED) the fact that at least one user is logged on (the output LOGGEDON)

Whenever one of the two events occurs, the corresponding output (USRBLKED or LOGGEDON) is activated. The output can for example, be connected on Event (EVENT) function block for LON/SPA.The signals are also available on IEC 61850 station bus.

4.14.3

Function block
ATHSTAT USRBLKED LOGGEDON IEC06000503-2-en.vsd
IEC06000503 V2 EN

Figure 44:

ATHSTAT function block

4.14.4

Output signals
Table 56:
Name USRBLKED LOGGEDON

ATHSTAT Output signals


Type BOOLEAN BOOLEAN Description At least one user is blocked by invalid password At least one user is logged on

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The function does not have any parameters available in the local HMI or PCM600.

4.14.5

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Section 5 Differential protection

Section 5

Differential protection

About this chapter


This chapter describes the measuring principles, functions and parameters used in differential protection.

5.1

Line differential protection


Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device number

Line differential protection, 3 CT sets, 2-3 line ends

L3CPDIF

3Id/I>
SYMBOL-HH V1 EN

87L

Line differential protection, 6 CT sets, 3-5 line ends

L6CPDIF

3Id/I>
SYMBOL-HH V1 EN

87L

Line differential protection 3 CT sets, with in-zone transformers, 2-3 line ends

LT3CPDIF

3Id/I>
SYMBOL-HH V1 EN

87LT

Line differential protection 6 CT sets, with in-zone transformers, 3-5 line ends

LT6CPDIF

3Id/I>
SYMBOL-HH V1 EN

87LT

Line differential logic

LDLPDIF

87L

5.1.1
5.1.1.1

Introduction
Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF
Line differential protection applies the Kirchhoff's law and compares the currents entering and leaving the protected multi-terminal circuit, consisting of overhead
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power lines, power transformers and cables. It offers phase-segregated true current differential protection with high sensitivity and provides phase selection information for single-pole tripping. The three terminal version is used for conventional two-terminal lines with or without 1 1/2 circuit breaker arrangement in one end, as well as three terminal lines with single breaker arrangements at all terminals.
Protected zone

IED

Comm. Channel

IED

IEC05000039_2_en.vsd
IEC05000039 V2 EN

Figure 45:

Example of application on a conventional two-terminal line

The six terminal versions are used for conventional two-terminal lines with 1 1/2 circuit breaker arrangements in both ends, as well as multi terminal lines with up to five terminals.
Protected zone

IED

Comm. Channel Comm. Channel


IED

IED

Comm. Channel

IEC05000040_2_en.vsd
IEC05000040 V2 EN

Figure 46:

Example of application on a three-terminal line with 1 1/2 breaker arrangements

The current differential algorithm provides high sensitivity for internal faults, at the same time as it has excellent stability for external faults. Current samples from all CTs are exchanged between the IEDs in the line ends (master-master mode) or sent to one IED (master-slave mode) for evaluation. A restrained dual biased slope evaluation is made where the bias current is the highest phase current in any line end giving a secure through fault stability even with heavily saturated CTs. In addition to the restrained evaluation, an unrestrained high differential current setting can be used for fast tripping of internal faults with very high currents. A special feature with this function is that applications with small power transformers (rated current less than 50 % of the differential current setting) connected as line taps (that is, as "shunt" power transformers), without measurements of currents in the tap, can be handled. The normal load current is
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here considered to be negligible, and special measures need only to be taken in the event of a short circuit on the LV side of the transformer. In this application, the tripping of the differential protection can be time delayed for low differential currents to achieve coordination with down stream over current IEDs. A line charging current compensation provides increased sensitivity of Line differential protection.

5.1.1.2

Line differential protection 3 or 6 CT sets, with in-zone transformers LT3CPDIF, LT6CPDIF


Two two-winding power transformers, or one three-winding power transformer, can be included in the line differential protection zone. Both two- and threewinding transformers are correctly represented with vector group compensations made in the algorithm. The function includes 2nd and 5th harmonic restraint and zerosequence current elimination.
Protected zone

IED

Comm. Channel

IED

Comm. Channel
IED

Comm. Channel

IEC05000042_2_en.vsd
IEC05000042 V2 EN

Figure 47:

Example of application on a three-terminal line with a power transformer in the protection zone

5.1.1.3

Analog signal transfer for line differential protection


The line differential communication can be arranged as a master-master system or a master-slave system alternatively. In the former, current samples are exchanged between all IEDs, and an evaluation is made in each IED. This means that a 64 kbit/ s communication channel is needed between every IED included in the same line differential protection zone. In the latter, current samples are sent from all slave IEDs to one master IED where the evaluation is made, and trip signals are sent to the remote ends when needed. In this system, a 64 kbit/s communication channel is only needed between the master, and each one of the slave IEDs.

109 Technical reference manual

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1MRK505183-UEN C

Protected zone

IED

IED

Comm. Channels
IED IED IED IEC0500043_2_en.vsd
IEC05000043 V2 EN

Figure 48:

Five terminal lines with master-master system


Protected zone

RED 670

RED 670

Comm. Channels
RED 670 RED 670 RED 670 en05000044.vsd
IEC05000044 V1 EN

Figure 49:

Five terminal line with master-slave system

Current samples from IEDs located geographically apart from each other, must be time coordinated so that the current differential algorithm can be executed correctly. In IED, it is possible to make this coordination in two different ways. The echo method of time synchronizing is normally used whereas for applications where transmit and receive times can differ, the optional built in GPS receivers can be used. The communication link is continuously monitored, and an automatic switchover to a standby link is possible after a preset time.

5.1.2
5.1.2.1

Principle of operation
Algorithm and logic
In Line differential protection function, measured current values from local and remote line ends are evaluated in order to distinguish between internal or external faults, or undisturbed conditions. The local currents are fed to the IED via the Analog Input Modules and thereafter they pass the Analog to Digital Converter, as shown in figure 50.

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Local end

Remote end

Remote end IED

LDCM

Local end IED

Analog Input Module

A/D Converter

Current samples from local end Current samples from remote end Pre-processing Block

LDCM

Line Diffferential Function CH1IL1RE CH1IL1IM CH1IL2RE CH1IL2IM Currents from all ends as phasors CH1IL1SM CH1IL2SM CH1IL3SM CH2IL1SM Curr. samples from all ends Calculation of instantaneous differential currents (3x) [samples] Harmonic analysis ( 2nd and 5th) Calculation of fundamental frequency differential currents (3x) & bias current [magnitude] Differential and bias currents applied to operate / bias -, and unrestrained characteristics Trip by unrestrained differential protection 1 Start L1 Start L2 Start L3 St L1 low sens St L2 low sens St L3 low sens nd 2 h. block Output logic: - 2nd - 5th harmonic block harmonic block TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA TRIP

Magnitudes of differential currents Bias current

Cross block logic

- Enhanced trip for internal faults - Decreased sensitivity for external faults Conditional trip for simultaneous external and internal faults

CH1INSRE CH1INSIM CH1INSRE CH1INSIM Neg. seq. currents from all ends as phasors Calculation of negativesequence differential current (1x)

BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 INTFAULT EXTFAULT

Two to six contributions to neg. seq. differential current as phasors

High sensitive internal/external fault discriminator

Internal fault External fault -

Conditional extra time delay for trip signals

IEC05000294_2_en.vsd
IEC05000294 V2 EN

Figure 50:

The principle for the line differential protection

The remote currents are received to the IED as samples via a communication link. When entering the IED, they are processed in the Line Differential Communication Module (LDCM) where they are time coordinated with the local current samples, and interpolated in order to be comparable with the local samples.
111 Technical reference manual

Information

Instantaneous differential currents (samples)

5th h. block

START STL1 STL2 STL3

Trip commands

Section 5 Differential protection

1MRK505183-UEN C

In the Pre-Processing Block, the real and imaginary parts of the fundamental frequency phase currents and negative sequence currents are derived. Together with the current samples, they are then forwarded to the differential function block where three different analyses are carried out. The first analysis is the classical differential and bias current evaluation with the characteristic as seen in figure 51. Line differential protection is phase segregated where the differential current is the vectorial sum of all measured currents taken separately for each phase. The bias current, on the other hand, is considered as the greatest phase current in any line end and it is common for all three phases. The two slopes (SlopeSection1, SlopeSection2) and breakpoints (EndSection1, EndSection2) can be set in PCM600 or via the local HMI. Current values plotted above the characteristic formed by IdMin and the dual slope will give a start in that phase. The level IdMinHigh is a setting value that is used to temporarily decrease the sensitivity in situations when: the line is energized when a fault is classified as external when a tap transformer is switched in

There is also an unrestrained high differential current setting that can be used for fast tripping of internal faults with very high currents.

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Operate current [ in pu of IBase] 5

Operate unconditionally UnrestrainedLimit

3 A 2 Section 1

Operate conditionally

IdMinHigh B

Section 2

Section 3 SlopeSection3

1 IdMin SlopeSection2 0 0 EndSection1 EndSection2 1 2 3

Restrain 4 5

Restrain current [ in pu of IBase]

en05000300.vsd
IEC05000300 V1 EN

Figure 51:
where:

Description of the restrained-, and the unrestrained operate characteristics

slope = D Ioperate 100% D Irestrain


EQUATION1246 V1 EN

and where the restrained characteristic is defined by the settings:

1. 2. 3. 4. 5.

IdMin EndSection1 EndSection2 SlopeSection2 SlopeSection3

The second analysis is the 2nd and 5th harmonic analysis on the differential current. Occurrence of these harmonics over a level that is set separately for each one will block tripping action from the biased slope evaluation.

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The third analysis is the negative sequence current analysis. Effectively this is a fault discriminator that distinguishes between internal and external faults. It works such that the phase angle of the negative sequence current from the local end is compared with the phase angle of the sum of the negative sequence currents from the remote ends. The characteristic for this fault discriminator is shown in figure 52, where the directional characteristic is defined by the two setting parameters IminNegSeq and NegSeqRoa.
90 deg 120 deg If one or the other of currents is too low, then no measurement is done, and 120 degrees is mapped Internal/external fault boundary

NegSeqROA (Relay Operate Angle)

180 deg

0 deg

IMinNegSeq

External fault region

Internal fault region

270 deg
en05000188.vsd
IEC05000188 V1 EN

Figure 52:

Operating characteristic of the internal/external fault discriminator

Reference direction of currents is considered to be towards the line. Thus, when both currents to be compared have this direction, the phase difference between them will ideally be zero. In the opposite case, when one current is entering and the other is leaving the protected object, the phase difference will ideally be 180 degree. In case either the local or the sum of the remote negative sequence currents or both is below the set level, the fault discriminator will not make any fault classification and the value 120 degree is set. This value is then an indication that negative sequence directional comparison has not been possible to make, and it does not mean classification as external fault. When a fault is classified as internal by the negative sequence fault discriminator, a trip is issued under the condition that the dual slope restrained function has started , while a classification as external fault results in an increase of the restrained characteristic trip values IdMinHigh.

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With reference to figure 50, the outputs from the three analysis blocks are fed to the output logic. Figure 53 shows a simplified block diagram of this output logic where only trip commands and no alarm signals are shown for simplicity.
Trip unrestrained L1 Trip unrestrained L2 Trip unrestrained L3 Start L1 Start L2 Start L3 AND OR AND St L1 IdMinHigh St L2 IdMinHigh St L3 IdMinHigh OR OR AND OR OR TRL3 OR AND OR OR AND TRL2 OR TRL1 OR TRIP

AND

Internal fault NegSeqDiffEn

AND tIdMinHigh t OR

External fault Line energizing

AND

Diff curr L1 2nd harm Diff curr L2 2nd harm Diff curr L3 2nd harm Diff curr L1 5th harm Diff curr L2 5 harm Diff curr L3 5th harm
th

OR OR

AND AND AND

OR

OR OR

OR

OR CrossBlockEn

AND

IEC05000295-2-en.vsd
IEC05000295 V2 EN

Figure 53:

Simplified block diagram

Remembering that current values plotted above the characteristic formed by IdMin and the dual slope in figure 52 are said to give a start, the output logic can be summarized as follows: A start in one phase, gives a trip under the condition that the content of 2nd and 5th harmonic is below the set level for these harmonics. Otherwise it is blocked
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as long as the harmonic is above the set level. However, when a line is energized the current setting value IdMinHigh is used. Effectively this means that the line A-B-C in figure 51 forms the characteristic. Current values above the unrestrained limit gives a trip irrespective of any presence of harmonics. Classification of a fault as internal by the negative sequence fault discriminator, will give a trip under the condition that a start has occurred in that phase. This means that any harmonic blocking is then overridden. However, occurrence of harmonics at the same time as the differential current is below the level IdMinHigh, will block a trip even though the fault is classified as internal. This latter condition is to prevent unwanted trips when energizing a line tap transformer. Classification of a fault as external by the negative sequence fault discriminator will cause IdMinHigh to be used as the lower limit for the restrained characteristic according to figure 51. Cross blocking will also be activated in this situation.

Compensation for charging currents can be selected active or not by setting ChargCurEnableYes or No. The compensation works such that the fundamental frequency differential current that is measured under steady state undisturbed conditions, is identified and then subtracted making the resulting differential current zero (or close to zero). This action is made separately for each phase. The magnitude of the subtracted pre-fault currents in Amperes can be read at any time as the service value ICHARGE. Values of the pre-fault differential currents are not updated under disturbance conditions. The updating process is resumed 50 ms after normal conditions have been restored. Normal conditions are only considered if there are no start signals, neither internal nor external fault is declared, the power system is symmetrical and so on. It is thus obvious that the change in charging current that the fault causes by decreasing the system voltage is not considered in the algorithm, a matter that is further discussed in the application manual. Note that all small pre-fault differential currents are subtracted, no matter what their origin. Besides the true charging currents, the following currents are eliminated: Small differential currents due to small errors (inequalities) of current transformers. Small differential currents because of off-nominal load tap changer positions when a power transformer is included in the protected zone. Load currents of tap loads included in the protected zone.

5.1.2.2

Time synchronization
In a numerical line differential protection, current samples from protections located geographically apart from each other, must be time coordinated so that the currents

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from the different line ends can be compared without introducing irrelevant errors. Accuracy requirements on this time coordination are extremely high. As an example, an inaccuracy of 0.1 ms in a 50 Hz system gives a maximum amplitude error approximately around 3% whilst an inaccuracy of 1 ms gives a maximum amplitude error of approximately 31%. The corresponding figures for a 60 Hz system are 4% and 38% respectively. In Line differential protection, the time coordination is made with the so-called echo method, which can be complemented with GPS synchronization as an option. Each IED has an accurate local clock with a very small time drift. This clock makes time tagging of telegrams, and the echo method is then used to find out the time difference between the clocks in two ends of a power line. Referring to figure 54, it works such that the transmission time to send a message from station B to station A (T1 T2) and receive a message from A to B (T3 T4) is measured. The time instances T2 and T3 are taken with the local clock reference of station A, and the time instances T1 and T4 are taken with the local clock reference of station B.

A B
IEC05000293 V1 EN

T2

T3

T1

T4
en05000293.vsd

Figure 54:

Measuring time differences

Calculation of the delay time one-way Td and the time difference t between the clocks in A and B is then possible to do with equation 2 and equation 3, which are only valid under the condition that the send and receive times are equal.
Td = (T2 - T1 ) + (T4 - T3 ) 2
(Equation 2)

EQUATION1358 V1 EN

Dt =

(T1 + T4 ) - (T2 + T3 ) 2
(Equation 3)

EQUATION1359 V1 EN

t is calculated every time a telegram is received, and the time difference is then used to adjust and interpolate the current measurements from the remote end before the current differential algorithm is executed.

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The echo method without GPS, can be used in telecommunications transmission networks with varying signal propagation delay as long as there is delay symmetry, that is, the send and receive delays are equal. The delay variation can depend on the signal going different routes in the network from time to other. When the delay symmetry is lost, the expression for t given above is no longer valid, and GPS synchronization of the local IED clocks must be used. Including the optional GPS, means that there will be one GPS receiver module in each IED, synchronizing its local IED clock. As GPS synchronization is very accurate, in the order of 1 s, all IEDs in the same line differential scheme will have the same clock reference. It is then possible to detect asymmetric transmission time delay and compensate for it. When the IED is equipped with GPS, this hardware is integrated in the IED. Besides the GPS receiver itself, it also consists of filters and regulators for post processing of the GPS time synch pulse, which is necessary to achieve a reliable GPS synchronization. Especially short interruptions and spurious out of synch GPS signals are handled securely in this way. When GPS synchronization is used, an interruption in the GPS signal leads to freewheeling during 8 seconds that is, during this time the synchronization benefits from the stability in the local clocks. If the interruption persists more than 8 seconds, either fall back to the echo synchronization method or blocking of Line differential protection function is made, as selected through setting parameter GPSSyncErr. For a description of the time synchronization function, refer to section "Time synchronization".

5.1.2.3

Analog signal communication for line differential protection Communication principle


For a two-terminal line, the current from the local CT needs to be communicated over a 64 kbit/s channel to the remote line end, and the remote end current communicated back on the same channel. If there is, for example, a three terminal line another 64 kbit/s channel will be needed to exchange the same local current with the third line end current. In one-and-a-half breaker arrangements, there are two local currents meaning two 64 kbit/s channels to each remote substation. Alternatively, it is possible to add together the two local currents before sending them and in that way reduce the number of communication channels needed. This is achieved by selecting proper setting for parameter TransmCurr (CT-SUM, CT-DIFF1 or CT-DIFF2). However, information about bias currents is reduced if the alternative option is followed. For further information and discussions on this matter, refer to the Application manual. The communication can be arranged as a master-master system or a master-slave system alternatively. Figure 55 shows a master-master system for a five-terminal line. Here current samples are exchanged between all IEDs, and an evaluation is

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Section 5 Differential protection

made in each IED. This means that a 64 kbit/s communication channel is needed between every IED included in the same line differential protection zone.
Protected zone

IED Comm. Channels

IED

IED

IED

IED
IEC05000292_2_en.vsd

IEC05000292 V2 EN

Figure 55:

5terminal line with master-master system

In the master-slave system, current samples are sent from all slave IEDs to one master IED where the evaluation is made and trip signals are sent to the remote ends when needed. In this system, a 64 kbit/s communication channel is only needed between the master, and each one of the slave IEDs, as shown in figure 56.
Protected zone

IED

IED

Comm. Channels

IED

IED

IED
IEC05000291_2_en.vsd

IEC05000291 V2 EN

Figure 56:

5terminal line with master-slave system

The master-slave configuration is achieved by setting parameter Operation in the slaves to Off for Line differential protection function, and setting parameter ChannelMode to On for the LDCMs in the slaves.

Test mode

Line differential protection function in one IED can be set in test mode. This can block the trip outputs on that IED, and set the remote IEDs in a remote test mode, so that injected currents can be echoed back phase shifted and with a settable amplitude. The trip outputs in the remote IEDs can also be blocked automatically. For further information, refer to the installation and commissioning manual.

Communication of current sampled values

The currents are sampled twenty times per power system cycle in the protection terminals, but the communication exchange is made only once every 5 ms. This
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means that at in each telegram sent, 5 consecutive current samples in a 50 Hz system and 6 consecutive current samples in a 60 Hz system (three phases each sampling instant) are included. Figure 57 shows the principle.
Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent Current sample telegram sent

10

15

20

25

30

35

Time (ms)
en05000290.vsd

IEC05000290 V1 EN

Figure 57:
where: x

Communication of current sampled values.

is the current sampling moment

With redundant communication channels, as shown in figure 58, both channels are in operation continuously but with one of them favoured as a primary channel.

Redundant communication channels

Telecom. Network
LD CM LD CM LD CM LD CM

Telecom. Network

IEC05000289 V1 EN

Primary channel Secondary redundant channel

en05000289.vsd

Figure 58:

Direct fibre optical connection between two IEDs with LDOM over longer distances.

If communication is lost on the primary channel, switchover to the secondary channel is made after a settable time delay RedChSwTime. Return of the primary channel will cause a switchback after another settable time delay RedChRturnTime. For a three-, four- or five-terminals line in a master-master configuration, a loss of one communication channel will not cause the line differential protection to be
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Section 5 Differential protection

unserviceable. Instead it will automatically revert to a partial master-slave mode with the two IEDs that have an unserviceable communication link between them, will serve as slaves. For more details about the remote communication see section "Remote communication" and the application manual.

5.1.2.4

Open CT detection feature


Line differential protection has a built-in, advanced open CT detection feature. The open CT circuit condition creates unexpected operations for Line differential protection under the normal load conditions. It is also possible to damage secondary equipment due to high voltage produced from open CT circuit outputs. Therefore, it is always a requirement from security and reliability points of view to have open CT detection function to block Line differential protection function in case of open CT conditions and at the same time, produce the alarm signal to the operational personal to make quick remedy actions to correct the open CT condition. The built-in open CT feature can be enabled or disabled by a setting parameter OpenCTEnable (Off/On). When enabled, this feature prevents mal-operation when a loaded main CT connected to Line differential protection is by mistake open circuited on the secondary side. Note that this feature can only detect interruption of one CT phase current at the time. If two or even all three-phase currents of one set of CT are accidentally interrupted at the same time this feature cannot operate and Line differential protection generates trip signal, if the false differential current is sufficiently high. To ensure blocking of the differential protection for open CT condition this algorithm must operate within 10 ms in order to be able to prevent unwanted operation of Line differential protection under all loading conditions. The principle applied to detect an open CT is a simple pattern recognition method, similar to the waveform check which has been with advantage used by the Power Transformer Differential Protection in order to detect the magnetizing inrush condition. The open CT detection principle is based on the fact, that for an open CT, the current in the phase with the open CT suddenly drops (at least theoretically) to zero (that is, as seen by the protection), while the currents of the other two phases continue as before. The open CT function is supposed to detect an open CT under normal conditions, that is, with the protected multi-terminal circuit under normal load. If the load currents are very low or zero, the open CT condition cannot be detected. The open CT algorithm only detects an open CT if the load on the power transformer is from 10% to 110% of the rated load. Outside this range an open CT condition is not even looked for. The search for an open CT starts after 60 seconds (50 seconds in 60 Hz systems) since the bias current enters the 10110% range. The Open CT detection feature can also be explicitly deactivated by setting: OpenCTEnable = 0 (Off). If an open CT is detected and the output OPENCT set to 1, then all the differential functions are blocked, except of the unrestrained (instantaneous) differential. An
121

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alarm signal is also produced after a settable delay (tOCTAlarmDelay) to report to operational personal for quick remedy actions once the open CT is detected. When the open CT condition is removed (that is, the previously open CT reconnected), the functions remain blocked for a specified interval of time, which is also a setting (tOCTResetDelay). The task of this measure is to prevent an eventual maloperation after the reconnection of the previously open CT secondary circuit. The open CT feature works only during normal loading condition. Thus, the open CT feature must be automatically disabled for all external faults, big overloads and inrush conditions. The open CT algorithm provides detailed information about the location of the defective CT secondary circuit. The algorithm clearly indicates IED side, CT input and phase in which open CT condition has been detected. These indications are provided via the following outputs from Line differential protection function: 1. 2. 3. 4. Output OPENCT provides instant information to indicate that open CT circuit has been detected Output OPENCTAL provides time delayed alarm that the open CT circuit has been detected. Time delay is defined by setting parameter tOCTAlarmDelay. Integer output OPENCTIN provides information on the local HMI regarding which open CT circuit has been detected (1=CT input No 1; 2=CT input No 2) Integer output OPENCTPH provides information on the local HMI regarding in which phase open CT circuit has been detected (1=Phase L1; 2= Phase L2; 3= Phase L3)

Once the open CT condition is declared, the algorithm stops to search for further open CT circuits. It waits until the first open CT circuit has been corrected. Note that once the open CT condition has been detected, it can be automatically reset within the differential function. It is not possible to externally reset open CT condition. To reset the open CT circuit alarm automatically, the following conditions must be fulfilled: Bias current is for at least one minute smaller than 110% Open CT condition in defective CT circuit has been rectified (for example, current asymmetry disappears) Above two conditions are fulfilled for longer time than defined by the setting parameter tOCTResetDelay

After the reset, the open CT detection algorithm starts again to search for any other open CT circuit within the protected zone.

5.1.2.5

Binary signal transfer


There is space for eight binary signals integrated in the telegram of the line differential analog communication. For further information, refer to section "Binary signal transfer".

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Line differential coordination function LDLPDIF
Line differential coordination function (LDLPDIF) is a support function to Line differential protection functions L3CPDIF, L6CPDIF , LT3CPDIF and LT6CPDIF. The function gathers and coordinates local IED signals and the signals from remote IEDs between the Line differential protection functions and the LDCM communication module. The function acts as the interface to and from Line differential protection.

5.1.2.6

5.1.3

Function block
L3CPDIF I3P1* I3P2* I3P3* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000252-2-en.vsd
IEC06000252 V2 EN

Figure 59:

L3CPDIF function block

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L6CPDIF I3P1* I3P2* I3P3* I3P4* I3P5* I3P6* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000253-2-en.vsd
IEC06000253 V2 EN

Figure 60:

L6CPDIF function block

LT3CPDIF I3P1* I3P2* I3P3* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000254_2_en.vsd
IEC06000254 V2 EN

Figure 61:

LT3CPDIF function block

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LT6CPDIF I3P1* I3P2* I3P3* I3P4* I3P5* I3P6* TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 ALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG IEC06000255_2_en.vsd
IEC06000255 V2 EN

Figure 62:

LT6CPDIF function block


LDLPDIF

CTFAIL OUTSERV BLOCK

TRIP TRL1 TRL2 TRL3 TRLOCAL TRLOCL1 TRLOCL2 TRLOCL3 TRREMOTE DIFLBLKD IEC05000394-2-en.vsd

IEC05000394 V3 EN

Figure 63:

LDLPDIF function block

5.1.4

Input and output signals


Table 57:
Name I3P1 I3P2 I3P3

L3CPDIF Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default Description Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values

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Table 58:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 OPENCT ALARM OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG

L3CPDIF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL REAL REAL REAL REAL Description Common, main, trip output signal Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 Trip by restrained differential protection Trip by unrestrained differential protection Trip by enhanced restrained differential protection Common, main, start output signal Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common block signal, due to 2nd harmonic Block signal due to 2nd harmonic, phase L1 Block signal due to 2nd harmonic, phase L2 Block signal due to 2nd harmonic, phase L3 Common block signal, due to 5-th harmonic Block signal due to 5th harmonic, phase L1 Block signal due to 5th harmonic, phase L2 Block signal due to 5th harmonic, phase L3 An open CT was detected Alarm for sustained differential current Open CT Alarm output signal. Issued after a delay ... Instantaneous differential current, phase L1 Instantaneous differential current, phase L2 Instantaneous differential current, phase L3 Magnitude of fund. freq. differential current, phase L1 Magnitude of fund. freq. differential current, phase L2 Magnitude of fund. freq. differential current, phase L3 Magnitude of the bias current, common for L1, L2, L3 Magnitude of the negative sequence differential current

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Table 59:
Name I3P1 I3P2 I3P3 I3P4 I3P5 I3P6

L6CPDIF Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default Description Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values

Table 60:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 OPENCT ALARM OPENCTAL IDL1 IDL2

L6CPDIF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL Description Common, main, trip output signal Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 Trip by restrained differential protection Trip by unrestrained differential protection Trip by enhanced restrained differential protection Common, main, start output signal Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common block signal, due to 2nd harmonic Block signal due to 2nd harmonic, phase L1 Block signal due to 2nd harmonic, phase L2 Block signal due to 2nd harmonic, phase L3 Common block signal, due to 5-th harmonic Block signal due to 5th harmonic, phase L1 Block signal due to 5th harmonic, phase L2 Block signal due to 5th harmonic, phase L3 An open CT was detected Alarm for sustained differential current Open CT Alarm output signal. Issued after a delay ... Instantaneous differential current, phase L1 Instantaneous differential current, phase L2

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127 Technical reference manual

Section 5 Differential protection


Name IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG Type REAL REAL REAL REAL REAL REAL Description

1MRK505183-UEN C

Instantaneous differential current, phase L3 Magnitude of fund. freq. differential current, phase L1 Magnitude of fund. freq. differential current, phase L2 Magnitude of fund. freq. differential current, phase L3 Magnitude of the bias current, common for L1, L2, L3 Magnitude of the negative sequence differential current

Table 61:
Name I3P1 I3P2 I3P3

LT3CPDIF Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default Description Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values Three phase current grp1 samples and DFT values

Table 62:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2

LT3CPDIF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Common, main, trip output signal Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 Trip by restrained differential protection Trip by unrestrained differential protection Trip by enhanced restrained differential protection Common, main, start output signal Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common block signal, due to 2nd harmonic Block signal due to 2nd harmonic, phase L1 Block signal due to 2nd harmonic, phase L2 Block signal due to 2nd harmonic, phase L3 Common block signal, due to 5-th harmonic Block signal due to 5th harmonic, phase L1 Block signal due to 5th harmonic, phase L2

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128 Technical reference manual

1MRK505183-UEN C

Section 5 Differential protection


Name BLK5HL3 OPENCT ALARM OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL REAL REAL REAL REAL Description Block signal due to 5th harmonic, phase L3 An open CT was detected Alarm for sustained differential current Open CT Alarm output signal. Issued after a delay ... Instantaneous differential current, phase L1 Instantaneous differential current, phase L2 Instantaneous differential current, phase L3 Magnitude of fund. freq. differential current, phase L1 Magnitude of fund. freq. differential current, phase L2 Magnitude of fund. freq. differential current, phase L3 Magnitude of the bias current, common for L1, L2, L3 Magnitude of the negative sequence differential current

Table 63:
Name I3P1 I3P2 I3P3 I3P4 I3P5 I3P6

LT6CPDIF Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default Description Three phase current grp1 samples and DFT values Three phase current grp2 samples and DFT values Three phase current grp3 samples and DFT values Three phase current grp4 samples and DFT values Three phase current grp5 samples and DFT values Three phase current grp6 samples and DFT values

Table 64:
Name TRIP TRL1 TRL2 TRL3 TRIPRES TRIPUNRE TRIPENHA

LT6CPDIF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Common, main, trip output signal Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 Trip by restrained differential protection Trip by unrestrained differential protection Trip by enhanced restrained differential protection

Table continues on next page 129 Technical reference manual

Section 5 Differential protection


Name START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 OPENCT ALARM OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL REAL REAL REAL REAL Description

1MRK505183-UEN C

Common, main, start output signal Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common block signal, due to 2nd harmonic Block signal due to 2nd harmonic, phase L1 Block signal due to 2nd harmonic, phase L2 Block signal due to 2nd harmonic, phase L3 Common block signal, due to 5-th harmonic Block signal due to 5th harmonic, phase L1 Block signal due to 5th harmonic, phase L2 Block signal due to 5th harmonic, phase L3 An open CT was detected Alarm for sustained differential current Open CT Alarm output signal. Issued after a delay ... Instantaneous differential current, phase L1 Instantaneous differential current, phase L2 Instantaneous differential current, phase L3 Magnitude of fund. freq. differential current, phase L1 Magnitude of fund. freq. differential current, phase L2 Magnitude of fund. freq. differential current, phase L3 Magnitude of the bias current, common for L1, L2, L3 Magnitude of the negative sequence differential current

Table 65:
Name CTFAIL OUTSERV BLOCK

LDLPDIF Input signals


Type BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description CT failure indication from local CT supervision Input for indicating that the terminal is out of service Block of function

Table 66:
Name TRIP TRL1 TRL2

LDLPDIF Output signals


Type BOOLEAN BOOLEAN BOOLEAN Description General trip from differential protection system Trip signal from phase L1 Trip signal from phase L2

Table continues on next page 130 Technical reference manual

1MRK505183-UEN C

Section 5 Differential protection


Name TRL3 TRLOCAL TRLOCL1 TRLOCL2 TRLOCL3 TRREMOTE DIFLBLKD Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip signal from phase L3 Trip from local differential function Trip from local differential function in phase L1 Trip from local differential function in phase L2 Trip from local differential function in phase L3 Trip from remote differential function Local line differential function blocked

5.1.5
Table 67:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv

Setting parameters
L3CPDIF Group settings (basic)
Values (Range) Off On 0.20 - 2.00 0.20 - 10.00 0.000 - 60.000 1.00 - 50.00 Off On 30.0 - 120.0 0.01 - 0.20 No Yes Off On Off On 0.20 - 5.00 0.000 - 6.000 0.001 - 6.000 Unit IB IB s IB Deg IB IB s s Step 0.01 0.01 0.001 0.01 1.0 0.01 0.01 0.001 0.001 Default Off 0.30 0.80 1.000 10.00 On 60.0 0.04 No Off Off 1.00 0.000 0.010 Description Operation Off / On Oper - restr charact., section 1 sensitivity, multiple IBase Initial lower sensitivity, as multiple of IBase Time interval of initial lower sensitivity, in sec Unrestrained differential current limit, multiple of IBase Off/On selection for internal / external fault discriminator Internal/external fault discriminator Operate Angle, degrees Min. value of neg. seq. curr. as multiple of IBase Off/On selection of the cross -block logic Off/On selection for compensation of charging currents Off/On selection for delayed diff. trip command Below limit, extra delay can be applied, multiple of IBase Definite time additional delay in seconds Inverse Delay Minimum Time. In seconds

Table continues on next page

131 Technical reference manual

Section 5 Differential protection


Name CurveType Values (Range) ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.05 - 1.10 0.05 - 1.00 0.000 - 60.000 Unit Step Default IEC Def. Time Description

1MRK505183-UEN C

19 curve types. Example: 15 for definite time delay.

k IdiffAlarm tAlarmdelay

IB s

0.01 0.01 0.001

1.00 0.15 10.000

Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s

Table 68:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 I2/I1Ratio I5/I1Ratio p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay

L3CPDIF Group settings (advanced)


Values (Range) 0.20 - 1.50 1.00 - 10.00 10.0 - 50.0 30.0 - 100.0 5.0 - 100.0 5.0 - 100.0 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 Off On 0.100 - 10.000 0.100 - 10.000 Unit IB IB % % % % s s Step 0.01 0.01 0.1 0.1 1.0 1.0 0.01 0.01 0.01 0.01 0.001 0.001 Default 1.25 3.00 40.0 80.0 10.0 25.0 0.02 0.14 1.00 1.00 On 1.000 0.250 Description End of section 1, as multiple of reference current IBase End of section 2, as multiple of reference current IBase Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate- restrain characteristic, in % Max. ratio of 2nd harm. to fundamental harm dif. curr. in % Max. ratio of 5th harm. to fundamental harm dif. curr. in % Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Open CTEnable Off/On Open CT: time in s to alarm after an open CT is detected Reset delay in s. After delay, diff. function is activated

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Section 5 Differential protection

Table 69:
Name NoOfTerminals Chan2IsLocal IBase

L3CPDIF Non group settings (basic)


Values (Range) 2 3 No Yes 50.0 - 9999.9 Unit A Step 0.1 Default 2 No 3000.0 Description Number of current terminals of the protected circuit 2-nd local current connected to input channel 2, Yes/ No Base (reference) current of the differential protection

Table 70:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn I2/I1Ratio I5/I1Ratio ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv

L6CPDIF Group settings (basic)


Values (Range) Off On 0.20 - 2.00 0.20 - 10.00 0.000 - 60.000 1.00 - 50.00 Off On 30.0 - 120.0 0.01 - 0.20 No Yes 5.0 - 100.0 5.0 - 100.0 Off On Off On 0.20 - 5.00 0.000 - 6.000 0.001 - 6.000 Unit IB IB s IB Deg IB % % IB s s Step 0.01 0.01 0.001 0.01 1.0 0.01 1.0 1.0 0.01 0.001 0.001 Default Off 0.30 0.80 1.000 10.00 On 60.0 0.04 No 10.0 25.0 Off Off 1.00 0.000 0.010 Description Operation Off / On Oper - restr charact., section 1 sensitivity, multiple IBase Initial lower sensitivity, as multiple of IBase Time interval of initial lower sensitivity, in sec Unrestrained differential current limit, multiple of IBase Off/On selection for internal / external fault discriminator Internal/external fault discriminator Operate Angle, degrees Min. value of neg. seq. curr. as multiple of IBase Off/On selection of the cross -block logic Max. ratio of 2nd harm. to fundamental harm dif. curr. in % Max. ratio of 5th harm. to fundamental harm dif. curr. in % Off/On selection for compensation of charging currents Off/On selection for delayed diff. trip command Below limit, extra delay can be applied, multiple of IBase Definite time additional delay in seconds Inverse Delay Minimum Time. In seconds

Table continues on next page

133 Technical reference manual

Section 5 Differential protection


Name CurveType Values (Range) ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.05 - 1.10 0.05 - 1.00 0.000 - 60.000 Unit Step Default IEC Def. Time Description

1MRK505183-UEN C

19 curve types. Example: 15 for definite time delay.

k IdiffAlarm tAlarmdelay

IB s

0.01 0.01 0.001

1.00 0.15 10.000

Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s

Table 71:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay

L6CPDIF Group settings (advanced)


Values (Range) 0.20 - 1.50 1.00 - 10.00 10.0 - 50.0 30.0 - 100.0 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 Off On 0.100 - 10.000 0.100 - 10.000 Unit IB IB % % s s Step 0.01 0.01 0.1 0.1 0.01 0.01 0.01 0.01 0.001 0.001 Default 1.25 3.00 40.0 80.0 0.02 0.14 1.00 1.00 On 1.000 0.250 Description End of section 1, as multiple of reference current IBase End of section 2, as multiple of reference current IBase Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate- restrain characteristic, in % Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Open CT detection feature. Open CTEnable Off/On Open CT: time in s to alarm after an open CT is detected Reset delay in s. After delay, diff. function is activated

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Section 5 Differential protection

Table 72:
Name NoOfTerminals

L6CPDIF Non group settings (basic)


Values (Range) 2 3 4 5 6 No Yes 50.0 - 9999.9 Unit Step Default 2 Description Number of current terminals of the protected circuit

Chan2IsLocal IBase

0.1

No 3000.0

2-nd local current connected to input channel 2, Yes/ No Base (reference) current of the differential protection

Table 73:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv

LT3CPDIF Group settings (basic)


Values (Range) Off On 0.20 - 2.00 0.20 - 10.00 0.000 - 60.000 1.00 - 50.00 Off On 30.0 - 120.0 0.01 - 0.20 No Yes Off On Off On 0.20 - 5.00 0.000 - 6.000 0.001 - 6.000 Unit IB IB s IB Deg IB IB s s Step 0.01 0.01 0.001 0.01 1.0 0.01 0.01 0.001 0.001 Default Off 0.30 0.80 1.000 10.00 On 60.0 0.04 No Off Off 1.00 0.000 0.010 Description Operation Off / On Oper - restr charact., section 1 sensitivity, multiple IBase Initial lower sensitivity, as multiple of IBase Time interval of initial lower sensitivity, in sec Unrestrained differential current limit, multiple of IBase Off/On selection for internal / external fault discriminator Internal/external fault discriminator Operate Angle, degrees Min. value of neg. seq. curr. as multiple of IBase Off/On selection of the cross -block logic Off/On selection for compensation of charging currents Off/On selection for delayed diff. trip command Below limit, extra delay can be applied, multiple of IBase Definite time additional delay in seconds Inverse Delay Minimum Time. In seconds

Table continues on next page

135 Technical reference manual

Section 5 Differential protection


Name CurveType Values (Range) ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.05 - 1.10 0.05 - 1.00 0.000 - 60.000 Unit Step Default IEC Def. Time Description

1MRK505183-UEN C

19 curve types. Example: 15 for definite time delay.

k IdiffAlarm tAlarmdelay

IB s

0.01 0.01 0.001

1.00 0.15 10.000

Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s

Table 74:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 I2/I1Ratio I5/I1Ratio p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay

LT3CPDIF Group settings (advanced)


Values (Range) 0.20 - 1.50 1.00 - 10.00 10.0 - 50.0 30.0 - 100.0 5.0 - 100.0 5.0 - 100.0 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 Off On 0.100 - 10.000 0.100 - 10.000 Unit IB IB % % % % s s Step 0.01 0.01 0.1 0.1 1.0 1.0 0.01 0.01 0.01 0.01 0.001 0.001 Default 1.25 3.00 40.0 80.0 10.0 25.0 0.02 0.14 1.00 1.00 On 1.000 0.250 Description End of section 1, as multiple of reference current IBase End of section 2, as multiple of reference current IBase Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate- restrain characteristic, in % Max. ratio of 2nd harm. to fundamental harm dif. curr. in % Max. ratio of 5th harm. to fundamental harm dif. curr. in % Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Open CT detection feature. Open CTEnable Off/On Open CT: time in s to alarm after an open CT is detected Reset delay in s. After delay, diff. function is activated

136 Technical reference manual

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Section 5 Differential protection

Table 75:
Name NoOfTerminals Chan2IsLocal IBase ZerSeqCurSubtr TraAOnInpCh

LT3CPDIF Non group settings (basic)


Values (Range) 2 3 No Yes 50.0 - 9999.9 Off On No Transf A 1 2 3 1.0 - 9999.9 1.0 - 9999.9 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg lag] 7 [210 deg lag] 8 [240 deg lag] 9 [270 deg lag] 10 [300 deg lag] 11 [330 deg lag] No Yes No Transf B 1 2 3 1.0 - 9999.9 1.0 - 9999.9 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg lag] 7 [210 deg lag] 8 [240 deg lag] 9 [270 deg lag] 10 [300 deg lag] 11 [330 deg lag] No Yes Unit A Step 0.1 Default 2 No 3000.0 Off No Transf A Description Number of current terminals of the protected circuit 2-nd local current connected to input channel 2, Yes/ No Base (reference) current of the differential protection Off/On for elimination of zero seq. from diff. and bias curr Power transformer A applied on input channel X

RatVoltW1TraA RatVoltW2TraA ClockNumTransA

kV kV -

0.1 0.1 -

130.0 130.0 0 [0 deg]

Transformer A rated voltage (kV) on winding 1 (HV winding) Transformer A rated voltage (kV) on winding 2 (LV winding) Transf. A phase shift in multiples of 30 deg, 5 for 150 deg

ZerSeqPassTraA TraBOnInpCh

No No Transf B

Yes/No for capability of transf A to transform zero seq curr Power transformer B applied on input channel X

RatVoltW1TraB RatVoltW2TraB ClockNumTransB

kV kV -

0.1 0.1 -

130.0 130.0 0 [0 deg]

Transformer B rated voltage (kV) on winding 1 (HV winding) Transformer B rated voltage (kV) on winding 2 (LV winding) Transf. B phase shift in multiples of 30 deg, 2 for 60 deg

ZerSeqPassTraB

No

Yes/No for capability of transf B to transform zero seq curr

137 Technical reference manual

Section 5 Differential protection

1MRK505183-UEN C

Table 76:
Name Operation IdMin IdMinHigh tIdMinHigh IdUnre NegSeqDiffEn NegSeqROA IMinNegSeq CrossBlockEn I2/I1Ratio I5/I1Ratio ChargCurEnable AddDelay IMaxAddDelay tDefTime tMinInv CurveType

LT6CPDIF Group settings (basic)


Values (Range) Off On 0.20 - 2.00 0.20 - 10.00 0.000 - 60.000 1.00 - 50.00 Off On 30.0 - 120.0 0.01 - 0.20 No Yes 5.0 - 100.0 5.0 - 100.0 Off On Off On 0.20 - 5.00 0.000 - 6.000 0.001 - 6.000 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type Unit IB IB s IB Deg IB % % IB s s Step 0.01 0.01 0.001 0.01 1.0 0.01 1.0 1.0 0.01 0.001 0.001 Default Off 0.30 0.80 1.000 10.00 On 60.0 0.04 No 10.0 25.0 Off Off 1.00 0.000 0.010 IEC Def. Time Description Operation Off / On Oper - restr charact., section 1 sensitivity, multiple IBase Initial lower sensitivity, as multiple of IBase Time interval of initial lower sensitivity, in sec Unrestrained differential current limit, multiple of IBase Off/On selection for internal / external fault discriminator Internal/external fault discriminator Operate Angle, degrees Min. value of neg. seq. curr. as multiple of IBase Off/On selection of the cross -block logic Max. ratio of 2nd harm. to fundamental harm dif. curr. in % Max. ratio of 5th harm. to fundamental harm dif. curr. in % Off/On selection for compensation of charging currents On/Off selection for delayed diff. trip command Below limit, extra delay can be applied, multiple of IBase Definite time additional delay in seconds Inverse Delay Minimum Time. In seconds 19 curve types. Example: 15 for definite time delay.

Table continues on next page

138 Technical reference manual

1MRK505183-UEN C

Section 5 Differential protection


Values (Range) 0.05 - 1.10 0.05 - 1.00 0.000 - 60.000 Unit IB s Step 0.01 0.01 0.001 Default 1.00 0.15 10.000 Description Time Multiplier Setting (TMS) for inverse delays Sustained differential current alarm, factor of IBase Delay for alarm due to sustained differential current, in s

Name k IdiffAlarm tAlarmdelay

Table 77:
Name EndSection1 EndSection2 SlopeSection2 SlopeSection3 p a b c OpenCTEnable tOCTAlarmDelay tOCTResetDelay

LT6CPDIF Group settings (advanced)


Values (Range) 0.20 - 1.50 1.00 - 10.00 10.0 - 50.0 30.0 - 100.0 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 0.01 - 1000.00 Off On 0.100 - 10.000 0.100 - 10.000 Unit IB IB % % s s Step 0.01 0.01 0.1 0.1 0.01 0.01 0.01 0.01 0.001 0.001 Default 1.25 3.00 40.0 80.0 0.02 0.14 1.00 1.00 On 1.000 0.250 Description End of section 1, as multiple of reference current IBase End of section 2, as multiple of reference current IBase Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate- restrain characteristic, in % Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Settable curve parameter, userprogrammable curve type. Open CTEnable Off/On Open CT: time in s to alarm after an open CT is detected Reset delay in s. After delay, diff. function is activated

Table 78:
Name NoOfTerminals

LT6CPDIF Non group settings (basic)


Values (Range) 2 3 4 5 6 No Yes 50.0 - 9999.9 Off On Unit Step Default 2 Description Number of current terminals of the protected circuit

Chan2IsLocal IBase ZerSeqCurSubtr

A -

0.1 -

No 3000.0 Off

2-nd local current connected to input channel 2, Yes/ No Base (reference) current of the differential protection Off/On for elimination of zero seq. from diff. and bias curr

Table continues on next page

139 Technical reference manual

Section 5 Differential protection


Name TraAOnInpCh Values (Range) No Transf A 1 2 3 4 5 6 1.0 - 9999.9 1.0 - 9999.9 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg lag] 7 [210 deg lag] 8 [240 deg lag] 9 [270 deg lag] 10 [300 deg lag] 11 [330 deg lag] No Yes No Transf B 1 2 3 4 5 6 1.0 - 9999.9 1.0 - 9999.9 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg lag] 7 [210 deg lag] 8 [240 deg lag] 9 [270 deg lag] 10 [300 deg lag] 11 [330 deg lag] No Yes Unit Step Default No Transf A Description

1MRK505183-UEN C

Power transformer A applied on input channel X

RatVoltW1TraA RatVoltW2TraA ClockNumTransA

kV kV -

0.1 0.1 -

130.0 130.0 0 [0 deg]

Transformer A rated voltage (kV) on winding 1 (HV winding) Transformer A rated voltage (kV) on winding 2 (LV winding) Transf. A phase shift in multiples of 30 deg, 5 for 150 deg

ZerSeqPassTraA TraBOnInpCh

No No Transf B

Yes/No for capability of transf A to transform zero seq curr Power transformer B applied on input channel X

RatVoltW1TraB RatVoltW2TraB ClockNumTransB

kV kV -

0.1 0.1 -

130.0 130.0 0 [0 deg]

Transformer B rated voltage (kV) on winding 1 (HV winding) Transformer B rated voltage (kV) on winding 2 (LV winding) Transf. B phase shift in multiples of 30 deg, 2 for 60 deg

ZerSeqPassTraB

No

Yes/No for capability of transf B to transform zero seq curr

140 Technical reference manual

1MRK505183-UEN C

Section 5 Differential protection

Table 79:
Name Operation testModeSet ReleaseLocal

LDLPDIF Non group settings (basic)


Values (Range) Off On Off On Block all Release local Unit Step Default On Off Block all Description Operation Off / On Test mode On/Off Release of local terminal for trip under test mode

5.1.6

Technical data
Table 80:
Function Minimum operate current SlopeSection2 SlopeSection3 EndSection 1 EndSection 2 Unrestrained limit function Second harmonic blocking Fifth harmonic blocking Inverse characteristics, see table 644, 645 and table 646 Operate time Reset time Critical impulse time Charging current compensation

L3CPDIF, L6CPDIF, LT3CPDIF, LT6CPDIF technical data


Range or value (20-200)% of IBase (10.0-50.0)% (30.0-100.0)% (20150)% of IBase (1001000)% of IBase (1005000)% of IBase (5.0100.0)% of fundamental (5.0100.0)% of fundamental 19 curve types 25 ms typically at 0 to 10 x Id 15 ms typically at 10 to 0 x Id 2 ms typically at 0 to 10 x Id On/Off Accuracy 2.0% of Ir at I Ir 2.0% of I at I >I r 2.0% of Ir at I Ir 2.0% of I at I > Ir 2.0% of Ir 6.0% of Ir See table 644 and table 645 -

5.2

1Ph High impedance differential protection HZPDIF


Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device number

1Ph High impedance differential protection

HZPDIF

Id
SYMBOL-CC V2 EN

87

141 Technical reference manual

Section 5 Differential protection 5.2.1 Introduction

1MRK505183-UEN C

The 1Ph High impedance differential protection HZPDIF function can be used when the involved CT cores have the same turn ratio and similar magnetizing characteristic. It utilizes an external summation of the phases and neutral current and a series resistor and a voltage dependent resistor externally to the IED.

5.2.2

Principle of operation
The 1Ph High impedance differential protection (HZPDIF) function is based on one current input with external stabilizing resistors and voltage dependent resistors. Three functions can be used to provide a three phase differential protection function. The stabilizing resistor value is calculated from the IED operating value UR calculated to achieve through fault stability. The supplied stabilizing resistor has a link to allow setting of the correct resistance value. See the application manual for operating voltage and sensitivity calculation.

5.2.2.1

Logic diagram
The logic diagram shows the operation principles for the 1Ph High impedance differential protection function HZPDIF, see figure 64. It is a simple one step IED with an additional lower alarm level. By activating inputs, the HZPDIF function can either be blocked completely, or only the trip output.

IEC05000301 V1 EN

Figure 64:

Logic diagram for 1Ph High impedance differential protection HZPDIF

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HZPDIF ISI* BLOCK BLKTR TRIP ALARM MEASVOLT IEC05000363-2-en.vsd
IEC05000363 V2 EN

5.2.3

Figure 65:

HZPDIF function block

5.2.4

Input and output signals


Table 81:
Name ISI BLOCK BLKTR

HZPDIF Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN Default 0 0 Description Group signal for current input Block of function Block of trip

Table 82:
Name TRIP ALARM MEASVOLT

HZPDIF Output signals


Type BOOLEAN BOOLEAN REAL Description Trip signal Alarm signal Measured RMS voltage on CT secondary side

5.2.5
Table 83:
Name Operation U>Alarm tAlarm U>Trip SeriesResistor

Setting parameters
HZPDIF Group settings (basic)
Values (Range) Off On 2 - 500 0.000 - 60.000 5 - 900 10 - 20000 Unit V s V ohm Step 1 0.001 1 1 Default Off 10 5.000 100 250 Description Operation Off / On Alarm voltage level in volts on CT secondary side Time delay to activate alarm Operate voltage level in volts on CT secondary side Value of series resistor in Ohms

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Table 84:
Function Operate voltage Reset ratio Maximum continuous voltage Operate time Reset time Critical impulse time

1MRK505183-UEN C

HZPDIFtechnical data
Range or value (20-400) V >95% U>Trip2/series resistor 200 W Accuracy 1.0% of Ur for U < Ur 1.0% of U for U > Ur -

10 ms typically at 0 to 10 x Ud 90 ms typically at 10 to 0 x Ud 2 ms typically at 0 to 10 x Ud

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Section 6 Impedance protection

Section 6

Impedance protection

About this chapter


This chapter describes distance protection and associated functions. It includes function blocks, logic diagrams and data tables with information about distance protection, automatic switch onto fault, weak end in-feed and other associated functions. Quadrilateral characteristics are also covered.

6.1

Distance measuring zones, quadrilateral characteristic ZMQPDIS, ZMQAPDIS, ZDRDIR


Function description Distance protection zone, quadrilateral characteristic (zone 1) IEC 61850 identification ZMQPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21

S00346 V1 EN

Distance protection zone, quadrilateral characteristic (zone 2-5)

ZMQAPDIS

21

S00346 V1 EN

Directional impedance quadrilateral

ZDRDIR

21D

Z<->
IEC09000167 V1 EN

6.1.1

Introduction
The line distance protection is a, up to four zone full scheme protection with three fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault for each of the independent zones. Individual settings for each zone in resistive and reactive reach gives flexibility for use as back-up protection for transformer connected to overhead lines and cables of different types and lengths. ZMQPDIS together with Phase selection with load encroachment FDPSPDIS has functionality for load encroachment, which increases the possibility to detect high resistive faults on heavily loaded lines, as shown in figure66.

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X Forward operation

R Reverse operation

en05000034.vsd
IEC05000034 V1 EN

Figure 66:

Typical quadrilateral distance protection zone with Phase selection with load encroachment function FDPSPDIS activated

The independent measurement of impedance for each fault loop together with a sensitive and reliable built-in phase selection makes the function suitable in applications with single-phase autoreclosing. Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load exporting end at phase-to-earth faults on heavily loaded power lines. The distance protection zones can operate independently of each other in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multiterminal lines, and so on.

6.1.2
6.1.2.1

Principle of operation
Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type, which means that each fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in parallel. Figure 67 presents an outline of the different measuring loops for up to five, impedance-measuring zones. There are 3 to 5 zones depending on product type and variant.

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L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 1

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 2

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 3

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 4

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 5

en05000458.vsd
IEC05000458 V1 EN

Figure 67:

The different measuring loops at phase-to-earth fault and phase-tophase fault.

The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a start element to select correct voltages and current depending on fault type. Each distance protection zone performs like one independent distance protection IED with six measuring elements.

6.1.2.2

Impedance characteristic
The distance measuring zone includes six impedance measuring loops; three intended for phase-to-earth faults, and three intended for phase-to-phase as well as, three-phase faults. The distance measuring zone will essentially operate according to the nondirectional impedance characteristics presented in figure 68 and figure 69. The phaseto-earth characteristic is illustrated with the full loop reach while the phase-tophase characteristic presents the per phase reach.

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X (Ohm/loop)

R1PE+Rn RFPE RFPE

Xn =
X1PE+Xn

X0PE-X1PE 3 R0PE-R1PE 3

Rn =

jN
RFPE RFPE

jN

R (Ohm/loop)

X1PE+Xn

RFPE R1PE+Rn
IEC08000280 V1 EN

RFPE
en08000280-2-en.vsd

Figure 68:

Characteristic for phase-to-earth measuring, ohm/loop domain

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Section 6 Impedance protection

X RFPP
2

(Ohm/phase)
RFPP
2

R1PP

X1PP

X 0 PE - X 1RVPE XNRV = X 0 PG - 1 1RVPG X XNRV = X 0 PE - X 3RVPE = XNRV 33 X PE - - X 1FWPG XX 0 PE X 1X 1FWPE 0 0 PG - FWPE XNFW == XNFW = XNFW 3 3 3

j
R (Ohm/phase)

RFPP
2

RFPP
2

X1PP

RFPP
2
IEC07000062 V2 EN

R1PP

RFPP
2
en07000062.vsd

Figure 69:

Characteristic for phase-to-phase measuring

The fault loop reach with respect to each fault type may also be presented as in figure 70. Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults and three-phase faults.

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UL1

IL1

R1 + j X1

Phase-to-earth element

Phase-to-earth fault in phase L1

RFPE (Arc + tower resistance) 0 IN (R0-R1)/3 + j (X0-X1)/3 )

Phase-to-phase fault in phase L1-L2

UL1

IL1

R1 + j X1

Phase-to-phase element L1-L2 RFPP (Arc resistance)

IL2 UL2 R1 + j X1

UL1 Three-phase fault UL3

IL1

R1 + j X1

0.5RFPP

Phase-to-phase element L1-L3

IL3 R1 + j X1 0.5RFPP
IEC08000282-2-en.vsd

IEC08000282 V2 EN

Figure 70:

Fault loop model

The R1 and jX1 in figure 70 represents the positive sequence impedance from the measuring point to the fault location. The settings RFPE and RFPP are the eventual fault resistances in the faulty place. Regarding the illustration of three-phase fault in figure 70, there is of course fault current flowing also in the third phase during a three-phase fault. The illustration merely reflects the loop measurement, which is made phase-to-phase. The zone can be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 71. The impedance reach is symmetric, in the sense that it conforms for forward and reverse direction. Therefore, all reach settings apply to both directions.

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Non-directional

Forward

Reverse

en05000182.vsd
IEC05000182 V1 EN

Figure 71:

Directional operating modes of the distance measuring zones

6.1.2.3

Minimum operating current


The operation of Distance measuring zones, quadrilateral characteristic (ZMQPDIS) is blocked if the magnitude of input currents fall below certain threshold values. The phase-to-earth loop Ln is blocked if ILn < IMinOpPE. For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase currents. ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three-phase currents, that is, residual current 3I0. The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP. ILmLn is the RMS value of the vector difference between phase currents Lm and Ln. All three current limits IMinOpPE, IMinOpIN and IMinOpPP are automatically reduced to 75% of regular set values if the zone is set to operate in reverse direction, that is, OperationDir = Reverse.

6.1.2.4

Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. The

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apparent impedances at phase-to-phase faults follow equation 4 (example for a phase L1 to phase L2 fault).
UL1 UL2 ---------------------Zapp = -I L1 IL2
EQUATION1222 V1 EN

(Equation 4)

Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n = 1, 2, 3) The earth return compensation applies in a conventional manner to phase-to-earth faults (example for a phase L1 to earth fault) according to equation 5.
U L1 Z app = ----------------------------I L1 + I N KN
EQUATION1223 V1 EN

(Equation 5)

Where: UL1, IL1 and IN KN is defined as: are the phase voltage, phase current and residual current present to the IED

KN =

Z0 - Z1 3 Z1

EQUATION 2105 V1 EN

Z 0 = R0 + jX 0
EQUATION2106 V1 EN

Z1 = R1 + jX 1
EQUATION2107 V1 EN

Where R0 X0 R1 X1 is setting of the resistive zero sequence reach is setting of the reactive zero sequence reach is setting of the resistive positive sequence reach is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current in IED point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X.

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The formula given in equation 5 is only valid for radial feeder application without load. When load is considered in the case of single phase-to-earth fault, conventional distance protection might overreach at exporting end and underreach at importing end. The IED has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current between samples (DI) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 6,
X Di -- --U = R i + ---- -w 0 Dt
EQUATION1224 V1 EN

(Equation 6)

in complex notation, or:


X D Re ( I ) Re ( U ) = R Re ( I ) + ------ ----------------w0 Dt
EQUATION354 V1 EN

(Equation 7)

X DIm ( I ) Im ( U ) = R Im ( I ) + ------ ---------------Dt w0


EQUATION355 V1 EN

(Equation 8)

with
w0 = 2 p f 0
EQUATION356 V1 EN

(Equation 9)

where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency

The algorithm calculates Rmmeasured resistance from the equation for the real value of the voltage and substitutes it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:

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Im ( U ) DRe ( I ) Re ( U ) D Im ( I ) ----------------------------------R m = -----------------------------------------------DRe ( I ) Im ( I ) D Im ( I ) Re ( I )


EQUATION357 V1 EN

(Equation 10)

Re ( U ) Im ( I ) Im ( U ) Re ( I )Xm = w 0 Dt -----------------------------------------------------------------------------DRe ( I ) Im ( I ) DIm ( I ) Re ( I )


EQUATION358 V1 EN

(Equation 11)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the IED point.

6.1.2.5

Directional impedance element for quadrilateral characteristics


The evaluation of the directionality takes place in Directional impedance quadrilateral function ZDRDIR. Equation 12 and equation 13 are used to classify that the fault is in forward direction for phase-to-earth fault and phase-to-phase fault.
- ArgDir < arg
EQUATION725 V2 EN

0.8 U 1L1 + 0.2 U 1L1 M I L1

< ArgNeg Re s
(Equation 12)

For the L1-L2 element, the equation in forward direction is according to.
- ArgDir < arg
EQUATION726 V2 EN

0.8 U 1L1 L 2 + 0.2 U 1L1 L 2 M I L1 L 2

< ArgNeg Re s
(Equation 13)

where: ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and

ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 72. U1L1 U1L1M IL1 U1L1L2 U1L1L2M IL1L2 154 Technical reference manual is positive sequence phase voltage in phase L1 is positive sequence memorized phase voltage in phase L1 is phase current in phase L1 is voltage difference between phase L1 and L2 (L2 lagging L1) is memorized voltage difference between phase L1 and L2 (L2 lagging L1) is current difference between phase L1 and L2 (L2 lagging L1)

1MRK505183-UEN C

Section 6 Impedance protection

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively (as shown in figure 72). It should not be changed unless system studies have shown the necessity. ZDRDIR gives binary coded directional information per measuring loop on the output STDIRCND.
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+ +STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+ +STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

ArgNegRes

ArgDir

en05000722.vsd
IEC05000722 V1 EN

Figure 72:

Setting angles for discrimination of forward and reverse fault in Directional impedance quadrilateral function ZDRDIR

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100ms the following occurs:
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If the current is still above the set value of the minimum operating current (between 10 and 30% of the set IED rated current IBase), the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.

If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.

6.1.2.6

Simplified logic diagrams Distance protection zones

The design of the distance protection zones are presented for all measuring loops: phase-to-earth as well as phase-to-phase. Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-tophase signals are designated by L1L2, L2L3, and L3L1. Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (STCND), as presented in figure 73.

Two types of function block, ZMQPDIS and ZMQAPDIS, are used in the IED. ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5. The STCND input signal represents a connection of six different integer values from Phase selection with load encroachment, quadrilateral characteristic function FDPSPDIS within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. Input signal STCND is connected to FDPSPDIS function output STCNDZ. The input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filters out the relevant signals depending on the setting of the parameter OperationDir. It must be configured to the STDIR output on ZDRDIR function.

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IEC99000557-TIFF V1 EN

Figure 73:

Conditioning by a group functional input signal STCND, external start condition

Composition of the phase start signals for a case, when the zone operates in a nondirectional mode, is presented in figure 74.

STNDL1N STNDL2N STNDL3N STNDL1L2 STNDL2L3 STNDL3L1

OR AND OR AND AND AND STL1 STL2 STL3 START

OR OR

BLK
en00000488.vsd
IEC00000488 V1 EN

Figure 74:

Composition of starting signals in non-directional operating mode


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Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, as shown in figure 75.
STNDL1N DIRL1N STNDL2N DIRL2N STNDL3N DIRL3N STNDL1L2 DIRL1L2 STNDL2L3 DIRL2L3 STNDL3L1 DIRL3L1 AND

AND OR AND OR AND

STZMPE

STL1

AND

OR

AND

STL2

AND OR AND OR STZMPP AND STL3

BLK

OR

AND

15 ms t

START

en05000778.vsd
IEC05000778 V2 EN

Figure 75:

Composition of start signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 76.

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Timer tPP=On STZMPP Timer tPE=On STZMPE BLKTR BLK STL1 STL2 STL3 AND AND

tPP t tPE t OR OR

15ms AND
t

TRIP

AND AND AND

TRL1 TRL2 TRL3

en00000490-3.vsd
IEC00000490 2 V1 EN

Figure 76:

Tripping logic for the distance protection zone

6.1.3

Function block
ZMQPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC06000256-2-en.vsd
IEC06000256 V2 EN

Figure 77:

ZMQPDIS function block

ZMQAPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC09000884-1-en.vsd
IEC09000884 V1 EN

Figure 78:

ZMQAPDIS function block (zone 2 - 5)

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ZDRDIR I3P* U3P* STDIR

IEC05000681-2-en.vsd
IEC05000681 V2 EN

Figure 79:

ZDRDIR function block

6.1.4

Input and output signals


Table 85:
Name I3P U3P BLOCK VTSZ BLKTR STCND DIRCND

ZMQPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Blocks all output by fuse failure signal Blocks all trip outputs External start condition (loop enabler) External directional condition

Table 86:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND

ZMQPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General Trip, issued from any phase or loop Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop

Table 87:
Name I3P U3P BLOCK VTSZ

ZMQAPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN Default 0 0 Description Group signal for current input Group signal for voltage input Block of function Blocks all output by fuse failure signal

Table continues on next page

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Name BLKTR STCND DIRCND Type BOOLEAN INTEGER INTEGER Default 0 0 0 Description Blocks all trip outputs External start condition (loop enabler) External directional condition

Table 88:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND

ZMQAPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General Trip, issued from any phase or loop Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop

Table 89:
Name I3P U3P

ZDRDIR Input signals


Type GROUP SIGNAL GROUP SIGNAL Default Description Group connection Group connection

Table 90:
Name STDIR

ZDRDIR Output signals


Type INTEGER Description All start signals binary coded

6.1.5

Setting parameters
Signals and settings for ZMQPDIS are valid for zone 1 while signals and settings for ZMQAPDIS are valid for zone 2 - 5

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Table 91:
Name Operation IBase UBase OperationDir

ZMQPDIS Group settings (basic)


Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Non-directional Forward Reverse 0.10 - 3000.00 0.10 - 1000.00 0.10 - 9000.00 0.50 - 3000.00 1.00 - 3000.00 1.00 - 9000.00 Off On Off On 0.000 - 60.000 Off On Off On 0.000 - 60.000 10 - 30 10 - 30 5 - 30 Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

X1 R1 X0 R0 RFPP RFPE OperationPP Timer tPP tPP OperationPE Timer tPE tPE IMinOpPP IMinOpPE IMinOpIN

ohm/p ohm/p ohm/p ohm/p ohm/l ohm/l s s %IB %IB %IB

0.01 0.01 0.01 0.01 0.01 0.01 0.001 0.001 1 1 1

30.00 5.00 100.00 15.00 30.00 100.00 On On 0.000 On On 0.000 20 20 5

Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-Ph Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of PhasePhase loops Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops Minimum operate residual current for Phase-Earth loops

Table 92:
Name Operation IBase UBase OperationDir

ZMQAPDIS Group settings (basic)


Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Non-directional Forward Reverse 0.50 - 3000.00 Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

X1

ohm/p

0.01

40.00

Positive sequence reactance reach

Table continues on next page

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Values (Range) 0.10 - 1000.00 0.50 - 9000.00 0.50 - 3000.00 1.00 - 3000.00 1.00 - 9000.00 Off On Off On 0.000 - 60.000 Off On Off On 0.000 - 60.000 10 - 30 10 - 30 Unit ohm/p ohm/p ohm/p ohm/l ohm/l s s %IB %IB Step 0.01 0.01 0.01 0.01 0.01 0.001 0.001 1 1 Default 5.00 120.00 15.00 30.00 100.00 On On 0.000 On On 0.000 20 20 Description Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-Ph Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of PhasePhase loops Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops

Name R1 X0 R0 RFPP RFPE OperationPP Timer tPP tPP OperationPE Timer tPE tPE IMinOpPP IMinOpPE

Table 93:
Name ArgNegRes ArgDir IMinOp IBase UBase

ZDRDIR Group settings (basic)


Values (Range) 90 - 175 5 - 45 1 - 99999 1 - 99999 0.05 - 2000.00 Unit Deg Deg %IB A kV Step 1 1 1 1 0.05 Default 115 15 10 3000 400.00 Description Angle to blinder in second quadrant for forward direction Angle to blinder in fourth quadrant for forward direction Minimum operate current in % of IBase Base Current Base Voltage

6.1.6

Technical data
Table 94:
Function Number of zones Minimum operate residual current, zone 1 Minimum operate current, phaseto-phase and phase-to-earth Table continues on next page

ZMQPDIS technical data


Range or value 34 with selectable direction (5-30)% of IBase (10-30)% of IBase Accuracy -

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Function Positive sequence reactance, zone 1 Positive sequence reactance, zone 234 Positive sequence resistance Zero sequence reactance, zone 1 Zero sequence reactance, zone 234 Zero sequence resistance Fault resistance, phase-to-earth Fault resistance, phase-to-phase Dynamic overreach Range or value (0.10-3000.00) / phase (0.50-3000.00) / phase (0.10-1000.00) / phase (0.10-9000.00) / phase (0.50-9000.00) / phase (0.50-3000.00) / phase (1.00-9000.00) /loop (1.00-3000.00) /loop <5% at 85 degrees measured with CVTs and 0.5<SIR<30 (0.000-60.000) s 24 ms typically 105% typically 30 ms typically Accuracy

1MRK505183-UEN C

2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees

Impedance zone timers Operate time Reset ratio Reset time

0.5% 10 ms -

6.2

Distance measuring zone, quadrilateral characteristic for series compensated lines ZMCPDIS, ZMCAPDIS, ZDSRDIR
Function description Distance measuring zone, quadrilateral characteristic for series compensated lines (zone 1) IEC 61850 identification ZMCPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21

S00346 V1 EN

Distance measuring zone, quadrilateral characteristic for series compensated lines (zone 2-5)

ZMCAPDIS

21

S00346 V1 EN

Directional impedance quadrilateral, including series compensation

ZDSRDIR

21D

Z<->
IEC09000167 V1 EN

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Section 6 Impedance protection Introduction


The line distance protection is a, up to four zone full scheme protection with three fault loops for phase-to-phase faults and three fault loops for phase-to-earth fault for each of the independent zones. Individual settings for each zone resistive and reactive reach give flexibility for use on overhead lines and cables of different types and lengths. Quadrilateral characteristic is available. ZMCPDIS function has functionality for load encroachment which increases the possibility to detect high resistive faults on heavily loaded lines.
X Forward operation

6.2.1

R Reverse operation

en05000034.vsd
IEC05000034 V1 EN

Figure 80:

Typical quadrilateral distance protection zone with load encroachment function activated

The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm for the quadrilateral function prevents overreaching of zone1 at load exporting end at phase to earth-faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines.

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Section 6 Impedance protection 6.2.2


6.2.2.1

1MRK505183-UEN C

Principle of operation
Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type, which means that earth fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in parallel. Figure 81 presents an outline of the different measuring loops for the basic five, impedance-measuring zones.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 2

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 3

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 4

L1-N

L2-N

L3-N

L1-L2

L2-L3

L3-L1

Zone 5

en05000458.vsd
IEC05000458 V1 EN

Figure 81:

The different measuring loops at phase-to-earth fault and phase-tophase fault

The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a start element to select correct voltages and current depending on fault type. Each distance protection zone performs like one independent distance protection IED with six measuring elements.

6.2.2.2

Impedance characteristic
Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS) include six impedance measuring loops; three intended for phase-toearth faults, and three intended for phase-to-phase as well as, three-phase faults. The distance measuring zone operates according to the non-directional impedance characteristics presented in figure 82 and figure 83. The phase-to-earth characteristic is illustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase reach.

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X (Ohm/loop)

R1PE+RNFw RFRvPE RFFwPE

X 0 PE - X 1FwPE 3 X 1RvPE X 0 PG - X 1RVPG XNRVXNRv =XXNFw = X 0 PE - 1RVPE XNRV = 33 X 1FwPE XNFw =


XX PE - X 1X 1FWPG 0 0 PG - FWPE XNFW == XNFW 3 3

X1FwPE+XNFw

jN

jN

RNFw =

R0 PE - R1PE 3

R (Ohm/loop) RFRvPE RFFwPE

X1RvPE+XNRv

jN
RFRvPE
IEC09000625 V1 EN

RFFwPE
IEC09000625-1-en.vsd

Figure 82:

Characteristic for the phase-to-earth measuring loops, ohm/loop domain

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X RFRvPP
2

(Ohm/phase)
RFFwPP
2

R1PP

X1FwPP

X 0 PE - X 1RVPE XNRV = X 0 PG - 1 1RVPG X XNRV = X 0 PE - X 3RVPE = XNRV 33 X PE - - X 1FWPG XX 0 PE X 1X 1FWPE 0 0 PG - FWPE XNFW == XNFW = XNFW 3 3 3

j jN
RFRvPP
2

j
R (Ohm/phase)

RFFwPP
2

X1RvPP

jN
RFRvPP
2
IEC09000632 V1 EN

RFFwPP
2
IEC09000632-1-en.vsd

Figure 83:

Characteristic for the phase-to-phase measuring loops

The fault loop reach with respect to each fault type may also be presented as in figure 84. Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults and three-phase faults.

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UL1

IL1

R1 + j X1

Phase-to-earth element

Phase-to-earth fault in phase L1

RFPE (Arc + tower resistance) 0 IN (R0-R1)/3 + j (X0-X1)/3 )

Phase-to-phase fault in phase L1-L2

UL1

IL1

R1 + j X1

Phase-to-phase element L1-L2 RFPP (Arc resistance)

IL2 UL2 R1 + j X1

UL1 Three-phase fault UL3

IL1

R1 + j X1

0.5RFPP

Phase-to-phase element L1-L3

IL3 R1 + j X1 0.5RFPP
IEC08000282-2-en.vsd

IEC08000282 V2 EN

Figure 84:

Fault loop model

The R1 and jX1 in figure 84 represents the positive sequence impedance from the measuring point to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place. Regarding the illustration of three-phase fault in figure 84, there is of course fault current flowing also in the third phase during a three-phase fault. The illustration merely reflects the loop measurement, which is made phase-to-phase. The zone may be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 85. It may be convenient to once again mention that the impedance reach is symmetric, forward and reverse direction. Therefore, all reach settings apply to both directions.

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Non-directional

Forward

Reverse

en05000182.vsd
IEC05000182 V1 EN

Figure 85:

Directional operating modes of the distance measuring zone

6.2.2.3

Minimum operating current


The operation of Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS,ZMCAPDIS) is blocked if the magnitude of input currents fall below certain threshold values. The phase-to-earth loop Ln is blocked if ILn < IMinOpPE. For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase currents. ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three phase currents, that is, residual current 3I0. The phase-to-phase loop LmLn is blocked if ILmLnAB (BC or CA)< IMinOpPP. ILmLn is the RMS value of the vector difference between phase currents Lm and Ln. All three current limits IMinOpPE, IMinOpIN and IMinOpPP are automatically reduced to 75% of regular set values if the zone is set to operate in reverse direction, that is, OperationDir=Reverse.

6.2.2.4

Measuring principles
Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. The

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calculation of the apparent impedances at ph-ph faults follows equation 14 (example for a phase L1 to phase L2 fault).
UL1 UL2 ---------------------Zapp = -I L1 IL2
EQUATION1222 V1 EN

(Equation 14)

Here U and I represent the corresponding voltage and current phasors in the respective phase. The earth return compensation applies in a conventional manner to ph-E faults (example for a phase L1 to earth fault) according to equation 15.
U L1 Z app = ----------------------------I L1 + I N KN
EQUATION1223 V1 EN

(Equation 15)

Where: UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED KN is defined as:

KN =

Z0 - Z1 3 Z1

EQUATION 2105 V1 EN

Z 0 = R0 + jX 0
EQUATION2106 V1 EN

Z1 = R1 + jX 1
EQUATION2107 V1 EN

Where R0 X0 R1 X1 is setting of the resistive zero sequence reach is setting of the reactive zero sequence reach is setting of the resistive positive sequence reach is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current at the IED point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X.

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The formula given in equation 15 is only valid for no loaded radial feeder applications. When load is considered in the case of single phase-to-earth fault, conventional distance protection might overreach at exporting end and underreach at importing end. IED has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current between samples (DI) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 16,
X Di -- --U = R i + ---- -w 0 Dt
EQUATION1224 V1 EN

(Equation 16)

in complex notation, or:


X D Re ( I ) Re ( U ) = R Re ( I ) + ------ ----------------w0 Dt
EQUATION354 V1 EN

(Equation 17)

X DIm ( I ) Im ( U ) = R Im ( I ) + ------ ---------------Dt w0


EQUATION355 V1 EN

(Equation 18)

with
w0 = 2 p f 0
EQUATION356 V1 EN

(Equation 19)

where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:

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Im ( U ) DRe ( I ) Re ( U ) D Im ( I ) ----------------------------------R m = -----------------------------------------------DRe ( I ) Im ( I ) D Im ( I ) Re ( I )


EQUATION357 V1 EN

(Equation 20)

Re ( U ) Im ( I ) Im ( U ) Re ( I )Xm = w 0 Dt -----------------------------------------------------------------------------DRe ( I ) Im ( I ) DIm ( I ) Re ( I )


EQUATION358 V1 EN

(Equation 21)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the IED point.

6.2.2.5

Directionality for series compensation


In the basic distance protection function, the control of the memory for polarizing voltage is performed by an under voltage control. In case of series compensated line, a voltage reversal can occur with a relatively high voltage also when the memory must be locked. Thus, a simple undervoltage type of voltage memory control can not be used in case of voltage reversal. In the option for series compensated network the polarizing quantity and memory are controlled by an impedance measurement criterion. The polarizing voltage is a memorized positive sequence voltage. The memory is continuously synchronized via a positive sequence filter. The memory is starting to run freely instantaneously when a voltage change is detected in any phase. A nondirectional impedance measurement is used to detect a fault and identify the faulty phase or phases. At a three phase fault when no positive sequence voltage remains (all three phases are disconnected) the memory is used for direction polarization during 100 ms. The memory predicts the phase of the positive sequence voltage with the pre-fault frequency. This extrapolation is made with a high accuracy and it is not the accuracy of the memory that limits the time the memory can be used. The network is at a three phase fault under way to a new equilibrium and the post-fault condition can only be predicted accurately for a limited time from the pre-fault condition. In case of a three phase fault after 100 ms the phase of the memorized voltage can not be relied upon and the directional measurement has to be blocked. The achieved direction criteria are sealed-in when the directional measurement is blocked and kept until the impedance fault criteria is reset (the direction is stored until the fault is cleared).
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This memory control allows in the time domain unlimited correct directional measurement for all unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of the set impedance reach of the criteria for control of the polarization voltage the memory has to be used and the measurement is limited to 100 ms and thereafter the direction is sealed-in. The special impedance measurement to control the polarization voltage is set separately and has only to cover (with some margin) the impedance to fault that can cause the voltage reversal. The evaluation of the directionality takes place in Directional impedance quadrilateral, including series compensation (ZDSRDIR) function. Equation 22 and equation 23 are used to classify that the fault is in forward direction for phase-toearth fault and phase-to-phase fault.
- ArgDir < arg
EQUATION2004 V2 EN

U 1L1M < ArgNeg Re s I L1


(Equation 22)

For the L1-L2 element, the equation in forward direction is according to:
- ArgDir < arg
EQUATION2006 V2 EN

U 1L1L 2 M < ArgNeg Re s I L1L 2


(Equation 23)

where:

ArgDir

is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and

ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 86.
U1L1M IL1 U1L1L2M IL1L2 is positive sequence memorized phase voltage in phase L1 is phase current in phase L1 is memorized voltage difference between phase L1 and L2 (L2 lagging L1) is current difference between phase L1 and L2 (L2 lagging L1)

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively, see figure 86, and it should not be changed unless system studies have shown the necessity. ZDSRDIR generates a binary coded signal on the output STDIR depending on the evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4.

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Section 6 Impedance protection

ArgNegRes

ArgDir

en05000722.vsd
IEC05000722 V1 EN

Figure 86:

Setting angles for discrimination of forward and reverse fault

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.

6.2.2.6

Simplified logic diagrams Distance protection zones

The design of distance protection zones are presented for all measuring loops: phaseto-earth as well as phase-to-phase. Phase-to-earth related signals are designated by Ln, where n represents the corresponding phase number (L1, L2, and L3). The phase-to-phase signals are designated by LnLm, where n and m represent the corresponding phase numbers (L1L2, L2L3, and L3L1). Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (STCND), as presented in figure 87.

Two types of function block, ZMCPDIS and ZMCAPDIS , are used in the IED. ZMQPDIS is used for zone 1 and ZMQAPDIS for zone 2 - 5.

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The STCND input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to Phase selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCDZ.

IEC99000557-TIFF V1 EN

Figure 87:

Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a nondirectional mode, is presented in figure 88.

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Section 6 Impedance protection

IEC00000488-TIFF V1 EN

Figure 88:

Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, as shown in figure 89.
STNDL1N DIRL1N STNDL2N DIRL2N STNDL3N DIRL3N STNDL1L2 DIRL1L2 STNDL2L3 DIRL2L3 STNDL3L1 DIRL3L1 AND

AND OR AND OR AND

STZMPE

STL1

AND

OR

AND

STL2

AND OR AND OR STZMPP AND STL3

BLK

OR

AND

15 ms t

START

en05000778.vsd
IEC05000778 V2 EN

Figure 89:

Composition of starting signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 90.

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Timer tPP=On STZMPP Timer tPE=On STZMPE BLKTR BLK STL1 STL2 STL3 AND AND

tPP t tPE t OR OR

15ms AND
t

TRIP

AND AND AND

TRL1 TRL2 TRL3

en00000490-3.vsd
IEC00000490 2 V1 EN

Figure 90:

Tripping logic for the distance protection zone one

6.2.3

Function block
ZMCPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC07000036-2-en.vsd
IEC07000036 V2 EN

Figure 91:

ZMCPDIS function block

ZMCAPDIS I3P* U3P* BLOCK VTSZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC09000890-1-en.vsd
IEC09000890 V1 EN

Figure 92:

ZMCAPDIS function block

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ZDSRDIR I3P* U3P* STFW STRV STDIRCND IEC07000035-2-en.vsd


IEC07000035 V2 EN

Figure 93:

ZDSRDIR function block

6.2.4

Input and output signals


Input and output signals is shown for zone 1, zone 2 - 5 are equal.

Table 95:
Name I3P U3P BLOCK VTSZ BLKTR STCND DIRCND

ZMCPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Blocks all output by fuse failure signal Blocks all trip outputs External start condition (loop enabler) External directional condition

Table 96:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND

ZMCPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General Trip, issued from any phase or loop Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop

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Table 97:
Name I3P U3P BLOCK VTSZ BLKTR STCND DIRCND

ZMCAPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Blocks all output by fuse failure signal Blocks all trip outputs External start condition (loop enabler) External directional condition

Table 98:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND

ZMCAPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General Trip, issued from any phase or loop Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop

Table 99:
Name I3P U3P

ZDSRDIR Input signals


Type GROUP SIGNAL GROUP SIGNAL Default Description Group connection for current Group connection for voltage

Table 100:
Name STFW STRV STDIRCND

ZDSRDIR Output signals


Type BOOLEAN BOOLEAN INTEGER Description Start in forward direction Start in reverse direction Binary coded directional information per measuring loop

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Section 6 Impedance protection Setting parameters


Settings for ZMCPDIS are valid for zone 1, while settings for ZMCAPDIS are valid for zone 2 - 5

6.2.5

Table 101:
Name Operation IBase UBase OperationDir

ZMCPDIS Group settings (basic)


Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Non-directional Forward Reverse Off On 0.50 - 3000.00 0.10 - 1000.00 1.00 - 3000.00 0.50 - 3000.00 1.00 - 3000.00 Off On 0.000 - 60.000 Off On 0.50 - 3000.00 0.10 - 1000.00 0.50 - 9000.00 0.50 - 3000.00 1.00 - 9000.00 0.50 - 3000.00 1.00 - 9000.00 Off On 0.000 - 60.000 Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

OperationPP X1FwPP R1PP RFFwPP X1RvPP RFRvPP Timer tPP tPP OperationPE X1FwPE R1PE X0PE R0PE RFFwPE X1RvPE RFRvPE Timer tPE tPE

ohm/p ohm/p ohm/l ohm/p ohm/l s ohm/p ohm/p ohm/p ohm/p ohm/l ohm/p ohm/l s

0.01 0.01 0.01 0.01 0.01 0.001 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.001

On 30.00 5.00 30.00 30.00 30.00 On 0.000 On 30.00 5.00 100.00 47.00 100.00 30.00 100.00 On 0.000

Operation mode Off / On of PhasePhase loops Positive sequence reactance reach, PhPh, forward Positive seq. resistance for characteristic angle, Ph-Ph Fault resistance reach, Ph-Ph, forward Positive sequence reactance reach, PhPh, reverse Fault resistance reach, Ph-Ph, reverse Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Positive sequence reactance reach, PhE, forward Positive seq. resistance for characteristic angle, Ph-E Zero sequence reactance reach, Ph-E Zero seq. resistance for zone characteristic angle, Ph-E Fault resistance reach, Ph-E, forward Positive sequence reactance reach, PhE, reverse Fault resistance reach, Ph-E, reverse Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E

Table continues on next page

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Name IMinOpPP IMinOpPE IMinOpIN Values (Range) 10 - 30 10 - 30 5 - 30 Unit %IB %IB %IB Step 1 1 1 Default 20 20 5 Description

1MRK505183-UEN C

Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops Minimum operate residual current for Phase-Earth loops

Table 102:
Name Operation IBase UBase OperationDir

ZMCAPDIS Group settings (basic)


Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Non-directional Forward Reverse Off On 0.50 - 3000.00 0.10 - 1000.00 1.00 - 3000.00 0.50 - 3000.00 1.00 - 3000.00 Off On 0.000 - 60.000 Off On 0.50 - 3000.00 0.10 - 1000.00 0.50 - 9000.00 0.50 - 3000.00 1.00 - 9000.00 0.50 - 3000.00 1.00 - 9000.00 Off On Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

OperationPP X1FwPP R1PP RFFwPP X1RvPP RFRvPP Timer tPP tPP OperationPE X1FwPE R1PE X0PE R0PE RFFwPE X1RvPE RFRvPE Timer tPE

ohm/p ohm/p ohm/l ohm/p ohm/l s ohm/p ohm/p ohm/p ohm/p ohm/l ohm/p ohm/l -

0.01 0.01 0.01 0.01 0.01 0.001 0.01 0.01 0.01 0.01 0.01 0.01 0.01 -

On 30.00 5.00 30.00 30.00 30.00 On 0.000 On 30.00 5.00 100.00 47.00 100.00 30.00 100.00 On

Operation mode Off / On of PhasePhase loops Positive sequence reactance reach, PhPh, forward Positive seq. resistance for characteristic angle, Ph-Ph Fault resistance reach, Ph-Ph, forward Positive sequence reactance reach, PhPh, reverse Fault resistance reach, Ph-Ph, reverse Operation mode Off / On of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Off / On of Phase-Earth loops Positive sequence reactance reach, PhE, forward Positive seq. resistance for characteristic angle, Ph-E Zero sequence reactance reach, Ph-E Zero seq. resistance for zone characteristic angle, Ph-E Fault resistance reach, Ph-E, forward Positive sequence reactance reach, PhE, reverse Fault resistance reach, Ph-E, reverse Operation mode Off / On of Zone timer, Ph-E

Table continues on next page

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Values (Range) 0.000 - 60.000 10 - 30 10 - 30 Unit s %IB %IB Step 0.001 1 1 Default 0.000 20 20 Description Time delay of trip, Ph-E Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops

Name tPE IMinOpPP IMinOpPE

Table 103:
Name OperationSC IBase UBase IMinOpPE IMinOpPP ArgNegRes ArgDir INReleasePE INBlockPP OperationLdCh RLdFw RLdRv ArgLd X1FwPP R1PP RFFwPP X1RvPP RFRvPP X1FwPE R1PE X0FwPE

ZDSRDIR Group settings (basic)


Values (Range) NoSeriesComp SeriesComp 1 - 99999 0.05 - 2000.00 5 - 30 5 - 30 90 - 175 5 - 45 10 - 100 10 - 100 Off On 1.00 - 3000.00 1.00 - 3000.00 5 - 70 0.50 - 3000.00 0.10 - 1000.00 0.50 - 3000.00 0.50 - 3000.00 0.50 - 3000.00 0.50 - 3000.00 0.10 - 1000.00 0.50 - 9000.00 Unit A kV %IB %IB Deg Deg %IPh %IPh ohm/p ohm/p Deg ohm/p ohm/p ohm/l ohm/p ohm/l ohm/p ohm/p ohm/p Step 1 0.05 1 1 1 1 1 1 0.01 0.01 1 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 Default SeriesComp 3000 400.00 5 10 130 15 20 40 On 80.00 80.00 30 40.00 7.00 30.00 40.00 30.00 40.00 7.00 120.00 Description Special directional criteria for voltage reversal Base setting for current level Base setting for voltage level Minimum operate phase current for Phase-Earth loops Minimum operate delta current for PhasePhase loops Angle of blinder in second quadrant for forward direction Angle of blinder in fourth quadrant for forward direction 3I0 limit for releasing phase-to-earth measuring loops 3I0 limit for blocking phase-to-phase measuring loops Operation of load discrimination characteristic Forward resistive reach within the load impedance area Reverse resistive reach within the load impedance area Load angle determining the load impedance area Positive sequence reactance reach, PhPh, forward Positive seq. resistance for characteristic angle, Ph-Ph Fault resistance reach, Ph-Ph, forward Positive sequence reactance reach, PhPh, reverse Fault resistance reach, Ph-Ph, reverse Positive sequence reactance reach, PhE, forward Positive seq. resistance for characteristic angle, Ph-E Zero sequence reactance reach, Ph-E, forward

Table continues on next page

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Name R0PE RFFwPE X1RvPE X0RvPE RFRvPE Values (Range) 0.50 - 3000.00 1.00 - 9000.00 0.50 - 3000.00 0.50 - 9000.00 1.00 - 9000.00 Unit ohm/p ohm/l ohm/p ohm/p ohm/l Step 0.01 0.01 0.01 0.01 0.01 Default 20.00 100.00 40.00 120.00 100.00 Description

1MRK505183-UEN C

Zero seq. resistance for zone characteristic angle, Ph-E Fault resistance reach, Ph-E, forward Positive sequence reactance reach, PhE, reverse Zero sequence reactance reach, Ph-E, reverse Fault resistance reach, Ph-E, reverse

6.2.6

Technical data
Table 104:
Function Number of zones Minimum operate residual current, zone 1 Minimum operate current, Ph-Ph and Ph-E Positive sequence reactance Positive sequence resistance Zero sequence reactance Zero sequence resistance Fault resistance, Ph-E Fault resistance, Ph-Ph Dynamic overreach Impedance zone timers Operate time Reset ratio Reset time

ZMCPDIS, ZMCAPDIS technical data


Range or value 34 with selectable direction (5-30)% of IBase (10-30)% of IBase (0.50-3000.00) /phase (0.10-1000.00) /phase (0.50-9000.00) /phase (0.50-3000.00) /phase (1.00-9000.00) /loop (1.00-3000.00) /loop <5% at 85 degrees measured with CCVTs and 0.5<SIR<30 (0.000-60.000) s 24 ms typically 105% typically 30 ms typically Accuracy 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees 0.5% 10 ms -

6.3

Phase selection, quadrilateral characteristic with fixed angle FDPSPDIS


Function description Phase selection with load encroachment, quadrilateral characteristic IEC 61850 identification FDPSPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21

Z<phs
SYMBOL-DD V1 EN

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The operation of transmission networks today is in many cases close to the stability limit. Due to environmental considerations, the rate of expansion and reinforcement of the power system is reduced, for example, difficulties to get permission to build new power lines. The ability to accurately and reliably classify the different types of fault, so that single pole tripping and autoreclosing can be used plays an important role in this matter. Phase selection, quadrilateral characteristic with fixed angle FDPSPDIS is designed to accurately select the proper fault loop in the distance function dependent on the fault type. The heavy load transfer that is common in many transmission networks may make fault resistance coverage difficult to achieve. Therefore, FDPSPDIS has a built-in algorithm for load encroachment, which gives the possibility to enlarge the resistive setting of both the phase selection and the measuring zones without interfering with the load. The extensive output signals from the phase selection gives also important information about faulty phase(s), which can be used for fault analysis.

6.3.1

6.3.2

Principle of operation
The basic impedance algorithm for the operation of the phase selection measuring elements is the same as for the distance zone measuring function. Phase selection with load encroachment, quadrilateral characteristic FDPSPDIS includes six impedance measuring loops; three intended for phase-to-earth faults, and three intended for phase-to-phase faults as well as for three-phase faults. The difference, compared to the distance zone measuring function, is in the combination of the measuring quantities (currents and voltages) for different types of faults. A current-based phase selection is also included. The measuring elements continuously measure three phase currents and the residual current, and compare them with the set values. The current signals are filtered by Fourier's recursive filter, and separate trip counter prevents too high overreaching of the measuring elements. The characteristic is basically non-directional, but FDPSPDIS uses information from the directional function to discriminate whether the fault is in forward or reverse direction. The start condition STCNDZ is essentially based on the following criteria: 1. 2. 3. Residual current criteria, that is, separation of faults with and without earth connection Regular quadrilateral impedance characteristic Load encroachment characteristics is always active but can be switched off by selecting a high setting.
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The current start condition STCNDI is based on the following criteria: 1. 2. 3. Residual current criteria No quadrilateral impedance characteristic. The impedance reach outside the load area is theoretically infinite. The practical reach, however, will be determined by the minimum operating current limits. Load encroachment characteristic is always active, but can be switched off by selecting a high setting.

The STCNDI output is non-directional. The directionality is determined by the distance zones directional function. There are outputs from FDPSPDIS that indicate whether a start is in forward or reverse direction or non-directional, for example STFWL1, STRVL1 and STNDL1. These directional indications are based on the sector boundaries of the directional function and the impedance setting of FDPSPDIS function. Their operating characteristics are illustrated in figure 94.
X X X

Non-directional (ND)

Forward (FW)

Reverse (RV)
en08000286.vsd

IEC08000286 V1 EN

Figure 94:

Characteristics for non-directional, forward and reverse operation of Phase selection with load encroachment, quadrilateral characteristic FDPSPDIS

The setting of the load encroachment function may influence the total operating characteristic, (for more information, refer to section "Load encroachment"). The input DIRCND contains binary coded information about the directional coming from the directional function . It shall be connected to the STDIR output on ZDRDIR, directional measuring block. This information is also transferred to the input DIRCND on the distance measuring zones, that is, the ZMQPDIS, distance measuring block. The code built up for the directionality is as follows:

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STDIR=

STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+ +STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+ +STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

If the binary information is 1 then it will be considered that we have start in forward direction in phase L1. If the binary code is 3 then we have start in forward direction in phase L1 and L2, binary code 192 means start in reverse direction in phase L1 and L2A and B etc. The STCNDZ or STCNDI output contains, in a similar way as DIRCND, binary coded information, in this case information about the condition for opening correct fault loop in the distance measuring element. It shall be connected to the STCND input on the ZMQPDIS, distance measuring block. The code built up for release of the measuring fault loops is as follows: STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32

6.3.2.1

Phase-to-earth fault
For a phase-to-earth fault, the measured impedance by FDPSPDIS will be according to equation 24. Index PHS in images and equations reference settings for Phase selection with load encroachment function FDPSPDIS.

ZPHSn =

ULn ILn
(Equation 24)

EQUATION1255 V1 EN

where: n corresponds to the particular phase (n=1, 2 or 3)

The characteristic for FDPSPDIS function at phase-to-earth fault is according to figure 95. The characteristic has a fixed angle for the resistive boundary in the first quadrant of 60. The resistance RN and reactance XN are the impedance in the earth-return path defined according to equation 25 and equation 26.
RN = R0 - R1 3
(Equation 25)

EQUATION1256 V1 EN

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XN =

X 0 - X1 3
(Equation 26)

EQUATION1257 V1 EN

X (ohm/loop) Kr(X1+XN) RFRvPE RFFwPE

X1+XN RFFwPE RFRvPE 60 deg R (Ohm/loop) X1+XN Kr = 1 tan(60deg)

60 deg

RFRvPE Kr(X1+XN)

RFFwPE

en06000396.vsd
IEC06000396 V2 EN

Figure 95:

Characteristic of FDPSPDIS for phase-to-earth fault (setting parameters in italic), ohm/loop domain (directional lines are drawn as "line-dot-dot-line")

Besides this, the 3I0 residual current must fulfil the conditions according to equation 27 and equation 28.
3 I0 0.5 IMinOpPE
EQUATION2108 V1 EN

(Equation 27)

3 I0 INReleasePE- Iphmax ----------------------------------100


EQUATION766 V1 EN

(Equation 28)

where:

IMinOpPE

is the minimum operation current for forward zones

INReleasePE is the setting for the minimum residual current needed to enable operation in the phaseto-earth fault loops (in %).
Iphmax is the maximum phase current in any of three phases.

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Phase-to-phase fault
For a phase-to-phase fault, the measured impedance by FDPSPDIS will be according to equation 29.
ZPHS = ULm - ULn -2 ILn
(Equation 29)

6.3.2.2

EQUATION1258 V1 EN

ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in the lagging phase n. The operation characteristic is shown in figure 96.
X (W / 0.5RFRvPP KrX1

phase)
0.5RFFwPP

0.5RFFwPP 60 deg

X1

60 deg

R (W / 0.5RFRvPP X1
Kr =

phase)

1 tan(60 deg)

KrX1 0.5RFRvPP
IEC09000047 V2 EN

0.5RFFwPP
IEC09000047-2-en.vsd

Figure 96:

The operation characteristics for FDPSPDIS at phase-to-phase fault (setting parameters in italic, directional lines drawn as "line-dotdot-line"), ohm/phase domain

In the same way as the condition for phase-to-earth fault, there are current conditions that have to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 30 or equation 31.

3I 0 < IMinOpPE
EQUATION2109 V1 EN

(Equation 30)

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3I 0 <

INBlockPP Iph max 100

EQUATION2110 V1 EN

(Equation 31)

where:

IMinOpPE

is the minimum operation current for earth measuring loops,

INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and


Iphmax is maximal magnitude of the phase currents.

6.3.2.3

Three-phase faults
The operation conditions for three-phase faults are the same as for phase-to-phase fault, that is equation 29, equation 30 and equation 31 are used to release the operation of the function. However, the reach is expanded by a factor 2/3 (approximately 1.1547) in all directions. At the same time the characteristic is rotated 30 degrees, counterclockwise. The characteristic is shown in figure 97.
X (O/phase) 4 X1 3 90 deg 0.5RFFwPPK3 X1K3 4 RFFwPP 6

R (O/phase) 0.5RFRvPPK3 K3 = 2 / v(3) 30 deg

IEC05000671-3-en.vsd
IEC05000671 V3 EN

Figure 97:

The characteristic of FDPSPDIS for three-phase fault (setting parameters in italic)

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Load encroachment
Each of the six measuring loops has its own load encroachment characteristic based on the corresponding loop impedance. The load encroachment functionality is always active, but can be switched off by selecting a high setting. The outline of the characteristic is presented in figure 98. As illustrated, the resistive blinders are set individually in forward and reverse direction while the angle of the sector is the same in all four quadrants.
X

6.3.2.4

RLdFw ArgLd ArgLd R

ArgLd

RLdRv

ArgLd

IEC09000042-1-en.vsd
IEC09000042 V1 EN

Figure 98:

Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on the chosen operation mode of FDPSPDIS function. When output signal STCNDZ is selected, the characteristic for FDPSPDIS (and also zone measurement depending on settings) will be reduced by the load encroachment characteristic (see figure 99, left illustration). When output signal STCNDI is selected, the operation characteristic will be as the right illustration in figure 99. The reach will in this case be limit by the minimum operation current and the distance measuring zones.

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STCNDZ

STCNDI
en05000197.vsd

IEC05000197 V1 EN

Figure 99:

Difference in operating characteristic depending on operation mode when load encroachment is activated

When FDPSPDIS is set to operate together with a distance measuring zone the resultant operate characteristic could look like in figure 100. The figure shows a distance measuring zone operating in forward direction. Thus, the operating area is highlighted in black.
X "Phase selection" "quadrilateral" zone Distance measuring zone

Load encroachment characteristic R Directional line

en05000673.vsd
IEC05000673 V1 EN

Figure 100:

Operating characteristic in forward direction when load encroachment is activated

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Figure 100 is valid for phase-to-earth. During a three-phase fault, or load, when the quadrilateral phase-to-phase characteristic is subject to enlargement and rotation the operate area is transformed according to figure 101. Notice in particular what happens with the resistive blinders of the "phase selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle of the blinder in quadrant one is now 90 degrees instead of the original 60 degrees. The blinder that is nominally located to quadrant four will at the same time tilt outwards and increase the resistive reach around the R-axis. Consequently, it will be more or less necessary to use the load encroachment characteristic in order to secure a margin to the load impedance.
X (W / Phase selection Quadrilateral zone

phase)

Distance measuring zone

R (W /

phase)

IEC09000049-1-en.vsd
IEC09000049 V1 EN

Figure 101:

Operating characteristic for FDPSPDIS in forward direction for threephase fault, ohm/phase domain

The result from rotation of the load characteristic at a fault between two phases is presented in fig 102. Since the load characteristic is based on the same measurement as the quadrilateral characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when subject to a pure phase-to-phase fault. At the same time the characteristic will "shrink" by 2/3, from the full RLdFw and RLdRv reach, which is valid at load or three-phase fault.

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IEC08000437.vsd
IEC08000437 V1 EN

Figure 102:

Rotation of load characteristic for a fault between two phases

There is a gain in selectivity by using the same measurement as for the quadrilateral characteristic since not all phase-to-phase loops will be fully affected by a fault between two phases. It should also provide better fault resistive coverage in quadrant one. The relative loss of fault resistive coverage in quadrant four should not be a problem even for applications on series compensated lines.

6.3.2.5

Minimum operate currents


The operation of the Phase selection with load encroachment function (FDPSPDIS) is blocked if the magnitude of input currents falls below certain threshold values. The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the current in phase Ln. The phase-to-phase loop LmLn is blocked if (2ILn<IMinOpPP).

6.3.2.6

Simplified logic diagrams


Figure 103 presents schematically the creation of the phase-to-phase and phase-toearth operating conditions. Consider only the corresponding part of measuring and

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logic circuits, when only a phase-to-earth or phase-to-phase measurement is available within the IED.
Load encroachment block

3I 0 0.5 IMinOpPE & INReleasePE 3I 0 Iphmax 100


BLOCK

IRELPE & 15 ms t Bool to integer 10 ms 20 ms t t & 15 ms t STPP IRELPP STPE STCNDI

&

3I 0 < IMinOpPE
INBlockPP 3I 0 < Iph max 100
OR

&

IEC08000439_1_en.vsd
IEC08000439 1 EN V1 EN

Figure 103:

Phase-to-phase and phase-to-earth operating conditions (residual current criteria)

A special attention is paid to correct phase selection at evolving faults. A STCNDI output signal is created as a combination of the load encroachment characteristic and current criteria, refer to figure 103. This signal can be configured to STCND functional input signals of the distance protection zone and this way influence the operation of the phase-to-phase and phase-to-earth zone measuring elements and their phase related starting and tripping signals. Figure 104 presents schematically the composition of non-directional phase selective signals STNDLn. Internal signals ZMLnN and ZMLmLn (m and n change between one and three according to the phase number) represent the fulfilled operating criteria for each separate loop measuring element, that is, within the characteristic.

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INDL1N INDL2N INDL3N 15 ms t STNDPE

OR IRELPE ZML1N ZML2N ZML3N ZML1L2 ZML2L3 ZML3L1 IRELPP AND OR AND AND OR

15 ms t 15 ms t 15 ms t

STNDL1

STNDL2

AND AND AND

OR INDL1L2 INDL2L3 INDL3L1 OR

STNDL3

15 ms t

STNDPP

IEC00000545_2_en.vsd
IEC00000545-TIFF V2 EN

Figure 104:

Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is presented schematically in figure 106 and figure 105. The directional criteria appears as a condition for the correct phase selection in order to secure a high phase selectivity for simultaneous and evolving faults on lines within the complex network configurations. Internal signals DFWLn and DFWLnLm present the corresponding directional signals for measuring loops with phases Ln and Lm. Designation FW (figure 106) represents the forward direction as well as the designation RV (figure 105) represents the reverse direction. All directional signals are derived within the corresponding digital signal processor. Figure 105 presents additionally a composition of a STCNDZ output signal, which is created on the basis of impedance measuring conditions. This signal can be configured to STCND functional input signals of the distance protection zone and this way influence the operation of the phase-to-phase and phase-to-earth zone measuring elements and their phase related starting and tripping signals.

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INDL1N DRVL1N INDL1L2 DRVL1L2 INDL3L1 DRVL3L1 INDL2N DRVL2N INDL1L2 AND INDL2L3 DRVL2L3 INDL3N DRVL3N INDL2L3 AND INDL3L1 AND OR OR AND AND OR AND 15 ms t INDL1N INDL2N INDL3N INDL1L2 INDL2L3 INDL3L1 15 ms
t

AND 15 ms t STRVL1

AND

OR

AND OR

15 ms t

STRVPE

STRVL2

Bool to integer

STCNDZ

STRVL3

15 ms
t

STRVPP

IEC00000546_2_en.vsd
IEC00000546-TIFF V2 EN

Figure 105:

Composition of phase selection signals for reverse direction

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AND INDL1N DFWL1N INDL1L2 DFWL1L2 INDL3L1 DFWL3L1 INDL2N DFWL2N INDL1L2 AND INDL2L3 DFWL2L3 INDL3N DFWL3N INDL2L3 AND INDL3L1 AND 15 ms t STFWPP OR AND 15 ms t STFW3PH AND AND 15 ms t STFWL3 AND OR AND OR 15 ms t 15 ms t STFW2PH AND AND 15 ms t STFWL2 AND OR AND OR AND 15 ms t STFWPE AND AND OR 15 ms t 15 ms t 15 ms t STFW1PH STFWL1

OR

IEC05000201_2_en.vsd
IEC05000201 V2 EN

Figure 106:

Composition of phase selection signals for forward direction

Figure 107 presents the composition of output signals TRIP and START, where internal signals STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and STRVPE, but for the phase-to-phase loops.

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TimerPP=Off AND TimerPE=Off AND OR

tPP t tPE t

AND OR AND TRIP

STNDPP STFWPP STRVPP STNDPE STFWPE STRVPE OR OR OR START

IEC08000441_2_en.vsd
IEC08000441 1 V2 EN

Figure 107:

TRIP and START signal logic

6.3.3

Function block
FDPSPDIS I3P* U3P* BLOCK DIRCND TRIP START STFWL1 STFWL2 STFWL3 STFWPE STRVL1 STRVL2 STRVL3 STRVPE STNDL1 STNDL2 STNDL3 STNDPE STFW1PH STFW2PH STFW3PH STPE STPP STCNDZ STCNDI IEC06000258-2-en.vsd
IEC06000258 V2 EN

Figure 108:

FDPSPDIS function block


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Table 105:
Name I3P U3P BLOCK DIRCND

1MRK505183-UEN C

FDPSPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN INTEGER Default 0 0 Description Group signal for current input Group signal for voltage input Block of function External directional condition

Table 106:
Name TRIP START STFWL1 STFWL2 STFWL3 STFWPE STRVL1 STRVL2 STRVL3 STRVPE STNDL1 STNDL2 STNDL3 STNDPE STFW1PH STFW2PH STFW3PH STPE STPP STCNDZ STCNDI

FDPSPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Description Trip output Start in any phase or loop Fault detected in phase L1 - forward direction Fault detected in phase L2 - forward direction Fault detected in phase L3 - forward direction Earth fault detected in forward direction Fault detected in phase L1 - reverse direction Fault detected in phase L2 - reverse direction Fault detected in phase L3 - reverse direction Earth fault detected in reverse direction Non directional start in L1 Non directional start in L2 Non directional start in L3 Non directional start, phase-earth Start in forward direction for single-phase fault Start in forward direction for two- phase fault Start in forward direction for thre-phase fault Current conditions release of phase-earth measuring elements Current conditions release of phase-phase measuring elements Start condition (PHS,LE and I based) Start condition (LE and I based)

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6.3.5
Table 107:
Name IBase UBase INBlockPP INReleasePE RLdFw RLdRv ArgLd X1 X0 RFFwPP RFRvPP RFFwPE RFRvPE IMinOpPP IMinOpPE

FDPSPDIS Group settings (basic)


Values (Range) 1 - 99999 0.05 - 2000.00 10 - 100 10 - 100 1.00 - 3000.00 1.00 - 3000.00 5 - 70 0.50 - 3000.00 0.50 - 9000.00 0.50 - 3000.00 0.50 - 3000.00 1.00 - 9000.00 1.00 - 9000.00 5 - 30 5 - 30 Unit A kV %IPh %IPh ohm/p ohm/p Deg ohm/p ohm/p ohm/l ohm/l ohm/l ohm/l %IB %IB Step 1 0.01 1 1 0.01 0.01 1 0.01 0.01 0.01 0.01 0.01 0.01 1 1 Default 3000 400.00 40 20 80.00 80.00 30 40.00 120.00 30.00 30.00 100.00 100.00 10 5 Description Base current, i.e. rated current Base voltage, i.e. rated voltage 3I0 limit for blocking phase-to-phase measuring loops 3I0 limit for releasing phase-to-earth measuring loops Forward resistive reach within the load impedance area Reverse resistive reach within the load impedance area Load angle determining the load impedance area Positive sequence reactance reach Zero sequence reactance reach Fault resistance reach, Ph-Ph, forward Fault resistance reach, Ph-Ph, reverse Fault resistance reach, Ph-E, forward Fault resistance reach, Ph-E, reverse Minimum operate delta current for PhasePhase loops Minimum operate phase current for Phase-Earth loops

Table 108:
Name TimerPP tPP TimerPE tPE

FDPSPDIS Group settings (advanced)


Values (Range) Off On 0.000 - 60.000 Off On 0.000 - 60.000 Unit s s Step 0.001 0.001 Default Off 3.000 Off 3.000 Description Operation mode Off / On of Zone timer, Ph-Ph Time delay to trip, Ph-Ph Operation mode Off / On of Zone timer, Ph-E Time delay to trip, Ph-E

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Section 6 Impedance protection 6.3.6 Technical data


Table 109:
Function Minimum operate current Reactive reach, positive sequence, forward and reverse Resistive reach, positive sequence Reactive reach, zero sequence, forward and reverse Resistive reach, zero sequence Fault resistance, phase-to-earth faults, forward and reverse Fault resistance, phase-tophase faults, forward and reverse Load encroachment criteria: Load resistance, forward and reverse Safety load impedance angle Reset ratio

1MRK505183-UEN C

FDPSPDIS technical data


Range or value (5-30)% of IBase (0.503000.00) /phase (0.101000.00) /phase (0.509000.00) /phase (0.503000.00) /phase (1.009000.00) /loop (0.503000.00) /loop Accuracy 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees

(1.003000.00) /phase (5-70) degrees 105% typically -

6.4

Full-scheme distance measuring, Mho characteristic ZMHPDIS


Function description IEC 61850 identification ZMHPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21

Full-scheme distance protection, mho characteristic

S00346 V1 EN

6.4.1

Introduction
The numerical mho line distance protection is a, up to four zone full scheme protection for back-up detection of short circuit and earth faults. The full scheme technique provides back-up protection of power lines with high sensitivity and low requirement on remote end communication. The four zones have fully independent measuring and settings, which gives high flexibility for all types of lines. The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily loaded lines and multi-terminal lines where the requirement for tripping is one-, two- and/or three-pole.

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The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase autoreclosing. Built-in adaptive load compensation algorithm prevents overreaching at phase-toearth faults on heavily loaded power lines, see figure 109.
jX

Operation area

Operation area

Operation area

No operation area

No operation area

en07000117.vsd
IEC07000117 V1 EN

Figure 109:

Load encroachment influence on the offset mho characteristic

The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode (offset). This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multiterminal lines and so on. The possibility to use the phase-to-earth quadrilateral impedance characteristic together with the mho characteristic increases the possibility to overcome eventual lack of sensitivity of the mho element due to the shaping of the curve at remote end faults. The integrated control and monitoring functions offer effective solutions for operating and monitoring all types of transmission and sub-transmission lines.

6.4.2
6.4.2.1

Principle of operation
Full scheme measurement
The execution of the different fault loops within the IED are of full scheme type, which means that each fault loop for phase-to-earth faults and phase-to-phase faults are executed in parallel. The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a start element to select correct voltages and current

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depending on fault type. So each distance protection zone performs like one independent distance protection function with six measuring elements.

6.4.2.2

Impedance characteristic
The distance function consists of five instances. Each instance can be selected to be either forward or reverse with positive sequence polarized mho characteristic alternatively self polarized offset mho characteristics with reverse offset. The operating characteristic is in accordance to figure 110 where zone 5 is selected offset mho.
jx X Mho, zone4 Mho, zone3 Zs=0 Mho, zone2 Mho, zone1 R

Zs=Z1 Zs=2Z1

R Offset mho, zone5

IEC09000143-1-en.vsd
IEC09000143 V1 EN

Figure 110:

Mho, offset mho characteristic and the source impedance influence on the mho characteristic

The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing the origin as for the mho to the left of figure 110, which is only valid where the source impedance is zero, the crossing point is moved to the coordinates of the negative source impedance given an expansion of the circle shown to the right of figure 110. The polarization quantities used for the mho circle are 100% memorized positive sequence voltages. This will give a somewhat less dynamic expansion of the mho circle during faults. However, if the source impedance is high, the dynamic expansion of the mho circle might lower the security of the function too much with high loading and mild power swing conditions. The mho distance element has a load encroachment function which cuts off a section of the characteristic when enabled. The function is enabled by setting the setting parameter LoadEnchMode to On. Enabling of the load encroachment
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function increases the possibility to detect high resistive faults without interfering with the load impedance. The algorithm for the load encroachment is located in the Faulty phase identification with load encroachment for mho function FMPSPDIS, where also the relevant settings can be found. Information about the load encroachment from FMPSPDIS to the zone measurement is given in binary format to the input signal LDCND.

6.4.2.3

Basic operation characteristics


Each impedance zone can be switched On and Off by the setting parameter Operation. Each zone can also be set to Non-directional, Forward or Reverse by setting the parameter DirMode. The operation for phase-to-earth and phase-to-phase fault can be individually switched On and Off by the setting parameter OpModePE and OpModePP. For critical applications such as for lines with high SIRs as well as CVTs, it is possible to improve the security by setting the parameter ReachMode to Underreach. In this mode the reach for faults close to the zone reach is reduced by 20% and the filtering is also introduced to increase the accuracy in the measuring. If the ReachMode is set to Overreach no reduction of the reach is introduced and no extra filtering introduced. The latter setting is recommended for overreaching pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on transients is not a major issue either because of less likelihood of overreach with higher settings or the fact that these elements do not initiate tripping unconditionally. The offset mho characteristic can be set in Non-directional, Forward or Reverse by the setting parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced. Information about the directional line is given from the directional element and given to the measuring element as binary coded signal to the input DIRCND. The zone reach for phase-to-earth fault and phase-to-phase fault is set individually in polar coordinates. The impedance is set by the parameters ZPE and ZPP and the corresponding arguments by the parameters ZAngPE and ZAngPP. Compensation for earth-return path for faults involving earth is done by setting the parameter KNMag and KNAng where KNMag is the magnitude of the earth-return path and KNAng is the difference of angles between KNMag and ZPE.
KNMag =
EQUATION1579 V1 EN

Z0-Z1 3 Z1
(Equation 32)

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KNAng = arg
EQUATION1580 V1 EN

Z 0 - Z1 3 Z1

)
(Equation 33)

where Z0 Z1 is the complex zero sequence impedance of the line in /phase is the complex positive sequence impedance of the line in /phase

The phase-to-earth and phase-to-phase measuring loops can be time delayed individually by setting the parameter tPE and tPP respectively. To release the time delay, the operation mode for the timers, OpModetPE and OpModetPP, has to be set to On. This is also the case for instantaneous operation. The function can be blocked in the following ways: activating of input BLOCK blocks the whole function activating of the input BLKZ (fuse failure) blocks all output signals activating of the input BLKZMTD blocks the delta based algorithm activating of the input BLKHSIR blocks the instantaneous part of the algorithm for high SIR values activating of the input BLKTRIP blocks all output signals activating the input BLKPE blocks the phase-to-earth fault loop outputs activating the input BLKPP blocks the phase-to-phase fault loop outputs

The activation of input signal BLKZ can be made by external fuse failure function or from the loss of voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block (ZMHPDIS) The input signal BLKZMTD is activated during some ms after fault has been detected by ZSMGAPC to avoid unwanted operations due to transients. It shall be connected to the BLKZMTD output signal of ZSMGAPC function. At SIR values >10, the use of electronic CVT might cause overreach due to the builtin resonance circuit in the CVT, which reduce the secondary voltage for a while. The input BLKHSIR shall be connected to the output signal HSIR on ZSMGAPC for increasing of the filtering and high SIR values. This is valid only when permissive underreach scheme is selected by setting ReachMode=Underreach.

6.4.2.4

Theory of operation
The mho algorithm is based on phase comparison of a operating phasor and a polarizing phasor. When the operating phasor leads the reference phasor by more than 90 degrees, the function will operate and give a trip output.

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Phase-to-phase fault
Mho The plain mho circle has the characteristic as in figure 111. The condition for deriving the angle is according to equation 34.

b = arg(U L1 L 2 - I L1 L 2 ZPP ) - arg(U pol )


EQUATION1789 V1 EN

(Equation 34)

where

U L1L2
EQUATION1790 V2 EN

is the voltage vector difference between phases L1 and L2

I L1L2
EQUATION1791 V2 EN

is the current vector difference between phases L1 and L2 is the positive sequence impedance setting for phase-to-phase fault is the polarizing voltage

ZPP Upol

The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase L1 to L2 fault). The memorized voltage will prevent collapse of the mho circle for close in faults. Operation occurs if 90270

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IL1L2X

Ucomp = UL1L2 - IL1L2 ZPP IL1L2 ZPP

Upol UL1L2

IL1L2R

en07000109.vsd
IEC07000109 V1 EN

Figure 111:

Simplified mho characteristic and vector diagram for phase L1-toL2 fault

Offset Mho The characteristic for offset mho is a circle where two points on the circle are the setting parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP and the angle for ZRevPP is AngZPP+180. The condition for operation at phase-to-phase fault is that the angle between the two compensated voltages Ucomp1 and Ucomp2 is greater than or equal to 90 (figure 112). The angle will be 90 for fault location on the boundary of the circle. The angle for L1-to-L2 fault can be defined according to equation 35.

b = arg
EQUATION1792 V1 EN

U-(-IL1L2 ZRevPP)
U -IL1L2 ZPP
(Equation 35)

where

U
EQUATION1800 V1 EN

is the UL1L2 voltage

ZRevPP

is the positive sequence impedance setting for phase-to-phase fault in reverse direction

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IL1L2jX

Ucomp1 = UL1L2 - IL1L2 ZPP IL1L2 ZPP

U Ucomp2 = U = IFZF=UL1L2 IL1L2R

- IL1L2 Z RevPP
en07000110.vsd
IEC07000110 V1 EN

Figure 112:

Simplified offset mho characteristic and voltage vectors for phase L1-to-L2 fault.

Operation occurs if 90270. Offset mho, forward direction When forward direction has been selected for the offset mho, an extra criteria beside the one for offset mho (90<<270) is introduced, that is the angle between the voltage and the current must lie between the blinders in second quadrant and fourth quadrant. See figure 113. Operation occurs if 90270 and ArgDirArgNegRes.
where

ArgDir ArgNegRes

is the setting parameter for directional line in fourth quadrant in the directional element, ZDMRDIR. is the setting parameter for directional line in second quadrant in the directional element, ZDMRDIR. is calculated according to equation 35

The directional information is brought to the mho distance measurement from the mho directional element as binary coded information to the input DIRCND. See Directional impedance element for mho characteristic (ZDMRDIR) for information about the mho directional element.

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IL1L2jX

ZPP

UL1L2

ArgNegRes

IL1L2
ArgDir

en07000111.vsd
IEC07000111 V1 EN

Figure 113:

Simplified offset mho characteristic in forward direction for phase L1-to-L2 fault

Offset mho, reverse direction The operation area for offset mho in reverse direction is according to figure 114. The operation area in second quadrant is ArgNegRes+180. Operation occurs if 90270 and 180 - ArgDir ArgNegRes + 180 The is derived according to equation 35 for the mho circle and is the angle between the voltage and current.

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X ZPP

ArgNegRes

IL1L2

ArgDir
UL1L2

ZRevPP
en06000469.eps
IEC06000469 V1 EN

Figure 114:

Operation characteristic for reverse phase L1-to-L2 fault

Phase-to-earth fault
Mho The measuring of earth faults uses earth-return compensation applied in a conventional way. The compensation voltage is derived by considering the influence from the earth-return path. For an earth fault in phase L1, the compensation voltage Ucomp can be derived, as shown in figure 115.

Ucomp = U pol - I L1 Z loop


EQUATION1793 V1 EN

(Equation 36)

where Upol Zloop is the polarizing voltage (memorized UL1 for Phase L1-to- earth fault) is the loop impedance, which in general terms can be expressed as

Z1+ZN = Z 1 1 + KN
EQUATION1799 V1 EN

)
(Equation 37)

Table continues on next page

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where Z1 KN is the positive sequence impedance of the line (Ohm/phase) is the zero-sequence compensator factor

The angle between the Ucomp and the polarize voltage Upol for a L1-to-earth fault is
b = arg [UL1 -(IL1 +3I0 KN ) ZPE ] - arg( Upol)
GUID-A9492CDF-D3B7-4DC5-8E06-6638BEE2540B V1 EN

(Equation 38)

where UL1 IL1 IA 3I0 is the phase voltage in faulty phase L1 is the phase current in faulty phase L1 is the phase current in faulty phase A is the zero-sequence current in faulty phase L1

KN
EQUATION1593 V1 EN

Z0-Z1 3 Z1
EQUATION1594 V1 EN

the setting parameter for the zero sequence compensation consisting of the magnitude KN and the angle KNAng. Upol Vpol is the 100% of positive sequence memorized voltage UL1 is the 100% of positive sequence memorized voltage VA

IL1X IL1ZN

Ucomp

IL1 Zloop
IL1ZPE Upol f IL1 (Ref)

IL1R

en06000472_2.vsd
IEC06000472 V2 EN

Figure 115:

Simplified offset mho characteristic and vector diagram for phase L1-to-earth fault

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Operation occurs if 90270. Offset mho The characteristic for offset mho at earth fault is a circle containing the two vectors from the origin ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for the positive sequence impedance in forward respective reverse direction. The vector ZPE in the impedance plane has the settable angle AngZPE and the angle for ZRevPP is AngZPE+180. The condition for operation at phase-to-earth fault is that the angle between the two compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90 see figure 116. The angle will be 90 for fault location on the boundary of the circle. The angle for L1-to-earth fault can be defined as

b = arg
EQUATION1802 V1 EN

UL1-(- IL1 Z Re vPE )


UL1- IL1L ZPE
(Equation 41)

where

U L1
EQUATION1 805 V1 EN

is the phase L1 voltage

IL1L 2 jX

IL1 ZPE

U comp1 = UL1 - I L1 ZPE

UL1

U comp2 = UL1 - (-IL1 ZRevPE)


IL1L2 R

- I L1 Z Re vPe
en 06000465 .vsd
IEC06000465 V1 EN

Figure 116:

Simplified offset mho characteristic and voltage vector for phase L1to-L2 fault

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Operation occurs if 90270. Offset mho, forward direction In the same way as for phase-to-phase fault, selection of forward direction of offset mho will introduce an extra criterion for operation. Beside the basic criteria for offset mho according to equation 41 and 90270, also the criteria that the angle between the voltage and the current must lie between the blinders in second and fourth quadrant. See figure 117. Operation occurs if 90270 and ArgDirArgNegRes.
where

ArgDir ArgNegRes

is the setting parameter for directional line in fourth quadrant in the directional element, ZDMRDIR. is the setting parameter for directional line in second quadrant in the directional element, ZDMRDIR. is calculated according to equation 41

IL1 jX

UL1

ArgNegRes

IL1
ArgDir

IL1R

en 06000466 .vsd
IEC06000466 V1 EN

Figure 117:

Simplified characteristic for offset mho in forward direction for L1-toearth fault

Offset mho, reverse direction In the same way as for offset in forward direction, the selection of offset mho in reverse direction will introduce an extra criterion for operation compare to the normal offset mho. The extra is that the angle between the fault voltage and the fault current shall lie between the blinders in second and fourth quadrant. The operation area in second quadrant is limited by the blinder defined as 180 -ArgDir and in fourth quadrant ArgNegRes+180, see figure 118.

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The conditions for operation of offset mho in reverse direction for L1-to-earth fault is 90270 and 180-ArgdirArgNegRes+180. The is derived according to equation 41 for the offset mho circle and is the angle between the voltage and current.
X ZPE

ArgNegRes IL1 ArgDir UL1 ZRevPE R

en06000470.eps
IEC06000470 V1 EN

Figure 118:

Simplified characteristic for offset mho in reverse direction for L1-toearth fault

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Section 6 Impedance protection 6.4.3 Function block


ZMHPDIS I3P* U3P* CURR_INP* VOLT_INP* POL_VOLT* BLOCK BLKZ BLKZMTD BLKHSIR BLKTRIP BLKPE BLKPP DIRCND STCND LDCND TRIP TRL1 TRL2 TRL3 TRPE TRPP START STL1 STL2 STL3 STPE STPP

1MRK505183-UEN C

IEC06000423_2_en.vsd
IEC06000423 V2 EN

Figure 119:

ZMHPDIS function block

6.4.4

Input and output signals


Table 110:
Name I3P U3P CURR_INP VOLT_INP POL_VOLT BLOCK BLKZ BLKZMTD BLKHSIR BLKTRIP BLKPE BLKPP DIRCND STCND LDCND

ZMHPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER INTEGER Default 0 0 0 0 0 0 0 0 0 0 Description Connection for current sample signals Connection for voltage sample signals Connection for current signals Connection for voltage signals Connection for polarizing voltage Block of function Block due to fuse failure Block signal for blocking of time domaine function Blocks time domain function at high SIR Blocks all operate output signals Blocks phase-to-earth operation Blocks phase-to-phase operation External directional condition External start condition (loop enabler) External load condition (loop enabler)

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Table 111:
Name TRIP TRL1 TRL2 TRL3 TRPE TRPP START STL1 STL2 STL3 STPE STPP

ZMHPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip General Trip phase L1 Trip phase L2 Trip phase L3 Trip phase-to-earth Trip phase-to-phase Start General Start phase L1 Start phase L2 Start phase L3 Start phase-to-earth Start phase-to-phase

6.4.5
Table 112:
Name Operation IBase UBase DirMode

Setting parameters
ZMHPDIS Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Offset Forward Reverse Off On Overreach Underreach Off On 0.005 - 3000.000 10 - 90 0.00 - 3.00 -180 - 180 0.005 - 3000.000 0.000 - 60.000 Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off/On Base current Base voltage Direction mode

LoadEnchMode ReachMode OpModePE ZPE ZAngPE KN KNAng ZRevPE tPE

ohm/p Deg Deg ohm/p s

0.001 1 0.01 1 0.001 0.001

Off Overreach On 30.000 80 0.80 -15 30.000 0.000

Load enchroachment mode Off/On Reach mode Over/Underreach Operation mode Off / On of Phase-Earth loops Positive sequence impedance setting for Phase-Earth loop Angle for positive sequence line impedance for Phase-Earth loop Magnitud of earth return compensation factor KN Angle for earth return compensation factor KN Reverse reach of the phase to earth loop(magnitude) Delay time for operation of phase to earth elements

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Name IMinOpPE OpModePP ZPP ZAngPP ZRevPP tPP IMinOpPP Values (Range) 10 - 30 Off On 0.005 - 3000.000 10 - 90 0.005 - 3000.000 0.000 - 60.000 10 - 30 Unit %IB ohm/p Deg ohm/p s %IB Step 1 0.001 1 0.001 0.001 1 Default 20 On 30.000 85 30.000 0.000 20 Description

1MRK505183-UEN C

Minimum operation phase to earth current Operation mode Off / On of PhasePhase loops Impedance setting reach for phase to phase elements Angle for positive sequence line impedance for Phase-Phase elements Reverse reach of the phase to phase loop(magnitude) Delay time for operation of phase to phase Minimum operation phase to phase current

Table 113:
Name OffsetMhoDir

ZMHPDIS Group settings (advanced)


Values (Range) Non-directional Forward Reverse Off On Off On Unit Step Default Non-directional Description Direction mode for offset mho

OpModetPE OpModetPP

On On

Operation mode Off / On of Zone timer, Ph-E Operation mode Off / On of Zone timer, Ph-ph

6.4.6

Technical data
Table 114:
Function Number of zones with selectable directions Minimum operate current Positive sequence impedance, phase-to-earth loop Positive sequence impedance angle, phase-to-earth loop Reverse reach, phase-to-earth loop (Magnitude) Magnitude of earth return compensation factor KN Angle for earth compensation factor KN Dynamic overreach Timers Table continues on next page

ZMHPDIS technical data


Range or value Max 4 with selectable direction (1030)% of IBase (0.0053000.000) W/phase (1090) degrees (0.0053000.000) /phase (0.003.00) (-180180) degrees <5% at 85 degrees measured with CVTs and 0.5<SIR<30 (0.000-60.000) s 0.5% 10 ms Accuracy 2.0% static accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees

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Function Operate time Reset ratio Reset time Range or value 20 ms typically (with static outputs) 105% typically 30 ms typically Accuracy -

6.5

Full-scheme distance protection, quadrilateral for earth faults ZMMPDIS, ZMMAPDIS


Function description Fullscheme distance protection, quadrilateral for earth faults (zone 1) IEC 61850 identification ZMMPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21

S00346 V1 EN

Fullscheme distance protection, quadrilateral for earth faults (zone 2-5)

ZMMAPDIS

21

S00346 V1 EN

6.5.1

Introduction
The line distance protection is a zone protection with three fault loops for phase-toearth fault for each of the independent zones. Individual settings for each zone resistive and reactive reach give flexibility for use on overhead lines and cables of different types and lengths. The Full-scheme distance protection, quadrilateral for earth faults functions ZMMDPIS and ZMMAPDIS have functionality for load encroachment, which increases the possibility to detect high resistive faults on heavily loaded lines , see figure 66.

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X Forward operation

R Reverse operation

en05000034.vsd
IEC05000034 V1 EN

Figure 120:

Typical quadrilateral distance protection zone with Phase selection, quadrilateral characteristic with settable angle function FRPSPDIS activated

The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting end at phase to earth faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines.

6.5.2
6.5.2.1

Principle of operation
Full scheme measurement
The different fault loops within the IED are operating in parallel in the same principle as a full scheme measurement. Figure 121 presents an outline of the different measuring loops for the basic five, impedance-measuring zones l.

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L1-N

L2-N

L3-N

Zone 1

L1-N

L2-N

L3-N

Zone 2

L1-N

L2-N

L3-N

Zone 3

L1-N

L2-N

L3-N

Zone 4

L1-N

L2-N

L3-N

Zone 5

en07000080.vsd
IEC07000080 V1 EN

Figure 121:

The different measuring loops at line-earth fault and phase-phase fault.

6.5.2.2

Impedance characteristic
The distance measuring zone include three impedance measuring loops; one fault loop for each phase. The distance measuring zone will essentially operate according to the nondirectional impedance characteristics presented in figure 122. The characteristic is illustrated with the full loop reach.

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X (Ohm/loop)

R1PE+Rn RFPE RFPE

Xn =
X1PE+Xn

X0PE-X1PE 3 R0PE-R1PE 3

Rn =

jN
RFPE RFPE

jN

R (Ohm/loop)

X1PE+Xn

RFPE R1PE+Rn
IEC08000280 V1 EN

RFPE
en08000280-2-en.vsd

Figure 122:

Characteristic for the phase-to-earth measuring loops, ohm/loop domain.

The fault loop reach may also be presented as in figure 123.


UL1 ILn R1 + j X1 Phase-to-earth element

Phase-to-earth fault in phase L1

RFPE (Arc + tower resistance) 0 IN (R0-R1)/3 + j (X0-X1)/3 )


en06000412.vsd

IEC06000412 V1 EN

Figure 123:

Fault loop model

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The R1 and jX1 in figure 123 represents the positive sequence impedance from the measuring point to the fault location. The RFPE is presented in order to convey the fault resistance reach. The zone may be set to operate in Non-directional, Forward, Off or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 124. It may be convenient to once again mention that the impedance reach is symmetric, in the sense that it is conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X

Non-directional

Forward

Reverse

en05000182.vsd
IEC05000182 V1 EN

Figure 124:

Directional operating modes of the distance measuring zone

6.5.2.3

Minimum operating current


The operation of the distance measuring zone is blocked if the magnitude of input currents fall below certain threshold values. The phase-to-earth loop Ln is blocked if ILn < IMinOpPE. For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase currents. ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three phase currents, that is, residual current 3I0. Both current limits IMinOpPE and IMinOpIN are automatically reduced to 75% of regular set values if the zone is set to operate in reverse direction, that is, OperationDir=Reverse.

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6.5.2.4 Measuring principles

1MRK505183-UEN C

Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n = 1, 2, 3). The calculation of the apparant impedances at phase-to-earth fault follow equation 42 The earth return compensation applies in a conventional manner.
U L1 Z app = ----------------------------I L1 + I N KN
EQUATION1223 V1 EN

(Equation 42)

Where: UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED KN is defined as:

KN =

Z0 - Z1 3 Z1

EQUATION 2105 V1 EN

Z 0 = R0 + jX 0
EQUATION2106 V1 EN

Z1 = R1 + jX 1
EQUATION2107 V1 EN

Where R0 X0 R1 X1 is setting of the resistive zero sequence reach is setting of the reactive zero sequence reach is setting of the resistive positive sequence reach is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current in IED point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X. The formula given in equation 42 is only valid for no loaded radial feeder applications. When load is considered in the case of single line-to-earth fault,

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Section 6 Impedance protection

conventional distance protection might overreach at exporting end and underreach at importing end. IED has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current between samples (DI) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 43,
X Di -- --U = R i + ---- -w 0 Dt
EQUATION1224 V1 EN

(Equation 43)

in complex notation, or:


X D Re ( I ) Re ( U ) = R Re ( I ) + ------ ----------------w0 Dt
EQUATION354 V1 EN

(Equation 44)

X DIm ( I ) Im ( U ) = R Im ( I ) + ------ ---------------Dt w0


EQUATION355 V1 EN

(Equation 45)

with
w0 = 2 p f 0
EQUATION356 V1 EN

(Equation 46)

where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:
Im ( U ) DRe ( I ) Re ( U ) D Im ( I ) ----------------------------------R m = -----------------------------------------------DRe ( I ) Im ( I ) D Im ( I ) Re ( I )
EQUATION357 V1 EN

(Equation 47)

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Re ( U ) Im ( I ) Im ( U ) Re ( I )Xm = w 0 Dt -----------------------------------------------------------------------------DRe ( I ) Im ( I ) DIm ( I ) Re ( I )


EQUATION358 V1 EN

(Equation 48)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the IED point.

6.5.2.5

Directional lines
The evaluation of the directionality takes place in the Directional impedance element for mho characteristic ZDMRDIR function. Equation 49 is used to classify that the fault is in forward direction for line-to-earth fault.

- ArgDir < arg


EQUATION1617 V1 EN

0.85 U1L1 + 0.15 U1L1M I L1

< ArgNeg Re s
(Equation 49)

where:

ArgDir

is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and

ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 125.
U1L1 U1L1M IL1 is positive sequence phase voltage in phase L1 is positive sequence memorized phase voltage in phase L1 is phase current in phase L1

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively (see figure 125) and it should not be changed unless system studies have shown the necessity. ZDMRDIR gives a binary coded signal on the output STDIRCND depending on the evaluation where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.

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Section 6 Impedance protection

ArgNegRes

ArgDir

en05000722.vsd
IEC05000722 V1 EN

Figure 125:

Setting angles for discrimination of forward and reverse fault

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100 ms, the following occurs: If the current is still above the set value of the minimum operating current (between 10 and 30% of the set IED rated current IBase), the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.

If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.

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Section 6 Impedance protection


6.5.2.6 Simplified logic diagrams Distance protection zones

1MRK505183-UEN C

The design of distance protection zone 1 is presented for all measuring: phase-toearth loops. Phase-to-earth related signals are designated by LnE, where n represents the corresponding phase number (L1E, L2E, and L3E). Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (STCND), as presented in figure 126.

The STCND input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to the Phase selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCNDZ. The input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filter out the relevant signals on the DIRCND input depending on the setting of the parameter OperationDir. It shall be configured to the DIRCND output on the Directional impedance element for mho characteristic (ZDMRDIR) function.

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STCND STNDL1N STNDL2N STNDL3N OR STNDPE

L1N L2N L3N

AND AND AND

OR VTSZ BLOCK OR AND STND BLK


en06000408.vsd
IEC06000408 V1 EN

Figure 126:

Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a nondirectional mode, is presented in figure 127.
STNDL1N AND STNDL2N AND STNDL3N AND AND 15 ms t 15 ms t 15 ms t 15 ms t

STL1 STL2 STL3 START

OR BLK

en06000409.vsd
IEC06000409 V1 EN

Figure 127:

Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, see figure 128.

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STNDL1N DIRL1N STNDL2N DIRL2N STNDL3N DIRL3N

AND OR AND & 15 ms t STL1 & STZMPE.

AND

&

15 ms t

STL2

& BLK OR

15 ms t

STL3

&

15 ms t

START

en07000081.vsd
IEC07000081 V1 EN

Figure 128:

Composition of starting signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 129.

Timer tPE=On STZMPE BLKTR AND

tPE t 15ms AND


t

TRIP

STL1 STL2 STL3

AND AND AND

TRL1 TRL2 TRL3

en07000082.vsd
IEC07000082 V1 EN

Figure 129:

Tripping logic for the distance protection zone one

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ZMMPDIS I3P* U3P* BLOCK BLKZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC06000454-2-en.vsd
IEC06000454 V2 EN

6.5.3

Figure 130:

ZMMPDIS function block

ZMMAPDIS I3P* U3P* BLOCK BLKZ BLKTR STCND DIRCND TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND IEC09000947-1-en.vsd
IEC09000947 V1 EN

Figure 131:

ZMMAPDIS function block

6.5.4

Input and output signals


Table 115:
Name I3P U3P BLOCK BLKZ BLKTR STCND DIRCND

ZMMPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Blocks all output by fuse failure signal Blocks all trip outputs External start condition (loop enabler) External directional condition

Table 116:
Name TRIP TRL1 TRL2 TRL3

ZMMPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General Trip, issued from any phase or loop Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3

Table continues on next page

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Name START STL1 STL2 STL3 STND Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description

1MRK505183-UEN C

General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop

Table 117:
Name I3P U3P BLOCK BLKZ BLKTR STCND DIRCND

ZMMAPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Blocks all output by fuse failure signal Blocks all trip outputs External start condition (loop enabler) External directional condition

Table 118:
Name TRIP TRL1 TRL2 TRL3 START STL1 STL2 STL3 STND

ZMMAPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General Trip, issued from any phase or loop Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 General Start, issued from any phase or loop Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Non-directional start, issued from any phase or loop

6.5.5
Table 119:
Name Operation IBase UBase

Setting parameters
ZMMPDIS Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Unit A kV Step 1 0.05 Default On 3000 400.00 Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage

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Values (Range) Off Non-directional Forward Reverse 0.50 - 3000.00 0.10 - 1000.00 0.50 - 9000.00 0.50 - 3000.00 1.00 - 9000.00 Off On 0.000 - 60.000 10 - 30 5 - 30 Unit Step Default Forward Description Operation mode of directionality NonDir / Forw / Rev

Name OperationDir

X1 R1 X0 R0 RFPE Timer tPE tPE IMinOpPE IMinOpIN

ohm/p ohm/p ohm/p ohm/p ohm/l s %IB %IB

0.01 0.01 0.01 0.01 0.01 0.001 1 1

30.00 5.00 100.00 15.00 100.00 On 0.000 20 5

Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate phase current for Phase-Earth loops Minimum operate residual current for Phase-Earth loops

Table 120:
Name Operation IBase UBase OperationDir

ZMMAPDIS Group settings (basic)


Values (Range) Off On 1 - 99999 0.05 - 2000.00 Off Non-directional Forward Reverse 0.50 - 3000.00 0.10 - 1000.00 0.50 - 9000.00 0.50 - 3000.00 1.00 - 9000.00 Off On 0.000 - 60.000 10 - 30 Unit A kV Step 1 0.05 Default On 3000 400.00 Forward Description Operation Off / On Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

X1 R1 X0 R0 RFPE Timer tPE tPE IMinOpPE

ohm/p ohm/p ohm/p ohm/p ohm/l s %IB

0.01 0.01 0.01 0.01 0.01 0.001 1

40.00 5.00 120.00 15.00 100.00 On 0.000 20

Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-E Operation mode Off / On of Zone timer, Ph-E Time delay of trip, Ph-E Minimum operate phase current for Phase-Earth loops

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Table 121:
Function Number of zones Minimum operate current Positive sequence reactance Positive sequence resistance Zero sequence reactance Zero sequence resistance Fault resistance, Ph-E Dynamic overreach Impedance zone timers Operate time Reset ratio Reset time

1MRK505183-UEN C

ZMMPDIS technical data


Range or value with selectable direction (10-30)% of IBase (0.50-3000.00) W/phase (0.10-1000.00) /phase (0.50-9000.00) /phase (0.50-3000.00) /phase (1.00-9000.00) W/loop <5% at 85 degrees measured with CCVTs and 0.5<SIR<30 (0.000-60.000) s 24 ms typically 105% typically 30 ms typically Accuracy 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees 0.5% 10 ms -

6.6

Directional impedance element for mho characteristic and additional distance protection directional function for earth faults ZDMRDIR, ZDARDIR
Function description Directional impedance element for mho characteristic IEC 61850 identification ZDMRDIR IEC 60617 identification ANSI/IEEE C37.2 device number 21D

S00346 V1 EN

Function description Additional distance protection directional function for earth faults

IEC 61850 identification ZDARDIR

IEC 60617 identification

ANSI/IEEE C37.2 device number -

S00346 V1 EN

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Section 6 Impedance protection Introduction


The phase-to-earth impedance elements can be optionally supervised by a phase unselective directional function based on symmetrical components.

6.6.1

6.6.2
6.6.2.1

Principle of operation
Directional impedance element for mho characteristic ZDMRDIR
The evaluation of the directionality takes place in Directional impedance element for mho characteristic (ZDMRDIR). Equation 50 and equation 51 are used to classify that the fault is in the forward direction for phase-to-earth fault and phaseto-phase fault respectively.

- ArgDir < arg


EQUATION1617 V1 EN

0.85 U1L1 + 0.15 U1L1M I L1

< ArgNeg Re s
(Equation 50)

- ArgDir < arg


EQUATION1619 V1 EN

0.85 U1L1L 2 + 0.15 U1L1L 2M I L1L 2

< ArgNeg Re s
(Equation 51)

Where: ArgDir ArgNegRes U1L1 U1L1M IL1 U1L1L2 U1L1L2M IL1L2 Setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) Setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 132 for mho characteristics. Positive sequence phase voltage in phase L1 Positive sequence memorized phase voltage in phase L1 Phase current in phase L1 Voltage difference between phase L1 and L2 (L2 lagging L1) Memorized voltage difference between phase L1 and L2 (L2 lagging L1) Current difference between phase L1 and L2 (L2 lagging L1)

The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees respectively (see figure 132) and they should not be changed unless system studies show the necessity. If one sets DirEvalType to Comparator (which is recommended when using the mho characteristic) then the directional lines are computed by means of a comparatortype calculation, meaning that the directional lines are based on mho-circles (of infinite radius). The default setting value Impedance otherwise means that the

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directional lines are implemented based on an impedance calculation equivalent to the one used for the quadrilateral impedance characteristics. When Directional impedance element for mho characteristic (ZDMRDIR) is used together with Fullscheme distance protection, mho characteristic (ZMHPDIS) the following settings for parameter DirEvalType is vital: alternative Comparator is strongly recommended alternative Imp/Comp should generally not be used alternative Impedance should not be used. This altenative is intended for use together with Distance protection zone, quadrilateral characteristic (ZMQPDIS)

X Zset reach point

ArgNegRes

-ArgDir

-Zs
en06000416.vsd
IEC06000416 V1 EN

Figure 132:

Setting angles for discrimination of forward fault

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100ms or until the positive sequence voltage is restored. After 100ms, the following occurs:

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If the current is still above the set value of the minimum operating current the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.

If the current decreases below the minimum operating value, no directional indications will be given until the positive sequence voltage exceeds 10% of its rated value.

The Directional impedance element for mho characteristic (ZDMRDIR) function has the following output signals: The STDIRCND output provides an integer signal that depends on the evaluation and is derived from a binary coded signal as follows:
bit 11 (2048) STRVL3L1= 1 bit 5 (32) STFWL3L1= 1 bit 10 (1024) STRVL2L3= 1 bit 4 (16) STFWL2L3= 1 bit 9 (512) STRVL1L2= 1 bit 3 (8) STFWL1L2= 1 bit 8 (256) STRVL3N=1 bit 2 (4) STFWL3N=1 bit 7 (128) STRVL2N=1 bit 1 (2) STFWL2N=1 bit 6 (64) STRVL1N=1 bit 0 (1) STFWL1N=1

The STFW output is a logical signal with value 1 or 0. It is made up as an ORfunction of all the forward starting conditions, that is, STFWL1N, STFWL2N, STFWL3N, STFWL1L2, STFWL2L3 and STFWL3L1. The STRV output is similar to the STFW output, the only difference being that it is made up as an ORfunction of all the reverse starting conditions, that is, STRVL1N, STRVL2N, STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1. Values for the following parameters are calculated, and may be viewed as service values: resistance phase L1 reactance phase L1 resistance phase L2 reactance phase L2 resistance phase L3 reactance phase L3 direction phase L1 direction phase L2 direction phase L3

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6.6.2.2

1MRK505183-UEN C

Additional distance protection directional function for earth faults ZDARDIR


A Mho element needs a polarizing voltage for its operation. The positive-sequence memory-polarized elements are generally preferred. The benefits include: The greatest amount of expansion for improved resistive coverage. These elements always expand back to the source. Memory action for all fault types. This is very important for close-in threephase faults. A common polarizing reference for all six distance-measuring loops. This is important for single-pole tripping, during a pole-open period.

There are however some situations that can cause security problems like reverse phase to phase faults and double phase-to-earth faults during high load periods. To solve these, additional directional element is used. For phase-to-earth faults, directional elements using sequence components are very reliable for directional discrimination. The directional element can be based on one of following types of polarization: Zero-sequence voltage Negative-sequence voltage Zero-sequence current

These additional directional criteria are evaluated in the Additional distance protection directional function for earth faults (ZDARDIR). Zero-sequence voltage polarization is utilizing the phase relation between the zerosequence voltage and the zero-sequence current at the location of the protection. The measurement principle is illustrated in figure 133.

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- 3U 0
AngleOp AngleRCA

3I 0
en06000417.vsd
IEC06000417 V1 EN

Figure 133:

Principle for zero-sequence voltage polarized additional directional element

Negative-sequence voltage polarization is utilizing the phase relation between the negative-sequence voltage and the negative-sequence current at the location of the protection. Zero-sequence current polarization is utilizing the phase relation between the zerosequence current at the location of the protection and some reference zerosequence current, for example, the current in the neutral of a power transformer. The principle of zero-sequence voltage polarization with zero-sequence current compensation is described in figure 134. The same also applies for the negativesequence function.

Z0 SA

I0

Z0 Line

Z0 SB U0

I0
Charac te ris tic ang le

U0

K*I0 U0 + K*I0 IF
en06000418.vsd

IEC06000418 V1 EN

Figure 134:

Principle for zero sequence compensation

Note that the sequence based additional directional element cannot give per phase information about direction to fault. This is why it is an AND-function with the normal directional element that works on a per phase base. The release signals are per phase and to have a release of a measuring element in a specific phase both the additional directional element, and the normal directional element, for that phase must indicate correct direction.
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Normal directional element L1N, L2N, L3N Additional directional element

AND

Release of distance measuring element L1N, L2N, L3N

AND per phase


en06000419.vsd

IEC06000419 V1 EN

Figure 135:

Earth distance element directional supervision

6.6.3

Function block
ZDMRDIR I3P* U3P* DIR_CURR DIR_VOLT DIR_POL STFW STRV STDIRCND IEC06000422_2_en.vsd
IEC06000422 V2 EN

Figure 136:

ZDMRDIR function block

ZDARDIR I3P* U3P* I3PPOL* DIRCND STFWPE STRVPE DIREFCND

IEC06000425-2-en.vsd
IEC06000425 V2 EN

Figure 137:

ZDARDIR function block

6.6.4

Input and output signals


Table 122:
Name I3P U3P

ZDMRDIR Input signals


Type GROUP SIGNAL GROUP SIGNAL Default Description group connection for current abs 1 group connection for voltage abs 1

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Table 123:
Name DIR_CURR DIR_VOLT DIR_POL STFW STRV STDIRCND

ZDMRDIR Output signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN INTEGER Description Group connection Group connection Group connection Start in forward direction Start in reverse direction Binary coded directional information per measuring loop

Table 124:
Name I3P U3P I3PPOL DIRCND

ZDARDIR Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL INTEGER Default 0 Description Current signals Voltage signals Polarisation current signals Binary coded directional signal

Table 125:
Name STFWPE STRVPE DIREFCND

ZDARDIR Output signals


Type BOOLEAN BOOLEAN INTEGER Description Forward start signal from phase-to-ground directional element Reverse start signal from phase-to-ground directional element Start direction Binary coded

6.6.5
Table 126:
Name IBase UBase DirEvalType

Setting parameters
ZDMRDIR Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 Impedance Comparator Imp/Comp 90 - 175 5 - 45 5 - 30 5 - 30 Unit Step 1 0.05 Default 3000 400.00 Comparator Description Base setting for current level Base setting for voltage level Directional evaluation mode Impedance / Comparator Angle of blinder in second quadrant for forward direction Angle of blinder in fourth quadrant for forward direction Minimum operate phase current for Phase-Earth loops Minimum operate delta current for PhasePhase loops 241

ArgNegRes ArgDir IMinOpPE IMinOpPP

Deg Deg %IB %IB

1 1 1 1

115 15 5 10

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Section 6 Impedance protection

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Table 127:
Name IBase UBase PolMode

ZDARDIR Group settings (basic)


Values (Range) 1 - 99999 0.05 - 2000.00 -3U0 -U2 IPol Dual -3U0Comp -U2comp -90 - 90 1 - 200 1 - 100 5 - 100 Unit A kV Step 1 0.05 Default 3000 400.00 -3U0 Description Base setting for current values Base setting for voltage level in kV Polarization quantity for opt dir function for P-E faults

AngleRCA I> UPol> IPol>

Deg %IB %UB %IB

1 1 1 1

75 5 1 10

Characteristic relay angle (= MTA or base angle) Minimum operation current in % of IBase Minimum polarizing voltage in % of UBase Minimum polarizing current in % of IBase

Table 128:
Name AngleOp Kmag

ZDARDIR Group settings (advanced)


Values (Range) 90 - 180 0.50 - 3000.00 Unit Deg ohm Step 1 0.01 Default 160 40.00 Description Operation sector angle Boost-factor in -U0comp and -U2comp polarization

6.7

Mho impedance supervision logic ZSMGAPC


Function description Mho Impedance supervision logic IEC 61850 identification ZSMGAPC IEC 60617 identification ANSI/IEEE C37.2 device number -

6.7.1

Introduction
The Mho impedance supervision logic (ZSMGAPC) includes features for fault inception detection and high SIR detection. It also includes the functionality for loss of potential logic as well as for the pilot channel blocking scheme. ZSMGAPC can mainly be decomposed in two different parts: 1. 2. A fault inception detection logic High SIR detection logic

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Section 6 Impedance protection Principle of operation


Fault inception detection
The aim for the fault inception detector is to detect quickly that a fault has occurred on the system. The fault inception detection detects instantaneous changes in any phase currents or zero sequence current in combination with a change in the corresponding phase voltage or zero sequence voltage. If the change of any phase current and corresponding phase voltage or 3U0 and 3I0 exceeds the settings DeltaI and DeltaU respectively. Delta3U0 and Delta3I0 and the input signal BLOCK is not activated, the output signal FLTDET is activated indicating that a system fault has occurred. If the setting PilotMode is set to On in blocking scheme and the fault inception function has detected a system fault, a block signal BLKCHST will be issued and send to remote end in order to block the overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST signal: 1. 2. 3. The setting PilotMode has to be set to On The breaker has to be closed, that is, the input signal CBOPEN has to be deactivated A reverse fault should have been detected while the carrier send signal is not blocked, that is, input signal REVSTART is activated and input signal BLOCKCS is not activated

6.7.2
6.7.2.1

Or A fault inception is detected If it is later detected that it was an internal fault that made the function issue the BLKCHST signal, the function will issue a CHSTOP signal to unblock the remote end. The criteria that have to be fulfilled for this are: 1. 2. 3. The function has to be in pilot mode, that is, the setting PilotMode has to be set to On The carrier send signal should be blocked, that is, input signal BLOCKCS is On and, A reverse fault should not have been detected while the carrier send signal was not blocked, that is, input signals REVSTART and BLOCKCS is not activated.

ZSMGAPC function has a built in loss of voltage detection based on the evaluation of the change in phase voltage or the change in zero sequence voltage (3U0). It operates if the change in phase voltages exceeds the setting DeltaU or 3U0 exceeds the setting Delta3U0. If loss of voltage is detected, but not a fault inception, the distance protection function will be blocked. This is also the case if a fuse failure is detected by the
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external fuse failure function and activate the input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which shall be connected to the input BLKZ on the distance Mho function block. During fault inception a lot of transients will be developed which in turn might cause the distance function to overreach. The Mho supervision logic (ZSMGAPC) will increase the filtering during the most transient period of the fault. This is done by activating the output BLKZMD, which shall be connected to the input BLKZMTD on mho distance function block.

High SIR detection

High SIR values increases the likelihood that CVT will introduce a prolonged and distorted transient, increasing the risk for overreach of the distance function. The SIR function calculates the SIR value as the source impedance divided by the setting Zreach and activates the output signal HSIR if the calculated value for any of the six basic shunt faults exceed the setting SIRLevel. The HSIR signal is intended to block the delta based mho impedance function.

6.7.3

Function block
ZSMGAPC I3P* BLKZMTD U3P* BLKCHST BLOCK CHSTOP REVSTART HSIR BLOCKCS CBOPEN IEC06000426-2-en.vsd
IEC06000426 V2 EN

Figure 138:

ZSMGAPC function block

6.7.4

Input and output signals


Table 129:
Name I3P U3P BLOCK REVSTART BLOCKCS CBOPEN

ZSMGAPC Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 Description Three phase current samples and DFT magnitude Three phase phase-neutral voltage samples and DFT magnitude Block of the function Indication of reverse start Blocks the blocking carrier signal to remote end Indicates that the breaker is open

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Table 130:
Name BLKZMTD BLKCHST CHSTOP HSIR

ZSMGAPC Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Block signal for blocking of time domained mho Blocking signal to remote end to block overreaching zone Stops the blocking signal to remote end Indication of source impedance ratio above set limit

6.7.5
Table 131:
Name IBase UBase PilotMode Zreach IMinOp

Setting parameters
ZSMGAPC Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 Off On 0.1 - 3000.0 10 - 30 Unit A kV ohm %IB Step 1 0.05 0.1 1 Default 3000 400.00 Off 38.0 20 Description Base value for current measurement Base value for voltage measurement Pilot mode Off/On Line impedance Minimum operating current for SIR measurement

Table 132:
Name DeltaI Delta3I0 DeltaU Delta3U0 SIRLevel

ZSMGAPC Group settings (advanced)


Values (Range) 0 - 200 0 - 200 0 - 100 0 - 100 5 - 15 Unit %IB %IB %UB %UB Step 1 1 1 1 1 Default 10 10 5 5 10 Description Current change level in %IB for fault inception detection Zero seq current change level in % of IB Voltage change level in %UB for fault inception detection Zero seq voltage change level in % of UB Settable level for source impedance ratio

6.8

Faulty phase identification with load encroachment FMPSPDIS


Function description Faulty phase identification with load encroachment for mho IEC 61850 identification FMPSPDIS IEC 60617 identification ANSI/IEEE C37.2 device number 21

S00346 V1 EN

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1MRK505183-UEN C

The operation of transmission networks today is in many cases close to the stability limit. Due to environmental considerations the rate of expansion and reinforcement of the power system is reduced, for example difficulties to get permission to build new power lines. The ability to accurate and reliable classifying the different types of fault so that single phase tripping and autoreclosing can be used plays an important roll in this matter. The phase selection function is design to accurate select the proper fault loop in the distance function dependent on the fault type. The heavy load transfer that is common in many transmission networks may in some cases interfere with the distance protection zone reach and cause unwanted operation. Therefore the function has a built in algorithm for load encroachment, which gives the possibility to enlarge the resistive setting of the measuring zones without interfering with the load. The output signals from the phase selection function produce important information about faulty phase(s), which can be used for fault analysis as well.

6.8.2
6.8.2.1

Principle of operation
The phase selection function
Faulty phase identification with load encroachment for mho (FMPSPDIS) function can be decomposed into six different parts: 1. 2. 3. 4. 5. 6. A high speed delta based current phase selector A high speed delta based voltage phase selector A symmetrical components based phase selector Fault evaluation and selection logic A load encroachment logic A blinder logic

The total function can be blocked by activating the input BLOCK.

Delta based current and voltages

The delta based fault detection function uses adaptive technique and is based on patent US4409636. The aim of the delta based phase selector is to provide very fast and reliable phase selection for releasing of tripping from the high speed Mho measuring element and is essential to Directional Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication system across the protected line. The current and voltage samples for each phase passes through a notch filter that filters out the fundamental components. Under steady state load conditions or when no fault is present, the output of the filter is zero or close to zero. When a fault
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Section 6 Impedance protection

occurs, currents and voltages change resulting in sudden changes in the currents and voltages resulting in non-fundamental waveforms being introduced on the line. At this point the notch filter produces significant non-zero output. The filter output is processed by the delta function. The algorithm uses an adaptive relationship between phases to determine if a fault has occurred, and determines the faulty phases. The current and voltage delta based phase selector gives a real output signal if the following criterion is fulfilled (only phase L1 shown): Max(UL1,UL2,UL3)>DeltaUMinOp Max(IL1,IL2,IL3)>DeltaIMinOp
where: UL1, UL2 and UL3 are the voltage change between sample t and sample t-1 are the minimum harmonic level settings for the voltage and current filters to decide that a fault has occurred. A slow evolving fault may not produce sufficient harmonics to detect the fault; however, in such a case speed is no longer the issue and the sequence components phase selector will operate.

DeltaUMinOp and DeltaIMinOp

The delta voltages ULn and delta current ILn (n prefix for phase order) are the voltage and current between sample t and sample t-1. The delta phase selector employs adaptive techniques to determine the fault type. The logic determines the fault type by summing up all phase values and dividing by the largest value. Both voltages and currents are filtered out and evaluated. The condition for fault type classification for the voltages and currents can be expressed as:

Fa ulType =
EQUATION1621 V1 EN

S( DUL1, DUL2, DUL3) Ma x( DIL1, DIL2, DUL3)


(Equation 52)

Fa ultType =
EQUATION1622 V1 EN

S( DIL1, DIL2, DIL3) Ma x( DIL1, DIL2, DIL3)


(Equation 53)

The value of FaultType for different shunt faults are as follows:


Under ideal conditions: (Patent pending) Single phase-to-earth; Phase-to-phase fault Three-phase fault; FaultType=1 FaultType=2 FaultType=3

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The output signal is 1 for single phase-to-earth fault, 2 for phase-to-phase fault and 3 for three-phase fault. At this point the filter does not know if earth was involved or not. Typically there are induced harmonics in the non-faulted lines that will affect the result. This method allows for a significant tolerance in the evaluation of FaultType over its entire range. When a single phase-to-earth fault has been detected, the logic determines the largest quantity, and asserts that phase. If phase-to-phase fault is detected, the two largest phase quantities will be detected and asserted as outputs. The faults detected by the delta based phase selector are coordinated in a separate block. Different phases of faults may be detected at slightly different times due to differences in the angles of incidence of fault on the wave shape. Therefore the output is forced to wait a certain time by means of a timer. If the timer expires, and a fault is detected in one phase only, the fault is deemed as phase-to-earth. This way a premature single phase-to-earth fault detection is not released for a phase-tophase fault. If, however, earth current is detected before the timer expires, the phaseto-earth fault is released sooner. If another phase picks up during the time delay, the wait time is reduced by a certain amount. Each detection of either earth-to-phase or additional phases further reduce the initial time delay and allow the delta phase selector output to be faster. There is no time delay, if for example, all three phases are faulty. The delta function is released if the input DELTAREL is activated at the same time as input DELTABLK is not activated. Activating the DELTABLK input will block the delta function. The release signal has an internal pulse timer of 100 ms. When the DELTAREL signal has disappeared the delta logic is reset. In order not to get too abrupt change, the reset is decayed in pre-defined steps.

Symmetrical component based phase selector

The symmetrical component phase selector uses preprocessed calculated sequence voltages and currents as inputs. It also uses sampled values of the phase currents. All the symmetrical quantities mentioned further in this section are with reference to phase L1. The function is made up of four main parts:
A B C D Detection of the presence of earth fault A phase-to-phase logic block based on U1/U2 angle relationship A phase-to-earth component based on patent US5390067 where the angle relationships between U2/I0 and U2/U1 is evaluated to determine earth fault or phase- to-phase to earth fault Logic for detection of three-phase fault

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Section 6 Impedance protection


Presence of earth-fault detection This detection of earth fault is performed in two levels, first by evaluation of the magnitude of zero sequence current, and secondly by the evaluation of the zero and negative sequence voltage. It is a complement to the earth-fault signal built-in in the Symmetrical component based phase selector. The complementary based zero-sequence current function evaluates the presence of earth fault by calculating the 3I0 and comparing the result with the setting parameter INRelPE. The output signal is used to release the earth-fault loop. It is a complement to the earth-fault signal built-in in the sequence based phase selector. The condition for releasing the phase-to-earth loop is as follows: The output from this detection is used to release the earth-fault loop. |3I0|>maxIph: INRelPE
where: |3I0| maxIph is the magnitude of the zero sequence current 3I0 is the maximum magnitude of the phase currents is a setting parameter for the relation between the magnitude of 3I0 and the maximum phase current

INRelPE

The earth-fault loop is also released if the evaluation of the zero sequence current by the main sequence function meets the following conditions: |3I0|>IBase 0.5 |3I0|>maxIph INRelPE
where: maxIph is the maximal current magnitude found in any of the three phases is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of IBase is the global setting of the base current (A)

INRelPE IBase

In systems where the source impedance for zero sequence is high the change of zero sequence current may not be significant and the above detection may fail. In those cases the detection enters the second level, with evaluation of zero and negative sequence voltage. The release of the earth-fault loops can then be achieved if all of the following conditions are fulfilled: |3U0|>|U2| 0.5 |3U0|>|U1| 0.2 |U1|> UBase 0.2/(3) and
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3I0> 0.1 IBase or 3I0<maxIph INRelPE


where: 3U0 U2 k5 ILmax is the magnitude of the zero sequence voltage is the magnitude of the negative sequence voltage at the relay measuring point of phase L1 is design parameter is the maximal phase current is the setting of minimum operate phase current in % of IBase

IMinOp

Phase-to-phase fault detection The detection of phase-to-phase fault is performed by evaluation of the angle difference between the sequence voltages U2 and U1.

UL3 L3-L1 sector 180 UL2

60

L2-L3 sector L1-L2 sector UL1 300

U1L1 (Ref)

en06000383.vsd
IEC06000383 V1 EN

Figure 139:

Definition of fault sectors for phase-to-phase fault

The phase-to-phase loop for the faulty phases will be determined if the angle between the sequence voltages U2 and U1 lies within the sector defined according to figure 139 and the following conditions are fulfilled: |U1|>U1MinOP |U2|>U2MinOp
where:

U1MinOP and U2MinOp

are the setting parameters for positive sequence and negative sequence minimum operate voltages

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The positive sequence voltage U1L1 in figure 139 above is reference. If there is a three-phase fault, there will not be any release of the individual phase signals, even if the general conditions for U2 and U1 are fulfilled. Phase-to-earth and phase-to-phase-to-earth-fault detection The detection of phase-to-earth and phase-to-phase-to-earth fault (US patent 5390067) is based on two conditions: 1. Angle relationship between U2 and I0 2. Angle relationship between U2 and U1 The condition 1 determines faulty phase at single phase-to-earth fault by determine the argument between U2 and I0.

80

L2-E sector

L3-E sector

200

L1-E sector
320

IEC06000384-2-en.vsd
IEC06000384 V2 EN

Figure 140:

Condition 1: Definition of faulty phase sector as angle between U2 and I0

The angle is calculated in a directional function block and gives the angle in radians as input to the U2 and I0 function block. The input angle is released only if the fault is in forward direction. This is done by the directional element. The fault is classified as forward direction if the angle between U0 and I0 lies between 20 to 200 degrees, see figure 141.

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Forward

20

200

Reverse

en06000385.vsd

IEC06000385 V1 EN

Figure 141:

Directional element used to release the measured angle between Uo and I0

The input radians are summarized with an offset angle and the result evaluated. If the angle is within the boundaries for a specific sector, the phase indication for that sector will be active see figure 140. Only one sector signal is allowed to be activated at the same time. The sector function for condition 1 has an internal release signal which is active if the main sequence function has classified the angle between U0 and I0 as valid. The following conditions must be fulfilled for activating the release signals: |U2|>U2MinOp |3I0|> 0.05 IBase |3I0|>maxIph INRelPE
where: U2 and IN are the magnitude of the negative sequence voltage and zerosequence current (3I0) is the setting parameter for minimum operating negative sequence voltage is the maximum phase current is the setting parameter for 3I0 limit for releasing phase-to-earth loop

U2MinOp
maxIph

INRelPE

The angle difference is phase shifted by 180 degrees if the fault is in reverse direction. The condition 2 looks at the angle relationship between the negative sequence voltage U2 and the positive sequence voltage U1. Since this is a phase-to-phase voltage relationship, there is no need for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the fault sectors will have the same angle boarders as for condition 1. If the calculated angle between U2 and U1 lies
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within one sector, the corresponding phase for that sector will be activated. The condition 2 is released if both the following conditions are fulfilled: |U2|>U2MinOp |U1|>U1MinOP
where: |U1| and |U2| are the magnitude of the positive and negative sequence voltages. are the setting parameters for positive sequence and negative sequence minimum operating voltages.

U1MinOP and U2MinOp

140

L3-E sector
20 U1L1 (Ref)

L1-E sector

L2-E sector

260
IEC06000413 V2 EN

IEC06000413_2_en.vsd

Figure 142:

Condition 2: U2 and U1 angle relationship

If both conditions are true and there is sector match, the fault is deemed as single phase-to-earth. If the sectors, however, do not match the fault is determined to be the complement of the second condition, that is, a phase-to-phase-to- earth fault.
Condition 1 and L3-E L2-E Condition 2 L3-E L1-E Fault type L3-E L2-L3-E

The sequence phase selector is blocked when earth is not involved or if a threephase fault is detected. Three-phase fault detection Unless it has been categorized as a single or two-phase fault, the function classifies it as a three-phase fault if the following conditions are fulfilled: |U1|<U1Level

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and |I1|>I1LowLevel or |I1|>IMaxLoad


where: |U1| and |I1| are the positive sequence voltage and current magnitude are the setting of limits for positive sequence voltage and current is the setting of the maximum load current

U1Level , I1LowLevel IMaxLoad

The output signal for detection of three-phase fault is only released if not earth fault and phase-to-phase fault in the main sequence function is detected. The conditions for not detecting earth fault are the inverse of equation 5 to 10. The condition for not detecting phase-to-phase faults is determined by three conditions. Each of them gives condition for not detecting phase-to-phase fault. Those are:
1: earth fault is detected or |3I0IN|> 0.05 IBase and |3I0IN|>maxIph INRelPE 2: phase-to-earth and phase-to-phase faults are not fulfilled and maxIph<0.1 IBase and |I2|<0.1 maxIph 3: |3I0IN|>maxIph INBlockPP or |I2|<maxIph I2maxIL

where: maxIph is the maximum of the phase currents IL1, IL2 and IL3 is the setting parameter for 3I0 limit for release of phase-to-earth fault loops

INRelPE

Table continues on next page 254 Technical reference manual

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Section 6 Impedance protection

|I2| I2ILmax

is the magnitude of the negative sequence current is the setting parameter for the relation between negative sequence current to the maximum phase current in percent of IBase is the setting parameter for 3I0 limit for blocking phase to phase measuring loops

INBlockPP

Fault evaluation and selection logic

The phase selection logic has an evaluation procedure that can be simplified according to figure 143. Only phase L1 is shown in the figure. If the internal signal 3 Phase fault is activated, all four outputs START, STL1, STL2 and STL3 gets activated.

DeltaIL1 DeltaUL1
Sequence based function

a b

a>b then c=a else c=a

FaultPriority Adaptive release dependent on result from Delta logic

a
OR

L1L2 fault L1N fault 3 Phase fault

a<b then c=b else c=a

OR

IL1Valid BLOCK

&

STL1

en06000386.vsd
IEC06000386 V1 EN

Figure 143:

Simplified diagram for fault evaluation, phase L1

Load encroachment logic

Each of the six measuring loops has its own load (encroachment) characteristic based on the corresponding loop impedance. The load encroachment functionality is always activated in faulty phase identification with load encroachment for mho (FMPSPDIS) function but the influence on the zone measurement can be switched On/Offin the respective impedance measuring function. The outline of the characteristic is presented in figure 144. As illustrated, the resistive reach in forward and reverse direction and the angle of the sector is the same in all four quadrants. The reach for the phase selector will be reduced by the load encroachment function, as shown in figure 144.

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Blinder

1MRK505183-UEN C

Blinder provides a mean to discriminate high load from a fault. The operating characteristic is illustrated in figure 144. There are six individual measuring loops with the blinder functionality. Three phase-to-earth loops which estimate the impedance according to Zn = Uph / Iph and three phase-to-phase loops according to Zph-ph = Uph-ph / Iph-ph The start operations from respective loop are binary coded into one word and provides an output signal STCNDPLE.
X jX

Operation area RLd ArgLd ArgLd R ArgLd RLd ArgLd

Operation area

Operation area

No operation area

No operation area

en06000414.vsd
IEC06000414 V1 EN

Figure 144:

Influence on the characteristic by load encroachment logic

Outputs

The output of the sequence components based phase selector and the delta logic phase selector activates the output signals STL1, STL2 and STL3. If an earth fault is detected the signal STPE gets activated. The phase selector also gives binary coded signals that are connected to the zone measuring element for opening the correct measuring loop(s). This is done by the signal STCNDPHS. If only one phase is started (L1, L2 or L3), the corresponding phase-to- element is enabled. STPE is expected to be made available for two-phase and three-phase faults for the correct output to be selected. The fault loop is indicated by one of the decimal numbers below. The output STCNDPHS provides release information from the phase selection part only. STCNDLE provides release information from the load encroachment part only. STCNDPLE provides release information from the phase selection part and
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the load encroachment part combined, that is, both parts have to issue a release at the same time (this signal is normally not used in the zone measuring element). In these signals, each fault type has an associated value, which represents the corresponding zone measuring loop to be released. The values are presented in table 132.
0= 1= 2= 3= 4= 5= 6= 7= 8= 9= 10= 11= no faulted phases L1E L2E L3E -L1L2E -L2L3E -L3L1E -L1L2L3E -L1L2 -L2L3 -L3L1 L1L2L3

An additional logic is applied to handle the cases when phase-to-earth outputs are to be asserted when the earth input G is not asserted. The output signal STCNDPLE is activated when the load encroachment is operating. STCNDPLE is connected to the input STCND for selected quadrilateral impedance measuring zones to be blocked. The signal must be connected to the input LDCND for selected mho impedance measuring zones . The load encroachment at the measuring zone must be activated to release the blocking from the load encroachment function.

6.8.3

Function block
FMPSPDIS I3P* U3P* BLOCK ZSTART TR3PH 1POLEAR STL1 STL2 STL3 STPE STCNDPHS STCNDPLE STCNDLE START IEC06000429-2-en.vsd
IEC06000429 V2 EN

Figure 145:

FMPSPDIS function block

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Section 6 Impedance protection 6.8.4 Input and output signals


Table 133:
Name I3P U3P BLOCK ZSTART TR3PH 1POLEAR

1MRK505183-UEN C

FMPSPDIS Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 Description Group signal for current Group signal for voltage Block of function Start from underimpdeance function Three phase tripping initiated Single pole autoreclosing in progress

Table 134:
Name STL1 STL2 STL3 STPE STCNDPHS STCNDPLE STCNDLE START

FMPSPDIS Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER INTEGER BOOLEAN Description Fault detected in phase L1 Fault detected in phase L2 Fault detected in phase L3 Earth fault detected Binary coded starts from phase selection Binary coded starts from ph sel with load encroachment Binary coded starts from load encroachment only Indicates that something has started

6.8.5
Table 135:
Name IBase UBase IMaxLoad RLd ArgLd

Setting parameters
FMPSPDIS Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 10 - 5000 1.00 - 3000.00 5 - 70 Unit A kV %IB ohm/p Deg Step 1 0.05 1 0.01 1 Default 3000 400.00 200 80.00 20 Description Base current Base voltage Maximum load for identification of three phase fault in % of IBase Load encroachment resistive reach in ohm/phase Load encroachment inclination of load angular sector

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Table 136:
Name DeltaIMinOp DeltaUMinOp U1Level I1LowLevel U1MinOp U2MinOp INRelPE INBlockPP

FMPSPDIS Group settings (advanced)


Values (Range) 5 - 100 5 - 100 5 - 100 5 - 200 5 - 100 1 - 100 10 - 100 10 - 100 Unit %IB %UB %UB %IB %UB %UB %IB %IB Step 1 1 1 1 1 1 1 1 Default 10 20 80 10 20 5 20 40 Description Delta current level in % of IBase Delta voltage level in % of UBase Pos seq voltage limit for identification of 3ph fault Pos seq current level for identification of 3-ph fault in % of IBase Minimum operate positive sequence voltage for ph sel Minimum operate negative sequence voltage for ph sel 3I0 limit for release ph-e measuring loops in % of max phase current 3I0 limit for blocking phase-to-phase measuring loops in % of max phase current

6.8.6

Technical data
Table 137:
Function Minimum operate current Load encroachment criteria: Load resistance, forward and reverse

FMPSPDIS technical data


Range or value (5-30)% of IBase (0.53000) W/phase (570) degrees Accuracy 1.0% of Ir 2.0% static accuracy Conditions: Voltage range: (0.11.1) x Un Current range: (0.530) x In Angle: at 0 degrees and 85 degrees

6.9

Power swing detection ZMRPSB


Function description Power swing detection IEC 61850 identification ZMRPSB IEC 60617 identification ANSI/IEEE C37.2 device number 68

Zpsb
SYMBOL-EE V1 EN

6.9.1

Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation plants.

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Power swing detection function (ZMRPSB) is used to detect power swings and initiate block of selected distance protection zones. Occurrence of earth-fault currents during a power swing can block ZMRPSB function to allow fault clearance.

6.9.2

Principle of operation
Power swing detection (ZMRPSB ) function comprises an inner and an outer quadrilateral measurement characteristic with load encroachment, as shown in figure 146. Its principle of operation is based on the measurement of the time it takes for a power swing transient impedance to pass through the impedance area between the outer and the inner characteristics. Power swings are identified by transition times longer than a transition time set on corresponding timers. The impedance measuring principle is the same as that used for the distance protection zones. The impedance and the characteristic passing times are measured in all three phases separately. One-out-of-three or two-out-of-three operating modes can be selected according to the specific system operating conditions.
X1OutFw X1InFw

jX

ZL

R1LIn

DFw j

DRv
ArgLd

R1FInRv

R1FInFw

j DRv DFw DFw

DFw
ArgLd

R
DRv
RLdInRv RLdInFw

DFw DFw

DRv j DRv

RLdOutRv RLdOutFw X1InRv X1OutRv


IEC09000222_1_en.vsd

IEC09000222 V1 EN

Figure 146:

Operating characteristic for ZMRPSB function (setting parameters in italic)

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The impedance measurement within ZMRPSB function is performed by solving equation 54 and equation 55 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).

ULn Re ILn Rset


EQUATION1183 V2 EN

(Equation 54)

ULn Im ILn Xset


EQUATION1184 V2 EN

(Equation 55)

The Rset and Xset are R and X boundaries.

6.9.2.1

Resistive reach in forward direction


To avoid load encroachment, the resistive reach is limited in forward direction by setting the parameter RLdOutFw which is the outer resistive load boundary value while the inner resistive boundary is calculated according to equation 56.

RLdInFw = kLdRFwRLdOutFw
EQUATION1185 V2 EN

(Equation 56)

where:

kLdRFw is a settable multiplication factor less than 1

The slope of the load encroachment inner and outer boundary is defined by setting the parameter ArgLd. The load encroachment in the fourth quadrant uses the same settings as in the first quadrant (same ArgLd and RLdOutFw and calculated value RLdInFw). The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the distance measuring zones. The angle is the same as the line angle and derived from the setting of the reactive reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault resistance coverage for the inner boundary is set by the parameter R1FInFw. From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the inner and outer boundary, DFw, is calculated. This value is valid for R direction in first and fourth quadrant and for X direction in first and second quadrant.

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6.9.2.2 Resistive reach in reverse direction

1MRK505183-UEN C

To avoid load encroachment in reverse direction, the resistive reach is limited by setting the parameter RLdOutRv for the outer boundary of the load encroachment zone. The distance to the inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in equation 57.

RLdInRv = kLdRRvRLdOutRv
EQUATION1187 V2 EN

(Equation 57)

where:

kLdRRv is a settable multiplication factor less than 1

From the setting parameter RLdOutRv and the calculated value RLdInRv, a distance between the inner and outer boundary, DRv, is calculated. This value is valid for R direction in second and third quadrant and for X direction in third and fourth quadrant. The inner resistive characteristic in the second quadrant outside the load encroachment part corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is internally calculated as the sum of DRv+R1FInRv. The inner resistive characteristic in the third quadrant outside the load encroachment zone consist of the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the tilted lines outside the load encroachment is the same as the tilted lines in the first quadrant. The distance between the inner and outer boundary is the same as for the load encroachment in reverse direction, that is DRv.

6.9.2.3

Reactive reach in forward and reverse direction


The inner characteristic for the reactive reach in forward direction correspond to the setting parameter X1InFw and the outer boundary is defined as X1InFw + DFw,
where: DFw = RLdOutFw - KLdRFw RLdOutFw

The inner characteristic for the reactive reach in reverse direction correspond to the setting parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + DRv.
where: DRv = RLdOutRv - KLdRRv RLdOutRv

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Basic detection logic
The operation of the Power swing detection ZMRPSB is only released if the magnitude of the current is above the setting of the min operating current, IMinOpPE. ZMRPSB function can operate in two operating modes: The 1 out of 3 operating mode is based on detection of power swing in any of the three phases. Figure 147 presents a composition of an internal detection signal DET-L1 in this particular phase. The 2 out of 3 operating mode is based on detection of power swing in at least two out of three phases. Figure 148 presents a composition of the detection signals DET1of3 and DET2of3.

6.9.2.4

Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 147 are related to the operation of the impedance measuring elements in each phase separately (n represents the corresponding L1, L2 and L3). They are internal signals, calculated by ZMRPSB function. The tP1 timer in figure 147 serve as detection of initial power swings, which are usually not as fast as the later swings are. The tP2 timer become activated for the detection of the consecutive swings, if the measured impedance exit the operate area and returns within the time delay, set on the tW waiting timer. The upper part of figure 147 (internal input signal ZOUTL1, ZINL1, AND-gates and tP-timers) are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have the same settings.
ZOUTL1 ZINL1
0-tP1 0

AND

OR -loop AND -loop OR DET-L1

AND

0-tP2 0

AND

ZOUTL2 ZOUTL3

OR

detected

0 0-tW IEC05000113-2-en.vsd

IEC05000113 V2 EN

Figure 147:

Detection of power swing in phase L1

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DET-L1 DET-L2 DET-L3

>1

DET1of3 - int.

& & &


IEC01000057-2-en.vsd
IEC01000057-TIFF V2 EN

>1

DET2of3 - int.

Figure 148:

Detection of power swing for 1-of-3 and 2-of-3 operating mode

ZOUTL1 ZOUTL2 ZOUTL3 tEF t

OR ZINL1 AND ZINL2 ZINL3 AND OR

ZOUT

ZIN

TRSP I0CHECK

BLKI02

AND

10 ms t

OR tR1

AND -loop tR2 BLKI01 BLOCK -loop DET1of3 - int. REL1PH BLK1PH DET2of3 - int. REL2PH BLK2PH EXTERNAL AND t

OR

INHIBIT

AND tH OR AND t OR START

AND

en05000114.vsd
IEC05000114 V1 EN

Figure 149:

Simplified block diagram for ZMRPSB function

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Section 6 Impedance protection


Operating and inhibit conditions
Figure 149 presents a simplified logic diagram for the Power swing detection function ZMRPSB. The internal signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 147 and figure 148 respectively. Selection of the operating mode is possible by the proper configuration of the functional input signals REL1PH, BLK1PH, REL2PH, and BLK2PH. The load encroachment characteristic can be switched off by setting the parameter OperationLdCh = Off, but notice that the DFw and DRv will still be calculated from RLdOutFw and RLdOutRv. The characteristic will in this case be only quadrilateral. There are four different ways to form the internal INHIBIT signal: Logical 1 on functional input BLOCK inhibits the output START signal instantaneously. The INHIBIT internal signal is activated, if the power swing has been detected and the measured impedance remains within its operate characteristic for the time, which is longer than the time delay set on tR2 timer. It is possible to disable this condition by connecting the logical 1 signal to the BLKI01 functional input. The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if an earth-fault appears during the power swing (input IOCHECK is high) and the power swing has been detected before the earth-fault (activation of the signal I0CHECK). It is possible to disable this condition by connecting the logical 1 signal to the BLKI02 functional input. The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK appears within the time delay, set on tEF timer and the impedance has been seen within the outer characteristic of ZMRPSB operate characteristic in all three phases. This function prevents the operation of ZMRPSB function in cases, when the circuit breaker closes onto persistent single-phase fault after single-phase autoreclosing dead time, if the initial singlephase fault and single-phase opening of the circuit breaker causes the power swing in the remaining two phases.

6.9.2.5

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Section 6 Impedance protection 6.9.3 Function block


ZMRPSB I3P* U3P* BLOCK BLKI01 BLKI02 BLK1PH REL1PH BLK2PH REL2PH I0CHECK TRSP EXTERNAL START ZOUT ZIN

1MRK505183-UEN C

IEC06000264-2-en.vsd
IEC06000264 V2 EN

Figure 150:

ZMRPSB function block

6.9.4

Input and output signals


Table 138:
Name I3P U3P BLOCK BLKI01 BLKI02 BLK1PH REL1PH BLK2PH REL2PH I0CHECK TRSP EXTERNAL

ZMRPSB Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Block inhibit of start output for slow swing condition Block inhibit of start output for subsequent residual current detection Block one-out-of-three-phase operating mode Release one-out-of-three-phase operating mode Block two-out-of-three-phase operating mode Release two-out-of-three-phase operating mode Residual current (3I0) detection used to inhibit start output Single-pole tripping command issued by tripping function Input for external detection of power swing

Table 139:
Name START ZOUT ZIN

ZMRPSB Output signals


Type BOOLEAN BOOLEAN BOOLEAN Description Power swing detected Measured impedance within outer impedance boundary Measured impedance within inner impedance boundary

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6.9.5
Table 140:
Name Operation X1InFw R1LIn R1FInFw X1InRv R1FInRv OperationLdCh RLdOutFw ArgLd RLdOutRv kLdRFw kLdRRv tEF IMinOpPE IBase

ZMRPSB Group settings (basic)


Values (Range) Off On 0.10 - 3000.00 0.10 - 1000.00 0.10 - 1000.00 0.10 - 3000.00 0.10 - 1000.00 Off On 0.10 - 3000.00 5 - 70 0.10 - 3000.00 0.50 - 0.90 0.50 - 0.90 0.000 - 60.000 5 - 30 1 - 99999 Unit ohm ohm ohm ohm ohm ohm Deg ohm Mult Mult s %IB A Step 0.01 0.01 0.01 0.01 0.01 0.01 1 0.01 0.01 0.01 0.001 1 1 Default Off 30.00 30.00 30.00 30.00 30.00 On 30.00 25 30.00 0.75 0.75 3.000 10 3000 Description Operation Mode On / Off Inner reactive boundary, forward Line resistance for inner characteristic angle Fault resistance coverage to inner resistive line, forward Inner reactive boundary, reverse Fault resistance line to inner resistive boundary, reverse Operation of load discrimination characteristic Outer resistive load boundary, forward Load angle determining load impedance area Outer resistive load boundary, reverse Multiplication factor for inner resistive load boundary, forward Multiplication factor for inner resistive load boundary, reverse Timer for overcoming single-pole reclosing dead time Minimum operate current in % of IBase Base setting for current level settings

Table 141:
Name tP1 tP2 tW tH tR1 tR2

ZMRPSB Group settings (advanced)


Values (Range) 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit s s s s s s Step 0.001 0.001 0.001 0.001 0.001 0.001 Default 0.045 0.015 0.250 0.500 0.300 2.000 Description Timer for detection of initial power swing Timer for detection of subsequent power swings Waiting timer for activation of tP2 timer Timer for holding power swing START output Timer giving delay to inhibit by the residual current Timer giving delay to inhibit at very slow swing

267 Technical reference manual

Section 6 Impedance protection 6.9.6 Technical data


Table 142:
Function Reactive reach

1MRK505183-UEN C

ZMRPSB technical data


Range or value (0.10-3000.00) W/phase Accuracy 2.0% static accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees 0.5% 10 ms

Resistive reach Timers

(0.101000.00)W/loop (0.000-60.000) s

6.10

Power swing logic ZMRPSL


Function description Power swing logic IEC 61850 identification ZMRPSL IEC 60617 identification ANSI/IEEE C37.2 device number -

6.10.1

Introduction
Power Swing Logic (ZMRPSL) is a complementary function to Power Swing Detection (ZMRPSB) function. It provides possibility for selective tripping of faults on power lines during system oscillations (power swings or pole slips), when the distance protection function should normally be blocked. The complete logic consists of two different parts: Communication and tripping part: provides selective tripping on the basis of special distance protection zones and a scheme communication logic, which are not blocked during the system oscillations. Blocking part: blocks unwanted operation of instantaneous distance protection zone 1 for oscillations, which are initiated by faults and their clearing on the adjacent power lines and other primary elements.

6.10.2
6.10.2.1

Principle of operation
Communication and tripping logic
Communication and tripping logic as used by the power swing distance protection zones is schematically presented in figure 151.

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Section 6 Impedance protection

STDEF AR1P1 STPSD BLOCK CSUR

&
tCS

&

&

CS

tTrip t CACC CR

tBlkTr t

&

BLKZMPS

&

>1

TRIP

en06000236.vsd
IEC06000236 V1 EN

Figure 151:

Simplified logic diagram power swing communication and tripping logic

The complete logic remains blocked as long as there is a logical one on the BLOCK functional input signal. Presence of the logical one on the STDEF functional input signal also blocks the logic as long as this block is not released by the logical one on the AR1P1 functional input signal. The functional output signal BLKZMPS remains logical one as long as the function is not blocked externally (BLOCK is logical zero) and the earth-fault is detected on protected line (STDEF is logical one), which is connected in three-phase mode (AR1P1 is logical zero). Timer tBlkTr prolongs the duration of this blocking condition, if the measured impedance remains within the operate area of the Power Swing Detection (ZMRPSB) function (STPSD input active). The BLKZMPS can be used to block the operation of the power-swing zones. Logical one on functional input CSUR, which is normally connected to the TRIP functional output of a power swing carrier sending zone, activates functional output CS, if the function is not blocked by one of the above conditions. It also activates the TRIP functional output. Initiation of the CS functional output is possible only, if the STPSD input has been active longer than the time delay set on the security timer tCS. Simultaneous presence of the functional input signals PLTR_CRD and CR (local trip condition) also activates the TRIP functional output, if the function is not blocked by one of the above conditions and the STPSD signal has been present longer then the time delay set on the trip timer tTrip.

6.10.2.2

Blocking logic
Figure 152 presents the logical circuits, which control the operation of the underreaching zone (zone 1) at power swings, caused by the faults and their clearance on the remote power lines.
269

Technical reference manual

Section 6 Impedance protection

1MRK505183-UEN C

& &
STZML BLOCK STMZH STZMPSD STPSD BLKZMH STZMLL

& &

tZL t tDZ t

& >1

>1

&
-loop

en06000237.vsd
IEC06000237 V1 EN

Figure 152:

Control of underreaching distance protection (Zone 1) at power swings caused by the faults and their clearance on adjacent lines and other system elements

The logic is disabled by a logical one on functional input BLOCK. It can start only if the following conditions are simultaneously fulfilled: STPSD functional input signal must be a logical zero. This means, that Power swing detection (ZMRPSB) function must not detect power swinging over the protected power line. STZMPSD functional input must be a logical one. This means that the impedance must be detected within the external boundary of ZMRPSB function. STZMOR functional input must be a logical one. This means that the fault must be detected by the overreaching distance protection zone, for example zone 2.

The STZMURPS functional output, which can be used in complete terminal logic instead of a normal distance protection zone 1, becomes active under the following conditions: If the STZMUR signal appears at the same time as the STZMOR or if it appears with a time delay, which is shorter than the time delay set on timer tDZ. If the STZMUR signal appears after the STZMOR signal with a time delay longer than the delay set on the tDZ timer, and remains active longer than the time delay set on the tZL timer.

The BLKZMOR functional output signal can be used to block the operation of the higher distance protection zone, if the fault has moved into the zone 1 operate area after tDZ time delay.

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Section 6 Impedance protection Function block


ZMRPSL BLOCK STZMUR STZMOR STPSD STDEF STZMPSD CACC AR1P1 CSUR CR TRIP STZMURPS BLKZMUR BLKZMOR CS

6.10.3

IEC07000026-2-en.vsd
IEC07000026 V2 EN

Figure 153:

ZMRPSL function block

6.10.4

Input and output signals


Table 143:
Name BLOCK STZMUR STZMOR STPSD STDEF STZMPSD CACC AR1P1 CSUR CR

ZMRPSL Input signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 Description Block of function Start of the underreaching zone Start of the overreaching zone Power swing detected Start from Earth Fault Protection in forward or reverse direction Operation of Power Swing Detection external characteristic Overreaching ZM zone to be accelerated Single pole auto-reclosing in progress Carrier send by the underreaching power-swing zone Carrier receive signal during power swing detection operation

Table 144:
Name TRIP STZMURPS BLKZMUR BLKZMOR CS

ZMRPSL Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip through Power Swing Logic Start of Underreaching zone controlled by PSL to be used in configuration Block trip of underreaching impedance zone Block trip of overreaching distance protection zones Carrier send signal controlled by the power swing

271 Technical reference manual

Section 6 Impedance protection 6.10.5


Table 145:
Name Operation tDZ tDZMUR tCS tTrip tBlkTr

1MRK505183-UEN C

Setting parameters
ZMRPSL Group settings (basic)
Values (Range) Off On 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit s s s s s Step 0.001 0.001 0.001 0.001 0.001 Default Off 0.050 0.200 0.100 0.100 0.300 Description Operation Off / On Permitted max oper time diff between higher and lower zone Delay for oper of underreach zone with detected diff in oper time Conditional timer for sending the CS at power swings Conditional timer for tripping at power swings Timer for blocking the overreaching zones trip

6.11

Pole slip protection PSPPPAM


Function description Pole slip protection IEC 61850 identification PSPPPAM IEC 60617 identification ANSI/IEEE C37.2 device number 78

<
SYMBOL-MM V1 EN

6.11.1

Introduction
Sudden events in an electrical power system such as large changes in load, fault occurrence or fault clearance, can cause power oscillations referred to as power swings. In a non-recoverable situation, the power swings become so severe that the synchronism is lost, a condition referred to as pole slipping. The main purpose of the pole slip protection (PSPPPAM) is to detect, evaluate, and take the required action for pole slipping occurrences in the power system. The electrical system parts swinging to each other can be separated with the line/s closest to the centre of the power swing allowing the two systems to be stable as separated islands.

6.11.2

Principle of operation
If the generator is faster than the power system, the rotor movement in the impedance and voltage diagram is from right to left and generating is signalled. If the generator is slower than the power system, the rotor movement is from left to right and motoring is signalled (the power system drives the generator as if it were a motor).

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Section 6 Impedance protection

The movements in the impedance plain can be seen in figure 154. The transient behaviour is described by the transient EMF's EA and EB, and by X'd, XT and the transient system impedance ZS.
Zone 1 EB Xd IED jX XT Zone 2 XS EA

A XS

Pole slip impedance movement

XT

Apparent generator impedance

Xd B

IEC06000437_2_en.vsd
IEC06000437 V2 EN

Figure 154:
where: X'd XT ZS

Movements in the impedance plain

= transient reactance of the generator = short-circuit reactance of the step-up transformer = impedance of the power system A

The detection of rotor angle is enabled when:

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Section 6 Impedance protection

1MRK505183-UEN C

the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting). the maximum voltage falls below 0.92 UBase the voltage Ucos (the voltage in phase with the generator current) has an angular velocity of 0.2...8 Hz and the corresponding direction is not blocked.

en07000004.vsd
IEC07000004 V1 EN

Figure 155:

Different generator quantities as function of the angle between the equivalent generators

An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle set for 'WarnAngle'. Slipping is detected when: a change of rotor angle of min. 50 ms is recognized the slip line is crossed between ZA and ZB.

When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when signal EXTZONE1 is high (external device detects the direction of the centre of slipping). After the first slip, the signals ZONE1 or ZONE2 and depending on the direction of slip - either GEN or MOTOR are issued.

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Section 6 Impedance protection

Every time pole slipping is detected, the impedance of the point where the slip line is crossed and the instantaneous slip frequency are displayed as measurements. Further slips are only detected, if they are in the same direction and if the rate of rotor movement has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and is then signalled itself as a first slip. The TRIP1 tripping command and signal are generated after N1 slips in zone 1, providing the rotor angle is less than TripAngle. The TRIP2 signal is generated after N2 slips in zone 2, providing the rotor angle is less than TripAngle. All signals are reset if: the direction of movement reverses the rotor angle detector resets without a slip being counted or no rotor relative movement was detected during the time ResetTime.

Imin > 0.10 IBase

Ucosj < 0.92 UBase

AND AND START

0.2 Slip.Freq. 8 Hz

d startAngle ZONE1

Z cross line ZA - ZC

AND

Z cross line ZC - ZB

AND

ZONE2

Counter N1Limit

a b

ab

AND

TRIP1

d tripAngle Counter N2Limit

OR a b ab

TRIP

AND

TRIP2

en07000005.vsd
IEC07000005 V1 EN

Figure 156:

Simplified logic diagram for pole slip protection PSPPPAM

275 Technical reference manual

Section 6 Impedance protection 6.11.3 Function block


PSPPPAM I3P* U3P* BLOCK BLKGEN BLKMOTOR EXTZONE1 TRIP TRIP1 TRIP2 START ZONE1 ZONE2 GEN MOTOR SFREQ SLIPZOHM SLIPZPER UCOSKV UCOSPER

1MRK505183-UEN C

IEC07000030-2-en.vsd
IEC07000030 V2 EN

Figure 157:

PSPPPAM function block

6.11.4

Input and output signals


Table 146:
Name I3P U3P BLOCK BLKGEN BLKMOTOR EXTZONE1

PSPPPAM Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 Description Current group connection Voltage group connection Block of function Block operation in generating direction Block operation in motor direction Extension of zone1 with zone2 region

Table 147:
Name TRIP TRIP1 TRIP2 START ZONE1 ZONE2 GEN MOTOR SFREQ SLIPZOHM SLIPZPER UCOSKV UCOSPER

PSPPPAM Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL REAL Description Common trip signal Trip1 after the N1Limit slip in zone1 Trip2 after the N2Limit slip in zone2 Common start signal First slip in zone1 region First slip in zone2 region Generator is faster then the system Generator is slower then the system Slip frequency Slip impedance in ohms Slip impedance in percent of ZBase UCosPhi voltage in kV UCosPhi voltage in percent of UBase

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Section 6 Impedance protection Setting parameters

6.11.5
Table 148:
Name Operation OperationZ1 OperationZ2 ImpedanceZA ImpedanceZB ImpedanceZC AnglePhi StartAngle TripAngle N1Limit N2Limit

PSPPPAM Group settings (basic)


Values (Range) Off On Off On Off On 0.00 - 1000.00 0.00 - 1000.00 0.00 - 1000.00 72.00 - 90.00 0.0 - 180.0 0.0 - 180.0 1 - 20 1 - 20 Unit % % % Deg Deg Deg Step 0.01 0.01 0.01 0.01 0.1 0.1 1 1 Default Off On On 10.00 10.00 10.00 85.00 110.0 90.0 1 3 Description Operation On / Off Operation Zone1 On / Off Operation Zone2 On / Off Forward impedance in % of Zbase Reverse impedance in % of Zbase Impedance of zone1 limit in % of Zbase Angle of the slip impedance line Rotor angle for the start signal Rotor angle for the trip1 and trip2 signals Count limit for the trip1 signal Count limit for the trip2 signal

Table 149:
Name ResetTime

PSPPPAM Group settings (advanced)


Values (Range) 0.000 - 60.000 Unit s Step 0.001 Default 5.000 Description Time without slip to reset all signals

Table 150:
Name IBase UBase MeasureMode

PSPPPAM Non group settings (basic)


Values (Range) 0.1 - 99999.9 0.1 - 9999.9 PosSeq L1L2 L2L3 L3L1 No Yes Unit A kV Step 0.1 0.1 Default 3000.0 20.0 PosSeq Description Base Current (primary phase current in Amperes) Base Voltage (primary phase-to-phase voltage in kV) Measuring mode (PosSeq, L1L2, L2L3, L3L1)

InvertCTcurr

No

Invert current direction

6.11.6

Technical data
Table 151:
Function Impedance reach Characteristic angle Start and trip angles Zone 1 and Zone 2 trip counters

PSPPPAM technical data


Range or value (0.001000.00)% of Zbase (72.0090.00) degrees (0.0180.0) degrees (1-20) Accuracy 2.0% of Ur/Ir 5.0 degrees 5.0 degrees 277

Technical reference manual

Section 6 Impedance protection

1MRK505183-UEN C

6.12

Automatic switch onto fault logic, voltage and current based ZCVPSOF
Function description Automatic switch onto fault logic, voltage and current based IEC 61850 identification ZCVPSOF IEC 60617 identification ANSI/IEEE C37.2 device number -

6.12.1

Introduction
Automatic switch onto fault logic, voltage and current based (ZCVPSOF) is a function that gives an instantaneous trip at closing of breaker onto a fault. A dead line detection check is provided to activate the function when the line is dead. Mho distance protections can not operate for switch onto fault condition when the phase voltages are close to zero. An additional logic based on UI Level is used for this purpose.

6.12.2

Principle of operation
Automatic switch onto fault logic, voltage and current based function (ZCVPSOF) can be activated externally by Breaker Closed Input or internally (automatically) by using UI Level Based Logic see figure 158. The activation from the Dead line detection function is released if the internal signal deadLine from the UILevel function is activated at the same time as the input ZACC is not activated during at least for a duration tDLD and the setting parameter AutoInit is set to On. When the setting AutoInit is Off, the function is activated by an external binary input BC. To get a trip one of the following operation modes must also be selected by the parameter Mode: Mode = Impedance; trip is released if the input ZACC is activated (normal connected to non directional distance protection zone). Mode = UILevel; trip is released if UILevel detector is activated. Mode = UILvl&Imp; trip is initiated based on impedance measured criteria or UILevel detection. The internal signal deadLine from the UILevel detector is activated if all three phase currents and voltages are below the setting IPh< and UPh<. UI Level based measurement detects the switch onto fault condition even though the voltage is very low. The logic is based on current and voltage levels. The internal signal SOTF UILevel is activated if a phase voltage is below the setting

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Section 6 Impedance protection

UPh< and corresponding phase current is above the setting IPh< longer than the time tDuration. ZCVPSOF can be activated externally from input BC and thus setting AutoInit is bypassed. The function is released during a settable time tSOTF. The function can be blocked by activating the input BLOCK.
BLOCK
AND
15

TRIP

BC

AutiInit=On
200 1000 OR

ZACC

AND

IL1 IL2 IL3 UL1 UL2 UL3 Iph< Uph<


UILevel detector

deadLine

SOTFU ILevel

Mode = Impedance

AND

Mode = UILevel
OR

AND

OR

Mode = UILvl&Imp

AND

en07000084.vsd

IEC07000084 V2 EN

Figure 158:

Simplified logic diagram for Automatic switch onto fault logic, voltage and current based.

279 Technical reference manual

Section 6 Impedance protection 6.12.3 Function block


ZCVPSOF I3P* U3P* BLOCK BC ZACC TRIP

1MRK505183-UEN C

IEC06000459-2-en.vsd
IEC06000459 V2 EN

Figure 159:

ZCVPSOF function block

6.12.4

Input and output signals


Table 152:
Name I3P U3P BLOCK BC ZACC

ZCVPSOF Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Current DFT Voltage DFT Block of function External enabling of SOTF Distance zone to be accelerated by SOTF

Table 153:
Name TRIP

ZCVPSOF Output signals


Type BOOLEAN Description Trip output

6.12.5
Table 154:
Name Operation IBase UBase Mode

Setting parameters
ZCVPSOF Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Impedance UILevel UILvl&Imp Off On 1 - 100 1 - 100 Unit A kV Step 1 0.05 Default On 3000 400.00 UILevel Description Operation Off / On Base current (A) Base voltage L-L (kV) Mode of operation of SOTF Function

AutoInit IPh< UPh<

%IB %UB

1 1

Off 20 70

Automatic switchonto fault initialization Current level for detection of dead line in % of IBase Voltage level for detection of dead line in % of UBase

Table continues on next page

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Section 6 Impedance protection


Values (Range) 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit s s s Step 0.001 0.001 0.001 Default 0.020 1.000 0.200 Description Time delay for UI detection (s) Drop off delay time of switch onto fault function Delay time for activation of dead line detection

Name tDuration tSOTF tDLD

6.12.6

Technical data
Table 155:
Parameter Operate voltage, detection of dead line Operate current, detection of dead line Delay following dead line detection input before Automatic switch into fault logic function is automatically turned On Time period after circuit breaker closure in which Automatic switch into fault logic function is active

ZCVPSOF technical data


Range or value Accuracy 1.0% of Ur 1.0% of Ir 0.5% 10 ms (1100)% of

UBase IBase

(1100)% of (0.00060.000) s

(0.00060.000) s

0.5% 10 ms

6.13

Phase preference logic PPLPHIZ


Function description Phase preference logic IEC 61850 identification PPLPHIZ IEC 60617 identification ANSI/IEEE C37.2 device number -

6.13.1

Introduction
Phase preference logic function PPLPHIZ is intended to be used in isolated or high impedance earthed networks where there is a requirement to trip only one of the faulty lines at cross-country fault. Phase preference logic inhibits tripping for single phase-to-earth faults in isolated and high impedance earthed networks, where such faults are not to be cleared by distance protection. For cross-country faults, the logic selects either the leading or the lagging phase-earth loop for measurement and initiates tripping of the preferred fault based on the selected phase preference. A number of different phase preference combinations are available for selection.

6.13.2

Principle of operation
Phase preference logic PPLPHIZ has 10 operation modes, which can be set by the parameter OperMode. The different modes and their explanation are shown in

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table 156 below. The difference between cyclic and acyclic operation can be explained by the following example. Assume a L1 fault on one line and a L3 fault on another line. For OperMode = 1231c the line with L3 fault will be tripped (L3 before L1) while for OperMode = 123a the line with L1 1 fault will be tripped (L1 before L3).
Table 156:
OperMode No filter

Operation modes for Phase preference logic


Description No filter, phase-to-phase measuring loops are not blocked during single phase-toearth faults. Tripping is allowed without any particular phase preference at crosscountry faults No preference, trip is blocked during single phase-to-earth faults, trip is allowed without any particular phase preference at cross-country fault Cyclic 1231c; L1 before L2 before L3 before L1 Cyclic 1321c; L1 before L3 before L2 before L1 Acyclic 123a; L1 before L2before L3 Acyclic 132a; L1 before L3 before L2 Acyclic 213a; L2 before L1 before L3 Acyclic 231a; L2 before L3 before L1 Acyclic 312a; L3 before L1 before L2 Acyclic 321a; L3 before L2 before L1

No pref 1231 c 1321 c 123 a 132 a 213 a 231 a 312 a 321 a

The function can be divided into two parts; one labeled voltage and current discrimination and the second one labeled phase preference evaluation, see figure 160. The aim with the voltage and current discrimination part is to discriminate faulty phases and to determine if there is a cross-country fault. If cross-country fault is detected, an internal signal Detected cross-country fault is created and sent to the phase preference part to be used in the evaluation process for determining the condition for trip. The voltage and current discrimination part gives phase segregated start signals if the respective measured phase voltage is below the setting parameter UPN< at the same time as the zero sequence voltage is above the setting parameter 3U0>. If there is a start in any phase the START out put signal will be activated. The internal signal for detection of cross-country fault, DetectCrossCountry, that come from the voltage and current discrimination part of the function can be achieved in three different ways:

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Section 6 Impedance protection

1. 2.

3.

The magnitude of 3I0 has been above the setting parameter IN> for a time longer than the setting of pick-up timer tIN. The magnitude of 3I0 has been above the setting parameter IN> at the same time as the magnitude of 3U0 has been above the setting parameter 3U0> during a time longer than the setting of pick-up timer tUN. The magnitude of 3I0 has been above the setting parameter IN> at the same time as one of the following conditions are fulfilled: the measured phase-to-phase voltage in at least one of the phase combinations has been below the setting parameter UPP< for more than 20 ms. At least two of the phase voltages are below the setting parameter UPN< for more than 20 ms.

The second part, phase preference evaluation, uses the internal signal DetectCrossCountry from the voltage and current evaluation together with the input signal STCND together with phase selection start condition (from phase selection functions) connected to input STCND, and the information from the setting parameter OperMode are used to determine the condition for trip. To release the Phase preference logic, at least two out of three phases must be faulty. The fault classification whether it is a single phase-to-earth, two-phase or crosscountry fault and which phase to be tripped at cross-country fault is converted into a binary coded signal and sent to the distance protection measuring zone to release the correct measuring zone according to the setting of OperMode. This is done by activating the output ZREL and it shall be connected to the input STCND on the distance zone measuring element. The release signals from phase selection will only be gated with the cross-country check from IN and UN but without time delay. If no phase selection start has occurred, the release is based on current and voltage discriminating part only. The input signal STCND consist of binary information of fault type and is connected to the output STCND on phase selection function. The fault must be activated in at least two phases to be classified as a cross-country fault in the phase preference part of the logic. The input signals RELxxx are additional fault release signals that can be connected to external protection functions through binary input. The output START and trip signals can be blocked by activating the input BLOCK

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Section 6 Impedance protection

1MRK505183-UEN C

UL1 UL2 UL3

UL1UL2 UL2UL3
UL3UL1 IN UN UPN< UPP< IN> UN0> Detect CrossCountry fault

Voltage and Current Discrimination

AND

START

OperMode RELL1N RELL2N


RELL3N

Phase Preference Evaluation

AND

ZREL

STCND

BLOCK

IEC09000220_1_en.vsd
IEC09000220 V2 EN

Figure 160:

Simplified block diagram for Phase preference logic

6.13.3

Function block
PPLPHIZ I3P* U3P* BLOCK RELL1N RELL2N RELL3N STCND START ZREL

IEC07000029-2-en.vsd
IEC07000029 V2 EN

Figure 161:

PPLPHIZ function block

6.13.4

Input and output signals


Table 157:
Name I3P U3P BLOCK

PPLPHIZ Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN Default 0 Description Group signal for current input Group signal for voltage input Block of function

Table continues on next page 284 Technical reference manual

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Section 6 Impedance protection


Name RELL1N RELL2N RELL3N STCND Type BOOLEAN BOOLEAN BOOLEAN INTEGER Default 0 0 0 0 Description Release condition for the L1 to earth loop Release condition for the L2 to earth loop Release condition for the L3 to earth loop Integer coded external release signals

Table 158:
Name START ZREL

PPLPHIZ Output signals


Type BOOLEAN INTEGER Description Indicates start for earth fault(s), regardless of direction Integer coded output release signal

6.13.5
Table 159:
Name IBase UBase OperMode

Setting parameters
PPLPHIZ Group settings (basic)
Values (Range) 1 - 99999 0.05 - 2000.00 No Filter NoPref 1231c 1321c 123a 132a 213a 231a 312a 321a 10.0 - 100.0 10.0 - 100.0 5.0 - 70.0 10 - 200 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit A kV Step 1 0.01 Default 3000 400.00 No Filter Description Base current Base voltage Operating mode (c=cyclic,a=acyclic)

UPN< UPP< 3U0> IN> tUN tOffUN tIN

%UB %UB %UB %IB s s s

1.0 1.0 1.0 1 0.001 0.001 0.001

70.0 50.0 20.0 20 0.100 0.100 0.150

Operate value of phase undervoltage (% of UBase) Operate value of line to line undervoltage (% of UBase) Operate value of residual voltage (% of UBase) Operate value of residual current (% of IBase) Pickup-delay for residual voltage Dropoff-delay for residual voltage Pickup-delay for residual current

285 Technical reference manual

Section 6 Impedance protection

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Table 160:
Function

PPLPHIZ technical data


Range or value (10.0 - 100.0)% of UBase Accuracy 0,5% of Ur

Operate value, phase-to-phase and phase-to-neutral undervoltage Reset ratio, undervoltage Operate value, residual voltage Reset ratio, residual voltage Operate value, residual current Reset ratio, residual current Timers Operating mode

< 105% (5.0 - 70.0)% of UBase > 95% (10 - 200)% of IBase > 95% (0.000 - 60.000) s No Filter, NoPref Cyclic: 1231c, 1321c Acyclic: 123a, 132a, 213a, 231a, 312a, 321a

0,5% of Ur 1,0% of Ir for I < Ir 1,0% of I for I > Ir 0,5% 10ms

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Section 7 Current protection

Section 7

Current protection

About this chapter


This chapter describes current protection functions. These include functions like Instantaneous phase overcurrent protection, Four step phase overcurrent protection, Pole discordance protection and Residual overcurrent protection.

7.1

Instantaneous phase overcurrent protection PHPIOC


Function description Instantaneous phase overcurrent protection IEC 61850 identification PHPIOC IEC 60617 identification ANSI/IEEE C37.2 device number 50

3I>>
SYMBOL-Z V1 EN

7.1.1

Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short tripping time to allow use as a high set short-circuit protection function.

7.1.2

Principle of operation
The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block. The RMS value of each phase current is derived from the fundamental frequency components, as well as sampled values of each phase current. These phase current values are fed to the instantaneous phase overcurrent protection function PHPIOC. In a comparator the RMS values are compared to the set operation current value of the function (IP>>). If a phase current is larger than the set operation current a signal from the comparator for this phase is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this phase and the TRIP signal that is common for all three phases. There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the parameter is set to 1 out of 3 any phase trip signal will be activated. If the parameter is set to 2 out of 3 at least two phase signals must be activated for trip. There is also a possibility to activate a preset change of the set operation current (StValMult) via a binary input (ENMULT). In some applications the operation value needs to be changed, for example due to transformer inrush currents.
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PHPIOC can be blocked from the binary input BLOCK.

7.1.3

Function block
PHPIOC I3P* BLOCK ENMULT TRIP TRL1 TRL2 TRL3 IEC04000391-2-en.vsd
IEC04000391 V2 EN

Figure 162:

PHPIOC function block

7.1.4

Input and output signals


Table 161:
Name I3P BLOCK ENMULT

PHPIOC Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN Default 0 0 Description Three phase current Block of function Enable current start value multiplier

Table 162:
Name TRIP TRL1 TRL2 TRL3

PHPIOC Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip signal from any phase Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3

7.1.5
Table 163:
Name Operation IBase OpMode IP>>

Setting parameters
PHPIOC Group settings (basic)
Values (Range) Off On 1 - 99999 2 out of 3 1 out of 3 1 - 2500 Unit A %IB Step 1 1 Default Off 3000 1 out of 3 200 Description Operation Off / On Base current Select operation mode 2-out of 3 / 1-out of 3 Operate phase current level in % of IBase

Table 164:
Name StValMult

PHPIOC Group settings (advanced)


Values (Range) 0.5 - 5.0 Unit Step 0.1 Default 1.0 Description Multiplier for operate current level

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Section 7 Current protection Technical data


Table 165:
Function Operate current Reset ratio Operate time Reset time Critical impulse time Operate time Reset time Critical impulse time Dynamic overreach

7.1.6

PHPIOC technical data


Range or value (1-2500)% of lBase > 95% 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 10 ms typically at 0 to 10 x Iset 35 ms typically at 10 to 0 x Iset 2 ms typically at 0 to 10 x Iset < 5% at t = 100 ms Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir -

7.2

Four step phase overcurrent protection OC4PTOC


Function description Four step phase overcurrent protection IEC 61850 identification OC4PTOC
4 4

IEC 60617 identification


3I> alt

ANSI/IEEE C37.2 device number 51/67

TOC-REVA V1 EN

7.2.1

Introduction
The four step phase overcurrent protection function OC4PTOC has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined time characteristic. The directional function is voltage polarized with memory. The function can be set to be directional or non-directional independently for each of the steps. A 2nd harmonic blocking can be set individually for each step.

7.2.2

Principle of operation
The Four step overcurrent protection function OC4PTOC is divided into four different sub-functions, one for each step. For each step x , where x is step 1, 2, 3

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and 4, an operation mode is set by DirModex: Off/Non-directional/Forward/ Reverse. The protection design can be decomposed in four parts: The direction element The harmonic Restraint Blocking function The four step over current function The mode selection If VT inputs are not available or not connected, setting parameter DirModex shall be left to default value, Non-directional.

faultState I3P U3P

Direction Element

dirPh1Flt dirPh2Flt dirPh3Flt

4 step over current element One element for each step

faultState

START

TRIP

I3P

Harmonic Restraint Element

harmRestrBlock

enableDir Mode Selection enableStep1-4 DirectionalMode1-4

en05000740.vsd
IEC05000740 V1 EN

Figure 163:

Functional overview of OC4PTOC

A common setting for all steps, StartPhSel, is used to specify the number of phase currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.

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Section 7 Current protection

The sampled analogue phase currents are processed in a pre-processing function block. Using a parameter setting MeasType within the general settings for the four step phase overcurrent protection function OC4PTOC, it is possible to select the type of the measurement used for all overcurrent stages. It is possible to select either discrete Fourier filter (DFT) or true RMS filter (RMS). If DFT option is selected then only the RMS value of the fundamental frequency components of each phase current is derived. Influence of DC current component and higher harmonic current components are almost completely suppressed. If RMS option is selected then the true RMS values is used. The true RMS value in addition to the fundamental frequency component includes the contribution from the current DC component as well as from higher current harmonic. The selected current values are fed to OC4PTOC. In a comparator, for each phase current, the DFT or RMS values are compared to the set operation current value of the function (I1>, I2>, I3> or I4>). If a phase current is larger than the set operation current, outputs START, STx, STL1, STL2 and STL3 are, without delay, activated. Output signals STL1, STL2 and STL3 are common for all steps. This means that the lowest set step will initiate the activation. The START signal is common for all three phases and all steps. It shall be noted that the selection of measured value (DFT or RMS) do not influence the operation of directional part of OC4PTOC. Service value for individually measured phase currents are also available on the local HMI for OC4PTOC function, which simplifies testing, commissioning and in service operational checking of the function. A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the phase currents and the relation is compared to a set restrain current level. The function can be directional. The direction of the fault current is given as current angle in relation to the voltage angle. The fault current and fault voltage for the directional function is dependent of the fault type. To enable directional measurement at close in faults, causing low measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a memory voltage (15%). The following combinations are used.
Phase-phase short circuit:

U refL1L 2 = U L1 - U L 2
EQUATION1449 V1 EN

I dirL1L 2 = I L1 - I L 2
(Equation 58)

U refL 2 L 3 = U L 2 - U L 3
EQUATION1450 V1 EN

I dirL 2 L 3 = I L 2 - I L 3
(Equation 59)

U refL 3 L1 = U L 3 - U L1
EQUATION1451 V1 EN

I dirL 3 L1 = I L 3 - I L1
(Equation 60)

Table continues on next page

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Phase-earth short circuit:

U refL1 = U L1
EQUATION1452 V1 EN

I dirL1 = I L1
(Equation 61)

U refL 2 = U L 2
EQUATION1453 V1 EN

I dirL 2 = I L 2
(Equation 62)

U refL 3 = U L 3
EQUATION1454 V1 EN

I dirL 3 = I L 3
(Equation 63)

The polarizing voltage is available as long as the positive-sequence voltage exceeds 4% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100 ms, the following occurs: If the current is still above the set value of the minimum operating current (between 10 and 30% of the set terminal rated current IBase), the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.

If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.

The directional setting is given as a characteristic angle AngleRCA for the function and an angle window AngleROA.

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Section 7 Current protection

Reverse

Uref RCA

ROA

ROA

Forward

Idir

en05000745.vsd
IEC05000745 V1 EN

Figure 164:

Directional characteristic of the phase overcurrent protection

The default value of AngleRCA is 65. The parameters AngleROA gives the angle sector from AngleRCA for directional borders. A minimum current for directional phase start current signal can be set: IminOpPhSel. If no blockings are given the start signals will start the timers of the step. The time characteristic for each step can be chosen as definite time delay or inverse time characteristic. A wide range of standardized inverse time characteristics is available. It is also possible to create a tailor made time characteristic. The possibilities for inverse time characteristics are described in section "Inverse characteristics". All four steps in OC4PTOC can be blocked from the binary input BLOCK. The binary input BLKSTx (x=1, 2, 3 or 4) blocks the operation of respective step. Different types of reset time can be selected as described in section "Inverse characteristics". There is also a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the set operation current via a binary input (enable multiplier). In some applications the operation value needs to be changed, for example due to changed network switching state. The function can be blocked from the binary input BLOCK. The start signals from the function can be blocked from the binary input BLKST. The trip signals from the function can be blocked from the binary input BLKTR.
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Section 7 Current protection 7.2.3 Function block


OC4PTOC I3P* U3P* BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 TRIP TR1 TR2 TR3 TR4 TRL1 TRL2 TRL3 TR1L1 TR1L2 TR1L3 TR2L1 TR2L2 TR2L3 TR3L1 TR3L2 TR3L3 TR4L1 TR4L2 TR4L3 START ST1 ST2 ST3 ST4 STL1 STL2 STL3 ST1L1 ST1L2 ST1L3 ST2L1 ST2L2 ST2L3 ST3L1 ST3L2 ST3L3 ST4L1 ST4L2 ST4L3 2NDHARM DIRL1 DIRL2 DIRL3 IEC06000187-2-en.vsd
IEC06000187 V2 EN

1MRK505183-UEN C

Figure 165:

OC4PTOC function block

7.2.4

Input and output signals


Table 166:
Name I3P U3P BLOCK BLKTR BLKST1 BLKST2

OC4PTOC Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Block of trip Block of Step1 Block of Step2

Table continues on next page

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Section 7 Current protection


Name BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 Description Block of Step3 Block of Step4 When activated, the current multiplier is in use for step1 When activated, the current multiplier is in use for step2 When activated, the current multiplier is in use for step3 When activated, the current multiplier is in use for step4

Table 167:
Name TRIP TR1 TR2 TR3 TR4 TRL1 TRL2 TRL3 TR1L1 TR1L2 TR1L3 TR2L1 TR2L2 TR2L3 TR3L1 TR3L2 TR3L3 TR4L1 TR4L2 TR4L3 START ST1 ST2 ST3 ST4 STL1 STL2

OC4PTOC Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip Common trip signal from step1 Common trip signal from step2 Common trip signal from step3 Common trip signal from step4 Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 Trip signal from step1 phase L1 Trip signal from step1 phase L2 Trip signal from step1 phase L3 Trip signal from step2 phase L1 Trip signal from step2 phase L2 Trip signal from step2 phase L3 Trip signal from step3 phase L1 Trip signal from step3 phase L2 Trip signal from step3 phase L3 Trip signal from step4 phase L1 Trip signal from step4 phase L2 Trip signal from step4 phase L3 General start signal Common start signal from step1 Common start signal from step2 Common start signal from step3 Common start signal from step4 Start signal from phase L1 Start signal from phase L2

Table continues on next page

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Section 7 Current protection


Name STL3 ST1L1 ST1L2 ST1L3 ST2L1 ST2L2 ST2L3 ST3L1 ST3L2 ST3L3 ST4L1 ST4L2 ST4L3 2NDHARM DIRL1 DIRL2 DIRL3 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER INTEGER Description Start signal from phase L3

1MRK505183-UEN C

Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3 Start signal from step3 phase L1 Start signal from step3 phase L2 Start signal from step3 phase L3 Start signal from step4 phase L1 Start signal from step4 phase L2 Start signal from step4 phase L3 Block from second harmonic detection Direction for phase1 Direction for phase2 Direction for phase3

7.2.5
Table 168:
Name Operation IBase UBase AngleRCA AngleROA StartPhSel

Setting parameters
OC4PTOC Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 40 - 65 40 - 89 Not Used 1 out of 3 2 out of 3 3 out of 3 Off Non-directional Forward Reverse Unit A kV Deg Deg Step 1 0.05 1 1 Default Off 3000 400.00 55 80 1 out of 3 Description Operation Off / On Base current Base voltage Relay characteristic angle (RCA) Relay operation angle (ROA) Number of phases required for op (1 of 3, 2 of 3, 3 of 3)

DirMode1

Non-directional

Directional mode of step 1 (off, nodir, forward, reverse)

Table continues on next page

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Section 7 Current protection


Values (Range) ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00 0.000 - 60.000 1.0 - 10.0 Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00 Unit Step Default ANSI Def. Time Description Selection of time delay curve type for step 1

Name Characterist1

I1> t1 k1 t1Min I1Mult DirMode2

%IB s s -

1 0.001 0.01 0.001 0.1 -

1000 0.000 0.05 0.000 2.0 Non-directional

Phase current operate level for step1 in % of IBase Definitive time delay of step 1 Time multiplier for the inverse time delay for step 1 Minimum operate time for inverse curves for step 1 Multiplier for current operate level for step 1 Directional mode of step 2 (off, nodir, forward, reverse)

Characterist2

ANSI Def. Time

Selection of time delay curve type for step 2

I2> t2 k2

%IB s -

1 0.001 0.01

500 0.400 0.05

Phase current operate level for step2 in % of IBase Definitive time delay of step 2 Time multiplier for the inverse time delay for step 2

Table continues on next page

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Name I2Mult t2Min DirMode3 Values (Range) 1.0 - 10.0 0.000 - 60.000 Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00 0.000 - 60.000 1.0 - 10.0 Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type Unit s Step 0.1 0.001 Default 2.0 0.000 Non-directional Description

1MRK505183-UEN C

Multiplier for current operate level for step 2 Minimum operate time for inverse curves for step 2 Directional mode of step 3 (off, nodir, forward, reverse)

Characterist3

ANSI Def. Time

Selection of time delay curve type for step 3

I3> t3 k3 t3Min I3Mult DirMode4

%IB s s -

1 0.001 0.01 0.001 0.1 -

250 0.800 0.05 0.000 2.0 Non-directional

Phase current operate level for step3 in % of IBase Definitive time delay of step 3 Time multiplier for the inverse time delay for step 3 Minimum operate time for inverse curves for step 3 Multiplier for current operate level for step 3 Directional mode of step 4 (off, nodir, forward, reverse)

Characterist4

ANSI Def. Time

Selection of time delay curve type for step 4

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Section 7 Current protection


Values (Range) 1 - 2500 0.000 - 60.000 0.05 - 999.00 0.000 - 60.000 1.0 - 10.0 Unit %IB s s Step 1 0.001 0.01 0.001 0.1 Default 175 2.000 0.05 0.000 2.0 Description Phase current operate level for step4 in % of IBase Definitive time delay of step 4 Time multiplier for the inverse time delay for step 4 Minimum operate time for inverse curves for step 4 Multiplier for current operate level for step 4

Name I4> t4 k4 t4Min I4Mult

Table 169:
Name IMinOpPhSel 2ndHarmStab ResetTypeCrv1

OC4PTOC Group settings (advanced)


Values (Range) 1 - 100 5 - 100 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Off On Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 Unit %IB %IB Step 1 1 Default 7 20 Instantaneous Description Minimum current for phase selection in % of IBase Operate level of 2nd harm restrain op in % of Fundamental Selection of reset curve type for step 1

tReset1 tPCrv1 tACrv1 tBCrv1 tCCrv1 tPRCrv1 tTRCrv1 tCRCrv1 HarmRestrain1 ResetTypeCrv2

s -

0.001 0.001 0.001 0.01 0.1 0.001 0.001 0.1 -

0.020 1.000 13.500 0.00 1.0 0.500 13.500 1.0 Off Instantaneous

Reset time delay used in IEC Definite Time curve step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1 Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Enable block of step 1 from harmonic restrain Selection of reset curve type for step 2

tReset2 tPCrv2 tACrv2 tBCrv2

s -

0.001 0.001 0.001 0.01

0.020 1.000 13.500 0.00

Reset time delay used in IEC Definite Time curve step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2

Table continues on next page 299 Technical reference manual

Section 7 Current protection


Name tCCrv2 tPRCrv2 tTRCrv2 tCRCrv2 HarmRestrain2 ResetTypeCrv3 Values (Range) 0.1 - 10.0 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Off On Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Off On Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 Unit Step 0.1 0.001 0.001 0.1 Default 1.0 0.500 13.500 1.0 Off Instantaneous Description

1MRK505183-UEN C

Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Enable block of step 2 from harmonic restrain Selection of reset curve type for step 3

tReset3 tPCrv3 tACrv3 tBCrv3 tCCrv3 tPRCrv3 tTRCrv3 tCRCrv3 HarmRestrain3 ResetTypeCrv4

s -

0.001 0.001 0.001 0.01 0.1 0.001 0.001 0.1 -

0.020 1.000 13.500 0.00 1.0 0.500 13.500 1.0 Off Instantaneous

Reset time delay used in IEC Definite Time curve step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve for step 3 Parameter PR for customer programmable curve for step 3 Parameter TR for customer programmable curve for step 3 Parameter CR for customer programmable curve for step 3 Enable block of step3 from harmonic restrain Selection of reset curve type for step 4

tReset4 tPCrv4 tACrv4 tBCrv4 tCCrv4 tPRCrv4

s -

0.001 0.001 0.001 0.01 0.1 0.001

0.020 1.000 13.500 0.00 1.0 0.500

Reset time delay used in IEC Definite Time curve step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve for step 4 Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve for step 4 Parameter PR for customer programmable curve for step 4

Table continues on next page

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Section 7 Current protection


Values (Range) 0.005 - 100.000 0.1 - 10.0 Off On Unit Step 0.001 0.1 Default 13.500 1.0 Off Description Parameter TR for customer programmable curve for step 4 Parameter CR for customer programmable curve for step 4 Enable block of step 4 from harmonic restrain

Name tTRCrv4 tCRCrv4 HarmRestrain4

Table 170:
Name MeasType

OC4PTOC Non group settings (basic)


Values (Range) DFT RMS Unit Step Default DFT Description Selection between DFT and RMS measurement

7.2.6

Technical data
Table 171:
Function Operate current Reset ratio Min. operating current Relay characteristic angle (RCA) Maximum forward angle Minimum forward angle 2nd harmonic blocking Independent time delay Minimum operate time Inverse characteristics, see table 644, table 645 and table 646 Operate time, start function Reset time, start function Critical impulse time Impulse margin time

OC4PTOC technical data


Setting range (1-2500)% of lBase > 95% (1-100)% of lBase (-70.0 -50.0) degrees (40.070.0) degrees (75.090.0) degrees (5100)% of fundamental (0.000-60.000) s (0.000-60.000) s 19 curve types Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir 2.0 degrees 2.0 degrees 2.0 degrees 2.0% of Ir 0.5% 10 ms 0.5% 10 ms See table 644, table 645 and table 646 -

25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically

7.3

Instantaneous residual overcurrent protection EFPIOC

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Section 7 Current protection


Function description Instantaneous residual overcurrent protection IEC 61850 identification EFPIOC IEC 60617 identification

1MRK505183-UEN C

ANSI/IEEE C37.2 device number 50N

IN>>
IEF V1 EN

7.3.1

Introduction
The Instantaneous residual overcurrent protection EFPIOC has a low transient overreach and short tripping times to allow the use for instantaneous earth-fault protection, with the reach limited to less than typical eighty percent of the line at minimum source impedance. EFPIOC can be configured to measure the residual current from the three-phase current inputs or the current from a separate current input. EFPIOC can be blocked by activating the input BLOCK.

7.3.2

Principle of operation
The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of the residual current, as well as from the sample values the equivalent RMS value is derived. This current value is fed to the Instantaneous residual overcurrent protection (EFPIOC). In a comparator the RMS value is compared to the set operation current value of the function (IN>>). If the residual current is larger than the set operation current a signal from the comparator is set to true. This signal will, without delay, activate the output signal TRIP. There is also a possibility to activate a preset change of the set operation current via a binary input (enable multiplier MULTEN). In some applications the operation value needs to be changed, for example due to transformer inrush currents. EFPIOC function can be blocked from the binary input BLOCK. The trip signals from the function can be blocked from the binary input BLKAR, that can be activated during single pole trip and autoreclosing sequences.

7.3.3

Function block
EFPIOC I3P* BLOCK BLKAR MULTEN TRIP

IEC06000269-2-en.vsd
IEC06000269 V2 EN

Figure 166:

EFPIOC function block

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Section 7 Current protection Input and output signals


Table 172:
Name I3P BLOCK BLKAR MULTEN

7.3.4

EFPIOC Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Three phase currents Block of function Block input for auto reclose Enable current multiplier

Table 173:
Name TRIP

EFPIOC Output signals


Type BOOLEAN Description Trip signal

7.3.5
Table 174:
Name Operation IBase IN>>

Setting parameters
EFPIOC Group settings (basic)
Values (Range) Off On 1 - 99999 1 - 2500 Unit A %IB Step 1 1 Default Off 3000 200 Description Operation Off / On Base current Operate residual current level in % of IBase

Table 175:
Name StValMult

EFPIOC Group settings (advanced)


Values (Range) 0.5 - 5.0 Unit Step 0.1 Default 1.0 Description Multiplier for operate current level

7.3.6

Technical data
Table 176:
Function Operate current Reset ratio Operate time Reset time Critical impulse time Operate time Table continues on next page

EFPIOC technical data


Range or value (1-2500)% of lBase > 95% 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 10 ms typically at 0 to 10 x Iset Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir -

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Function Reset time Critical impulse time Dynamic overreach Range or value 35 ms typically at 10 to 0 x Iset 2 ms typically at 0 to 10 x Iset < 5% at t = 100 ms Accuracy -

1MRK505183-UEN C

7.4

Four step residual overcurrent protection EF4PTOC


Function description Four step residual overcurrent protection IEC 61850 identification EF4PTOC IEC 60617 identification ANSI/IEEE C37.2 device number 51N/67N

IN 4 4 alt

TEF-REVA V1 EN

7.4.1

Introduction
The four step residual overcurrent protection EF4PTOC has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined characteristic. The directional function is voltage polarized, current polarized or dual polarized. EF4PTOC can be set directional or non-directional independently for each of the steps. A second harmonic blocking can be set individually for each step. EF4PTOC can be used as main protection for phase-to-earth faults. EF4PTOC can also be used to provide a system back-up for example, in the case of the primary protection being out of service due to communication or voltage transformer circuit failure. Directional operation can be combined together with corresponding communication logic in permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functionality are available as well. EF4PTOC can be configured to measure the residual current from the three-phase current inputs or the current from a separate current input.

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Section 7 Current protection Principle of operation


This function has the following three Analog Inputs on its function block in the configuration tool: 1. 2. 3. I3P, input used for Operating Quantity. U3P, input used for Voltage Polarizing Quantity. I3PPOL, input used for Current Polarizing Quantity.

7.4.2

These inputs are connected from the corresponding pre-processing function blocks in the Configuration Tool within PCM600.

7.4.2.1

Operating quantity within the function


The function always uses Residual Current (3I0) for its operating quantity. The residual current can be: 1. directly measured (when a dedicated CT input of the IED is connected in PCM600 to the fourth analog input of the pre-processing block connected to EF4PTOC function input I3P). This dedicated IED CT input can be for example, connected to: parallel connection of current instrument transformers in all three phases (Holm-Green connection). one single core balance, current instrument transformer (cable CT). one single current instrument transformer located between power system star point and earth (that is, current transformer located in the star point of a star connected transformer winding). one single current instrument transformer located between two parts of a protected object (that is, current transformer located between two star points of double star shunt capacitor bank).

2.

calculated from three-phase current input within the IED (when the fourth analog input into the pre-processing block connected to EF4PTOC function Analog Input I3P is not connected to a dedicated CT input of the IED in PCM600). In such case the pre-processing block will calculate 3I0 from the first three inputs into the pre-processing block by using the following formula:

Iop = 3I0 = IL1 + IL2 + IL3


EQUATION1874 V2 EN

(Equation 64)

where: IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.

The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. The phasor magnitude is used within the EF4PTOC protection to compare it with the
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set operation current value of the four steps (IN1>, IN2>, IN3> or IN4>). If the residual current is larger than the set operation current and the step is used in nondirectional mode a signal from the comparator for this step is set to true. This signal will, without delay, activate the output signal STINx (x=step 1-4) for this step and a common START signal.

7.4.2.2

Internal polarizing
A polarizing quantity is used within the protection in order to determine the direction to the earth fault (Forward/Reverse). The function can be set to use voltage polarizing, current polarizing or dual polarizing.

Voltage polarizing
When voltage polarizing is selected the protection will use the residual voltage -3U0 as polarizing quantity U3P. This voltage can be: 1. directly measured (when a dedicated VT input of the IED is connected in PCM600 to the fourth analog input of the pre-processing block connected to EF4PTOC function input U3P). This dedicated IED VT input shall be then connected to open delta winding of a three phase main VT. calculated from three phase voltage input within the IED (when the fourth analog input into the pre-processing block connected to EF4PTOC analog function input U3P is NOT connected to a dedicated VT input of the IED in PCM600). In such case the pre-processing block will calculate -3U0 from the first three inputs into the pre-processing block by using the following formula:

2.

UPol = -3U 0 = -(UL1 + UL2 + UL3)


EQUATION1875 V2 EN

(Equation 65)

where: UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages. Note! In order to use this all three phase-to-earth voltages must be connected to three IED VT inputs.

The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor of the fundamental frequency component of the residual voltage is derived. This phasor is used together with the phasor of the operating current, in order to determine the direction to the earth fault (Forward/Reverse). In order to enable voltage polarizing the magnitude of polarizing voltage shall be bigger than a minimum level defined by setting parameter UpolMin. It shall be noted that 3U0 is used to determine the location of the earth fault. This insures the required inversion of the polarizing voltage within the earth-fault function.

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Section 7 Current protection


Current polarizing
When current polarizing is selected the function will use the residual current (3I0) as polarizing quantity IPol. This current can be: 1. directly measured (when a dedicated CT input of the IED is connected in PCM600 to the fourth analog input of the pre-processing block connected to EF4PTOC function input I3PPOL). This dedicated IED CT input is then typically connected to one single current transformer located between power system star point and earth (current transformer located in the star point of a star connected transformer winding). For some special line protection applications this dedicated IED CT input can be connected to parallel connection of current transformers in all three phases (Holm-Green connection)

2.

calculated from three phase current input within the IED (when the fourth analog input into the pre-processing block connected to EF4PTOC function analog input I3PPOL is NOT connected to a dedicated CT input of the IED in PCM600). In such case the pre-processing block will calculate 3I0 from the first three inputs into the pre-processing block by using the following formula:

IPol = 3I0 = IL1 + IL2 + IL3


EQUATION2018 V2 EN

(Equation 66)

where: IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.

The residual polarizing current is pre-processed by a discrete fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. This phasor is then multiplied with pre-set equivalent zero-sequence source Impedance in order to calculate equivalent polarizing voltage UIPol in accordance with the following formula:
UIPol = Z 0s IPol = (RNPol + j XNPol) IPol
EQUATION1877 V2 EN

(Equation 67)

, which will be then used, together with the phasor of the operating current, in order to determine the direction to the earth fault (Forward/Reverse). In order to enable current polarizing the magnitude of polarizing current shall be bigger than a minimum level defined by setting parameter IPolMin.

Dual polarizing
When dual polarizing is selected the function will use the vectorial sum of the voltage based and current based polarizing in accordance with the following formula:

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UTotPol = UUPol + UIPol = -3U 0 + Z 0 s IPol = -3U 0 + ( RNPol + jXNPol ) IPol


EQUATION1878 V3 EN

(Equation 68)

Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor of the operating current, to determine the direction of the earth fault (Forward/Reverse).

7.4.2.3

External polarizing for earth-fault function


The individual steps within the protection can be set as non-directional. When this setting is selected it is then possible via function binary input BLKSTx to provide external directional control (that is, torque control) by for example using one of the following functions if available in the IED: 1. 2. Distance protection directional function. Negative sequence polarized General current and voltage multi purpose protection function.

7.4.2.4

Base quantities within the protection


The base quantities shall be entered as setting parameters for every earth-fault function. Base current (IBase) shall be entered as rated phase current of the protected object in primary amperes. Base voltage (UBase) shall be entered as rated phase-to-phase voltage of the protected object in primary kV.

7.4.2.5

Internal earth-fault protection structure


The protection is internally divided into the following parts: 1. 2. 3. 4. Four residual overcurrent steps. Directional supervision element for residual overcurrent steps with integrated directional comparison step for communication based earth-fault protection schemes (permissive or blocking). Second harmonic blocking element with additional feature for sealed-in blocking during switching of parallel transformers. Switch on to fault feature with integrated Under-Time logic for detection of breaker problems during breaker opening or closing sequence.

Each part is described separately in the following sections.

7.4.2.6

Four residual overcurrent steps


Each overcurrent step uses operating quantity Iop (residual current) as measuring quantity. Each of the four residual overcurrent steps has the following built-in facilities: Directional mode can be set to Off/Non-directional/Forward/Reverse. By this parameter setting the directional mode of the step is selected. It shall be noted
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Section 7 Current protection

that the directional decision (Forward/Reverse) is not made within the residual overcurrent step itself. The direction of the fault is determined in common directional supervision element. Residual current pickup value. Type of operating characteristic (inverse or definite time). By this parameter setting it is possible to select inverse or definite time delay for the earth-fault protection. Most of the standard IEC and ANSI inverse characteristics are available. For the complete list of available inverse curves please refer to section "Inverse characteristics". Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this parameter setting it is possible to select the reset characteristic of the step. For the complete list of available reset curves please refer to section "Inverse time characteristics". Time delay related settings. By these parameter settings the properties like definite time delay, minimum operating time for inverse curves, reset time delay and parameters to define user programmable inverse curve are defined. Supervision by second harmonic blocking feature (On/Off). By this parameter setting it is possible to prevent operation of the step if the second harmonic content in the residual current exceeds the preset level. Multiplier for scaling of the set residual current pickup value by external binary signal. By this parameter setting it is possible to increase residual current pickup value when function binary input ENMULTx has logical value 1.

Simplified logic diagram for one residual overcurrent step is shown in figure 167.
BLKTR Characteristx=DefTime
a b a>b

|IOP| ENMULTx INxMult INx> BLKSTx BLOCK 2ndH_BLOCK_Int HarmRestrain1=Disabled DirModex=Off DirModex=Non-directional DirModex=Forward DirModex=Reverse

tx
OR

AND

TRINx

T F

AND

STINx

Inverse

Characteristx=Inverse

OR

OR

STAGEx_DIR_Int

FORWARD_Int

AND

OR

REVERSE_Int

AND

en07000064.vsd

IEC07000064 V1 EN

Figure 167:

Simplified logic diagram for residual overcurrent step x, where x = step 1, 2, 3 or 4

The protection can be completely blocked from the binary input BLOCK. Output signals for respective step, STINx and TRINx, can be blocked from the binary
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input BLKSTx. The trip signals from the function can be blocked from the binary input BLKTR.

7.4.2.7

Directional supervision element with integrated directional comparison function


It shall be noted that at least one of the four residual overcurrent steps shall be set as directional in order to enable execution of the directional supervision element and the integrated directional comparison function. The protection has integrated directional feature. As the operating quantity current Iop is always used. The polarizing method is determined by the parameter setting polMethod. The polarizing quantity will be selected by the function in one of the following three ways: 1. 2. 3. When polMethod = Voltage, UVPol will be used as polarizing quantity. When polMethod = Current, UIpol will be used as polarizing quantity. WhenpolMethod = Dual, UTotPol will be used as polarizing quantity.

The operating and polarizing quantity are then used inside the directional element, as shown in figure 168, in order to determine the direction of the earth fault.

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Section 7 Current protection

Reverse Area

0.6IN>Dir AngleRCA IN>Dir Upol=-3Uo

Forward Area Iop=3Io

IEC07000066-3-en.vsd
IEC07000066 V3 EN

Figure 168:

Operating characteristic for earth-fault directional element

Two relevant setting parameters for directional supervision element are: Directional element will be internally enabled to operate as soon as Iop is bigger than 40% of IN>Dir and directional condition is fulfilled in set direction. Relay characteristic angle AngleRCA, which defines the position of forward and reverse areas in the operating characteristic.

Directional comparison step, built-in within directional supervision element, will set EF4PTOC function output binary signals: 1. 2. STFW=1 when operating quantity magnitude Iop x cos( - AngleRCA) is bigger than setting parameterIN>Dir and directional supervision element detects fault in forward direction. STRV=1 when operating quantity magnitude Iop x cos( - AngleRCA) is bigger than 60% of setting parameter IN>Dir and directional supervision element detects fault in reverse direction.

These signals shall be used for communication based earth-fault teleprotection communication schemes (permissive or blocking). Simplified logic diagram for directional supervision element with integrated directional comparison step is shown in figure 169:
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|Iop|

a a>b b

REVERSE_Int
a

AND

STRV

0.6 IN>Dir 0.4

X
a>b b

FORWARD_Int

AND

STFW

FWD polMethod=Voltage polMethod=Dual AngleRCA OR UPol

AND

FORWARD_Int

T 0.0 F

IPolMin Iop UTotPol

Directional Characteristic

UPolMin

IPol RNPol XNPol Complex Number X UIPol 0.0 T F STAGE1_DIR_Int STAGE2_DIR_Int STAGE3_DIR_Int STAGE4_DIR_Int

RVS

AND

REVERSE_Int

OR AND

BLOCK

IEC07000067-3-en.vsd
IEC07000067 V3 EN

Figure 169:

Simplified logic diagram for directional supervision element with integrated directional comparison step

7.4.2.8

Second harmonic blocking element


A harmonic restrain of the Four step residual overcurrent protection function EF4PTOC can be chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency component in the residual current exceeds the pre-set level (defined by parameter setting 2ndHarmStab) any of the four residual overcurrent stages can be selectively blocked by a parameter setting HarmRestrainx. When 2nd harmonic restraint feature is active the EF4PTOC function output signal 2NDHARMD will be set to logical value one. In addition to the basic functionality explained above the 2nd harmonic blocking can be set in such way to seal-in until residual current disappears. This feature might be required to stabilize EF4PTOC during switching of parallel transformers in the station. In case of parallel transformers there is a risk of sympathetic inrush current. If one of the transformers is in operation, and the parallel transformer is

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Section 7 Current protection

switched in, the asymmetric inrush current of the switched in transformer will cause partial saturation of the transformer already in service. This is called transferred saturation. The 2nd harmonic of the inrush currents of the two transformers will be in phase opposition. The summation of the two currents will thus give a small 2nd harmonic current. The residual fundamental current will however be significant. The inrush current of the transformer in service before the parallel transformer energizing, will be a little delayed compared to the first transformer. Therefore we will have high 2nd harmonic current component initially. After a short period this current will however be small and the normal 2nd harmonic blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will be latched as long as the residual current measured by the relay is larger than a selected step current level. This feature has been called Block for Parallel Transformers. This 2nd harmonic sealin feature will be activated when all of the following three conditions are simultaneously fulfilled: 1. 2. 3. Feature is enabled by entering setting parameter BlkParTransf = On. Basic 2nd harmonic restraint feature has been active for at least 70ms. Residual current magnitude is higher than the set start value for one of the four residual overcurrent stages. By a parameter setting UseStartValue it is possible to select which one of the four start values that will be used (IN1> or IN2> or IN3> or IN4>).

Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal will be sealed-in until the residual current magnitude falls below a value defined by parameter setting UseStartValue (see condition 3 above). Simplified logic diagram for 2nd harmonic blocking feature is shown in figure 170.

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BLOCK

IOP

Extract second harmonic current component Extract fundamental current component

a>b

OR

2NDHARMD

2ndHarmStab

q-1

t=70ms t BlkParTransf=On
|IOP|
a b a>b

OR

AN D

OR

2ndH_BLOCK_Int

UseStartValue IN1> IN2> IN3> IN4>

en07000068-2.vsd
IEC07000068 V2 EN

Figure 170:

Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers feature

7.4.2.9

Switch on to fault feature


Integrated in the four step residual overcurrent protection are Switch on to fault logic (SOTF) and Under-Time logic. The setting parameter SOTF is set to activate either SOTF or Under-Time logic or both. When the circuit breaker is closing there is a risk to close it onto a permanent fault, for example during an autoreclosing sequence. The SOTF logic will enable fast fault clearance during such situations. The time during which SOTF and Under-Time logics will be active after activation is defined by the setting parameter t4U. The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected by setting parameter StepForSOTF. The SOTF logic can be activated either from change in circuit breaker position or from circuit breaker close command pulse. The setting parameter ActivationSOTF can be set for activation of CB position open change, CB position closed change or CB close command. In case of a residual current start from step 2 or 3 (dependent on setting) the function will give a trip after a set delay tSOTF. This delay is normally set to a short time (default 200 ms). The Under-Time logic always uses the start signal from the step 4. The UnderTime logic will normally be set to operate for a lower current level than the SOTF

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function. The Under-Time logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if power transformer inrush currents can occur at breaker closing. This logic is typically used to detect asymmetry of CB poles immediately after switching of the circuit breaker. The Under-Time logic is activated either from change in circuit breaker position or from circuit breaker close and open command pulses. This selection is done by setting parameter ActUnderTime. In case of a start from step 4 this logic will give a trip after a set delay tUnderTime. This delay is normally set to a relatively short time (default 300 ms). Practically the Under-Time logic acts as circuit breaker pole-discordance protection, but it is only active immediately after breaker switching. The UnderTime logic can only be used in solidly or low impedance grounded systems.
SOTF

Open tPulse Closed Close command


AND AND

ActivationSOTF
tSOTF
t

STIN2 STIN3 StepForSOTF

OperationMode BLOCK UNDERTIME tUnderTime 2nd Harmonic OFF SOTF UnderTime


AND

TRIP SOTF or UnderTime

HarmResSOFT

OR

Open Close
OR

tPulse Close command STIN4


IEC06000643-2-en.vsd
IEC06000643 V2 EN

ActUnderTime

AND

Figure 171:

Simplified logic diagram for SOTF and Under-Time features

EF4PTOC Logic Diagram Simplified logic diagram for the complete EF4PTOC function is shown in figure 172:

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Directional Check Element

signal to communication scheme

INPol 3U0 3I0 DirMode enableDir

Direction Element

operatingCurrent earthFaultDirection angleValid

4 step over current element One element for each step

TRIP

3I0

Harmonic Restraint Element

harmRestrBlock

start step 2, 3 and 4 Blocking at parallel transformers SwitchOnToFault CB pos or cmd TRIP

Mode Selection

DirMode enableDir enableStep1-4 DirectionalMode1-4

en06000376.vsd
IEC06000376 V1 EN

Figure 172:

Functional overview of EF4PTOC

7.4.3

Function block
EF4PTOC I3P* U3P* I3PPOL* BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 CBPOS CLOSECB OPENCB TRIP TRIN1 TRIN2 TRIN3 TRIN4 TRSOTF START STIN1 STIN2 STIN3 STIN4 STSOTF STFW STRV 2NDHARMD

IEC06000424-2-en.vsd
IEC06000424 V2 EN

Figure 173:

EF4PTOC function block

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Section 7 Current protection Input and output signals


Table 177:
Name I3P U3P I3PPOL BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 CBPOS CLOSECB OPENCB

7.4.4

EF4PTOC Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 Description Current connection Polarizing voltage connection Polarizing current connection Block of function Block of trip Block of step 1 (Start and trip) Block of step 2 (Start and trip) Block of step 3 (Start and trip) Block of step 4 (Start and trip) When activated, the current multiplier is in use for step1 When activated, the current multiplier is in use for step2 When activated, the current multiplier is in use for step3 When activated, the current multiplier is in use for step4 Breaker position Breaker close command Breaker open command

Table 178:
Name TRIP TRIN1 TRIN2 TRIN3 TRIN4 TRSOTF START STIN1 STIN2 STIN3 STIN4 STSOTF

EF4PTOC Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip Trip signal from step 1 Trip signal from step 2 Trip signal from step 3 Trip signal from step 4 Trip signal from earth fault switch onto fault function General start signal Start signal step 1 Start signal step 2 Start signal step 3 Start signal step 4 Start signal from earth fault switch onto fault function

Table continues on next page

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Section 7 Current protection


Name STFW STRV 2NDHARMD Type BOOLEAN BOOLEAN BOOLEAN Description

1MRK505183-UEN C

Forward directional start signal Reverse directional start signal 2nd harmonic block signal

7.4.5
Table 179:
Name Operation IBase UBase AngleRCA polMethod

Setting parameters
EF4PTOC Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 -180 - 180 Voltage Current Dual 1 - 100 2 - 100 0.50 - 1000.00 0.50 - 3000.00 1 - 100 5 - 100 Off On IN1> IN2> IN3> IN4> Off SOTF UnderTime SOTF+UnderTime Open Closed CloseCommand Step 2 Step 3 Off On 0.000 - 60.000 0.000 - 60.000 Unit A kV Deg Step 1 0.05 1 Default Off 3000 400.00 65 Voltage Description Operation Off / On Base value for current settings Base value for voltage settings Relay characteristic angle (RCA) Type of polarization

UPolMin IPolMin RNPol XNPol IN>Dir 2ndHarmStab BlkParTransf UseStartValue

%UB %IB ohm ohm %IB % -

1 1 0.01 0.01 1 1 -

1 5 5.00 40.00 10 20 Off IN4>

Minimum voltage level for polarization in % of UBase Minimum current level for polarization in % of IBase Real part of source Z to be used for current polarisation Imaginary part of source Z to be used for current polarisation Residual current level for Direction release in % of IBase Second harmonic restrain operation in % of IN amplitude Enable blocking at parallel transformers Current level blk at parallel transf (step1, 2, 3 or 4)

SOTF

Off

SOTF operation mode (Off/SOTF/ Undertime/SOTF+undertime)

ActivationSOTF

Open

Select signal that shall activate SOTF

StepForSOTF HarmResSOTF tSOTF t4U

s s

0.001 0.001

Step 2 Off 0.200 1.000

Selection of step used for SOTF Enable harmonic restrain function in SOTF Time delay for SOTF Switch-onto-fault active time

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Section 7 Current protection


Values (Range) Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00 1.0 - 10.0 0.000 - 60.000 Off On Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type Unit Step Default Non-directional Description Directional mode of step 1 (off, nodir, forward, reverse)

Name DirMode1

Characterist1

ANSI Def. Time

Time delay curve type for step 1

IN1> t1 k1 IN1Mult t1Min HarmRestrain1 DirMode2

%IB s s -

1 0.001 0.01 0.1 0.001 -

100 0.000 0.05 2.0 0.000 On Non-directional

Operate residual current level for step 1 in % of IBase Independent (defenite) time delay of step 1 Time multiplier for the dependent time delay for step 1 Multiplier for scaling the current setting value for step 1 Minimum operate time for inverse curves for step 1 Enable block of step 1 from harmonic restrain Directional mode of step 2 (off, nodir, forward, reverse)

Characterist2

ANSI Def. Time

Time delay curve type for step 2

Table continues on next page

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Name IN2> t2 k2 IN2Mult t2Min HarmRestrain2 DirMode3 Values (Range) 1 - 2500 0.000 - 60.000 0.05 - 999.00 1.0 - 10.0 0.000 - 60.000 Off On Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00 1.0 - 10.0 0.000 - 60.000 Off On Off Non-directional Forward Reverse Unit %IB s s Step 1 0.001 0.01 0.1 0.001 Default 50 0.400 0.05 2.0 0.000 On Non-directional Description

1MRK505183-UEN C

Operate residual current level for step 2 in % of IBase Independent (definitive) time delay of step 2 Time multiplier for the dependent time delay for step 2 Multiplier for scaling the current setting value for step 2 Minimum operate time for inverse curves step 2 Enable block of step 2 from harmonic restrain Directional mode of step 3 (off, nodir, forward, reverse)

Characterist3

ANSI Def. Time

Time delay curve type for step 3

IN3> t3 k3 IN3Mult t3Min HarmRestrain3 DirMode4

%IB s s -

1 0.001 0.01 0.1 0.001 -

33 0.800 0.05 2.0 0.000 On Non-directional

Operate residual current level for step 3 in % of IBase Independent time delay of step 3 Time multiplier for the dependent time delay for step 3 Multiplier for scaling the current setting value for step 3 Minimum operate time for inverse curves for step 3 Enable block of step 3 from harmonic restrain Directional mode of step 4 (off, nodir, forward, reverse)

Table continues on next page

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Values (Range) ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00 1.0 - 10.0 0.000 - 60.000 Off On Unit Step Default ANSI Def. Time Description Time delay curve type for step 4

Name Characterist4

IN4> t4 k4 IN4Mult t4Min HarmRestrain4

%IB s s -

1 0.001 0.01 0.1 0.001 -

17 1.200 0.05 2.0 0.000 On

Operate residual current level for step 4 in % of IBase Independent (definitive) time delay of step 4 Time multiplier for the dependent time delay for step 4 Multiplier for scaling the current setting value for step 4 Minimum operate time in inverse curves step 4 Enable block of step 4 from harmonic restrain

Table 180:
Name ActUnderTime tUnderTime ResetTypeCrv1

EF4PTOC Group settings (advanced)


Values (Range) CB position CB command 0.000 - 60.000 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 Unit s Step 0.001 Default CB position 0.300 Instantaneous Description Select signal to activate under time (CB Pos/CBCommand) Time delay for under time Reset curve type for step 1

tReset1 tPCrv1 tACrv1 tBCrv1 tCCrv1 tPRCrv1

s -

0.001 0.001 0.001 0.01 0.1 0.001

0.020 1.000 13.500 0.00 1.0 0.500

Reset curve type for step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1

Table continues on next page

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Name tTRCrv1 tCRCrv1 ResetTypeCrv2 Values (Range) 0.005 - 100.000 0.1 - 10.0 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 Unit Step 0.001 0.1 Default 13.500 1.0 Instantaneous Description

1MRK505183-UEN C

Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Reset curve type for step 2

tReset2 tPCrv2 tACrv2 tBCrv2 tCCrv2 tPRCrv2 tTRCrv2 tCRCrv2 ResetTypeCrv3

s -

0.001 0.001 0.001 0.01 0.1 0.001 0.001 0.1 -

0.020 1.000 13.500 0.00 1.0 0.500 13.500 1.0 Instantaneous

Reset curve type for step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Reset curve type for step 3

tReset3 tPCrv3 tACrv3 tBCrv3 tCCrv3 tPRCrv3 tTRCrv3 tCRCrv3 ResetTypeCrv4

s -

0.001 0.001 0.001 0.01 0.1 0.001 0.001 0.1 -

0.020 1.000 13.500 0.00 1.0 0.500 13.500 1.0 Instantaneous

Reset curve type for step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve step 3 Parameter PR for customer programmable curve step 3 Parameter TR for customer programmable curve step 3 Parameter CR for customer programmable curve for step 3 Reset curve type for step 4

tReset4 tPCrv4 tACrv4

s -

0.001 0.001 0.001

0.020 1.000 13.500

Reset curve type for step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve step 4

Table continues on next page

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Values (Range) 0.00 - 20.00 0.1 - 10.0 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Unit Step 0.01 0.1 0.001 0.001 0.1 Default 0.00 1.0 0.500 13.500 1.0 Description Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve step 4 Parameter PR for customer programmable curve step 4 Parameter TR for customer programmable curve step 4 Parameter CR for customer programmable curve step 4

Name tBCrv4 tCCrv4 tPRCrv4 tTRCrv4 tCRCrv4

7.4.6

Technical data
Table 181:
Function Operate current Reset ratio Operate current for directional comparison Timers Inverse characteristics, see table 644, table 645 and table 646 Second harmonic restrain operation Relay characteristic angle Minimum polarizing voltage Minimum polarizing current Real part of source Z used for current polarization Imaginary part of source Z used for current polarization Operate time, start function Reset time, start function Critical impulse time Impulse margin time

EF4PTOC technical data


Range or value (1-2500)% of lBase > 95% (1100)% of lBase (0.000-60.000) s 18 curve types (5100)% of fundamental (-180 to 180) degrees (1100)% of UBase (1-30)% of IBase (0.50-1000.00) W/phase (0.503000.00) W/phase 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir 0.5% 10 ms See table 644, table 645 and table 646 2.0% of Ir 2.0 degrees 0.5% of Ur 0.25% of Ir -

7.5

Sensitive directional residual overcurrent and power protection SDEPSDE

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Function description Sensitive directional residual over current and power protection IEC 61850 identification SDEPSDE IEC 60617 identification -

1MRK505183-UEN C

ANSI/IEEE C37.2 device number 67N

7.5.1

Introduction
In networks with high impedance earthing, the phase-to-earth fault current is significantly smaller than the short circuit currents. Another difficulty for earthfault protection is that the magnitude of the phase-to-earth fault current is almost independent of the fault location in the network. Directional residual current can be used to detect and give selective trip of phase-toearth faults in high impedance earthed networks. The protection uses the residual current component 3I0 cos , where is the angle between the residual current and the residual voltage (-3U0), compensated with a characteristic angle. Alternatively, the function can be set to strict 3I0 level with an check of angle 3I0 and cos . Directional residual power can also be used to detect and give selective trip of phaseto-earth faults in high impedance earthed networks. The protection uses the residual power component 3I0 3U0 cos , where is the angle between the residual current and the reference residual voltage, compensated with a characteristic angle. A normal non-directional residual current function can also be used with definite or inverse time delay. A back-up neutral point voltage function is also available for non-directional sensitive back-up protection. In an isolated network, that is, the network is only coupled to earth via the capacitances between the phase conductors and earth, the residual current always has -90 phase shift compared to the reference residual voltage. The characteristic angle is chosen to -90 in such a network. In resistance earthed networks or in Petersen coil earthed, with a parallel resistor, the active residual current component (in phase with the residual voltage) should be used for the earth-fault detection. In such networks the characteristic angle is chosen to 0. As the amplitude of the residual current is independent of the fault location the selectivity of the earth-fault protection is achieved by time selectivity. When should the sensitive directional residual overcurrent protection be used and when should the sensitive directional residual power protection be used? Consider the following facts:

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Section 7 Current protection

Sensitive directional residual overcurrent protection gives possibility for better sensitivity Sensitive directional residual power protection gives possibility to use inverse time characteristics. This is applicable in large high impedance earthed networks, with large capacitive earth-fault current In some power systems a medium size neutral point resistor is used, for example, in low impedance earthed system. Such a resistor will give a resistive earth-fault current component of about 200 - 400 A at a zero resistive phase-toearth fault. In such a system the directional residual power protection gives better possibilities for selectivity enabled by inverse time power characteristics.

7.5.2
7.5.2.1

Principle of operation
Function inputs
The function is using phasors of the residual current and voltage. Group signals I3P and U3P containing phasors of residual current and voltage is taken from preprocessor blocks. The sensitive directional earth fault protection has the following sub-functions included:

Directional residual current protection measuring 3I0cos


is defined as the angle between the residual current 3I0 and the reference voltage compensated with the set characteristic angle RCADir (=ang(3I0)-ang(Uref) ). Uref = -3U0 ejRCADIr. RCADir is normally set equal to 0 in a high impedance earthed network with a neutral point resistor as the active current component is appearing out on the faulted feeder only. RCADir is set equal to -90 in an isolated network as all currents are mainly capacitive. The function operates when 3I0cos gets larger than the set value.

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1MRK505183-UEN C

Uref

RCADir = 0o, ROADir = 0o

3I0

j = ang(3I0 ) - ang(3Uref ) 3I0 cosj -3U0 = Uref

IEC06000648_2_en.vsd
IEC06000648 V2 EN

Figure 174:

RCADir set to 0
Uref

RCADir = -90o, ROADir = 90o

3I0 3I0 cos j


j = ang (3I0 ) - ang (Uref ) -3U0

IEC06000649_2_en.vsd
IEC06000649 V2 EN

Figure 175:

RCADir set to -90

For trip, both the residual current 3I0cos and the release voltage 3U0, must be larger than the set levels: INCosPhi> and UNRel>. Trip from this function can be blocked from the binary input BLKTRDIR.

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Section 7 Current protection

When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The trip from this sub-function has definite time delay. There is a possibility to increase the operate level for currents where the angle is larger than a set value as shown in the figure below. This is equivalent to blocking of the function if > ROADir. This option is used to handle angle error for the instrument transformers.

RCADir = 0o

3I0

Operate area

j 3I0 cos j -3U0 = Uref

ROADir

IEC06000650_2_en.vsd
IEC06000650 V2 EN

Figure 176:

Characteristic with ROADir restriction

The function indicates forward/reverse direction to the fault. Reverse direction is defined as 3I0cos ( + 180) the set value. It is also possible to tilt the characteristic to compensate for current transformer angle error with a setting RCAComp as shown in the figure 177:

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1MRK505183-UEN C

RCADir = 0

Operate area

-3U0 =Uref

Instrument transformer angle error

RCAcomp Characteristic after angle compensation

3I0 (prim)

3I0 (to prot)

en06000651.vsd
IEC06000651 V2 EN

Figure 177:

Explanation of RCAComp

Directional residual power protection measuring 3I0 3U0 cos


is defined as the angle between the residual current 3I0 and the reference voltage compensated with the set characteristic angle RCADir (=ang(3I0)ang(Uref) ). Uref = -3U0 e-jRCA. The function operates when 3I0 3U0 cos gets larger than the set value. For trip, both the residual power 3I0 3U0 cos , the residual current 3I0 and the release voltage 3U0, shall be larger than the set levels (SN>, INRel> and UNRel>). Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef or after the inverse time delay (setting kSN) the binary output signals TRIP and TRDIRIN are activated. The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as 3I0 3U0cos ( + 180) the set value. This variant has the possibility of choice between definite time delay and inverse time delay.

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Section 7 Current protection

The inverse time delay is defined as:


t inv = kSN (3I0 3U 0 cos j(reference)) 3I0 3U 0 cos j(measured)
(Equation 69)

EQUATION1942 V2 EN

Directional residual current protection measuring 3I0 and


The function will operate if the residual current is larger that the set value and the angle = ang(3I0)-ang(Uref) is within the sector RCADir ROADir
RCADir = 0 ROADir = 80

Operate area 3I0 80 -3U0

en06000652.vsd
IEC06000652 V2 EN

Figure 178:

Example of characteristic

For trip, both the residual current 3I0 and the release voltage 3U0, shall be larger than the set levels INDir> and UNREL> and the angle shall be in the set sector ROADir and RCADir. Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The function indicate forward/reverse direction to the fault. Reverse direction is defined as is within the angle sector: RCADir + 180 ROADir This variant shall have definite time delay.

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Section 7 Current protection


Directional functions

1MRK505183-UEN C

For all the directional functions there are directional start signals STFW: fault in the forward direction, and STRV: start in the reverse direction. Even if the directional function is set to operate for faults in the forward direction a fault in the reverse direction will give the start signal STRV. Also if the directional function is set to operate for faults in the reverse direction a fault in the forward direction will give the start signal STFW.

Non-directional earth fault current protection

This function will measure the residual current without checking the phase angle. The function will be used to detect cross-country faults. This function can serve as alternative or back-up to distance protection with phase preference logic. To assure selectivity the distance protection can block the non-directional earth fault current function via the input BLKNDN. If available the non-directional function is using the calculated residual current, derived as sum of the phase currents. This will give a better ability to detect crosscountry faults with high residual current, also when dedicated core balance CT for the sensitive earth fault protection will saturate. This variant shall have the possibility of choice between definite time delay and inverse time delay. The inverse time delay shall be according to IEC 60255-3. For trip, the residual current 3I0 shall be larger than the set levels (INNonDir>). Trip from this function can be blocked from the binary input BLKNDN. When the function is activated binary output signal STNDIN is activated. If the activation is active after the set delay tINNonDir or after the inverse time delay the binary output signals TRIP and TRNDIN are activated.

Residual overvoltage release and protection

The directional function shall be released when the residual voltage gets higher than a set level. There shall also be a separate trip, with its own definite time delay, from this set voltage level. For trip, the residual voltage 3U0 shall be larger than the set levels (UN>). Trip from this function can be blocked from the binary input BLKUN. When the function is activated binary output signal STUN is activated. If the activation is active after the set delay tUNNonDir TRIP and TRUN are activated. A simplified logical diagram of the total function is shown in figure 179.

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Section 7 Current protection

INNonDir> t UN> t
OpMODE=3I0cosfi

STNDIN TRNDIN STUN TRUN

IN> INcosPhi>
OpMODE=3I03U0cosfi

&

& INUNcosPhi> Phi in RCA +- ROA


OpMODE=3I0 and fi

&
t

STARTDIRIN

SN TimeChar = InvTime

&

TRDIRIN

&
TimeChar = DefTime

&

DirMode = Forward Forward DirMode = Reverse Reverse

&

1 STFW

& STRV
en06000653.vsd

IEC06000653 V2 EN

Figure 179:

Simplified logical diagram of the sensitive earth-fault current protection

7.5.3

Function block
SDEPSDE I3P* U3P* BLOCK BLKTR BLKTRDIR BLKNDN BLKUN TRIP TRDIRIN TRNDIN TRUN START STDIRIN STNDIN STUN STFW STRV STDIR UNREL IEC07000032-2-en.vsd
IEC07000032 V2 EN

Figure 180:

SDEPSDE function block

331 Technical reference manual

Section 7 Current protection 7.5.4 Input and output signals


Table 182:
Name I3P U3P BLOCK BLKTR BLKTRDIR BLKNDN BLKUN

1MRK505183-UEN C

SDEPSDE Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 Description Group signal for current Group signal for voltage Blocks all the outputs of the function Blocks the operate outputs of the function Blocks the directional operate outputs of the function Blocks the Non directional current residual outputs Blocks the Non directional voltage residual outputs

Table 183:
Name TRIP TRDIRIN TRNDIN TRUN START STDIRIN STNDIN STUN STFW STRV STDIR UNREL

SDEPSDE Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER BOOLEAN Description General trip of the function Trip of the directional residual over current function Trip of non directional residual over current Trip of non directional residual over voltage General start of the function Start of the directional residual over current function Start of non directional residual over current Start of non directional residual over voltage Start of directional function for a fault in forward direction Start of directional function for a fault in reverse direction Direction of fault. A general signal common to all three mode of residual over current protection Residual voltage release of operation of all directional modes

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Section 7 Current protection Setting parameters

7.5.5
Table 184:
Name Operation OpMode

SDEPSDE Group settings (basic)


Values (Range) Off On 3I0Cosfi 3I03U0Cosfi 3I0 and fi Forward Reverse -179 - 180 -10.0 - 10.0 0 - 90 0.25 - 200.00 0.25 - 200.00 0.25 - 200.00 0.000 - 60.000 0.03 - 200.00 0.00 - 2.00 Off On 1.00 - 400.00 0.000 - 60.000 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type Unit Step Default Off 3I0Cosfi Description Operation Off / On Selection of operation mode for protection

DirMode RCADir RCAComp ROADir INCosPhi> SN> INDir> tDef SRef kSN OpINNonDir> INNonDir> tINNonDir TimeChar

Deg Deg Deg %IB %SB %IB s %SB %IB s -

1 0.1 1 0.01 0.01 0.01 0.001 0.01 0.01 0.01 0.001 -

Forward -90 0.0 90 1.00 10.00 5.00 0.100 10.00 0.10 Off 10.00 1.000 IEC Norm. inv.

Direction of operation forward or reverse Relay characteristic angle RCA, in deg Relay characteristic angle compensation Relay open angle ROA used as release in phase mode, in deg Set level for 3I0cosFi, directional res over current, in %Ib Set level for 3I03U0cosFi, starting inv time count, in %Sb Set level for directional residual over current prot, in %Ib Definite time delay directional residual overcurrent, in sec Reference value of res power for inverse time count, in %Sb Time multiplier setting for directional residual power mode Operation of non-directional residual overcurrent protection Set level for non directional residual over current, in %Ib Time delay for non-directional residual over current, in sec Operation curve selection for IDMT operation

Table continues on next page

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Section 7 Current protection


Name tMin kIN OpUN> UN> tUN INRel> UNRel> Values (Range) 0.000 - 60.000 0.00 - 2.00 Off On 1.00 - 200.00 0.000 - 60.000 0.25 - 200.00 0.01 - 200.00 Unit s %UB s %IB %UB Step 0.001 0.01 0.01 0.001 0.01 0.01 Default 0.040 1.00 Off 20.00 0.100 1.00 3.00 Description

1MRK505183-UEN C

Minimum operate time for IEC IDMT curves, in sec IDMT time mult for non-dir res over current protection Operation of non-directional residual overvoltage protection Set level for non-directional residual over voltage, in %Ub Time delay for non-directional residual over voltage, in sec Residual release current for all directional modes, in %Ib Residual release voltage for all direction modes, in %Ub

Table 185:
Name tReset tPCrv tACrv tBCrv tCCrv ResetTypeCrv

SDEPSDE Group settings (advanced)


Values (Range) 0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 Immediate IEC Reset ANSI reset 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0 Unit s Step 0.001 0.001 0.001 0.01 0.1 Default 0.040 1.000 13.500 0.00 1.0 IEC Reset Description Time delay used for reset of definite timers, in sec Setting P for customer programmable curve Setting A for customer programmable curve Setting B for customer programmable curve Setting C for customer programmable curve Reset mode when current drops off.

tPRCrv tTRCrv tCRCrv

0.001 0.001 0.1

0.500 13.500 1.0

Setting PR for customer programmable curve Setting TR for customer programmable curve Setting CR for customer programmable curve

Table 186:
Name IBase UBase SBase

SDEPSDE Non group settings (basic)


Values (Range) 1 - 99999 0.05 - 2000.00 0.05 200000000.00 Unit A kV kVA Step 1 0.05 0.05 Default 100 63.50 6350.00 Description Base Current, in A Base Voltage, in kV Phase to Neutral Base Power, in kVA. IBase*Ubase

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Section 7 Current protection

Table 187:
Name RotResU

SDEPSDE Non group settings (advanced)


Values (Range) 0 deg 180 deg Unit Step Default 180 deg Description Setting for rotating polarizing quantity if necessary

7.5.6

Technical data
Table 188:
Function Operate level for 3I0cosj directional residual overcurrent

SDEPSDE technical data


Range or value (0.25-200.00)% of lBase At low setting: (2.5-10) mA (10-50) mA (0.25-200.00)% of SBase At low setting: (0.25-5.00)% of SBase (0.25-200.00)% of lBase At low setting: (2.5-10) mA (10-50) mA (1.00-400.00)% of lBase At low setting: (10-50) mA (1.00-200.00)% of UBase (0.25-200.00)% of lBase At low setting: (2.5-10) mA (10-50) mA (0.01-200.00)% of UBase > 95% (0.000-60.000) s 19 curve types Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0 mA 0.5 mA 1.0% of Sr at S Sr 1.0% of S at S > Sr 10% of set value 1.0% of Ir at Ir 1.0% of I at I > Ir 1.0 mA 0.5 mA 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0 mA 0.5% of Ur at UUr 0.5% of U at U > Ur 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0 mA 0.5 mA 0.5% of Ur at UUr 0.5% of U at U > Ur 0.5% 10 ms See table 644, table 645 and table 646 2.0 degrees 2.0 degrees -

Operate level for 3I03U0 cosj directional residual power

Operate level for 3I0 and j residual overcurrent

Operate level for non directional overcurrent

Operate level for non directional residual overvoltage Residual release current for all directional modes

Residual release voltage for all directional modes Reset ratio Timers Inverse characteristics, see table 644, table 645 and table 646 Relay characteristic angle RCA Relay open angle ROA Operate time, non directional residual over current Reset time, non directional residual over current Operate time, start function Reset time, start function

(-179 to 180) degrees (0-90) degrees 60 ms typically at 0 to 2 x Iset 60 ms typically at 2 to 0 x Iset 150 ms typically at 0 to 2 x Iset 50 ms typically at 2 to 0 x Iset

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1MRK505183-UEN C

7.6

Thermal overload protection, one time constant LPTTR


Function description Thermal overload protection, one time constant IEC 61850 identification LPTTR IEC 60617 identification ANSI/IEEE C37.2 device number 26

SYMBOL-A V1 EN

7.6.1

Introduction
The increasing utilizing of the power system closer to the thermal limits has generated a need of a thermal overload protection also for power lines. A thermal overload will often not be detected by other protection functions and the introduction of the thermal overload protection can allow the protected circuit to operate closer to the thermal limits. The three-phase current measuring protection has an I2t characteristic with settable time constant and a thermal memory. An alarm level gives early warning to allow operators to take action well before the line is tripped.

7.6.2

Principle of operation
The sampled analog phase currents are pre-processed and for each phase current the RMS value is derived. These phase current values are fed to the thermal overload protection, one time constant function LPTTR. From the largest of the three-phase currents a final temperature is calculated according to the expression:

Q final

I = I ref

Tref
(Equation 70)

EQUATION1167 V1 EN

where: I Iref Tref is the largest phase current, is a given reference current and is steady state temperature corresponding to Iref

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Section 7 Current protection

The ambient temperature is added to the calculated final temperature. If this temperature is larger than the set operate temperature level, TripTemp, a START output signal is activated. The actual temperature at the actual execution cycle is calculated as:
Dt Qn = Qn -1 + ( Q final - Q n-1 ) 1 - e t
EQUATION1168 V1 EN

(Equation 71)

where: Qn Qn-1 Qfinal Dt is the calculated present temperature, is the calculated temperature at the previous time step, is the calculated final temperature with the actual current, is the time step between calculation of the actual temperature and is the set thermal time constant for the protected device (line or cable)

The actual temperature of the protected component (line or cable) is calculated by adding the ambient temperature to the calculated temperature, as shown above. The ambient temperature can be taken from a separate sensor or can be given a constant value. The calculated component temperature is available as a real figure signal, TEMP. When the component temperature reaches the set alarm level AlarmTemp the output signal ALARM is set. When the component temperature reaches the set trip level TripTemp the output signal TRIP is set. There is also a calculation of the present time to operate with the present current. This calculation is only performed if the final temperature is calculated to be above the operation temperature:

Q - Qoperate toperate = -t ln final Q final - Q n


EQUATION1169 V1 EN

(Equation 72)

The calculated time to trip is available as a real figure signal, TTRIP. After a trip, caused by the thermal overload protection, there can be a lockout to reconnect the tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is above the set lockout release temperature setting ReclTemp. The time to lockout release is calculated that is, a calculation of the cooling time to a set value. The thermal content of the function can be reset with input RESET.

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1MRK505183-UEN C

Q - Qlockout _ release tlockout _ release = -t ln final Q final - Q n


EQUATION1170 V1 EN

(Equation 73)

Here the final temperature is equal to the set or measured ambient temperature. The calculated time to reset of lockout is available as a real figure signal, TENRECL. In some applications the measured current can involve a number of parallel lines. This is often used for cable lines where one bay connects several parallel cables. By setting the parameter IMult to the number of parallel lines (cables) the actual current on one line is used in the protection algorithm. To activate this option the input ENMULT must be activated. The protection has a reset input: RESET. By activating this input the calculated temperature is reset to its default initial value. This is useful during testing when secondary injected current has given a calculated false temperature level.
Final Temp > TripTemp START

Calculation of actual temperature

actual temperature

IL1, IL2, IL3

Calculation of final temperature Actual Temp > AlarmTemp ALARM

TRIP Actual Temp > TripTemp Lockout logic

LOCKOUT

Actual Temp < Recl Temp

Calculation of time to trip

TTRIP

Calculation of time to reset of lockout

TENRECL

IEC09000637_1_en.vsd
IEC09000637 V1 EN

Figure 181:
338

Functional overview of LPTTR

Technical reference manual

1MRK505183-UEN C

Section 7 Current protection Function block


LPTTR I3P* BLOCK BLKTR ENMULT AMBTEMP SENSFLT RESET TRIP START ALARM LOCKOUT

7.6.3

IEC04000396-2-en.vsd
IEC04000396 V3 EN

Figure 182:

LPTTR function block

7.6.4

Input and output signals


Table 189:
Name I3P BLOCK BLKTR ENMULT AMBTEMP SENSFLT RESET

LPTTR Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN REAL BOOLEAN BOOLEAN Default 0 0 0 0 0 0 Description Group connection Block of function Block of trip Current multiplyer used when THOL is for two or more lines Ambient temperature from external temperature sensor Validity status of ambient temperature sensor Reset of internal thermal load counter

Table 190:
Name TRIP START ALARM LOCKOUT

LPTTR Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip Start Signal Alarm signal Lockout signal

7.6.5
Table 191:
Name Operation IBase TRef

Setting parameters
LPTTR Group settings (basic)
Values (Range) Off On 0 - 99999 0 - 600 Unit A Deg Step 1 1 Default Off 3000 90 Description Operation Off / On Base current in A End temperature rise above ambient of the line when loaded with IRef

Table continues on next page

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Section 7 Current protection


Name IRef IMult Tau AlarmTemp TripTemp ReclTemp tPulse AmbiSens DefaultAmbTemp DefaultTemp Values (Range) 0 - 400 1-5 0 - 1000 0 - 200 0 - 600 0 - 600 0.05 - 0.30 Off On -50 - 250 -50 - 600 Unit %IB Min Deg Deg Deg s Deg Deg Step 1 1 1 1 1 1 0.01 1 1 Default 100 1 45 80 90 75 0.1 Off 20 50 Description

1MRK505183-UEN C

The load current (in %of IBase) leading to TRef temperature Current multiplier when function is used for two or more lines Time constant of the line in minutes. Temperature level for start (alarm) Temperature level for trip Temperature for reset of lockout after trip Operate pulse length. Minimum one execution cycle External temperature sensor availiable Ambient temperature used when AmbiSens is set to Off. Temperature raise above ambient temperature at startup

7.6.6

Technical data
Table 192:
Function Reference current Start temperature reference Operate time:

LPTTR technical data


Range or value (0-400)% of IBase (0-400)C Time constant t = (01000) minutes Accuracy 1.0% of Ir 1.0C IEC 60255-8, class 5 + 200 ms

I 2 - I p2 t = t ln 2 I - Ib 2
EQUATION1356 V1 EN

(Equation 74)

I = actual measured current Ip = load current before overload occurs Ib = base current, IBase Alarm temperature Trip temperature Reset level temperature (0-200)C (0-400)C (0-400)C 2.0% of heat content trip 2.0% of heat content trip 2.0% of heat content trip

7.7

Breaker failure protection CCRBRF

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Section 7 Current protection


Function description Breaker failure protection IEC 61850 identification CCRBRF IEC 60617 identification ANSI/IEEE C37.2 device number 50BF

3I>BF
SYMBOL-U V1 EN

7.7.1

Introduction
Breaker failure protection (CCRBRF) ensures fast back-up tripping of surrounding breakers in case of own breaker failure to open. CCRBRF can be current based, contact based, or adaptive combination between these two principles. A current check with extremely short reset time is used as check criteria to achieve a high security against unnecessary operation. A contact check criteria can be used where the fault current through the breaker is small. CCRBRF can be single- or three-phase initiated to allow use with single phase tripping applications. For the three-phase version of CCRBRF the current criteria can be set to operate only if two out of four for example, two phases or one phase plus the residual current start. This gives a higher security to the back-up trip command. CCRBRF function can be programmed to give a single- or three-phase re-trip of the own breaker to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes during testing.

7.7.2

Principle of operation
Breaker failure protection CCRBRF is initiated from protection trip command, either from protection functions within the IED or from external protection devices. The start signal can be phase selective or general (for all three phases). Phase selective start signals enable single pole re-trip function. This means that a second attempt to open the breaker is done. The re-trip attempt can be made after a set time delay. For transmission lines single pole trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated from phase selective line protection. The re-trip function can be done with or without current check. With the current check the re-trip is only performed if the current through the circuit breaker is larger than the operate current level. The start signal can be an internal or external protection trip signal. This signal will start the back-up trip timer. If the opening of the breaker is successful this is detected by the function, by detection of either low current through RMS evaluation and a special adapted current algorithm or by open contact indication. The special algorithm enables a very fast detection of successful breaker opening,

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1MRK505183-UEN C

that is, fast resetting of the current measurement. If the current and/or contact detection has not detected breaker opening before the back-up timer has run its time a back-up trip is initiated. Further the following possibilities are available: The minimum length of the re-trip pulse, the back-up trip pulse and the backup trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the backup trip pulse 2 will however sustain as long as there is an indication of closed breaker. In the current detection it is possible to use three different options: 1 out of 3 where it is sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient to detect failure to open (high current) in one pole or high residual current and 2 out of 4 where at least two current (phase current and/ or residual current) shall be high for breaker failure detection. The current detection level for the residual current can be set different from the setting of phase current detection. It is possible to have different back-up time delays for single-phase faults and for multi-phase faults. The back-up trip can be made without current check. It is possible to have this option activated for small load currents only. It is possible to have instantaneous back-up trip function if a signal is high if the circuit breaker is insufficient to clear faults, for example at low gas pressure.
START STL1
30 ms
OR

BFP Started L1
150 ms
AND S R OR

BLOCK Reset L1

SR

AND

Time out L1

Retrip Time Out L1 BackupTrip L1


OR

IEC09000976-1-en.vsd
IEC09000976 V1 EN

Figure 183:

Simplified logic scheme of the CCRBRF starting logic

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Section 7 Current protection

IP>
a b

a>b
OR AND

FunctionMode

Current Contact

OR

Reset L1

Time out L1
Current and Contact
OR AND

Current High L1
CB Closed L1
OR

IL1

AND

BFP Started L1
a

I>BlkCont CBCLDL1

a>b

AND

OR

AND

AND

AND

Contact Closed L1

IEC09000977-1-en.vsd
IEC09000977 V1 EN

Figure 184:

Simplified logic scheme of the CCRBRF, CB position evaluation

BFP Started L1

t1
t

Retrip Time Out L1


AND

From other phases

TRRETL3 TRRETL2
OR

TRRET TRRETL1

RetripMode

tPulse
OR OR

No CBPos Check
1

OR

AND

CBFLT

CB Pos Check CB Closed L1

AND

IEC09000978-1-en.vsd

IEC09000978 V1 EN

Figure 185:

Simplified logic scheme of the retrip logic function

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IN IN> BUTripMode
1

a b

a>b

AND

From other phases CBFLT

2 out of 4 1 out of 4 1 out of 3 Current High L2 Current High L3

Contact Closed L1
OR OR

Current High L1
AND

AND

t2

BFP Started L1

t2MPh
AND
t

OR

AND

Backup Trip L1

OR

AND

OR

tPulse
OR OR

From other phases

BFP Started L2 BFP Started L3

From other Backup Trip L2 phases Backup Trip L3


2 of 3

TRBU

tPulse t3
S AND R

SR

OR

TRBU2

IEC09000979-1-en.vsd

IEC09000979 V1 EN

Figure 186:

Simplified logic scheme of the back-up trip logic function

Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in respective phase has magnitude larger than setting parameter IP>.

7.7.3

Function block
CCRBRF I3P* BLOCK START STL1 STL2 STL3 CBCLDL1 CBCLDL2 CBCLDL3 CBFLT TRBU TRBU2 TRRET TRRETL1 TRRETL2 TRRETL3 CBALARM

IEC06000188-2-en.vsd
IEC06000188 V2 EN

Figure 187:

CCRBRF function block

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Section 7 Current protection Input and output signals


Table 193:
Name I3P BLOCK START STL1 STL2 STL3 CBCLDL1 CBCLDL2 CBCLDL3 CBFLT

7.7.4

CCRBRF Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 1 1 1 0 Description Current connection Block of function Three phase start of breaker failure protection function Start signal of phase L1 Start signal of phase L2 Start signal of phase L3 Circuit breaker closed in phase L1 Circuit breaker closed in phase L2 Circuit breaker closed in phase L3 CB faulty, unable to trip. Back-up trip instantanously.

Table 194:
Name TRBU TRBU2 TRRET TRRETL1 TRRETL2 TRRETL3 CBALARM

CCRBRF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Back-up trip by breaker failure protection function Second back-up trip by breaker failure protection function Retrip by breaker failure protection function Retrip by breaker failure protection function phase L1 Retrip by breaker failure protection function phase L2 Retrip by breaker failure protection function phase L3 Alarm for faulty circuit breaker

7.7.5
Table 195:
Name Operation IBase FunctionMode

Setting parameters
CCRBRF Group settings (basic)
Values (Range) Off On 1 - 99999 Current Contact Current&Contact Unit A Step 1 Default Off 3000 Current Description Operation Off / On Base current Detection principle for back-up trip

Table continues on next page

345 Technical reference manual

Section 7 Current protection


Name BuTripMode Values (Range) 2 out of 4 1 out of 3 1 out of 4 Retrip Off CB Pos Check No CBPos Check 5 - 200 2 - 200 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit Step Default 1 out of 3 Description Back-up trip mode

1MRK505183-UEN C

RetripMode

Retrip Off

Operation mode of re-trip logic

IP> IN> t1 t2 t2MPh tPulse

%IB %IB s s s s

1 1 0.001 0.001 0.001 0.001

10 10 0.000 0.150 0.150 0.200

Operate phase current level in % of IBase Operate residual current level in % of IBase Time delay of re-trip Time delay of back-up trip Time delay of back-up trip at multi-phase start Trip pulse duration

Table 196:
Name I>BlkCont t3 tCBAlarm

CCRBRF Group settings (advanced)


Values (Range) 5 - 200 0.000 - 60.000 0.000 - 60.000 Unit %IB s s Step 1 0.001 0.001 Default 20 0.030 5.000 Description Current for blocking of CB contact operation in % of IBase Additional time delay to t2 for a second back-up trip Time delay for CB faulty signal

7.7.6

Technical data
Table 197:
Function Operate phase current Reset ratio, phase current Operate residual current Reset ratio, residual current Phase current level for blocking of contact function Reset ratio Timers Operate time for current detection Reset time for current detection

CCRBRF technical data


Range or value (5-200)% of lBase > 95% (2-200)% of lBase > 95% (5-200)% of lBase Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir at I Ir 1.0% of I at I > Ir 0.5% 10 ms -

> 95% (0.000-60.000) s 10 ms typically 15 ms maximum

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Section 7 Current protection

7.8

Stub protection STBPTOC


Function description Stub protection IEC 61850 identification STBPTOC IEC 60617 identification ANSI/IEEE C37.2 device number 50STB

3I>STUB
SYMBOL-T V1 EN

7.8.1

Introduction
When a power line is taken out of service for maintenance and the line disconnector is opened in multi-breaker arrangements the voltage transformers will mostly be outside on the disconnected part. The primary line distance protection will thus not be able to operate and must be blocked. The stub protection STBPTOC covers the zone between the current transformers and the open disconnector. The three-phase instantaneous overcurrent function is released from a normally open, NO (b) auxiliary contact on the line disconnector.

7.8.2

Principle of operation
The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to a comparator in the stub protection function STBPTOC. In a comparator the RMS values are compared to the set operating current value of the function I>. If a phase current is larger than the set operating current the signal from the comparator for this phase is activated. This signal will, in combination with the release signal from line disconnection (RELEASE input), activate the timer for the TRIP signal. If the fault current remains during the timer delay t, the TRIP output signal is activated. The function can be blocked by activation of the BLOCK input.

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STUB PROTECTION FUNCTION

BLOCK TRIP

STIL1 STIL2 STIL3 RELEASE OR

AND

en05000731.vsd
IEC05000731 V1 EN

Figure 188:

Simplified logic diagram for Stub protection

7.8.3

Function block
STBPTOC I3P* BLOCK BLKTR RELEASE TRIP START

IEC05000678-2-en.vsd
IEC05000678 V2 EN

Figure 189:

STBPTOC function block

7.8.4

Input and output signals


Table 198:
Name I3P BLOCK BLKTR RELEASE

STBPTOC Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Three phase currents Block of function Block of trip Release of stub protection

Table 199:
Name TRIP START

STBPTOC Output signals


Type BOOLEAN BOOLEAN Description Trip General start

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Section 7 Current protection Setting parameters

7.8.5
Table 200:
Name Operation IBase ReleaseMode I>

STBPTOC Group settings (basic)


Values (Range) Off On 1 - 99999 Release Continuous 1 - 2500 Unit A %IB Step 1 1 Default Off 3000 Release 200 Description Operation Off / On Base current Release of stub protection Operate current level in % of IBase

Table 201:
Name t

STBPTOC Group settings (advanced)


Values (Range) 0.000 - 60.000 Unit s Step 0.001 Default 0.000 Description Time delay

7.8.6

Technical data
Table 202:
Function Operating current Reset ratio Definite time Operating time, start function Resetting time, startfunction Critical impulse time Impulse margin time

STBPTOC technical data


Range or value (1-2500)% of IBase > 95% (0.000-60.000) s 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 0.5% 10 ms -

7.9

Pole discordance protection CCRPLD


Function description Pole discordance protection IEC 61850 identification CCRPLD IEC 60617 identification ANSI/IEEE C37.2 device number 52PD

PD
SYMBOL-S V1 EN

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Section 7 Current protection 7.9.1 Introduction

1MRK505183-UEN C

Single pole operated circuit breakers can due to electrical or mechanical failures end up with the different poles in different positions (close-open). This can cause negative and zero sequence currents which gives thermal stress on rotating machines and can cause unwanted operation of zero sequence or negative sequence current functions. Normally the own breaker is tripped to correct such a situation. If the situation persists the surrounding breaker should be tripped to clear the unsymmetrical load situation. The Polediscordance protection function CCRPLD operates based on information from auxiliary contacts of the circuit breaker for the three phases with additional criteria from unsymmetrical phase current when required.

7.9.2

Principle of operation
The detection of pole discordance can be made in two different ways. If the contact based function is used an external logic can be made by connecting the auxiliary contacts of the circuit breaker so that a pole discordance is indicated, see figure 190.
circuit breaker

Pole discordance signal from circuit breaker


en05000287.vsd
IEC05000287 V2 EN

Figure 190:

Pole discordance external detection logic

This binary signal is connected to a binary input of the IED. The appearance of this signal will start a timer that will give a trip signal after the set time delay. There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and phase contact closed) to binary inputs of the IED, see figure 191.

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Section 7 Current protection

C.B.

poleOneClosed from C.B. poleTwoClosed from C.B. poleThreeClosed from C.B. + poleOneOpened from C.B. poleTwoOpened from C.B. poleThreeOpened from C.B.
en05000288.vsd
IEC05000288 V1 EN

Figure 191:

Pole discordance signals for internal logic

In this case the logic is realized within the function. If the inputs are indicating pole discordance the trip timer is started. This timer will give a trip signal after the set delay. Pole discordance can also be detected by means of phase selective current measurement. The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. The smallest and the largest phase current are derived. If the smallest phase current is lower than the setting CurrUnsymLevel times the largest phase current the settable trip timer (tTrip) is started. The tTrip timer gives a trip signal after the set delay. The TRIP signal is a pulse 150 ms long. The current based pole discordance function can be set to be active either continuously or only directly in connection to breaker open or close command. The function also has a binary input that can be configured from the autoreclosing function, so that the pole discordance function can be blocked during sequences with a single pole open if single pole autoreclosing is used. The simplified block diagram of the current and contact based Pole discordance protection function CCRPLD is shown in figure 192.

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BLOCK BLKDBYAR OR

PolPosAuxCont POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL AND Discordance detection AND OR PD Signal from CB EXTPDIND CLOSECMD OPENCMD OR AND Unsymmetry current detection en05000747.vsd
IEC05000747 V1 EN

t t

150 ms TRIP

AND

t+200 ms

Figure 192:

Simplified block diagram of pole discordance function CCRPLD contact and current based

CCRPLDis blocked if: The IED is in TEST mode and CCRPLD has been blocked from the local HMI The input signal BLOCK is high The input signal BLKDBYAR is high

The BLOCK signal is a general purpose blocking signal of the pole discordance protection. It can be connected to a binary input in the IED in order to receive a block command from external devices or can be software connected to other internal functions in the IED itself in order to receive a block command from internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclosing cycle is in progress. It can be connected to the output signal 1PT1 on SMBRRECfunction block. If the autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary input in the IED and this binary input is connected to a signalization 1phase autoreclosing in progress from the external autoreclosing device. If the pole discordance protection is enabled, then two different criteria can generate a trip signal TRIP: Pole discordance signaling from the circuit breaker. Unsymmetrical current detection.

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Section 7 Current protection


Pole discordance signaling from circuit breaker
If one or two poles of the circuit breaker have failed to open or to close the pole discordance status, then the function input EXTPDIND is activated from the pole discordance signal derived from the circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel, and in series with one NC contact for each phase connected in parallel) and, after a settable time interval tTrip (0-60 s), a 150 ms trip pulse command TRIP is generated by the Polediscordance function.

7.9.2.1

7.9.2.2

Unsymmetrical current detection


Unsymmetrical current indicated if: any phase current is lower than CurrUnsymLevel of the highest current in the three phases. the highest phase current is greater than CurrRelLevel of IBase.

If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is turned high. This detection is enabled to generate a trip after a set time delay tTrip if the detection occurs in the next 200 ms after the circuit breaker has received a command to open trip or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation during unsymmetrical load conditions. The pole discordance protection is informed that a trip or close command has been given to the circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD (for opening command information). These inputs can be connected to terminal binary inputs if the information are generated from the field (that is from auxiliary contacts of the close and open push buttons) or may be software connected to the outputs of other integrated functions (that is close command from a control function or a general trip from integrated protections).

7.9.3

Function block
CCRPLD I3P* BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL TRIP START

IEC06000275-2-en.vsd
IEC06000275 V2 EN

Figure 193:

CCRPLD function block

353 Technical reference manual

Section 7 Current protection 7.9.4 Input and output signals


Table 203:
Name I3P BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL

1MRK505183-UEN C

CCRPLD Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 1 0 1 0 1 0 Description Three phase currents Block of function Block of function at CB single phase auto reclosing cycle Close order to CB Open order to CB Pole discordance signal from CB logic Pole one opened indication from CB Pole one closed indication from CB Pole two opened indication from CB Pole two closed indication from CB Pole three opened indication from CB Pole three closed indication from CB

Table 204:
Name TRIP START

CCRPLD Output signals


Type BOOLEAN BOOLEAN Description Trip signal to CB Trip condition TRUE, waiting for time delay

7.9.5
Table 205:
Name Operation IBase tTrip ContSel

Setting parameters
CCRPLD Group settings (basic)
Values (Range) Off On 1 - 99999 0.000 - 60.000 Off PD signal from CB Pole pos aux cont. Off CB oper monitor Continuous monitor 0 - 100 0 - 100 Unit s Step 1 0.001 Default Off 3000 0.300 Off Description Operation Off / On Base current Time delay between trip condition and trip signal Contact function selection

CurrSel

Off

Current function selection

CurrUnsymLevel CurrRelLevel

% %IB

1 1

80 10

Unsym magn of lowest phase current compared to the highest. Current magnitude for release of the function in % of IBase

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Section 7 Current protection Technical data


Table 206:
Function Operate current Time delay

7.9.6

CCRPLD technical data


Range or value (0100)% of IBase (0.000-60.000) s Accuracy 1.0% of Ir 0.5% 10 ms

7.10

Directional underpower protection GUPPDUP


Function description Directional underpower protection IEC 61850 identification GUPPDUP IEC 60617 identification ANSI/IEEE C37.2 device number 37

P<
SYMBOL-LL V1 EN

7.10.1

Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 194 illustrates the reverse power protection with underpower IED and with overpower IED. The underpower IED gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower IED to trip if the active power from the generator is less than about 2%. One should set the overpower IED to trip if the power flow from the network to the generator is higher than 1% depending on the type of turbine.

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Underpower IED Q

Overpower IED Q

Operate Line Margin

Operate Line Margin

Operating point without turbine torque

Operating point without turbine torque

IEC06000315-2-en.vsd
IEC06000315 V2 EN

Figure 194:

Protection with underpower IED and overpower IED

7.10.2

Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 195. The function has two stages with individual settings.

Chosen current phasors Complex power calculation

P Derivation of S(composant) in Char angle S(angle) S(angle) < Power1 t TRIP1 START1

Chosen voltage phasors

S(angle) < Power2

TRIP2 START2

P = POWRE Q = POWIM

IEC09000018-2-en.vsd
IEC09000018 V2 EN

Figure 195:

Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 207.

356 Technical reference manual

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Section 7 Current protection

Table 207:
Set value: Mode L1, L2, L3

Complex power calculation


Formula used for complex power calculation

S = U L1 I L1* + U L 2 I L 2* + U L 3 I L 3*
EQUATION1697 V1 EN

(Equation 75)

Arone

S = U L1L 2 I L1* - U L 2 L 3 I L 3*
EQUATION1698 V1 EN

(Equation 76)

PosSeq

S = 3 U PosSeq I PosSeq *
EQUATION1699 V1 EN

(Equation 77)

L1L2

S = U L1L 2 ( I L1* - I L 2* )
EQUATION1700 V1 EN

(Equation 78)

L2L3

S = U L 2 L 3 ( I L 2* - I L 3* )
EQUATION1701 V1 EN

(Equation 79)

L3L1

S = U L 3 L1 ( I L 3* - I L1* )
EQUATION1702 V1 EN

(Equation 80)

L1

S = 3 U L1 I L1*
EQUATION1703 V1 EN

(Equation 81)

L2

S = 3 U L 2 I L 2*
EQUATION1704 V1 EN

(Equation 82)

L3

S = 3 U L 3 I L 3*
EQUATION1705 V1 EN

(Equation 83)

The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). For directional underpower protection, a start signal START1(2) is activated if the calculated power component is smaller than the pick up value. For directional overpower protection, a start signal START1(2) is activated if the calculated power component is larger than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of the two stages a common signal START will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + droppower1(2)). For generator low forward power protection the power setting is very

357 Technical reference manual

Section 7 Current protection

1MRK505183-UEN C

low, normally down to 0.02 p.u. of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) + Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the droppower1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value, the function will reset after a set time DropDelay1(2). The reset means that the start signal will drop out and that the timer of the stage will reset.

7.10.2.1

Low pass filtering


In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:
S = k SOld + (1 - k ) SCalculated
EQUATION1959 V1 EN

(Equation 84)

Where S Sold is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle

SCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (that is without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k=0.92 in case of slow operating functions.

7.10.2.2

Calibration of analog inputs


Measured currents and voltages used in the Power function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 196.

358 Technical reference manual

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Section 7 Current protection

IEC05000652 V2 EN

Figure 196:

Calibration curves

The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs (Monitored data) from the function can be used for service values or in the disturbance report. The active power is provided as MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power: QPERCENT.

7.10.3

Function block
GUPPDUP I3P* U3P* BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT IEC07000027-2-en.vsd
IEC07000027 V2 EN

Figure 197:

GUPPDUP function block

359 Technical reference manual

Section 7 Current protection 7.10.4 Input and output signals


Table 208:
Name I3P U3P BLOCK BLOCK1 BLOCK2

1MRK505183-UEN C

GUPPDUP Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Current group connection Voltage group connection Block of function Block of stage 1 Block of stage 2

Table 209:
Name TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT

GUPPDUP Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL Description Common trip signal Trip of stage 1 Trip of stage 2 Common start Start of stage 1 Start of stage 2 Active Power in MW Active power in % of SBASE Reactive power in Mvar Reactive power in % of SBASE

7.10.5
Table 210:
Name Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2 360

Setting parameters
GUPPDUP Group settings (basic)
Values (Range) Off On Off UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Off UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Unit %SB Deg s s %SB Deg s s Step 0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001 Default Off UnderPower 1.0 0.0 1.000 0.060 UnderPower 1.0 0.0 1.000 0.060 Description Operation Off / On Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2

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Section 7 Current protection

Table 211:
Name k Hysteresis1 Hysteresis2 IAmpComp5 IAmpComp30 IAmpComp100 UAmpComp5 UAmpComp30 UAmpComp100 IAngComp5 IAngComp30 IAngComp100

GUPPDUP Group settings (advanced)


Values (Range) 0.00 - 0.99 0.2 - 5.0 0.2 - 5.0 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 Unit pu pu % % % % % % Deg Deg Deg Step 0.01 0.1 0.1 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 Default 0.00 0.5 0.5 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 Description Low pass filter coefficient for power measurement, P and Q Absolute hysteresis of stage 1 Absolute hysteresis of stage 2 Amplitude factor to calibrate current at 5% of Ir Amplitude factor to calibrate current at 30% of Ir Amplitude factor to calibrate current at 100% of Ir Amplitude factor to calibrate voltage at 5% of Ur Amplitude factor to calibrate voltage at 30% of Ur Amplitude factor to calibrate voltage at 100% of Ur Angle calibration for current at 5% of Ir Angle calibration for current at 30% of Ir Angle calibration for current at 100% of Ir

Table 212:
Name IBase UBase Mode

GUPPDUP Non group settings (basic)


Values (Range) 1 - 99999 0.05 - 2000.00 L1, L2, L3 Arone Pos Seq L1L2 L2L3 L3L1 L1 L2 L3 Unit A kV Step 1 0.05 Default 3000 400.00 Pos Seq Description Current-Reference (primary current A) Voltage-Reference (primary voltage kV) Selection of measured current and voltage

7.10.6

Technical data
Table 213:
Function Power level

GUPPDUP technical data


Range or value (0.0500.0)% of SBase At low setting: (0.5-2.0)% of SBase (2.0-10)% of SBase Accuracy 1.0% of Sr at S < Sr 1.0% of S at S > Sr < 50% of set value < 20% of set value 2 degrees 0.5% 10 ms

Characteristic angle Timers

(-180.0180.0) degrees (0.00-6000.00) s

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7.11

Directional overpower protection GOPPDOP


Function description Directional overpower protection IEC 61850 identification GOPPDOP IEC 60617 identification ANSI/IEEE C37.2 device number 32

P>
DOCUMENT172362-IMG158942 V1 EN

7.11.1

Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 198 illustrates the reverse power protection with underpower IED and with overpower IED. The underpower IED gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower IED to trip if the active power from the generator is less than about 2%. One should set the overpower IED to trip if the power flow from the network to the generator is higher than 1%.

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Underpower IED Q

Overpower IED Q

Operate Line Margin

Operate Line Margin

Operating point without turbine torque

Operating point without turbine torque

IEC06000315-2-en.vsd
IEC06000315 V2 EN

Figure 198:

Reverse power protection with underpower IED and overpower IED

7.11.2

Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 199. The function has two stages with individual settings.

Chosen current phasors Complex power calculation

P Derivation of S(composant) in Char angle S(angle) S(angle) > Power1 t TRIP1 START1

Chosen voltage phasors

S(angle) > Power2

TRIP2 START2

P = POWRE Q = POWIM

IEC06000567-2-en.vsd
IEC06000567 V2 EN

Figure 199:

Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 214.

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Table 214:
Set value: Mode L1, L2, L3

Complex power calculation


Formula used for complex power calculation

S = U L1 I L1* + U L 2 I L 2* + U L 3 I L 3*
EQUATION1697 V1 EN

(Equation 85)

Arone

S = U L1L 2 I L1* - U L 2 L 3 I L 3*
EQUATION1698 V1 EN

(Equation 86)

PosSeq

S = 3 U PosSeq I PosSeq *
EQUATION1699 V1 EN

(Equation 87)

L1L2

S = U L1L 2 ( I L1* - I L 2* )
EQUATION1700 V1 EN

(Equation 88)

L2L3

S = U L 2 L 3 ( I L 2* - I L 3* )
EQUATION1701 V1 EN

(Equation 89)

L3L1

S = U L 3 L1 ( I L 3* - I L1* )
EQUATION1702 V1 EN

(Equation 90)

L1

S = 3 U L1 I L1*
EQUATION1703 V1 EN

(Equation 91)

L2

S = 3 U L 2 I L 2*
EQUATION1704 V1 EN

(Equation 92)

L3

S = 3 U L 3 I L 3*
EQUATION1705 V1 EN

(Equation 93)

The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). A start signal START1(2) is activated if the calculated power component is larger than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of the two stages a common signal START will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) droppower1(2)). For generator reverse power protection the power setting is very low, normally down to 0.02 p.u. of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be

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calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the droppower1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value the function will reset after a set time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the stage will reset.

7.11.2.1

Low pass filtering


In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:
S = k SOld + (1 - k ) SCalculated
EQUATION1959 V1 EN

(Equation 94)

Where S Sold is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle

SCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (that is, without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k = 0.14.

7.11.2.2

Calibration of analog inputs


Measured currents and voltages used in the Power function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 200.

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IEC05000652 V2 EN

Figure 200:

Calibration curves

The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs from the function can be used for service values or in the disturbance report. The active power is provided as MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power: QPERCENT.

7.11.3

Function block
GOPPDOP I3P* U3P* BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT IEC07000028-2-en.vsd
IEC07000028 V2 EN

Figure 201:

GOPPDOP function block

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Table 215:
Name I3P U3P BLOCK BLOCK1 BLOCK2

7.11.4

GOPPDOP Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Current group connection Voltage group connection Block of function Block of stage 1 Block of stage 2

Table 216:
Name TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT

GOPPDOP Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL REAL Description Common trip signal Trip of stage 1 Trip of stage 2 Common start Start of stage 1 Start of stage 2 Active Power in MW Active power in % of SBASE Reactive power in Mvar Reactive power in % of SBASE

7.11.5
Table 217:
Name Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2

Setting parameters
GOPPDOP Group settings (basic)
Values (Range) Off On Off OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Off OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Unit %SB Deg s s %SB Deg s s Step 0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001 Default Off OverPower 120.0 0.0 1.000 0.060 OverPower 120.0 0.0 1.000 0.060 Description Operation Off / On Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2 367

Technical reference manual

Section 7 Current protection

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Table 218:
Name k Hysteresis1 Hysteresis2 IAmpComp5 IAmpComp30 IAmpComp100 UAmpComp5 UAmpComp30 UAmpComp100 IAngComp5 IAngComp30 IAngComp100

GOPPDOP Group settings (advanced)


Values (Range) 0.00 - 0.99 0.2 - 5.0 0.2 - 5.0 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 Unit pu pu % % % % % % Deg Deg Deg Step 0.01 0.1 0.1 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 Default 0.00 0.5 0.5 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 Description Low pass filter coefficient for power measurement, P and Q Absolute hysteresis of stage 1 in % of Sbase Absolute hysteresis of stage 2 in % of Sbase Amplitude factor to calibrate current at 5% of Ir Amplitude factor to calibrate current at 30% of Ir Amplitude factor to calibrate current at 100% of Ir Amplitude factor to calibrate voltage at 5% of Ur Amplitude factor to calibrate voltage at 30% of Ur Amplitude factor to calibrate voltage at 100% of Ur Angle calibration for current at 5% of Ir Angle calibration for current at 30% of Ir Angle calibration for current at 100% of Ir

Table 219:
Name IBase UBase Mode

GOPPDOP Non group settings (basic)


Values (Range) 1 - 99999 0.05 - 2000.00 L1, L2, L3 Arone Pos Seq L1L2 L2L3 L3L1 L1 L2 L3 Unit A kV Step 1 0.05 Default 3000 400.00 Pos Seq Description Current-Reference (primary current A) Voltage-Reference (primary voltage kV) Selection of measured current and voltage

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Table 220:
Function Power level

7.11.6

GOPPDOP technical data


Range or value (0.0500.0)% of Sbase At low setting: (0.5-2.0)% of Sbase (2.0-10)% of Sbase Accuracy 1.0% of Sr at S < Sr 1.0% of S at S > Sr < 50% of set value < 20% of set value 2 degrees 0.5% 10 ms

Characteristic angle Timers

(-180.0180.0) degrees (0.00-6000.00) s

7.12

Broken conductor check BRCPTOC


Function description Broken conductor check IEC 61850 identification BRCPTOC IEC 60617 identification ANSI/IEEE C37.2 device number 46

7.12.1

Introduction
Conventional protection functions can not detect the broken conductor condition. Broken conductor check (BRCPTOC) function, consisting of continuous current unsymmetrical check on the line where the IED is connected will give alarm or trip at detecting broken conductors.

7.12.2

Principle of operation
Broken conductor check (BRCPTOC) detects a broken conductor condition by detecting the asymmetry between currents in the three phases. The currentmeasuring elements continuously measure the three-phase currents. The current asymmetry signal output START is set on if: The difference in currents between the phase with the lowest current and the phase with the highest current is greater than set percentage Iub> of the highest phase current The highest phase current is greater than the minimum setting value IP>. The lowest phase current is below 50% of the minimum setting value IP>

The third condition is included to avoid problems in systems involving parallel lines. If a conductor breaks in one phase on one line, the parallel line will experience an increase in current in the same phase. This might result in the first two conditions being satisfied. If the unsymmetrical detection lasts for a period longer than the set time tOper the TRIP output is activated.
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The simplified logic diagram of the broken conductor check function is shown in figure 202 BRCPTOC is disabled (blocked) if: The IED is in TEST status and the function has been blocked from the local HMI test menu (BlockBRC=Yes). The input signal BLOCK is high.

The BLOCK input can be connected to a binary input of the IED in order to receive a block command from external devices, or can be software connected to other internal functions of the IED itself to receive a block command from internal functions. The output trip signal TRIP is a three-phase trip. It can be used to command a trip to the circuit breaker or for alarm purpose only.
TEST TEST-ACTIVE

&
Block BRCPTOC=Yes START

BLOCK

=1

Function Enable & t t


TRIP

Unsymmetrical Current Detection STI IL1<50%IP> IL2<50%IP> IL3<50%IP>

=1

IEC09000158-1-en.vsd
IEC09000158 V1 EN

Figure 202:

Simplified logic diagram for Broken conductor check BRCPTOC

7.12.3

Function block
BRCPTOC I3P* BLOCK BLKTR TRIP START

IEC07000034-2-en.vsd
IEC07000034 V2 EN

Figure 203:

BRCPTOC function block

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Table 221:
Name I3P BLOCK BLKTR

7.12.4

BRCPTOC Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN Default 0 0 Description Group signal for current input Block of function Blocks the operate output

Table 222:
Name TRIP START

BRCPTOC Output signals


Type BOOLEAN BOOLEAN Description Operate signal of the protection logic Start signal of the protection logic

7.12.5
Table 223:
Name Operation IBase Iub> IP> tOper

Setting parameters
BRCPTOC Group settings (basic)
Values (Range) Off On 0 - 99999 50 - 90 5 - 100 0.000 - 60.000 Unit A %IM %IB s Step 1 1 1 0.001 Default Off 3000 50 20 5.000 Description Operation Off / On IBase Unbalance current operation value in percent of max current Minimum phase current for operation of Iub> in % of Ibase Operate time delay

Table 224:
Name tReset

BRCPTOC Group settings (advanced)


Values (Range) 0.010 - 60.000 Unit s Step 0.001 Default 0.100 Description Time delay in reset

7.12.6

Technical data
Table 225:
Function Minimum phase current for operation Unbalance current operation Timer

BRCPTOC technical data


Range or value (5100)% of IBase (0100)% of maximum current (0.00-6000.00) s Accuracy 0.1% of Ir 0.1% of Ir 0.5% 10 ms

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Section 8 Voltage protection

Section 8

Voltage protection

About this chapter


This chapter describes voltage related protection functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

8.1

Two step undervoltage protection UV2PTUV


Function description Two step undervoltage protection IEC 61850 identification UV2PTUV IEC 60617 identification ANSI/IEEE C37.2 device number 27

3U<
SYMBOL-R V1 EN

8.1.1

Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. Two step undervoltage protection (UV2PTUV) function can be used to open circuit breakers to prepare for system restoration at power outages or as long-time delayed back-up to primary protection. UV2PTUV has two voltage steps, each with inverse or definite time delay.

8.1.2

Principle of operation
Two-step undervoltage protection (UV2PTUV) is used to detect low power system voltage. UV2PTUV has two voltage measuring steps with separate time delays. If one, two or three phase voltages decrease below the set value, a corresponding START signal is generated. UV2PTUV can be set to START/TRIP based on 1 out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being below the set point. If the voltage remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to disconnection of the related high voltage equipment, a voltage controlled blocking of the function is available, that is, if the voltage is lower than the set blocking level the function is blocked and no START or TRIP signal is generated. The time delay characteristic is individually chosen for each step and can be either definite time delay or inverse time delay.

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UV2PTUV can be set to measure phase-to-earth fundamental value, phase-to-phase fundamental value, phase-to-earth true RMS value or phase-to-phase true RMS value. The choice of the measuring is done by the parameter ConnType. The voltage related settings are made in percent of base voltage which is set in kV phaseto-phase voltage. This means operation for phase-to-earth voltage under:

U < (%) UBase( kV ) 3


EQUATION1429 V1 EN

(Equation 95)

and operation for phase-to-phase voltage under:


U < (%) UBase(kV)
EQUATION1990 V1 EN

(Equation 96)

8.1.2.1

Measurement principle
Depending on the set ConnType value, UV2PTUV measures phase-to-earth or phaseto-phase voltages and compare against set values, U1< and U2<. The parameters OpMode1 and OpMode2 influence the requirements to activate the START outputs. Either 1 out of 3, 2 out of 3, or 3 out of 3 measured voltages have to be lower than the corresponding set point to issue the corresponding START signal. To avoid oscillations of the output START signal, a hysteresis has been included.

8.1.2.2

Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay three different modes are available: inverse curve A inverse curve B customer programmable inverse curve

The type A curve is described as:

t=

k U < -U U<
(Equation 97)

EQUATION1431 V1 EN

The type B curve is described as:

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Section 8 Voltage protection

t=

k 480 U < -U - 0.5 32 U<


2.0

+ 0.055

EQUATION1432 V1 EN

(Equation 98)

The customer programmable curve can be created as:

kA +D t= p U < -U -C B U<
EQUATION1433 V1 EN

(Equation 99)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down to U< (1.0 CrvSatn/100) the used voltage will be: U< (1.0 CrvSatn/ 100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn -C > 0 100


(Equation 100)

EQUATION1435 V1 EN

The lowest voltage is always used for the inverse time delay integration. The details of the different inverse time characteristics are shown in section 22.3 "Inverse characteristics". Trip signal issuing requires that the undervoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (IDMT). If the start condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2pickup for the inverse time) the corresponding start output is reset. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. Note that for the undervoltage function the IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 204 and figure 205.

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tReset1 Voltage tReset1 START Hysteresis TRIP Measured Voltage

U1<

Time START TRIP


t1

Time Integrator t1

Frozen Timer

Instantaneous Reset
IEC05000010 V3 EN

Time
Linear Decrease IEC05000010-3-en.vsd

Figure 204:

Voltage profile not causing a reset of the start signal for step 1, and inverse time delay

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Section 8 Voltage protection

Voltage START

tReset1 START Hysteresis TRIP

tReset1 Measured Voltage

U1<

Time START t1

TRIP

Time Integrator t1

Frozen Timer

Time Instantaneous Reset


IEC05000011 V2 EN

Linear Decrease
IEC05000011-en-2.vsd

Figure 205:

Voltage profile causing a reset of the start signal for step 1, and inverse time delay

Definite timer delay When definite time delay is selected the function will operate as shown in figure 206. Detailed information about individual stage reset/operation behavior is shown in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s instantaneous reset of the definite time delayed stage is ensured.

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ST1

U U1<

a b>a b

tReset1 t OFF Delay

t1 t AND ON Delay TR1

IEC09000785-1-en.vsd
IEC09000785 V1 EN

Figure 206:

Detailed logic diagram for step 1, DT operation

Un<

START

TRIP tResetn

tn

IEC10000039-1-en.vsd
IEC10000039 V1 EN

Figure 207:

Example for Definite Time Delay stage rest

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Section 8 Voltage protection

Un<

START

TRIP

tResetn

tn

IEC10000040-1-en.vsd
IEC10000040 V1 EN

Figure 208:

Example for Definite Time Delay stage operation

8.1.2.3

Blocking
It is possible to block Two step undervoltage protection UV2PTUV partially or completely, by binary input signals or by parameter settings, where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip outputs related to step 2

If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of step 1, or both the trip and the START outputs of step 1, are blocked. The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to Off resulting in no voltage based blocking. Corresponding settings and functionality are valid also for step 2. In case of disconnection of the high voltage component the measured voltage will get very low. The event will START both the under voltage function and the blocking function, as seen in figure 209. The delay of the blocking function must be set less than the time delay of under voltage function.

379 Technical reference manual

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Disconnection

Normal voltage U1< U2<

tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466.vsd
IEC05000466 V1 EN

tBlkUV2 < t2,t2Min

Figure 209:

Blocking function

8.1.2.4

Design
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the three phase-to-phase voltages. Recursive fourier filters, true RMS filters or input voltage signals are used. The voltages are individually compared to the set value, and the lowest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2 out of 3 and 3 out of 3 criteria to fulfill the START condition. The design of Two step undervoltage protection UV2PTUV is schematically shown in figure 210.

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Section 8 Voltage protection

UL1

Comparator UL1 < U1< Comparator UL2 < U1< Comparator UL3 < U1<

ST1L1 Voltage Phase Selector OpMode1 1 out of 3 2 out of 3 3 out of 3


Phase 1

UL2

ST1L2
Phase 2 Phase 3

UL3

START Time integrator t1 tReset1 ResetTypeCrv1

Start & Trip Output Logic Step 1

ST1L3 ST1 TR1L1 TR1L2 TR1L3 TR1

OR

MinVoltSelect or

TRIP

OR

Comparator UL1 < U2< Comparator UL2 < U2< Comparator UL3 < U2<

Voltage Phase Selector OpMode2 1 out of 3 2 outof 3 3 out of 3

Phase 1 Phase 2 Phase 3

ST2L1 ST2L2 ST2L3 ST2 TR2L1 TR2L2

START Time integrator t2 tReset2 ResetTypeCrv2

Start & Trip Output Logic Step 2

OR

MinVoltSelect or

TRIP

TR2L3
TR2 OR START

OR

OR

TRIP

en05000012.vsd
IEC05000834 V1 EN

Figure 210:

Schematic design of Two step undervoltage protection UV2PTUV

381 Technical reference manual

Section 8 Voltage protection 8.1.3 Function block


UV2PTUV U3P* BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 IEC06000276-2-en.vsd
IEC06000276 V2 EN

1MRK505183-UEN C

Figure 211:

UV2PTUV function block

8.1.4

Input and output signals


Table 226:
Name U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

UV2PTUV Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 Description Three phase voltages Block of function Block of operate signal, step 1 Block of step 1 Block of operate signal, step 2 Block of step 2

Table 227:
Name TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START

UV2PTUV Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip Common trip signal from step1 Trip signal from step1 phase L1 Trip signal from step1 phase L2 Trip signal from step1 phase L3 Common trip signal from step2 Trip signal from step2 phase L1 Trip signal from step2 phase L2 Trip signal from step2 phase L3 General start signal

Table continues on next page

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Section 8 Voltage protection


Name ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Common start signal from step1 Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Common start signal from step2 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3

8.1.5
Table 228:
Name Operation UBase OperationStep1 Characterist1

Setting parameters
UV2PTUV Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 100 0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10 Off Block of trip Block all 1 - 100 0.000 - 60.000 0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Prog. inv. curve Unit kV Step 0.05 Default Off 400.00 On Definite time Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

OpMode1

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage setting/start val (DT & IDMT) in % of UBase, step 1 Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Internal (low level) blocking mode, step 1

U1< t1 t1Min k1 IntBlkSel1

%UB s s -

1 0.01 0.001 0.01 -

70 5.00 5.000 0.05 Off

IntBlkStVal1 tBlkUV1 HystAbs1 OperationStep2 Characterist2

%UB s %UB -

1 0.001 0.1 -

20 0.000 0.5 On Definite time

Voltage setting for internal blocking in % of UBase, step 1 Time delay of internal (low level) blocking for step 1 Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

Table continues on next page

383 Technical reference manual

Section 8 Voltage protection


Name OpMode2 Values (Range) 1 out of 3 2 out of 3 3 out of 3 1 - 100 0.000 - 60.000 0.000 - 60.000 0.05 - 1.10 Off Block of trip Block all 1 - 100 0.000 - 60.000 0.0 - 100.0 Unit Step Default 1 out of 3 Description

1MRK505183-UEN C

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage setting/start val (DT & IDMT) in % of UBase, step 2 Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Internal (low level) blocking mode, step 2

U2< t2 t2Min k2 IntBlkSel2

%UB s s -

1 0.001 0.001 0.01 -

50 5.000 5.000 0.05 Off

IntBlkStVal2 tBlkUV2 HystAbs2

%UB s %UB

1 0.001 0.1

20 0.000 0.5

Voltage setting for internal blocking in % of UBase, step 2 Time delay of internal (low level) blocking for step 2 Absolute hysteresis in % of UBase, step 2

Table 229:
Name tReset1 ResetTypeCrv1

UV2PTUV Group settings (advanced)


Values (Range) 0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000 0.50 - 100.00 0.0 - 1.0 0.000 - 60.000 0.000 - 3.000 0 - 100 0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000 Unit s Step 0.001 Default 0.025 Instantaneous Description Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1

tIReset1 ACrv1 BCrv1 CCrv1 DCrv1 PCrv1 CrvSat1 tReset2 ResetTypeCrv2

s % s -

0.001 0.001 0.01 0.1 0.001 0.001 1 0.001 -

0.025 1.000 1.00 0.0 0.000 1.000 0 0.025 Instantaneous

Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. under voltage IDMT curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2

tIReset2 ACrv2

s -

0.001 0.001

0.025 1.000

Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2

Table continues on next page

384 Technical reference manual

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Section 8 Voltage protection


Values (Range) 0.50 - 100.00 0.0 - 1.0 0.000 - 60.000 0.000 - 3.000 0 - 100 Unit % Step 0.01 0.1 0.001 0.001 1 Default 1.00 0.0 0.000 1.000 0 Description Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. under voltage IDMT curve, step 2

Name BCrv2 CCrv2 DCrv2 PCrv2 CrvSat2

Table 230:
Name ConnType

UV2PTUV Non group settings (basic)


Values (Range) PhN DFT PhPh RMS PhN RMS PhPh DFT Unit Step Default PhN DFT Description Group selector for connection type

8.1.6

Technical data
Table 231:
Function Operate voltage, low and high step Absolute hysteresis Internal blocking level, low and high step Inverse time characteristics for low and high step, see table 648 Definite time delays Minimum operate time, inverse characteristics Operate time, start function Reset time, start function Critical impulse time Impulse margin time

UV2PTUV technical data


Range or value (1100)% of UBase (0100)% of UBase (1100)% of UBase Accuracy 1.0% of Ur 1.0% of Ur 1.0% of Ur

See table 648

(0.000-60.000) s (0.00060.000) s

0.5% 10 ms 0.5% 10 ms

25 ms typically at 2 to 0.5 x Uset 25 ms typically at 0 to 2 x Uset 10 ms typically at 2 to 0 x Uset 15 ms typically

385 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

8.2

Two step overvoltage protection OV2PTOV


Function description Two step overvoltage protection IEC 61850 identification OV2PTOV IEC 60617 identification ANSI/IEEE C37.2 device number 59

3U>
SYMBOL-C V1 EN

8.2.1

Introduction
Overvoltages may occur in the power system during abnormal conditions, such as, sudden power loss, tap changer regulating failures, open line ends on long lines. Two step overvoltage protection OV2PTOV can be used as open line end detector, normally then combined with directional reactive over-power function or as system voltage supervision, normally then giving alarm only or switching in reactors or switch out capacitor banks to control the voltage. OV2PTOV has two voltage steps, each of them with inverse or definite time delayed. OV2PTOV has an extremely high reset ratio to allow setting close to system service voltage.

8.2.2

Principle of operation
Two step overvoltage protection OV2PTOV is used to detect high power system voltage. OV2PTOV has two steps with separate time delays. If one-, two- or threephase voltages increase above the set value, a corresponding START signal is issued. OV2PTOV can be set to START/TRIP, based on 1 out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being above the set point. If the voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. The time delay characteristic is individually chosen for the two steps and can be either, definite time delay or inverse time delay. The voltage related settings are made in percent of the global set base voltage, which is set in kV, phase-to-phase. OV2PTOV can be set to measure phase-to-earth fundamental value, phase-to-phase fundamental value, phase-to-earth RMS value or phase-to-phase RMS value. The choice of measuring is done by the parameter ConnType. The setting of the analog inputs are given as primary phase-to-earth or phase-tophase voltage. OV2PTOV will operate if the voltage gets higher than the set

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Section 8 Voltage protection

percentage of the set base voltage UBase. This means operation for phase-to-earth voltage over:

U > (%) UBase( kV ) 3


EQUATION1434 V1 EN

(Equation 101)

and operation for phase for phase voltage over:


U > (%) UBase(kV)
EQUATION1993 V1 EN

(Equation 102)

8.2.2.1

Measurement principle
All the three voltages are measured continuously, and compared with the set values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the requirements to activate the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3 measured voltages have to be higher than the corresponding set point to issue the corresponding START signal. To avoid oscillations of the output START signal, a hysteresis has been included.

8.2.2.2

Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay four different modes are available: inverse curve A inverse curve B inverse curve C customer programmable inverse curve

The type A curve is described as:

t=

k U -U > U>
(Equation 103)

IEC09000051 V1 EN

The type B curve is described as:


t= k 480 - 0.035

32 U - U > - 0.5 U >

2.0

IECEQUATION2287 V1 EN

(Equation 104)

387 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

The type C curve is described as:


t= k 480 + 0.035

32 U - U > - 0.5 U >

3.0

IECEQUATION2288 V1 EN

(Equation 105)

The customer programmable curve can be created as:

t=

kA U -U > -C B U>
p

+D

EQUATION1439 V1 EN

(Equation 106)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down to U< (1.0 CrvSatn/100) the used voltage will be: U< (1.0 CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn -C > 0 100


(Equation 107)

EQUATION1435 V1 EN

The highest phase (or phase-to-phase) voltage is always used for the inverse time delay integration, see figure 212. The details of the different inverse time characteristics are shown in section "Inverse characteristics"

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Section 8 Voltage protection

Voltage IDMT Voltage

UL1 UL2 UL3

Time
en05000016.vsd
IEC05000016 V1 EN

Figure 212:

Voltage used for the inverse time characteristic integration

Trip signal issuing requires that the overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by selected voltage level dependent time curves for the inverse time mode (IDMT). If the START condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. The hysteresis value for each step is settable (HystAbs2) to allow an high and accurate reset of the function. It should be noted that for Two step overvoltage protection OV2PTOV the IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time..

389 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

tReset 1 Voltage START tReset1 TRIP

U1>

Hysteresis

Measured Voltage

Time START t1

TRIP

Time Integrator Frozen Timer t1

Linear Decrease

Instantaneous Reset
IEC09000055 V1 EN

Time
IEC09000055-en-1.vsd

Figure 213:

Voltage profile not causing a reset of the START signal for step 1, and inverse time delay

390 Technical reference manual

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Section 8 Voltage protection

Voltage START

tReset1 START Hysteresis TRIP

tReset1

U1> Measured Voltage

Time START t1

TRIP

Time Integrator

Frozen Timer

t1

Time Instantaneous Reset


IEC05000020 V2 EN

Linear Decrease

IEC05000020-en-2.vsd

Figure 214:

Voltage profile causing a reset of the START signal for step 1, and inverse time delay

Definite time delay When definite time delay is selected the function will operate as shown in figure 215. Detailed information about individual stage reset/operation behavior is shown in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s instantaneous reset of the definite time delayed stage is ensured

391 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

ST1

U U1>

a b<a b

tReset1 t OFF Delay

t1 t AND ON Delay TR1

IEC10000100-1-en.vsd
IEC10000100 V1 EN

Figure 215:

Detailed logic diagram for step 1, DT operation

Un>

START

TRIP tResetn

tn

IEC10000037-1-en.vsd
IEC10000037 V1 EN

Figure 216:

Example for Definite Time Delay stage rest

392 Technical reference manual

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Section 8 Voltage protection

Un>

START

TRIP

tResetn

tn

IEC10000038-1-en.vsd
IEC10000038 V1 EN

Figure 217:

Example for Definite Time Delay stage operation

8.2.2.3

Blocking
It is possible to block Two step overvoltage protection OV2PTOV partially or completely, by binary input signals where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip outputs related to step 2

8.2.2.4

Design
The voltage measuring elements continuously measure the three phase-to-earth voltages or the three phase-to-phase voltages. Recursive Fourier filters filter the input voltage signals. The phase voltages are individually compared to the set value, and the highest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2 out of 3 or 3 out of 3 criteria to fulfill the START condition. The design of Two step overvoltage protection (OV2PTOV) is schematically described in figure 218.

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Section 8 Voltage protection

1MRK505183-UEN C

UL1

Comparator UL1 > U1> Comparator UL2 > U1> Comparator UL3 > U1>

ST1L1 Voltage Phase Selector OpMode1 1 out of 3 2 outof 3 3 out of 3


Phase 1

UL2

ST1L2
Phase 2 Phase 3

UL3

START Time integrator t1 tReset1 ResetTypeCrv1

Start & Trip Output Logic Step 1

ST1L3 ST1 TR1L1 TR1L2 TR1L3 TR1

OR

MaxVoltSelect or

TRIP

OR

Comparator UL1 > U2> Comparator UL2 > U2> Comparator UL3 > U2>

Voltage Phase Selector OpMode2 1 out of 3 2 outof 3 3 out of 3

Phase 1 Phase 2 Phase 3

ST2L1 ST2L2 ST2L3 ST2 TR2L1 TR2L2

START Time integrator t2 tReset2 ResetTypeCrv2

Start & Trip Output Logic Step 2

OR

MaxVoltSelect or

TRIP TR2L3 TR2


START

OR OR

OR

TRIP

en05000013.vsd
IEC05000013-WMF V1 EN

Figure 218:

Schematic design of Two step overvoltage protection OV2PTOV

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Section 8 Voltage protection Function block


OV2PTOV U3P* BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 IEC06000277-2-en.vsd
IEC06000277 V2 EN

8.2.3

Figure 219:

OV2PTOV function block

8.2.4

Input and output signals


Table 232:
Name U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

OV2PTOV Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 Description Group signal for three phase voltage input Block of function Block of operate signal, step 1 Block of step 1 Block of operate signal, step 2 Block of step 2

Table 233:
Name TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START

OV2PTOV Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip Common trip signal from step1 Trip signal from step1 phase L1 Trip signal from step1 phase L2 Trip signal from step1 phase L3 Common trip signal from step2 Trip signal from step2 phase L1 Trip signal from step2 phase L2 Trip signal from step2 phase L3 General start signal

Table continues on next page

395 Technical reference manual

Section 8 Voltage protection


Name ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description

1MRK505183-UEN C

Common start signal from step1 Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Common start signal from step2 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3

8.2.5
Table 234:
Name Operation UBase OperationStep1 Characterist1

Setting parameters
OV2PTOV Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200 0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10 0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200 Unit kV Step 0.05 Default Off 400.00 On Definite time Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

OpMode1

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage setting/start val (DT & IDMT) in % of UBase, step 1 Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

U1> t1 t1Min k1 HystAbs1 OperationStep2 Characterist2

%UB s s %UB -

1 0.01 0.001 0.01 0.1 -

120 5.00 5.000 0.05 0.5 On Definite time

OpMode2

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage setting/start val (DT & IDMT) in % of UBase, step 2

U2>

%UB

150

Table continues on next page

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Section 8 Voltage protection


Values (Range) 0.000 - 60.000 0.000 - 60.000 0.05 - 1.10 0.0 - 100.0 Unit s s %UB Step 0.001 0.001 0.01 0.1 Default 5.000 5.000 0.05 0.5 Description Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of UBase, step 2

Name t2 t2Min k2 HystAbs2

Table 235:
Name tReset1 ResetTypeCrv1

OV2PTOV Group settings (advanced)


Values (Range) 0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000 0.50 - 100.00 0.0 - 1.0 0.000 - 60.000 0.000 - 3.000 0 - 100 0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000 0.50 - 100.00 0.0 - 1.0 0.000 - 60.000 0.000 - 3.000 0 - 100 Unit s Step 0.001 Default 0.025 Instantaneous Description Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1

tIReset1 ACrv1 BCrv1 CCrv1 DCrv1 PCrv1 CrvSat1 tReset2 ResetTypeCrv2

s % s -

0.001 0.001 0.01 0.1 0.001 0.001 1 0.001 -

0.025 1.000 1.00 0.0 0.000 1.000 0 0.025 Instantaneous

Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. over voltage IDMT curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2

tIReset2 ACrv2 BCrv2 CCrv2 DCrv2 PCrv2 CrvSat2

s %

0.001 0.001 0.01 0.1 0.001 0.001 1

0.025 1.000 1.00 0.0 0.000 1.000 0

Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. over voltage IDMT curve, step 2

397 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

Table 236:
Name ConnType

OV2PTOV Non group settings (basic)


Values (Range) PhN DFT PhPh DFT PhN RMS PhPh RMS Unit Step Default PhN DFT Description TBD

8.2.6

Technical data
Table 237:
Function Operate voltage, low and high step Absolute hysteresis Inverse time characteristics for low and high step, see table 647 Definite time delays Minimum operate time, Inverse characteristics Operate time, start function Reset time, start function Critical impulse time Impulse margin time

OV2PTOV technical data


Range or value (1-200)% of UBase (0100)% of UBase Accuracy 1.0% of Ur at U < Ur 1.0% of U at U > Ur 1.0% of Ur at U < Ur 1.0% of U at U > Ur See table 647

(0.000-60.000) s (0.000-60.000) s

0.5% 10 ms 0.5% 10 ms

25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 10 ms typically at 0 to 2 x Uset 15 ms typically

8.3

Two step residual overvoltage protection ROV2PTOV


Function description Two step residual overvoltage protection IEC 61850 identification ROV2PTOV IEC 60617 identification ANSI/IEEE C37.2 device number 59N

3U0
TRV V1 EN

8.3.1

Introduction
Residual voltages may occur in the power system during earth faults.

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Section 8 Voltage protection

Two step residual overvoltage protection ROV2PTOV calculates the residual voltage from the three-phase voltage input transformers or from a single-phase voltage input transformer fed from an open delta or neutral point voltage transformer. ROV2PTOV has two voltage steps, each with inverse or definite time delayed.

8.3.2

Principle of operation
Two step residual overvoltage protection ROV2PTOV is used to detect high singlephase voltage, such as high residual voltage, also called 3U0. The residual voltage can be measured directly from a voltage transformer in the neutral of a power transformer or from a three-phase voltage transformer, where the secondary windings are connected in an open delta. Another possibility is to measure the threephase voltages and internally in the IED calculate the corresponding residual voltage and connect this calculated residual voltage to ROV2PTOV. ROV2PTOV has two steps with separate time delays. If the single-phase (residual) voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding TRIP signal is issued. The time delay characteristic is individually chosen for the two steps and can be either, definite time delay or inverse time delay. The voltage related settings are made in percent of the base voltage, which is set in kV, phase-phase.

8.3.2.1

Measurement principle
The residual voltage is measured continuously, and compared with the set values, U1> and U2>. To avoid oscillations of the output START signal, a hysteresis has been included.

8.3.2.2

Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay four different modes are available: inverse curve A inverse curve B inverse curve C customer programmable inverse curve

The type A curve is described as:

t=

k U -U > U>
(Equation 108)

IEC09000051 V1 EN

399 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

The type B curve is described as:


t= k 480 - 0.035

32 U - U > - 0.5 U >

2.0

IECEQUATION2287 V1 EN

(Equation 109)

The type C curve is described as:


t= k 480 + 0.035

32 U - U > - 0.5 U >

3.0

IECEQUATION2288 V1 EN

(Equation 110)

The customer programmable curve can be created as:

t=

kA U -U > -C B U>
p

+D

EQUATION1439 V1 EN

(Equation 111)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U> up to U> (1.0 + CrvSatn/100) the used voltage will be: U> (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn -C > 0 100


(Equation 112)

EQUATION1440 V1 EN

The details of the different inverse time characteristics are shown in section "Inverse characteristics". TRIP signal issuing requires that the residual overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (IDMT). If the START condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to
400 Technical reference manual

1MRK505183-UEN C

Section 8 Voltage protection

the hysteresis area. Also notice that for the overvoltage function IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 213 and figure 214.
tReset 1 Voltage START tReset1 TRIP

U1>

Hysteresis

Measured Voltage

Time START t1

TRIP

Time Integrator Frozen Timer t1

Linear Decrease

Instantaneous Reset
IEC09000055 V1 EN

Time
IEC09000055-en-1.vsd

Figure 220:

Voltage profile not causing a reset of the START signal for step 1, and inverse time delay

401 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

Voltage START

tReset1 START Hysteresis TRIP

tReset1

U1> Measured Voltage

Time START t1

TRIP

Time Integrator

Frozen Timer

t1

Time Instantaneous Reset


IEC05000020 V2 EN

Linear Decrease

IEC05000020-en-2.vsd

Figure 221:

Voltage profile causing a reset of the START signal for step 1, and inverse time delay

Definite timer delay When definite time delay is selected the function will operate as shown in figure 222. Detailed information about individual stage reset/operation behavior is shown in figure 207 and figure 208 receptively. Note that by setting tResetn = 0.0s instantaneous reset of the definite time delayed stage is ensured

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Section 8 Voltage protection

ST1

U U1>

a b<a b

tReset1 t OFF Delay

t1 t AND ON Delay TR1

IEC10000100-1-en.vsd
IEC10000100 V1 EN

Figure 222:

Detailed logic diagram for step 1, DT operation

Un<

START

TRIP tResetn

tn

IEC10000039-1-en.vsd
IEC10000039 V1 EN

Figure 223:

Example for Definite Time Delay stage rest

403 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

Un<

START

TRIP

tResetn

tn

IEC10000040-1-en.vsd
IEC10000040 V1 EN

Figure 224:

Example for Definite Time Delay stage operation

8.3.2.3

Blocking
It is possible to block Two step residual overvoltage protection ROV2PTOV partially or completely, by binary input signals where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all START and trip inputs related to step 2

8.3.2.4

Design
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier filters filter the input voltage signal. The single input voltage is compared to the set value, and is also used for the inverse time characteristic integration. The design of Two step residual overvoltage protection (ROV2PTOV) is schematically described in figure 225.

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Section 8 Voltage protection

UN

Comparator UN > U1> START

Phase 1 Start & Trip Output Logic Step 1

ST1 TR1

Time integrator t1 tReset1 ResetTypeCrv1

TRIP

Comparator UN > U2> START Time integrator t2 tReset2 ResetTypeCrv2

Phase 1 Start & Trip Output Logic Step 2 OR

ST2 TR2

OR

START

TRIP

TRIP

en05000748.vsd
IEC05000748 V1 EN

Figure 225:

Schematic design of Two step residual overvoltage protection ROV2PTOV

8.3.3

Function block
ROV2PTOV U3P* BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR2 START ST1 ST2 IEC06000278-2-en.vsd
IEC06000278 V2 EN

Figure 226:

ROV2PTOV function block

405 Technical reference manual

Section 8 Voltage protection 8.3.4 Input and output signals


Table 238:
Name U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

1MRK505183-UEN C

ROV2PTOV Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 Description Three phase voltages Block of function Block of operate signal, step 1 Block of step 1 Block of operate signal, step 2 Block of step 2

Table 239:
Name TRIP TR1 TR2 START ST1 ST2

ROV2PTOV Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Trip Common trip signal from step1 Common trip signal from step2 General start signal Common start signal from step1 Common start signal from step2

8.3.5
Table 240:
Name Operation UBase OperationStep1 Characterist1

Setting parameters
ROV2PTOV Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 200 0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10 0.0 - 100.0 Unit kV Step 0.05 Default Off 400.00 On Definite time Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

U1> t1 t1Min k1 HystAbs1

%UB s s %UB

1 0.01 0.001 0.01 0.1

30 5.00 5.000 0.05 0.5

Voltage setting/start val (DT & IDMT), step 1 in % of UBase Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of UBase, step 1

Table continues on next page

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Values (Range) Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 100 0.000 - 60.000 0.000 - 60.000 0.05 - 1.10 0.0 - 100.0 Unit Step Default On Definite time Description Enable execution of step 2 Selection of time delay curve type for step 2

Name OperationStep2 Characterist2

U2> t2 t2Min k2 HystAbs2

%UB s s %UB

1 0.001 0.001 0.01 0.1

45 5.000 5.000 0.05 0.5

Voltage setting/start val (DT & IDMT), step 2 in % of UBase Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of UBase, step 2

Table 241:
Name tReset1 ResetTypeCrv1

ROV2PTOV Group settings (advanced)


Values (Range) 0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000 0.50 - 100.00 0.0 - 1.0 0.000 - 60.000 0.000 - 3.000 0 - 100 0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000 0.50 - 100.00 0.0 - 1.0 Unit s Step 0.001 Default 0.025 Instantaneous Description Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1

tIReset1 ACrv1 BCrv1 CCrv1 DCrv1 PCrv1 CrvSat1 tReset2 ResetTypeCrv2

s % s -

0.001 0.001 0.01 0.1 0.001 0.001 1 0.001 -

0.025 1.000 1.00 0.0 0.000 1.000 0 0.025 Instantaneous

Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. over voltage IDMT curve, step 1 Time delay in DT reset (s), step 2 Selection of reset curve type for step 2

tIReset2 ACrv2 BCrv2 CCrv2

s -

0.001 0.001 0.01 0.1

0.025 1.000 1.00 0.0

Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2

Table continues on next page

407 Technical reference manual

Section 8 Voltage protection


Name DCrv2 PCrv2 CrvSat2 Values (Range) 0.000 - 60.000 0.000 - 3.000 0 - 100 Unit % Step 0.001 0.001 1 Default 0.000 1.000 0 Description

1MRK505183-UEN C

Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. over voltage IDMT curve, step 2

8.3.6

Technical data
Table 242:
Function Operate voltage, low and high step Absolute hysteresis Inverse time characteristics for low and high step, see table 649 Definite time setting Minimum operate time Operate time, start function Reset time, start function Critical impulse time Impulse margin time

ROV2PTOV technical data


Range or value (1-200)% of UBase (0100)% of UBase Accuracy 1.0% of Ur at U < Ur 1.0% of U at U > Ur 1.0% of Ur at U < Ur 1.0% of U at U > Ur See table 649

(0.00060.000) s (0.000-60.000) s 25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 10 ms typically at 0 to 2 x Uset 15 ms typically

0.5% 10 ms 0.5% 10 ms -

8.4

Overexcitation protection OEXPVPH


Function description Overexcitation protection IEC 61850 identification OEXPVPH IEC 60617 identification ANSI/IEEE C37.2 device number 24

U/f >
SYMBOL-Q V1 EN

8.4.1

Introduction
When the laminated core of a power transformer or generator is subjected to a magnetic flux density beyond its design limits, stray flux will flow into nonlaminated components not designed to carry flux and cause eddy currents to flow.

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The eddy currents can cause excessive heating and severe damage to insulation and adjacent parts in a relatively short time. Overexcitation protection OEXPVPH has settable inverse operating curve and independent alarm stage.

8.4.2

Principle of operation
The importance of Overexcitation protection OEXPVPH is growing as the power transformers as well as other power system elements today operate most of the time near their designated limits. Modern design transformers are more sensitive to overexcitation than earlier types. This is a result of the more efficient designs and designs which rely on the improvement in the uniformity of the excitation level of modern systems. Thus, if emergency that includes overexcitation does occur, transformers may be damaged unless corrective action is promptly taken. Transformer manufacturers recommend an overexcitation protection as a part of the transformer protection system. Overexcitation results from excessive applied voltage, possibly in combination with below-normal frequency. Such condition may occur when a transformer unit is on load, but are more likely to arise when it is on open circuit, or at a loss of load occurrence. Transformers directly connected to generators are in particular danger to experience overexcitation condition. It follows from the fundamental transformer equation, see equation 113, that peak flux density Bmax is directly proportional to induced voltage E, and inversely proportional to frequency f, and turns n.
E = 4.44 f n Bmax A
EQUATION898 V2 EN

(Equation 113)

The relative excitation M is therefore according to equation 114.


M ( p.u.) =
IECEQUATION2296 V1 EN

E f

( Ur ) ( fr )
(Equation 114)

Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no longer be contained within the core only but will extend into other (non-laminated) parts of the power transformer and give rise to eddy current circulations. Overexcitation will result in: overheating of the non-laminated metal parts a large increase in magnetizing currents an increase in core and winding temperature an increase in transformer vibration and noise

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Protection against overexcitation is based on calculation of the relative volt per hertz (V/Hz) ratio. The action of the protection is usually to initiate a reduction of excitation and, if this should fail, or is not possible, to trip the transformer after a delay which can be from seconds to minutes, typically 5 - 10 seconds. Overexcitation protection may be of particular concern on directly connected generator unit transformers. Directly connected generator-transformers are subjected to a wide range of frequencies during the acceleration and deceleration of the turbine. In such cases, the overexcitation protection may trip the field breaker during a start-up of a machine, by means of the overexcitation ALARM signal. If this is not possible, the power transformer can be disconnected from the source, after a delay, by the TRIP signal. The IEC 60076 - 1 standard requires that transformers shall be capable of operating continuously at 10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of transformer rated voltage to the rated frequency on a sustained basis, see equation 115.
E ------- 1.1 Ur fr f
EQUATION900 V1 EN

(Equation 115)

or equivalently, with 1.1 Ur = V/Hz> according to equation 116.


E f V Hz> fr
(Equation 116)

IECEQUATION2297 V1 EN

where:

V/Hz>

is the maximum continuously allowed voltage at no load, and rated frequency.

V/Hz> is a setting parameter. The setting range is 100% to 180%. If the user does not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the default value V/Hz> = 110% shall be used. In OEXPVPH, the relative excitation M is expressed according to equation 117.
M ( p.u. ) =
IECEQUATION2299 V1 EN

E f Ur fr
(Equation 117)

It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and f, where the ratio E/f is equal to Ur/fr. A power transformer is not overexcited as long as the relative excitation is M V/Hz>, V/Hz> expressed in % of Ur/fr.
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The overexcitation protection algorithm is fed with an input voltage U which is in general not the induced voltage E from the fundamental transformer equation. For no load condition, these two voltages are the same, but for a loaded power transformer the internally induced voltage E may be lower or higher than the voltage U which is measured and fed to OEXPVPH , depending on the direction of the power flow through the power transformer, the power transformer side where OEXPVPH is applied, and the power transformer leakage reactance of the winding. It is important to specify in the application configuration on which side of the power transformer OEXPVPH is placed. As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be significantly different from that at the 110% voltage, no load, rated frequency, provided that the short circuit impedance X can be equally divided between the primary and the secondary winding: Xleak = Xleak1 = Xleak2 = Xsc / 2 = 0.075 pu. OEXPVPH calculates the internal induced voltage E if Xleak (meaning the leakage reactance of the winding where OEXPVPH is connected) is known to the user. The assumption taken for two-winding power transformers that Xleak = Xsc / 2 is unfortunately most often not true. For a two-winding power transformer the leakage reactances of the two windings depend on how the windings are located on the core with respect to each other. In the case of three-winding power transformers the situation is still more complex. If a user has the knowledge on the leakage reactance, then it should applied. If a user has no idea about it, Xleak can be set to Xc/2. OEXPVPH protection will then take the given measured voltage U, as the induced voltage E. It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss-of-load, and so on. It will be observed that a high phase-to-earth voltage does not mean overexcitation. For example, in an unearthed power system, a single phase-to-earth fault means high voltages of the healthy two phases-toearth, but no overexcitation on any winding. The phase-to-phase voltages will remain essentially unchanged. The important voltage is the voltage between the two ends of each winding.

8.4.2.1

Measured voltage
If one phase-to-phase voltage is available from the side where overexcitation protection is applied, then Overexcitation protection OEXPVPH shall be set to measure this voltage, MeasuredU. The particular voltage which is used determines the two currents that must be used. This must be chosen with the setting MeasuredI. It is extremely important that MeasuredU and MeasuredI are set to same value. If, for example, voltage UL1L2 is fed to OEXPVPH, then currents IL1, and IL2 must be applied. From these two input currents, current IL1L2 = IL1 - IL2 is
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calculated internally by the OEXPVPH algorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the protection algorithm exits without calculating the excitation. ERROR output is set to 1, and the displayed value of relative excitation V/Hz shows 0.000. If three phase-to-earth voltages are available from the side where overexcitation is connected, then OEXPVPH shall be set to measure positive sequence voltage and current. In this case the positive sequence voltage and the positive sequence current are used by OEXPVPH. A check is made if the positive sequence voltage is higher than 70% of rated phase-to-earth voltage, when below this value, OEXPVPH exits immediately, and no excitation is calculated. ERROR output is set to 1, and the displayed value of relative excitation V/Hz shows 0.000. The frequency value is received from the pre-processing block. The function is in operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and 60 Hz respectively. OEXPVPH can be connected to any power transformer side, independent from the power flow. The side with a possible load tap changer must not be used.

8.4.2.2

Operate time of the overexcitation protection


The operate time of the overexcitation protection OEXPVPH is a function of the relative overexcitation. Basically there are two different delay laws available to choose between: the so called IEEE law, and a tailor-made law.

The so called IEEE law approximates a square law and has been chosen based on analysis of the various transformers overexcitation capability characteristics. They can match well a transformer core capability. The square law is according to equation 118.
top = 0.18 k

M V Hz> - 1

IECEQUATION2298 V1 EN

(Equation 118)

where: M the relative excitation is maximum continuously allowed voltage at no load, and rated frequency, in pu and is time multiplier for inverse time functions, see figure 228. Parameter k (time multiplier setting) selects one delay curve from the family of curves.

V/Hz>
k

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Section 8 Voltage protection

An analog overexcitation relay would have to evaluate the following integral expression, which means to look for the instant of time t = top according to equation 119.

(M (t) - V
0
IECEQUATION2300 V1 EN

top

Hz > ) dt 0.18 k
2

(Equation 119)

A digital, numerical relay will instead look for the lowest j (that is, j = n) where it becomes true that:
n

Dt

( M(j)
j=k

V/Hz> ) 0.18 k
(Equation 120)

EQUATION906 V1 EN

where: Dt is the time interval between two successive executions of OEXPVPH and M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as Ur/fr.

As long as M > V/Hz> (that is, overexcitation condition), the above sum can only be larger with time, and if the overexcitation persists, the protected transformer will be tripped at j = n. Inverse delays as per figure 228, can be modified (limited) by two special definite delay settings, namely tMax and tMin, see figure 227.
delay in s tMax

under excitation

inverse delay law

overexcitation tMin 0 M=V/Hz> V/Hz> Mmax - V/Hz> Overexcitation M-V/Hz> Mmax Emax Excitation M E (only if f = fr = const) 99001067.vsd
IEC99001067 V1 EN

Figure 227:

Restrictions imposed on inverse delays by tMax and tMin

413 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

A definite maximum time, tMax, can be used to limit the operate time at low degrees of overexcitation. Inverse delays longer than tMax will not be allowed. In case the inverse delay is longer than tMax, OEXPVPH trips after tMax seconds. A definite minimum time, tMin, can be used to limit the operate time at high degrees of overexcitation. In case the inverse delay is shorter than tMin, OEXPVPH function trips after tMin seconds. Also, the inverse delay law is no more valid beyond excitation Mmax. Beyond Mmax (for excitation M > V/Hz>), the delay will always be tMin, irrespective of the overexcitation level.
Time (s) IEEE OVEREXCITATION CURVES

1000

100 k = 60

k = 20

10

k = 10 k=9 k=8 k=7 k=6 k=5 k=4 k=3 k=2

k=1 1 2 3 4 5 10 20 30 40

OVEREXCITATION IN %

(M-Emaxcont)*100)
en01000373.vsd

IEC01000373 V1 EN

Figure 228:

Delays inversely proportional to the square of the overexcitation

The critical value of excitation M is determined indirectly via OEXPVPH setting V/ Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency voltage, where the inverse law should be replaced by a short definite delay, tMin. If, for example, V/ Hz>> = 140 %, then M is according to equation 121.

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Section 8 Voltage protection


(V
Hz>> ) / f Ur/fr

M=

= 1.40
(Equation 121)

IECEQUATION2286 V1 EN

The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the interval between M = V/Hz>, and M = Mmax is automatically divided into five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5 and t6) as shown in figure 229. These times should be set so that t1 => t2 => t3 => t4 => t5 => t6.
delay in s

tMax

underexcitation 0 Emaxcont
IEC99001068 V1 EN

tMin Overexcitation M-Emaxcont Mmax - Emaxcont Excitation M Mmax 99001068.vsd

Figure 229:

An example of a Tailor-Made delay characteristic

Delays between two consecutive points, for example t3 and t4, are obtained by linear interpolation. Should it happen that tMax be lower than, for example, delays t1, and t2, the actual delay would be tMax. Above Mmax, the delay can only be tMin.

8.4.2.3

Cooling
Overexcitation protection OEXPVPH is basically a thermal protection; therefore a cooling process has been introduced. Exponential cooling process is applied. Parameter Setting tool is an OEXPVPH setting, with a default time constant tCooling of 20 minutes. This means that if the voltage and frequency return to their previous normal values (no more overexcitation), the normal temperature is assumed to be reached not before approximately 5 times tCooling minutes. If an overexcitation condition would return before that, the time to trip will be shorter than it would be otherwise.

8.4.2.4

Overexcitation protection function measurands


A monitored data value, TMTOTRIP, is available on the local HMI and in PCM600. This value is an estimation of the remaining time to trip (in seconds), if the overexcitation remained on the level it had when the estimation was done. This information can be useful with small or moderate overexcitations.
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1MRK505183-UEN C

If the overexcitation is so low that the valid delay is tMax, then the estimation of the remaining time to trip is done against tMax. The relative excitation M, shown on the local HMI and in PCM600 as a monitored data value VPERHZ, is calculated from the expression:
M ( p.u. ) =
IECEQUATION2299 V1 EN

E f Ur fr
(Equation 122)

If VPERHZ value is less than setting V/Hz> (in %), the power transformer is underexcited. If VPERHZ is equal to V/Hz> (in %), the excitation is exactly equal to the power transformer continuous capability. If VPERHZ is higher than V/Hz>, the protected power transformer is overexcited. For example, if VPERHZ = 1.100, while V/Hz> = 110 %, then the power transformer is exactly on its maximum continuous excitation limit. Monitored data value THERMSTA shows the thermal status of the protected power transformer iron core. THERMSTA gives the thermal status in % of the trip value which corresponds to 100%. THERMSTA should reach 100% at the same time, as TMTOTRIP reaches 0 seconds. If the protected power transformer is then for some reason not switched off, THERMSTA shall go over 100%. If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or tMin, then the Thermal status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long delay is limited by tMax, then the OEXPVPH TRIP output signal will be set to 1 before the Thermal status reaches 100%.

8.4.2.5

Overexcitation alarm
A separate step, AlarmLevel, is provided for alarming purpose. It is normally set 2% lower than (V/Hz>) and has a definite time delay, tAlarm. This will give the operator an early abnormal voltages warning.

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Section 8 Voltage protection


Logic diagram
BLOCK
AlarmLevel

8.4.2.6

t
M>V/Hz> tAlarm

t>tAlarm

&

ALARM

t
V/Hz> U3P I3P Calculation of internal induced voltage Ei tMin k M

t>tMin

&

TRIP

Ei

M= (Ei / f) (Ur / fr)

IEEE law

M Tailor-made law M>V/Hz>> Xleak V/Hz>>

t
tMax

M = relative V/Hz as service value


IEC05000162-2-en.vsd
IEC05000162 V2 EN

Figure 230:

A simplified logic diagram of the Overexcitation protection OEXPVPH

Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The cooling process is not shown. It is not shown that voltage and frequency are separately checked against their respective limit values.

8.4.3

Function block
OEXPVPH I3P* U3P* BLOCK RESET TRIP START ALARM

IEC05000329-2-en.vsd
IEC05000329 V3 EN

Figure 231:

OEXPVPH function block

8.4.4

Input and output signals


Table 243:
Name I3P U3P BLOCK RESET

OEXPVPH Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN Default 0 0 Description Current connection Voltage connection Block of function Reset operation

417 Technical reference manual

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1MRK505183-UEN C

Table 244:
Name TRIP START ALARM

OEXPVPH Output signals


Type BOOLEAN BOOLEAN BOOLEAN Description Trip from overexcitation function Overexcitation above set operate level (instantaneous) Overexcitation above set alarm level (delayed)

8.4.5
Table 245:
Name Operation IBase UBase V/Hz> V/Hz>> XLeak TrPulse tMin tMax tCooling CurveType kForIEEE AlarmLevel tAlarm

Setting parameters
OEXPVPH Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 100.0 - 180.0 100.0 - 200.0 0.000 - 200.000 0.000 - 60.000 0.000 - 60.000 0.00 - 9000.00 0.10 - 9000.00 IEEE Tailor made 1 - 60 50.0 - 120.0 0.00 - 9000.00 Unit A kV %UB/f %UB/f ohm s s s s % s Step 1 0.05 0.1 0.1 0.001 0.001 0.001 0.01 0.01 1 0.1 0.01 Default Off 3000 400.00 110.0 140.0 0.000 0.100 7.000 1800.00 1200.00 IEEE 1 100.0 5.00 Description Operation Off / On Base current (rated phase current) in A Base voltage (main voltage) in kV Operate level of V/Hz at no load and rated freq in % of (Ubase/frated) High level of V/Hz above which tMin is used, in % of (Ubase/frated) Winding leakage reactance in primary ohms Length of the pulse for trip signal (in sec) Minimum trip delay for V/Hz inverse curve, in sec Maximum trip delay for V/Hz inverse curve, in sec Transformer magnetic core cooling time constant, in sec Inverse time curve selection, IEEE/Tailor made Time multiplier for IEEE inverse type curve Alarm operate level as % of operate level Alarm time delay, in sec

Table 246:
Name t1Tailor t2Tailor t3Tailor t4Tailor t5Tailor t6Tailor

OEXPVPH Group settings (advanced)


Values (Range) 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 Unit s s s s s s Step 0.01 0.01 0.01 0.01 0.01 0.01 Default 7200.00 3600.00 1800.00 900.00 450.00 225.00 Description Time delay t1 (longest) for tailor made curve, in sec Time delay t2 for tailor made curve, in sec Time delay t3 for tailor made curve, in sec Time delay t4 for tailor made curve, in sec Time delay t5 for tailor made curve, in sec Time delay t6 (shortest) for tailor made curve, in sec

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Table 247:
Name MeasuredU

OEXPVPH Non group settings (basic)


Values (Range) PosSeq L1L2 L2L3 L3L1 L1L2 L2L3 L3L1 PosSeq Unit Step Default L1L2 Description Selection of measured voltage

MeasuredI

L1L2

Selection of measured current

8.4.6

Technical data
Table 248:
Function Operate value, start Operate value, alarm Operate value, high level Curve type

OEXPVPH technical data


Range or value (100180)% of (UBase/frated) (50120)% of start level (100200)% of (UBase/frated) IEEE or customer defined
IEEE : t = (0.18 k ) ( M - 1) 2

Accuracy 1.0% of U 1.0% of Ur at U Ur 1.0% of U at U > Ur 1.0% of U Class 5 + 40 ms

EQUATION1319 V1 EN

(Equation 123)

where M = (E/f)/(Ur/fr) Minimum time delay for inverse function Maximum time delay for inverse function Alarm time delay (0.00060.000) s (0.009000.00) s (0.00060.000) s 0.5% 10 ms 0.5% 10 ms 0.5% 10 ms

8.5

Voltage differential protection VDCPTOV


Function description Voltage differential protection IEC 61850 identification VDCPTOV IEC 60617 identification ANSI/IEEE C37.2 device number 60

8.5.1

Introduction
A voltage differential monitoring function is available. It compares the voltages from two three phase sets of voltage transformers and has one sensitive alarm step and one trip step. It can be used to supervise the voltage from two fuse groups or two different voltage transformers fuses as a fuse/MCB supervision function.

419 Technical reference manual

Section 8 Voltage protection 8.5.2 Principle of operation

1MRK505183-UEN C

The Voltage differential protection function VDCPTOV (60) is based on comparison of the amplitudes of the two voltages connected in each phase. Possible differences between the ratios of the two Voltage/Capacitive voltage transformers can be compensated for with a ratio correction factors RFLx. The voltage difference is evaluated and if it exceeds the alarm level UDAlarm or trip level UDATrip signals for alarm (ALARM output) or trip (TRIP output) is given after definite time delay tAlarm respectively tTrip. The two three phase voltage supplies are also supervised with undervoltage settings U1Low and U2Low. The outputs for loss of voltage U1LOW resp U2LOW will be activated. The U1 voltage is supervised for loss of individual phases whereas the U2 voltage is supervised for loss of all three phases. Loss of all U1or all U2 voltages will block the differential measurement. This blocking can be switched off with setting BlkDiffAtULow = No. VDCPTOV function can be blocked from an external condition with the binary BLOCK input. It can for example, be activated from Fuse failure supervision function SDDRFUF. To allow easy commissioning the measured differential voltage is available as service value. This allows simple setting of the ratio correction factor to achieve full balance in normal service. The principle logic diagram is shown in figure 232.

420 Technical reference manual

1MRK505183-UEN C

Section 8 Voltage protection

UDTripL1>

AND O R tReset tTrip t t

UDTripL1>

AND

AND

TRIP

UDTripL1>

AND AND

START

UDAlarmL1>

AND O R tAlarm

UDAlarmL1>

AND

AND

ALARM

UDAlarmL1>

AND

U1<L1 U1<L2 U1<L3 BlkDiffAtULow U2<L1 U2<L2 U2<L3 BLOCK AND t1 t AND U2LOW OR AND tAlarm t AND U1LOW

AND

en06000382-1.vsd
IEC06000382 V2 EN

Figure 232:

Principle logic for Voltage differential function VDCPTOV

8.5.3

Function block
VDCPTOV U3P1* U3P2* BLOCK TRIP START ALARM U1LOW U2LOW UL1DIFF UL2DIFF UL3DIFF IEC06000528-2-en.vsd
IEC06000528 V2 EN

Figure 233:

VDCPTOV function block

421 Technical reference manual

Section 8 Voltage protection 8.5.4 Input and output signals


Table 249:
Name U3P1 U3P2 BLOCK

1MRK505183-UEN C

VDCPTOV Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN Default 0 Description Bus voltage Capacitor voltage Block of function

Table 250:
Name TRIP START ALARM U1LOW U2LOW UL1DIFF UL2DIFF UL3DIFF

VDCPTOV Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL Description Voltage differential protection operated Start of voltage differential protection Voltage differential protection alarm Loss of U1 voltage Loss of U2 voltage Differential Voltage phase L1 Differential Voltage phase L2 Differential Voltage phase L3

8.5.5
Table 251:
Name Operation UBase BlkDiffAtULow UDTrip tTrip tReset U1Low U2Low tBlock UDAlarm tAlarm

Setting parameters
VDCPTOV Group settings (basic)
Values (Range) Off On 0.50 - 2000.00 No Yes 0.0 - 100.0 0.000 - 60.000 0.000 - 60.000 0.0 - 100.0 0.0 - 100.0 0.000 - 60.000 0.0 - 100.0 0.000 - 60.000 Unit kV %UB s s %UB %UB s %UB s Step 0.01 0.1 0.001 0.001 0.1 0.1 0.001 0.1 0.001 Default Off 400.00 Yes 5.0 1.000 0.000 70.0 70.0 0.000 2.0 2.000 Description Operation Off/On Base Voltage Block operation at low voltage Operate level, in % of UBase Time delay for voltage differential operate, in milliseconds Time delay for voltage differential reset, in seconds Input 1 undervoltage level, in % of UBase Input 2 undervoltage level, in % of UBase Reset time for undervoltage block Alarm level, in % of UBase Time delay for voltage differential alarm, in seconds

422 Technical reference manual

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Section 8 Voltage protection

Table 252:
Name RFL1 RFL2 RFL3

VDCPTOV Group settings (advanced)


Values (Range) 0.000 - 3.000 0.000 - 3.000 0.000 - 3.000 Unit Step 0.001 0.001 0.001 Default 1.000 1.000 1.000 Description Ratio compensation factor phase L1 U2L1*RFL1=U1L1 Ratio compensation factor phase L2 U2L2*RFL2=U1L2 Ratio compensation factor phase L3 U2L3*RFL3=U1L3

8.5.6

Technical data
Table 253:
Function Voltage difference for alarm and trip Under voltage level Timers

VDCPTOV technical data


Range or value (0.0100.0) % of UBase (0.0100.0) % of UBase (0.00060.000)s Accuracy 0.5 % of Ur 0.5% of Ur 0.5% 10 ms

8.6

Loss of voltage check LOVPTUV


Function description Loss of voltage check IEC 61850 identification LOVPTUV IEC 60617 identification ANSI/IEEE C37.2 device number 27

8.6.1

Introduction
Loss of voltage check (LOVPTUV) is suitable for use in networks with an automatic system restoration function. LOVPTUV issues a three-pole trip command to the circuit breaker, if all three phase voltages fall below the set value for a time longer than the set time and the circuit breaker remains closed.

8.6.2

Principle of operation
The operation of Loss of voltage check LOVPTUV is based on line voltage measurement. LOVPTUV is provided with a logic, which automatically recognises if the line was restored for at least tRestore before starting the tTrip timer. All three phases are required to be low before the output TRIP is activated. The START output signal indicates start. Additionally, LOVPTUV is automatically blocked if only one or two phase voltages have been detected low for more than tBlock.

423 Technical reference manual

Section 8 Voltage protection

1MRK505183-UEN C

LOVPTUV operates again only if the line has been restored to full voltage for at least tRestore. Operation of the function is also inhibited by fuse failure and open circuit breaker information signals, by their connection to dedicated inputs of the function block. Due to undervoltage conditions being continuous the trip pulse is limited to a length set by setting tPulse. The operation of LOVPTUV is supervised by the fuse-failure function (VTSU input) and the information about the open position (CBOPEN) of the associated circuit breaker. The BLOCK input can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED itself in order to receive a block command from internal functions. LOVPTUV is also blocked when the IED is in TEST status and the function has been blocked from the HMI test menu. (Blocked=Yes).

424 Technical reference manual

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Section 8 Voltage protection

TEST TEST-ACTIVE

&
Blocked = Yes

BLOCK

>1
Function Enable tTrip tPulse

START

STUL1N STUL2N STUL3N Latched Enable

& &

TRIP

only 1 or 2 phases are low for at least 10 s (not three)

&

tBlock

>1

CBOPEN VTSU

>1

Reset Enable

&

>1

tRestore t

Set Enable Line restored for at least 3 s

>1

IEC07000089_2_en.vsd
IEC07000089 V2 EN

Figure 234:

Simplified diagram of Loss of voltage check LOVPTUV

8.6.3

Function block
LOVPTUV U3P* BLOCK CBOPEN VTSU TRIP START

IEC07000039-2-en.vsd
IEC07000039 V2 EN

Figure 235:

LOVPTUV function block

425 Technical reference manual

Section 8 Voltage protection 8.6.4 Input and output signals


Table 254:
Name U3P BLOCK CBOPEN VTSU

1MRK505183-UEN C

LOVPTUV Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Voltage connection Block the all outputs Circuit breaker open Block from voltage circuit supervision

Table 255:
Name TRIP START

LOVPTUV Output signals


Type BOOLEAN BOOLEAN Description Trip signal Start signal

8.6.5
Table 256:
Name Operation UBase UPE tTrip

Setting parameters
LOVPTUV Group settings (basic)
Values (Range) Off On 0.1 - 9999.9 1 - 100 0.000 - 60.000 Unit kV %UB s Step 0.1 1 0.001 Default Off 400.0 70 7.000 Description Operation Off/On Base voltage Operate voltagein% of base voltage Ubase Operate time delay

Table 257:
Name tPulse tBlock tRestore

LOVPTUV Group settings (advanced)


Values (Range) 0.050 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit s s s Step 0.001 0.001 0.001 Default 0.150 5.000 3.000 Description Duration of TRIP pulse Time delay to block when all 3ph voltages are not low Time delay for enable the function after restoration

8.6.6

Technical data
Table 258:
Function Operate voltage Pulse timer Timers

LOVPTUV technical data


Range or value (0100)% of UBase (0.05060.000) s (0.00060.000) s Accuracy 0.5% of Ur 0.5% 10 ms 0.5% 10 ms

426 Technical reference manual

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Section 9 Frequency protection

Section 9

Frequency protection

About this chapter


This chapter describes the frequency protection functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

9.1

Underfrequency protection SAPTUF


Function description Underfrequency protection IEC 61850 identification SAPTUF IEC 60617 identification ANSI/IEEE C37.2 device number 81

f<
SYMBOL-P V1 EN

9.1.1

Introduction
Underfrequency occurs as a result of lack of generation in the network. Underfrequency protection SAPTUF is used for load shedding systems, remedial action schemes, gas turbine startup and so on. SAPTUF is provided with an under voltage blocking. The operation may be based on single-phase, phase-to-phase or positive-sequence voltage measurement.

9.1.2

Principle of operation
Underfrequency protection SAPTUF is used to detect low power system frequency. SAPTUF can either have a definite time delay or a voltage magnitude dependent time delay. If the voltage magnitude dependent time delay is applied, the time delay will be longer if the voltage is higher, and the delay will be shorter if the voltage is lower. If the frequency remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, that is, if the

427 Technical reference manual

Section 9 Frequency protection

1MRK505183-UEN C

voltage is lower than the set blocking voltage IntBlockLevel the function is blocked and no START or TRIP signal is issued.

9.1.2.1

Measurement principle
The fundamental frequency of the measured input voltage is measured continuously, and compared with the set value, StartFrequency. The frequency function is dependent on the voltage magnitude. If the voltage magnitude decreases the setting IntBlockLevel, SAPTUF gets blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the setting UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output START signal, a hysteresis has been included.

9.1.2.2

Time delay
The time delay for underfrequency protection SAPTUF can be either a settable definite time delay or a voltage magnitude dependent time delay, where the time delay depends on the voltage level; a high voltage level gives a longer time delay and a low voltage level causes a short time delay. For the definite time delay, the setting TimeDlyOperate sets the time delay. For the voltage dependent time delay the measured voltage level and the settings UNom, UMin, Exponent, tMax and tMin set the time delay according to figure 236 and equation 124. The setting TimerOperation is used to decide what type of time delay to apply. Trip signal issuing requires that the underfrequency condition continues for at least the user set time delay TimeDlyOperate. If the START condition, with respect to the measured frequency ceases during this user set delay time, and is not fulfilled again within a user defined reset time, TimeDlyReset, the START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. On the output of SAPTUF a 100ms pulse is issued, after a time delay corresponding to the setting of TimeDlyRestore, when the measured frequency returns to the level corresponding to the setting RestoreFreq.

9.1.2.3

Voltage dependent time delay


Since the fundamental frequency in a power system is the same all over the system, except some deviations during power oscillations, another criterion is needed to decide, where to take actions, based on low frequency. In many applications the voltage level is very suitable, and in most cases is load shedding preferable in areas with low voltage. Therefore, a voltage dependent time delay has been introduced, to make sure that load shedding, or other actions, take place at the right location. At constant voltage, U, the voltage dependent time delay is calculated according to equation 124. At non-constant voltage, the actual time delay is integrated in a

428 Technical reference manual

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Section 9 Frequency protection

similar way as for the inverse time characteristic for the undervoltage and overvoltage functions.
U - UMin t= UNom - UMin
EQUATION1182 V1 EN

Exponent

( tMax - tMin ) + tMin

(Equation 124)

where: t U Exponent tMax, tMin is the voltage dependent time delay (at constant voltage), is the measured voltage is a setting, are time settings.

UMin, UNom are voltage settings corresponding to

The inverse time characteristics are shown in figure 236, for:


UMin UNom tMax tMin Exponent = 90% = 100% = 1.0 s = 0.0 s = 0, 1, 2, 3 and 4

TimeDlyOperate [s]

Exponenent 3
0.5

1 2

90

95

100

U [% of UBase]
en05000075.vsd
IEC05000075 V1 EN

Figure 236:

Voltage dependent inverse time characteristics for underfrequency protection SAPTUF. The time delay to operate is plotted as a function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.

429 Technical reference manual

Section 9 Frequency protection


9.1.2.4 Blocking

1MRK505183-UEN C

It is possible to block underfrequency protection SAPTUF partially or completely, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output

If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the TRIP outputs, are blocked.

9.1.2.5

Design
The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid transients due to switchings and faults. The time integrator can operate either due to a definite delay time or to the special voltage dependent delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRestore. The design of underfrequency protection SAPTUF is schematically described in figure 237.

Block OR Comparator U < IntBlockLevel BLOCK BLKDMAGN

Voltage

Time integrator TimerOperation Mode Selector TimeDlyOperate TimeDlyReset START TRIP Start & Trip Output Logic START

Frequency

Comparator f < StartFrequency

TRIP

100 ms Comparator f > RestoreFreq TimeDlyRestore RESTORE

en05000726.vsd

IEC05000726 V1 EN

Figure 237:

Simplified logic diagram for SAPTUF

430 Technical reference manual

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Section 9 Frequency protection Function block


SAPTUF U3P* BLOCK BLKTRIP BLKREST TRIP START RESTORE BLKDMAGN FREQ IEC06000279_2_en.vsd
IEC06000279 V2 EN

9.1.3

Figure 238:

SAPTUF function block

9.1.4

Input and output signals


Table 259:
Name U3P BLOCK BLKTRIP BLKREST

SAPTUF Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Voltage connection Block of function Blocking operate output. Blocking restore output.

Table 260:
Name TRIP START RESTORE BLKDMAGN FREQ

SAPTUF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL Description Operate/trip signal for frequency. Start/pick-up signal for frequency. Restore signal for load restoring purposes. Blocking indication due to low amplitude. Measured frequency

9.1.5
Table 261:
Name Operation UBase StartFrequency IntBlockLevel TimeDlyOperate TimeDlyReset TimeDlyRestore

Setting parameters
SAPTUF Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 Unit kV Hz %UB s s s Step 0.05 0.01 1 0.001 0.001 0.001 Default Off 400.00 48.80 50 0.200 0.000 0.000 Description Operation Off / On Base voltage Frequency setting/start value. Internal blocking level in % of UBase. Operate time delay in over/underfrequency mode. Time delay for reset. Restore time delay.

Table continues on next page

431 Technical reference manual

Section 9 Frequency protection


Name RestoreFreq TimerOperation UNom UMin Exponent tMax tMin Values (Range) 45.00 - 65.00 Definite timer Volt based timer 50 - 150 50 - 150 0.0 - 5.0 0.010 - 60.000 0.010 - 60.000 Unit Hz %UB %UB s s Step 0.01 1 1 0.1 0.001 0.001 Default 50.10 Definite timer 100 90 1.0 1.000 1.000 Description

1MRK505183-UEN C

Restore frequency if frequency is above frequency value. Setting for choosing timer mode. Nominal voltage in % of UBase for voltage based timer. Lower operation limit in % of UBase for voltage based timer. For calculation of the curve form for voltage based timer. Maximum time operation limit for voltage based timer. Minimum time operation limit for voltage based timer.

9.1.6

Technical data
Table 262:
Function Operate value, start function Operate time, start function Reset time, start function Operate time, definite time function Reset time, definite time function Voltage dependent time delay
U - UMin t= UNom - UMin
EQUATION1182 V1 EN

SAPTUF technical data


Range or value (35.00-75.00) Hz 100 ms typically 100 ms typically (0.000-60.000)s (0.000-60.000)s Settings: UNom=(50-150)% of Ubase UMin=(50-150)% of Ubase Exponent=0.0-5.0 tMax=(0.000-60.000)s tMin=(0.000-60.000)s Accuracy 2.0 mHz 0.5% 10 ms 0.5% 10 ms Class 5 + 200 ms

Exponent

( tMax - tMin ) + tMin

(Equation 125)

U=Umeasured

9.2

Overfrequency protection SAPTOF


Function description Overfrequency protection IEC 61850 identification SAPTOF IEC 60617 identification ANSI/IEEE C37.2 device number 81

f>
SYMBOL-O V1 EN

432 Technical reference manual

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Section 9 Frequency protection Introduction


Overfrequency protection function SAPTOF is applicable in all situations, where reliable detection of high fundamental power system frequency is needed. Overfrequency occurs at sudden load drops or shunt faults in the power network. Close to the generating plant, generator governor problems can also cause over frequency. SAPTOF is used mainly for generation shedding and remedial action schemes. It is also used as a frequency stage initiating load restoring. SAPTOF is provided with an undervoltage blocking. The operation is based on singlephase, phase-to-phase or positive-sequence voltage measurement.

9.2.1

9.2.2

Principle of operation
Overfrequency protection SAPTOF is used to detect high power system frequency. SAPTOF has a settable definite time delay. If the frequency remains above the set value for a time period corresponding to the chosen time delay, the corresponding TRIP signal is issued. To avoid an unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available from the preprocessing function, that is, if the voltage is lower than the set blocking voltage in the preprocessing function, the function is blocked and no START or TRIP signal is issued.

9.2.2.1

Measurement principle
The fundamental frequency of the positive sequence voltage is measured continuously, and compared with the set value, StartFrequency. Overfrequency protection SAPTOF is dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, SAPTOF is blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output START signal, a hysteresis has been included.

9.2.2.2

Time delay
The time delay for Overfrequency protection SAPTOF (81) is a settable definite time delay, specified by the setting TimeDlyOperate. TRIP signal issuing requires that the overfrequency condition continues for at least the user set time delay, TimeDlyReset. If the START condition, with respect to the measured frequency ceases during this user set delay time, and is not fulfilled again within a user defined reset time, TimeDlyReset, the START output is reset, after that the defined reset time has elapsed. It is to be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.
433

Technical reference manual

Section 9 Frequency protection


9.2.2.3 Blocking

1MRK505183-UEN C

It is possible to block overfrequency protection SAPTOF partially or completely, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: blocks all outputs blocks the TRIP output

If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the TRIP outputs, are blocked.

9.2.2.4

Design
The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid transients due to switchings and faults in the power system. The time integrator operates due to a definite delay time. The design of overfrequency protection SAPTOF is schematically described in figure 239.

BLOCK BLKTRIP Comparator U < IntBlockLevel OR BLOCK BLKDMAGN

Voltage

Time integrator Definite Time Delay START Comparator f > StartFrequency

Start & Trip Output Logic

START

Frequency

TimeDlyOperate TRIP TimeDlyReset TRIP

en05000735.vsd

IEC05000735 V1 EN

Figure 239:

Schematic design of overfrequency protection SAPTOF

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Section 9 Frequency protection Function block


SAPTOF U3P* BLOCK BLKTRIP TRIP START BLKDMAGN FREQ IEC06000280_2_en.vsd
IEC06000280 V2 EN

9.2.3

Figure 240:

SAPTOF function block

9.2.4

Input and output signals


Table 263:
Name U3P BLOCK BLKTRIP

SAPTOF Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN Default 0 0 Description Voltage connection Block of function Blocking operate output.

Table 264:
Name TRIP START BLKDMAGN FREQ

SAPTOF Output signals


Type BOOLEAN BOOLEAN BOOLEAN REAL Description Operate/trip signal for frequency. Start/pick-up signal for frequency. Blocking indication due to low amplitude. Measured frequency

9.2.5
Table 265:
Name Operation UBase StartFrequency IntBlockLevel TimeDlyOperate TimeDlyReset

Setting parameters
SAPTOF Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000 0.000 - 60.000 Unit kV Hz %UB s s Step 0.05 0.01 1 0.001 0.001 Default Off 400.00 51.20 50 0.000 0.000 Description Operation Off / On Base voltage Frequency setting/start value. Internal blocking level in % of UBase. Operate time delay in over/underfrequency mode. Time delay for reset.

435 Technical reference manual

Section 9 Frequency protection 9.2.6 Technical data


Table 266:
Function Operate value, start function Operate time, start function Reset time, start function Operate time, definite time function Reset time, definite time function

1MRK505183-UEN C

SAPTOF technical data


Range or value (35.00-75.00) Hz 100 ms typically 100 ms typically (0.000-60.000)s (0.000-60.000)s Accuracy 2.0 mHz at symmetrical threephase voltage 0.5% 10 ms 0.5% 10 ms

9.3

Rate-of-change frequency protection SAPFRC


Function description Rate-of-change frequency protection IEC 61850 identification SAPFRC IEC 60617 identification ANSI/IEEE C37.2 device number 81

df/dt > <


SYMBOL-N V1 EN

9.3.1

Introduction
Rate-of-change frequency protection function (SAPFRC) gives an early indication of a main disturbance in the system. SAPFRC can be used for generation shedding, load shedding, remedial action schemes. SAPFRC can discriminate between positive or negative change of frequency. SAPFRC is provided with an undervoltage blocking. The operation may be based on single-phase, phase-to-phase or positive-sequence voltage measurement.

9.3.2

Principle of operation
Rate-of-change frequency protection SAPFRC is used to detect fast power system frequency changes, increase as well as, decrease at an early stage. SAPFRC has a settable definite time delay. If the rate-of-change of frequency remains below the set value, for negative rate-of-change, for a time period equal to the chosen time delay, the TRIP signal is issued. If the rate-of-change of frequency remains above the set value, for positive rate-of-change, for a time period equal to the chosen time delay, the TRIP signal is issued. To avoid an unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, that is if the voltage is lower than the set blocking voltage

436 Technical reference manual

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Section 9 Frequency protection

IntBlockLevel, the function is blocked and no START or TRIP signal is issued. If the frequency recovers, after a frequency decrease, a restore signal is issued.

9.3.2.1

Measurement principle
The rate-of-change of the fundamental frequency of the selected voltage is measured continuously, and compared with the set value, StartFreqGrad. Rate-ofchange frequency protection SAPFRC is also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, SAPFRC is blocked, and the output BLKDMAGN is issued. The sign of the setting StartFreqGrad, controls if SAPFRC reacts on a positive or on a negative change in frequency. If SAPFRC is used for decreasing frequency that is, the setting StartFreqGrad has been given a negative value, and a trip signal has been issued, then a 100 ms pulse is issued on the RESTORE output, when the frequency recovers to a value higher than the setting RestoreFreq. A positive setting of StartFreqGrad, sets SAPFRC to START and TRIP for frequency increases. To avoid oscillations of the output START signal, a hysteresis has been included.

9.3.2.2

Time delay
Rate-of-change frequency protection SAPFRC has a settable definite time delay, tTrip. . Trip signal issuing requires that the rate-of-change of frequency condition continues for at least the user set time delay, tTrip. If the START condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the START output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to only return back into the hysteresis area. The RESTORE output of SAPFRC is set, after a time delay equal to the setting of tRestore, when the measured frequency has returned to the level corresponding to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and no output will be given. The restore functionality is only active for lowering frequency conditions and the restore sequence is disabled if a new negative frequency gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.

9.3.2.3

Blocking
Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output

437 Technical reference manual

Section 9 Frequency protection

1MRK505183-UEN C

If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the TRIP outputs, are blocked.

9.3.2.4

Design
Rate-of-change frequency protection (SAPFRC) measuring element continuously measures the frequency of the selected voltage and compares it to the setting StartFreqGrad. The frequency signal is filtered to avoid transients due to power system switchings and faults. The time integrator operates with a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been issued. The sign of the setting StartFreqGrad is essential, and controls if the function is used for raising or lowering frequency conditions. The design of SAPFRC is schematically described in figure 241.

BLOCK BLKTRIP BLKRESET OR Comparator U < IntBlockLevel Start & Trip Output Logic BLOCK BLKDMAGN

Voltage

Rate-of-Change of Frequency

Comparator If [StartFreqGrad<0 START AND df/dt < StartFreqGrad] OR [StartFreqGrad>0 AND df/dt > StartFreqGrad] Then START

Time integrator Definite Time Delay TimeDlyOperate TimeDlyReset

START

TRIP

100 ms Frequency Comparator f > RestoreFreq TimeDlyRestore RESTORE

en05000835.vsd
IEC05000835 V1 EN

Figure 241:

Schematic design of Rate-of-change frequency protection SAPFRC

438 Technical reference manual

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Section 9 Frequency protection Function block


SAPFRC U3P* BLOCK BLKTRIP BLKREST TRIP START RESTORE BLKDMAGN IEC06000281-2-en.vsd
IEC06000281 V2 EN

9.3.3

Figure 242:

SAPFRC function block

9.3.4

Input and output signals


Table 267:
Name U3P BLOCK BLKTRIP BLKREST

SAPFRC Input signals


Type GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 Description Group signal for voltage input Block of function Blocking operate output. Blocking restore output.

Table 268:
Name TRIP START RESTORE BLKDMAGN

SAPFRC Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Operate/trip signal for frequencyGradient Start/pick-up signal for frequencyGradient Restore signal for load restoring purposes. Blocking indication due to low amplitude.

9.3.5
Table 269:
Name Operation UBase StartFreqGrad IntBlockLevel tTrip RestoreFreq tRestore tReset

Setting parameters
SAPFRC Group settings (basic)
Values (Range) Off On 0.05 - 2000.00 -10.00 - 10.00 0 - 100 0.000 - 60.000 45.00 - 65.00 0.000 - 60.000 0.000 - 60.000 Unit kV Hz/s %UB s Hz s s Step 0.05 0.01 1 0.001 0.01 0.001 0.001 Default Off 400.00 0.50 50 0.200 49.90 0.000 0.000 Description Operation Off / On Base setting for the phase-phase voltage in kV Frequency gradient start value. Sign defines direction. Internal blocking level in % of UBase. Operate time delay in pos./neg. frequency gradient mode. Restore frequency if frequency is above frequency value (Hz) Restore time delay. Time delay for reset.

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Table 270:
Function Operate value, start function Operate value, internal blocking level Operate time, start function

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SAPFRC Technical data


Range or value (-10.00-10.00) Hz/s (0-100)% of UBase 100 ms typically Accuracy 10.0 mHz/s 1.0% of Ur -

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Section 10 Multipurpose protection

Section 10

Multipurpose protection

About this chapter


This chapter describes Multipurpose protection and includes the General current and voltage function. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

10.1

General current and voltage protection CVGAPC


Function description General current and voltage protection IEC 61850 identification CVGAPC IEC 60617 identification ANSI/IEEE C37.2 device number -

10.1.1

Introduction
The General current and voltage protection (CVGAPC) can be utilized as a negative sequence current protection detecting unsymmetrical conditions such as open phase or unsymmetrical faults. CVGAPC can also be used to improve phase selection for high resistive earth faults, outside the distance protection reach, for the transmission line. Three functions are used, which measures the neutral current and each of the three phase voltages. This will give an independence from load currents and this phase selection will be used in conjunction with the detection of the earth fault from the directional earth fault protection function.

10.1.2
10.1.2.1

Principle of operation
Measured quantities within CVGAPC
General current and voltage protection (CVGAPC) function is always connected to three-phase current and three-phase voltage input in the configuration tool, but it will always measure only one current and one voltage quantity selected by the end user in the setting tool. The user can select to measure one of the current quantities shown in table 271.

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Table 271:

Current selection for CVGAPC function


Comment CVGAPC function will measure the phase L1 current phasor CVGAPC function will measure the phase L2 current phasor CVGAPC function will measure the phase L3 current phasor CVGAPC function will measure internally calculated positive sequence current phasor CVGAPC function will measure internally calculated negative sequence current phasor CVGAPC function will measure internally calculated zero sequence current phasor multiplied by factor 3 CVGAPC function will measure current phasor of the phase with maximum magnitude CVGAPC function will measure current phasor of the phase with minimum magnitude CVGAPC function will measure magnitude of unbalance current, which is internally calculated as the algebraic magnitude difference between the current phasor of the phase with maximum magnitude and current phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time CVGAPC function will measure the current phasor internally calculated as the vector difference between the phase L1 current phasor and phase L2 current phasor (IL1-IL2) CVGAPC function will measure the current phasor internally calculated as the vector difference between the phase L2 current phasor and phase L3 current phasor (IL2-IL3) CVGAPC function will measure the current phasor internally calculated as the vector difference between the phase L3 current phasor and phase L1 current phasor ( IL3-IL1) CVGAPC function will measure ph-ph current phasor with the maximum magnitude CVGAPC function will measure ph-ph current phasor with the minimum magnitude CVGAPC function will measure magnitude of unbalance current, which is internally calculated as the algebraic magnitude difference between the ph-ph current phasor with maximum magnitude and ph-ph current phasor with minimum magnitude. Phase angle will be set to 0 all the time

CurrentInput
1 2 3 4 5 6 7 8 9 Phase1 Phase2 Phase3 PosSeq NegSeq 3ZeroSeq MaxPh MinPh

Set value for the parameter

UnbalancePh

10

Phase1-Phase2

11

Phase2-Phase3

12

Phase3-Phase1

13 14 15

MaxPh-Ph MinPh-Ph UnbalancePh-Ph

The user can select to measure one of the voltage quantities shown in table 272:
Table 272: Voltage selection for CVGAPC function
Comment CVGAPC function will measure the phase L1 voltage phasor CVGAPC function will measure the phase L2 voltage phasor CVGAPC function will measure the phase L3 voltage phasor

VoltageInput
1 2 3 Phase1 Phase2 Phase3

Set value for the parameter

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Section 10 Multipurpose protection


Set value for the parameter PosSeq -NegSeq

VoltageInput
4 5

Comment CVGAPC function will measure internally calculated positive sequence voltage phasor CVGAPC function will measure internally calculated negative sequence voltage phasor. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. CVGAPC function will measure internally calculated zero sequence voltage phasor multiplied by factor 3. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. CVGAPC function will measure voltage phasor of the phase with maximum magnitude CVGAPC function will measure voltage phasor of the phase with minimum magnitude CVGAPC function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the voltage phasor of the phase with maximum magnitude and voltage phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time CVGAPC function will measure the voltage phasor internally calculated as the vector difference between the phase L1 voltage phasor and phase L2 voltage phasor (UL1-UL2) CVGAPC function will measure the voltage phasor internally calculated as the vector difference between the phase L2 voltage phasor and phase L3 voltage phasor (UL2-UL3) CVGAPC function will measure the voltage phasor internally calculated as the vector difference between the phase L3 voltage phasor and phase L1 voltage phasor ( UL3-UL1) CVGAPC function will measure ph-ph voltage phasor with the maximum magnitude CVGAPC function will measure ph-ph voltage phasor with the minimum magnitude CVGAPC function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the ph-ph voltage phasor with maximum magnitude and phph voltage phasor with minimum magnitude. Phase angle will be set to 0 all the time

-3ZeroSeq

7 8 9

MaxPh MinPh UnbalancePh

10

Phase1-Phase2

11

Phase2-Phase3

12

Phase3-Phase1

13 14 15

MaxPh-Ph MinPh-Ph UnbalancePh-Ph

It is important to notice that the voltage selection from table 272 is always applicable regardless the actual external VT connections. The three-phase VT inputs can be connected to IED as either three phase-to-ground voltages UL1, UL2 & UL3 or three phase-to-phase voltages UL1L2, UL2L3 & UL3L1). This information about actual VT connection is entered as a setting parameter for the pre-processing block, which will then take automatic care about it. The user can select one of the current quantities shown in table 273 for built-in current restraint feature:

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Table 273:

Restraint current selection for CVGAPC function


Comment CVGAPC function will measure internally calculated positive sequence current phasor CVGAPC function will measure internally calculated negative sequence current phasor CVGAPC function will measure internally calculated zero sequence current phasor multiplied by factor 3 CVGAPC function will measure current phasor of the phase with maximum magnitude

Set value for the parameter RestrCurr 1 2 3 4 PosSeq NegSeq 3ZeroSeq MaxPh

10.1.2.2

Base quantities for CVGAPC function


The parameter settings for the base quantities, which represent the base (100%) for pickup levels of all measuring stages, shall be entered as setting parameters for every CVGAPC function. Base current shall be entered as: 1. 2. rated phase current of the protected object in primary amperes, when the measured Current Quantity is selected from 1 to 9, as shown in table 271. rated phase current of the protected object in primary amperes multiplied by 3 (1.732 Iphase), when the measured Current Quantity is selected from 10 to 15, as shown in table 271.

Base voltage shall be entered as: 1. 2. rated phase-to-earth voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 1 to 9, as shown in table 272. rated phase-to-phase voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 10 to 15, as shown in table 272.

10.1.2.3

Built-in overcurrent protection steps


Two overcurrent protection steps are available. They are absolutely identical and therefore only one will be explained here. Overcurrent step simply compares the magnitude of the measured current quantity (see table 271) with the set pickup level. Non-directional overcurrent step will pickup if the magnitude of the measured current quantity is bigger than this set level. Reset ratio is settable, with default value of 0.96. However depending on other enabled built-in features this overcurrent pickup might not cause the overcurrent step start signal. Start signal will only come if all of the enabled builtin features in the overcurrent step are fulfilled at the same time.

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Second harmonic feature

The overcurrent protection step can be restrained by a second harmonic component in the measured current quantity (see table 271). However it shall be noted that this feature is not applicable when one of the following measured currents is selected: PosSeq (positive sequence current) NegSeq (negative sequence current) UnbalancePh (unbalance phase current) UnbalancePh-Ph (unbalance ph-ph current)

This feature will simple prevent overcurrent step start if the second-to-first harmonic ratio in the measured current exceeds the set level.

Directional feature

The overcurrent protection step operation can be can be made dependent on the relevant phase angle between measured current phasor (see table 271) and measured voltage phasor (see table 272). In protection terminology it means that the General currrent and voltage protection (CVGAPC) function can be made directional by enabling this built-in feature. In that case overcurrent protection step will only operate if the current flow is in accordance with the set direction (Forward, which means towards the protected object, or Reverse, which means from the protected object). For this feature it is of the outmost importance to understand that the measured voltage phasor (see table 272) and measured current phasor (see table 271) will be used for directional decision. Therefore it is the sole responsibility of the end user to select the appropriate current and voltage signals in order to get a proper directional decision. CVGAPC function will NOT do this automatically. It will just simply use the current and voltage phasors selected by the end user to check for the directional criteria. Table 274 gives an overview of the typical choices (but not the only possible ones) for these two quantities for traditional directional relays.
Table 274:
Set value for the parameter

Typical current and voltage choices for directional feature


Set value for the parameter Comment Directional positive sequence overcurrent function is obtained. Typical setting for RCADir is from -45 to -90 depending on the power Directional negative sequence overcurrent function is obtained. Typical setting for RCADir is from -45 to -90 depending on the power system voltage level (X/ R ratio) Directional zero sequence overcurrent function is obtained. Typical setting for RCADir is from 0 to -90 depending on the power system earthing (that is, solidly earthed, earthed via resistor)

CurrentInput
PosSeq

VoltageInput
PosSeq

NegSeq

-NegSeq

3ZeroSeq

-3ZeroSeq

Table continues on next page

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Set value for the parameter Phase1 Phase2 Phase3 Set value for the parameter

1MRK505183-UEN C

CurrentInput

VoltageInput

Comment Directional overcurrent function for the first phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the second phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the third phase is obtained. Typical setting for RCADir is +30 or +45

Phase2-Phase3 Phase3-Phase1 Phase1-Phase2

Unbalance current or voltage measurement shall not be used when the directional feature is enabled. Two types of directional measurement principles are available, I & U and IcosPhi&U. The first principle, referred to as "I & U" in the parameter setting tool, checks that: the magnitude of the measured current is bigger than the set pick-up level the phasor of the measured current is within the operating region (defined by the relay operate angle, ROADir parameter setting; see figure 243).

RCADir Ipickup ROADir I=3Io

U=-3U0

Operate region mta line


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Figure 243:
where:

I & U directional operating principle for CVGAPC function

RCADir is -75 ROADir is 50

The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:

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Section 10 Multipurpose protection

that the product Icos() is bigger than the set pick-up level, where is angle between the current phasor and the mta line that the phasor of the measured current is within the operating region (defined by the Icos() straight line and the relay operate angle, ROADir parameter setting; see figure 243).

RCADir Ipickup ROADir F I=3Io

U=-3U0

Operate region mta line

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IEC05000253 V1 EN

Figure 244:
where:

CVGAPC, IcosPhi&U directional operating principle

RCADir is -75 ROADir is 50

Note that it is possible to decide by a parameter setting how the directional feature shall behave when the magnitude of the measured voltage phasor falls below the preset value. User can select one of the following three options: Non-directional (operation allowed for low magnitude of the reference voltage) Block (operation prevented for low magnitude of the reference voltage) Memory (memory voltage shall be used to determine direction of the current)

It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that time the current direction will be locked to the one determined during memory time and it will re-set only if the current fails below set pickup level or voltage goes above set voltage memory limit.

Voltage restraint/control feature

The overcurrent protection step operation can be can be made dependent of a measured voltage quantity (see table 272). Practically then the pickup level of the overcurrent step is not constant but instead decreases with the decrease in the magnitude of the measured voltage quantity. Two different types of dependencies are available: Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
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OC1 Stage Pickup Level

StartCurr_OC1

VDepFact_OC1 * StartCurr_OC1

ULowLimit_OC1

UHighLimit_OC1 Selected Voltage Magnitude


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Figure 245:

Example for OC1 step current pickup level variation as function of measured voltage magnitude in Slope mode of operation

Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step)


OC1 Stage Pickup Level

StartCurr_OC1

VDepFact_OC1 * StartCurr_OC1

UHighLimit_OC1

Selected Voltage Magnitude


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IEC05000323 V1 EN

Figure 246:

Example for OC1 step current pickup level variation as function of measured voltage magnitude in Step mode of operation

This feature will simply change the set overcurrent pickup level in accordance with magnitude variations of the measured voltage. It shall be noted that this feature will as well affect the pickup current value for calculation of operate times for IDMT

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Section 10 Multipurpose protection

curves (overcurrent with IDMT curve will operate faster during low voltage conditions). The overcurrent protection step operation can be made dependent of a restraining current quantity (see table 273). Practically then the pickup level of the overcurrent step is not constant but instead increases with the increase in the magnitude of the restraining current.

Current restraint feature

IMeasured

te ra pe O
IsetHigh

ea ar

str Ire ff* oe trC es I>R

ain

IsetLow

atan(RestrCoeff) Restraint
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Figure 247:

Current pickup variation with restraint current magnitude

This feature will simply prevent overcurrent step to start if the magnitude of the measured current quantity is smaller than the set percentage of the restrain current magnitude. However this feature will not affect the pickup current value for calculation of operate times for IDMT curves. This means that the IDMT curve operate time will not be influenced by the restrain current magnitude. When set, the start signal will start definite time delay or inverse (IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the overcurrent step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.

10.1.2.4

Built-in undercurrent protection steps


Two undercurrent protection steps are available. They are absolutely identical and therefore only one will be explained here. Undercurrent step simply compares the magnitude of the measured current quantity (see table 271) with the set pickup level. The undercurrent step will pickup and set its start signal to one if the magnitude of the measured current quantity is smaller than this set level. The start signal will start definite time delay with set time delay. If the start signal has value one for longer time than the set time delay the undercurrent step will set its trip
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signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the setting.

10.1.2.5

Built-in overvoltage protection steps


Two overvoltage protection steps are available. They are absolutely identical and therefore only one will be explained here. Overvoltage step simply compares the magnitude of the measured voltage quantity (see table 272) with the set pickup level. The overvoltage step will pickup if the magnitude of the measured voltage quantity is bigger than this set level. Reset ratio is settable, with default value of 0.99. The start signal will start definite time delay or inverse (IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the overvoltage step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.

10.1.2.6

Built-in undervoltage protection steps


Two undervoltage protection steps are available. They are absolutely identical and therefore only one will be explained here. Undervoltage step simply compares the magnitude of the measured voltage quantity (see table 272) with the set pickup level. The undervoltage step will pickup if the magnitude of the measured voltage quantity is smaller than this set level. Reset ratio is settable, with default value of 1.01. The start signal will start definite time delay or inverse (IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the undervoltage step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.

10.1.2.7

Logic diagram
The simplified internal logics, for CVGAPC function are shown in the following figures.

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Section 10 Multipurpose protection

IED
ADM CVGAPC function
Current and voltage selection settings

Phasor calculation of individual currents

A/D conversion scaling with CT ratio

Phasors & samples

Selection of which current and voltage shall be given to the built-in protection elements

Selected current Selected voltage

Restraint current selection

A/D conversion scaling with CT ratio

Phasor calculation of individual voltages

Selection of restraint current

Selected restraint current

Phasors & samples

IEC05000169_2_en.vsd
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Figure 248:

Treatment of measured currents within IED for CVGAPC function

Figure 248 shows how internal treatment of measured currents is done for multipurpose protection function The following currents and voltages are inputs to the multipurpose protection function. They must all be expressed in true power system (primary) Amperes and kilovolts. 1. 2. 3. Instantaneous values (samples) of currents & voltages from one three-phase current and one three-phase voltage input. Fundamental frequency phasors from one three-phase current and one threephase voltage input calculated by the pre-processing modules. Sequence currents & voltages from one three-phase current and one threephase voltage input calculated by the pre-processing modules.

The multipurpose protection function: 1. 2. 3. Selects one current from the three-phase input system (see table 271) for internally measured current. Selects one voltage from the three-phase input system (see table 272) for internally measured voltage. Selects one current from the three-phase input system (see table 273) for internally measured restraint current.

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CURRENT

UC1 2
Selected current
nd

Harmonic restraint

TRUC1

UC2 2nd Harmonic restraint OC1 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1

STUC2 TRUC2

STOC1 TROC1 BLK2ND DIROC1

Selected restraint current

OC2 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1

STOC2 TROC2

UDIRLOW DIROC2

STOV1

OV1

TROV1 STOV2

OV2
Selected voltage

TROV2 STUV1

UV1

TRUV1 STUV2

UV2

TRUV2

VOLTAGE

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Figure 249:

CVGAPC function main logic diagram for built-in protection elements

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Section 10 Multipurpose protection

Logic in figure 249 can be summarized as follows: 1. 2. 3. The selected currents and voltage are given to built-in protection elements. Each protection element and step makes independent decision about status of its START and TRIP output signals. More detailed internal logic for every protection element is given in the following four figures Common START and TRIP signals from all built-in protection elements & steps (internal OR logic) are available from multipurpose function as well.

Enable second harmonic

Second harmonic check

DEF time selected

DEF
OR

BLKTROC 1

AND

TROC1

Selected current

a b

a>b

OC1=On BLKOC1

StartCurr_OC1

AND

STOC1

Inverse Voltage control or restraint feature Directionality check DIR_OK Inverse time selected

Selected voltage

Selected restrain current

Current Restraint Feature Imeasured > k Irestraint

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Figure 250:

Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the same internal logic)

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Bin input: BLKUC1TR

Selected current

a b

b>a

DEF

AND

TRUC1

StartCurr_UC1

AND

Operation_UC1=On Bin input: BLKUC1

STUC1

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Figure 251:

Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has the same internal logic)

DEF time selected Selected voltage


a b

DEF

BLKTROV1

AND

TROV1

OR
a>b

StartVolt_OV1

AND
Inverse

STOV1

Operation_OV1=On BLKOV1 Inverse time selected

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Figure 252:

Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same internal logic)

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Section 10 Multipurpose protection

DEF time selected Selected voltage


a b

DEF OR

BLKTRUV 1

AND

TRUV1

b>a

StartVolt_UV1

AND Inverse

STUV1

Operation_UV1=On BLKUV1 Inverse time selected

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Figure 253:

Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same internal logic)

10.1.3

Function block
CVGAPC I3P* U3P* BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2 START STOC1 STOC2 STUC1 STUC2 STOV1 STOV2 STUV1 STUV2 BLK2ND DIROC1 DIROC2 UDIRLOW CURRENT ICOSFI VOLTAGE UIANGLE IEC05000372-2-en.vsd
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Figure 254:

CVGAPC function block

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Section 10 Multipurpose protection 10.1.4 Input and output signals


Table 275:
Name I3P U3P BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR

1MRK505183-UEN C

CVGAPC Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description Group signal for current input Group signal for voltage input Block of function Block of over current function OC1 Block of trip for over current function OC1 When activated, the current multiplier is in use for OC1 Block of over current function OC2 Block of trip for over current function OC2 When activated, the current multiplier is in use for OC2 Block of under current function UC1 Block of trip for under current function UC1 Block of under current function UC2 Block of trip for under current function UC2 Block of over voltage function OV1 Block of trip for over voltage function OV1 Block of over voltage function OV2 Block of trip for over voltage function OV2 Block of under voltage function UV1 Block of trip for under voltage function UV1 Block of under voltage function UV2 Block of trip for under voltage function UV2

Table 276:
Name TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2

CVGAPC Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description General trip signal Trip signal from overcurrent function OC1 Trip signal from overcurrent function OC2 Trip signal from undercurrent function UC1 Trip signal from undercurrent function UC2 Trip signal from overvoltage function OV1 Trip signal from overvoltage function OV2 Trip signal from undervoltage function UV1 Trip signal from undervoltage function UV2

Table continues on next page

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Name START STOC1 STOC2 STUC1 STUC2 STOV1 STOV2 STUV1 STUV2 BLK2ND DIROC1 DIROC2 UDIRLOW CURRENT ICOSFI VOLTAGE UIANGLE Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER BOOLEAN REAL REAL REAL REAL Description General start signal Start signal from overcurrent function OC1 Start signal from overcurrent function OC2 Start signal from undercurrent function UC1 Start signal from undercurrent function UC2 Start signal from overvoltage function OV1 Start signal from overvoltage function OV2 Start signal from undervoltage function UV1 Start signal from undervoltage function UV2 Block from second harmonic detection Directional mode of OC1 (nondir, forward,reverse) Directional mode of OC2 (nondir, forward,reverse) Low voltage for directional polarization Measured current value Measured current multiplied with cos (Phi) Measured voltage value Angle between voltage and current

10.1.5
Table 277:
Name Operation CurrentInput

Setting parameters
CVGAPC Group settings (basic)
Values (Range) Off On phase1 phase2 phase3 PosSeq NegSeq 3*ZeroSeq MaxPh MinPh UnbalancePh phase1-phase2 phase2-phase3 phase3-phase1 MaxPh-Ph MinPh-Ph UnbalancePh-Ph 1 - 99999 Unit Step Default Off MaxPh Description Operation Off / On Select current signal which will be measured inside function

IBase

3000

Base Current

Table continues on next page

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Name VoltageInput Values (Range) phase1 phase2 phase3 PosSeq -NegSeq -3*ZeroSeq MaxPh MinPh UnbalancePh phase1-phase2 phase2-phase3 phase3-phase1 MaxPh-Ph MinPh-Ph UnbalancePh-Ph 0.05 - 2000.00 Off On 10.0 - 50.0 10 - 5000 Off On PosSeq NegSeq 3*ZeroSeq Max 0.00 - 5.00 -180 - 180 1 - 90 0.0 - 5.0 Off On 2.0 - 5000.0 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type Unit Step Default MaxPh Description

1MRK505183-UEN C

Select voltage signal which will be measured inside function

UBase OperHarmRestr l_2nd/l_fund BlkLevel2nd EnRestrainCurr RestrCurrInput

kV % %IB -

0.05 1.0 1 -

400.00 Off 20.0 5000 Off PosSeq

Base Voltage Operation of 2nd harmonic restrain Off / On Ratio of second to fundamental current harmonic in % Harm analyse disabled above this current level in % of Ibase Enable current restrain function On / Off Select current signal which will be used for curr restrain

RestrCurrCoeff RCADir ROADir LowVolt_VM Operation_OC1 StartCurr_OC1 CurveType_OC1

Deg Deg %UB %IB -

0.01 1 1 0.1 1.0 -

0.00 -75 75 0.5 Off 120.0 ANSI Def. Time

Restraining current coefficient Relay Characteristic Angle Relay Operate Angle Below this level in % of Ubase setting ActLowVolt takes over Operation OC1 Off / On Operate current level for OC1 in % of Ibase Selection of time delay curve type for OC1

Table continues on next page

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Section 10 Multipurpose protection


Values (Range) 0.00 - 6000.00 0.05 - 999.00 0.00 - 6000.00 Voltage control Input control Volt/Input control Off Step Slope 0.02 - 5.00 1.0 - 200.0 1.0 - 200.0 Off On Non-directional Forward Reverse I&U IcosPhi&U Non-directional Block Memory Off On 2.0 - 5000.0 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.00 - 6000.00 0.05 - 999.00 Unit s s Step 0.01 0.01 0.01 Default 0.50 0.30 0.05 Off Description Independent (definitive) time delay of OC1 Time multiplier for the dependent time delay for OC1 Minimum operate time for IEC IDMT curves for OC1 Control mode for voltage controlled OC1 function

Name tDef_OC1 k_OC1 tMin_OC1 VCntrlMode_OC1

VDepMode_OC1 VDepFact_OC1 ULowLimit_OC1 UHighLimit_OC1 HarmRestr_OC1 DirMode_OC1

%UB %UB -

0.01 0.1 0.1 -

Step 1.00 50.0 100.0 Off Non-directional

Voltage dependent mode OC1 (step, slope) Multiplying factor for I pickup when OC1 is U dependent Voltage low limit setting OC1 in % of Ubase Voltage high limit setting OC1 in % of Ubase Enable block of OC1 by 2nd harmonic restrain Directional mode of OC1 (nondir, forward,reverse) Measuring on IandU or IcosPhiandU for OC1 Low voltage level action for Dir_OC1 (Nodir, Blk, Mem) Operation OC2 Off / On Operate current level for OC2 in % of Ibase Selection of time delay curve type for OC2

DirPrinc_OC1 ActLowVolt1_VM

I&U Non-directional

Operation_OC2 StartCurr_OC2 CurveType_OC2

%IB -

1.0 -

Off 120.0 ANSI Def. Time

tDef_OC2 k_OC2

s -

0.01 0.01

0.50 0.30

Independent (definitive) time delay of OC2 Time multiplier for the dependent time delay for OC2

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Section 10 Multipurpose protection


Name tMin_OC2 VCntrlMode_OC2 Values (Range) 0.00 - 6000.00 Voltage control Input control Volt/Input control Off Step Slope 0.02 - 5.00 1.0 - 200.0 1.0 - 200.0 Off On Non-directional Forward Reverse I&U IcosPhi&U Non-directional Block Memory Off On Off On 0 - 150 2.0 - 150.0 0.00 - 6000.00 0.00 - 6000.00 Off On Off On Off On 0 - 150 2.0 - 150.0 0.00 - 6000.00 Off On Off On Unit s Step 0.01 Default 0.05 Off Description

1MRK505183-UEN C

Minimum operate time for IEC IDMT curves for OC2 Control mode for voltage controlled OC2 function

VDepMode_OC2 VDepFact_OC2 ULowLimit_OC2 UHighLimit_OC2 HarmRestr_OC2 DirMode_OC2

%UB %UB -

0.01 0.1 0.1 -

Step 1.00 50.0 100.0 Off Non-directional

Voltage dependent mode OC2 (step, slope) Multiplying factor for I pickup when OC2 is U dependent Voltage low limit setting OC2 in % of Ubase Voltage high limit setting OC2 in % of Ubase Enable block of OC2 by 2nd harmonic restrain Directional mode of OC2 (nondir, forward,reverse) Measuring on IandU or IcosPhiandU for OC2 Low voltage level action for Dir_OC2 (Nodir, Blk, Mem) Operation UC1 Off / On Enable internal low current level blocking for UC1 Internal low current blocking level for UC1 in % of Ibase Operate undercurrent level for UC1 in % of Ibase Independent (definitive) time delay of UC1 Reset time delay used in IEC Definite Time curve UC1 Enable block of UC1 by 2nd harmonic restrain Operation UC2 Off / On Enable internal low current level blocking for UC2 Internal low current blocking level for UC2 in % of Ibase Operate undercurrent level for UC2 in % of Ibase Independent (definitive) time delay of UC2 Enable block of UC2 by 2nd harmonic restrain Operation OV1 Off / On

DirPrinc_OC2 ActLowVolt2_VM

I&U Non-directional

Operation_UC1 EnBlkLowI_UC1 BlkLowCurr_UC1 StartCurr_UC1 tDef_UC1 tResetDef_UC1 HarmRestr_UC1 Operation_UC2 EnBlkLowI_UC2 BlkLowCurr_UC2 StartCurr_UC2 tDef_UC2 HarmRestr_UC2 Operation_OV1

%IB %IB s s %IB %IB s -

1 1.0 0.01 0.01 1 1.0 0.01 -

Off Off 20 70.0 0.50 0.00 Off Off Off 20 70.0 0.50 Off Off

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Section 10 Multipurpose protection


Values (Range) 2.0 - 200.0 Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 0.00 - 6000.00 0.00 - 6000.00 0.05 - 999.00 Off On 2.0 - 200.0 Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 0.00 - 6000.00 0.00 - 6000.00 0.05 - 999.00 Off On 2.0 - 150.0 Definite time Inverse curve A Inverse curve B Prog. inv. curve 0.00 - 6000.00 0.00 - 6000.00 0.05 - 999.00 Off On 0.0 - 5.0 Off On 2.0 - 150.0 Unit %UB Step 0.1 Default 150.0 Definite time Description Operate voltage level for OV1 in % of Ubase Selection of time delay curve type for OV1

Name StartVolt_OV1 CurveType_OV1

tDef_OV1 tMin_OV1 k_OV1 Operation_OV2 StartVolt_OV2 CurveType_OV2

s s %UB -

0.01 0.01 0.01 0.1 -

1.00 0.05 0.30 Off 150.0 Definite time

Operate time delay in sec for definite time use of OV1 Minimum operate time for IDMT curves for OV1 Time multiplier for the dependent time delay for OV1 Operation OV2 Off / On Operate voltage level for OV2 in % of Ubase Selection of time delay curve type for OV2

tDef_OV2 tMin_OV2 k_OV2 Operation_UV1 StartVolt_UV1 CurveType_UV1

s s %UB -

0.01 0.01 0.01 0.1 -

1.00 0.05 0.30 Off 50.0 Definite time

Operate time delay in sec for definite time use of OV2 Minimum operate time for IDMT curves for OV2 Time multiplier for the dependent time delay for OV2 Operation UV1 Off / On Operate undervoltage level for UV1 in % of Ubase Selection of time delay curve type for UV1

tDef_UV1 tMin_UV1 k_UV1 EnBlkLowV_UV1 BlkLowVolt_UV1 Operation_UV2 StartVolt_UV2

s s %UB %UB

0.01 0.01 0.01 0.1 0.1

1.00 0.05 0.30 On 0.5 Off 50.0

Operate time delay in sec for definite time use of UV1 Minimum operate time for IDMT curves for UV1 Time multiplier for the dependent time delay for UV1 Enable internal low voltage level blocking for UV1 Internal low voltage blocking level for UV1 in % of Ubase Operation UV2 Off / On Operate undervoltage level for UV2 in % of Ubase

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Name CurveType_UV2 Values (Range) Definite time Inverse curve A Inverse curve B Prog. inv. curve 0.00 - 6000.00 0.00 - 6000.00 0.05 - 999.00 Off On 0.0 - 5.0 Unit Step Default Definite time Description

1MRK505183-UEN C

Selection of time delay curve type for UV2

tDef_UV2 tMin_UV2 k_UV2 EnBlkLowV_UV2 BlkLowVolt_UV2

s s %UB

0.01 0.01 0.01 0.1

1.00 0.05 0.30 On 0.5

Operate time delay in sec for definite time use of UV2 Minimum operate time for IDMT curves for UV2 Time multiplier for the dependent time delay for UV2 Enable internal low voltage level blocking for UV2 Internal low voltage blocking level for UV2 in % of Ubase

Table 278:
Name CurrMult_OC1

CVGAPC Group settings (advanced)


Values (Range) 1.0 - 10.0 Instantaneous IEC Reset ANSI reset 0.00 - 6000.00 0.001 - 10.000 0.000 - 999.000 0.000 - 99.000 0.000 - 1.000 0.005 - 3.000 0.005 - 600.000 0.1 - 10.0 1.0 - 10.0 Instantaneous IEC Reset ANSI reset 0.00 - 6000.00 0.001 - 10.000 0.000 - 999.000 Unit Step 0.1 Default 2.0 Instantaneous Description Multiplier for scaling the current setting value for OC1 Selection of reset curve type for OC1

ResCrvType_OC1

tResetDef_OC1 P_OC1 A_OC1 B_OC1 C_OC1 PR_OC1 TR_OC1 CR_OC1 CurrMult_OC2 ResCrvType_OC2

s -

0.01 0.001 0.001 0.001 0.001 0.001 0.001 0.1 0.1 -

0.00 0.020 0.140 0.000 1.000 0.500 13.500 1.0 2.0 Instantaneous

Reset time delay used in IEC Definite Time curve OC1 Parameter P for customer programmable curve for OC1 Parameter A for customer programmable curve for OC1 Parameter B for customer programmable curve for OC1 Parameter C for customer programmable curve for OC1 Parameter PR for customer programmable curve for OC1 Parameter TR for customer programmable curve for OC1 Parameter CR for customer programmable curve for OC1 Multiplier for scaling the current setting value for OC2 Selection of reset curve type for OC2

tResetDef_OC2 P_OC2 A_OC2

s -

0.01 0.001 0.001

0.00 0.020 0.140

Reset time delay used in IEC Definite Time curve OC2 Parameter P for customer programmable curve for OC2 Parameter A for customer programmable curve for OC2

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Values (Range) 0.000 - 99.000 0.000 - 1.000 0.005 - 3.000 0.005 - 600.000 0.1 - 10.0 0.00 - 6000.00 Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.00 - 6000.00 0.005 - 999.000 0.500 - 99.000 0.000 - 1.000 0.000 - 10.000 0.001 - 10.000 Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.00 - 6000.00 0.005 - 999.000 0.500 - 99.000 0.000 - 1.000 0.000 - 10.000 0.001 - 10.000 Instantaneous Frozen timer Linearly decreased Unit s Step 0.001 0.001 0.001 0.001 0.1 0.01 Default 0.000 1.000 0.500 13.500 1.0 0.00 Instantaneous Description Parameter B for customer programmable curve for OC2 Parameter C for customer programmable curve for OC2 Parameter PR for customer programmable curve for OC2 Parameter TR for customer programmable curve for OC2 Parameter CR for customer programmable curve for OC2 Reset time delay used in IEC Definite Time curve UC2 Selection of reset curve type for OV1

Name B_OC2 C_OC2 PR_OC2 TR_OC2 CR_OC2 tResetDef_UC2 ResCrvType_OV1

tResetDef_OV1 tResetIDMT_OV1 A_OV1 B_OV1 C_OV1 D_OV1 P_OV1 ResCrvType_OV2

s s -

0.01 0.01 0.001 0.001 0.001 0.001 0.001 -

0.00 0.00 0.140 1.000 1.000 0.000 0.020 Instantaneous

Reset time delay in sec for definite time use of OV1 Reset time delay in sec for IDMT curves for OV1 Parameter A for customer programmable curve for OV1 Parameter B for customer programmable curve for OV1 Parameter C for customer programmable curve for OV1 Parameter D for customer programmable curve for OV1 Parameter P for customer programmable curve for OV1 Selection of reset curve type for OV2

tResetDef_OV2 tResetIDMT_OV2 A_OV2 B_OV2 C_OV2 D_OV2 P_OV2 ResCrvType_UV1

s s -

0.01 0.01 0.001 0.001 0.001 0.001 0.001 -

0.00 0.00 0.140 1.000 1.000 0.000 0.020 Instantaneous

Reset time delay in sec for definite time use of OV2 Reset time delay in sec for IDMT curves for OV2 Parameter A for customer programmable curve for OV2 Parameter B for customer programmable curve for OV2 Parameter C for customer programmable curve for OV2 Parameter D for customer programmable curve for OV2 Parameter P for customer programmable curve for OV2 Selection of reset curve type for UV1

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Name tResetDef_UV1 tResetIDMT_UV1 A_UV1 B_UV1 C_UV1 D_UV1 P_UV1 ResCrvType_UV2 Values (Range) 0.00 - 6000.00 0.00 - 6000.00 0.005 - 999.000 0.500 - 99.000 0.000 - 1.000 0.000 - 10.000 0.001 - 10.000 Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.00 - 6000.00 0.005 - 999.000 0.500 - 99.000 0.000 - 1.000 0.000 - 10.000 0.001 - 10.000 Unit s s Step 0.01 0.01 0.001 0.001 0.001 0.001 0.001 Default 0.00 0.00 0.140 1.000 1.000 0.000 0.020 Instantaneous Description

1MRK505183-UEN C

Reset time delay in sec for definite time use of UV1 Reset time delay in sec for IDMT curves for UV1 Parameter A for customer programmable curve for UV1 Parameter B for customer programmable curve for UV1 Parameter C for customer programmable curve for UV1 Parameter D for customer programmable curve for UV1 Parameter P for customer programmable curve for UV1 Selection of reset curve type for UV2

tResetDef_UV2 tResetIDMT_UV2 A_UV2 B_UV2 C_UV2 D_UV2 P_UV2

s s -

0.01 0.01 0.001 0.001 0.001 0.001 0.001

0.00 0.00 0.140 1.000 1.000 0.000 0.020

Reset time delay in sec for definite time use of UV2 Reset time delay in sec for IDMT curves for UV2 Parameter A for customer programmable curve for UV2 Parameter B for customer programmable curve for UV2 Parameter C for customer programmable curve for UV2 Parameter D for customer programmable curve for UV2 Parameter P for customer programmable curve for UV2

10.1.6

Technical data
Table 279:
Function Measuring current input

CVGAPC technical data


Range or value phase1, phase2, phase3, PosSeq, NegSeq, 3*ZeroSeq, MaxPh, MinPh, UnbalancePh, phase1-phase2, phase2phase3, phase3-phase1, MaxPh-Ph, MinPh-Ph, UnbalancePh-Ph (1 - 99999) A phase1, phase2, phase3, PosSeq, NegSeq, -3*ZeroSeq, MaxPh, MinPh, UnbalancePh, phase1-phase2, phase2phase3, phase3-phase1, MaxPh-Ph, MinPh-Ph, UnbalancePh-Ph (0.05 - 2000.00) kV Accuracy -

Base current Measuring voltage input

Base voltage

Table continues on next page

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Function Start overcurrent, step 1 and 2 Start undercurrent, step 1 and 2 Definite time delay Operate time start overcurrent Reset time start overcurrent Operate time start undercurrent Reset time start undercurrent See table 644 and table 645 Range or value (2 - 5000)% of IBase (2 - 150)% of IBase (0.00 - 6000.00) s 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 25 ms typically at 2 to 0 x Iset 25 ms typically at 0 to 2 x Iset Parameter ranges for customer defined characteristic no 17: k: 0.05 - 999.00 A: 0.0000 - 999.0000 B: 0.0000 - 99.0000 C: 0.0000 - 1.0000 P: 0.0001 - 10.0000 PR: 0.005 - 3.000 TR: 0.005 - 600.000 CR: 0.1 - 10.0 (0.0 - 5.0)% of UBase Accuracy 1.0% of Ir for I<Ir 1.0% of I for I>Ir 1.0% of Ir for I<Ir 1.0% of I for I>Ir 0.5% 10 ms See table 644 and table 645

Voltage level where voltage memory takes over Start overvoltage, step 1 and 2 Start undervoltage, step 1 and 2 Operate time, start overvoltage Reset time, start overvoltage Operate time start undervoltage Reset time start undervoltage High and low voltage limit, voltage dependent operation Directional function Relay characteristic angle Relay operate angle Reset ratio, overcurrent Reset ratio, undercurrent

1.0% of Ur

(2.0 - 200.0)% of UBase (2.0 - 150.0)% of UBase 25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 25 ms typically 2 to 0 x Uset 25 ms typically at 0 to 2 x Uset (1.0 - 200.0)% of UBase

1.0% of Ur for U<Ur 1.0% of U for U>Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 2.0 degrees 2.0 degrees -

Settable: NonDir, forward and reverse (-180 to +180) degrees (1 to 90) degrees > 95% < 105%

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Function Reset ratio, overvoltage Reset ratio, undervoltage Overcurrent: Critical impulse time Impulse margin time Undercurrent: Critical impulse time Impulse margin time Overvoltage: Critical impulse time Impulse margin time Undervoltage: Critical impulse time Impulse margin time 10 ms typically at 2 to 0 x Uset 15 ms typically 10 ms typically at 0 to 2 x Uset 15 ms typically 10 ms typically at 2 to 0 x Iset 15 ms typically 10 ms typically at 0 to 2 x Iset 15 ms typically Range or value > 95% < 105% Accuracy -

1MRK505183-UEN C

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Section 11 Secondary system supervision

Section 11

Secondary system supervision

About this chapter


This chapter describes functions like Current circuit supervision and Fuse failure supervision. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

11.1

Current circuit supervision CCSRDIF


Function description Current circuit supervision IEC 61850 identification CCSRDIF IEC 60617 identification ANSI/IEEE C37.2 device number 87

11.1.1

Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protection functions such as differential, earth-fault current and negativesequence current functions. It must be remembered that a blocking of protection functions at an occurrence of open CT circuit will mean that the situation will remain and extremely high voltages will stress the secondary circuit. Current circuit supervision (CCSRDIF) compares the residual current from a three phase set of current transformer cores with the neutral point current on a separate input taken from another set of cores on the current transformer. A detection of a difference indicates a fault in the circuit and is used as alarm or to block protection functions expected to give unwanted tripping.

11.1.2

Principle of operation
Current circuit supervision CCSRDIF compares the absolute value of the vectorial sum of the three phase currents |Iphase| and the numerical value of the residual current |Iref| from another current transformer set, see figure 255. The FAIL output will be set to a logical one when the following criteria are fulfilled:

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The numerical value of the difference |Iphase| |Iref| is higher than 80% of the numerical value of the sum |Iphase| + |Iref|. The numerical value of the current |Iphase| |Iref| is equal to or higher than the set operate value IMinOp. No phase current has exceeded Ip>Block during the last 10 ms. CCSRDIF is enabled by setting Operation = On.

The FAIL output remains activated 100 ms after the AND-gate resets when being activated for more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted resetting of the blocking function when phase current supervision element(s) operate, for example, during a fault.

IEC05000463 V1 EN

Figure 255:

Simplified logic diagram for Current circuit supervision CCSRDIF

The operate characteristic is percentage restrained, see figure 256.

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Section 11 Secondary system supervision

| I phase | - | I ref |

Slope = 1

Slope = 0.8 I MinOp

Operation area

| I phase | + | I ref |
99000068.vsd
IEC99000068 V1 EN

Figure 256:

Operate characteristics

Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + | I ref | respectively, the slope can not be above 2.

11.1.3

Function block
CCSRDIF I3P* IREF* BLOCK FAIL ALARM

IEC05000389-2-en.vsd
IEC05000389 V2 EN

Figure 257:

CCSRDIF function block

11.1.4

Input and output signals


Table 280:
Name I3P IREF BLOCK

CCSRDIF Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN Default 0 Description Group signal for three phase current input TBD Block of function

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Table 281:
Name FAIL ALARM

CCSRDIF Output signals


Type BOOLEAN BOOLEAN Description Detection of current circuit failure Alarm for current circuit failure

11.1.5
Table 282:
Name Operation IBase IMinOp

Setting parameters
CCSRDIF Group settings (basic)
Values (Range) Off On 1 - 99999 5 - 200 Unit A %IB Step 1 1 Default Off 3000 20 Description Operation Off / On IBase value for current level detectors Minimum operate current differential level in % of IBase

Table 283:
Name Ip>Block

CCSRDIF Group settings (advanced)


Values (Range) 5 - 500 Unit %IB Step 1 Default 150 Description Block of the function at high phase current, in % of IBase

11.1.6

Technical data
Table 284:
Function Operate current Block current

CCSRDIF technical data


Range or value (5-200)% of Ir (5-500)% of Ir Accuracy 10.0% of Ir at I Ir 10.0% of I at I > Ir 5.0% of Ir at I Ir 5.0% of I at I > Ir

11.2

Fuse failure supervision SDDRFUF


Function description Fuse failure supervision IEC 61850 identification SDDRFUF IEC 60617 identification ANSI/IEEE C37.2 device number -

11.2.1

Introduction
The aim of the fuse failure supervision function (SDDRFUF) is to block voltage measuring functions at failures in the secondary circuits between the voltage

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Section 11 Secondary system supervision

transformer and the IED in order to avoid unwanted operations that otherwise might occur. The fuse failure supervision function basically has two different algorithms, negative sequence and zero sequence based algorithm and an additional delta voltage and delta current algorithm. The negative sequence detection algorithm is recommended for IEDs used in isolated or high-impedance earthed networks. It is based on the negative-sequence measuring quantities, a high value of voltage 3U2 without the presence of the negative-sequence current 3I2. The zero sequence detection algorithm is recommended for IEDs used in directly or low impedance earthed networks. It is based on the zero sequence measuring quantities, a high value of voltage 3U0 without the presence of the residual current 3I0. A criterion based on delta current and delta voltage measurements can be added to the fuse failure supervision function in order to detect a three phase fuse failure, which in practice is more associated with voltage transformer switching during station operations. For better adaptation to system requirements, an operation mode setting has been introduced which makes it possible to select the operating conditions for negative sequence and zero sequence based function. The selection of different operation modes makes it possible to choose different interaction possibilities between the negative sequence and zero sequence based algorithm.

11.2.2
11.2.2.1

Principle of operation
Zero and negative sequence detection
The zero and negative sequence function continuously measures the currents and voltages in all three phases and calculates, see figure 258: the zero-sequence voltage 3U0 the zero-sequence current 3I0 the negative sequence current 3I2 the negative sequence voltage 3U2

The measured signals are compared with their respective set values 3U0< and 3I0>, 3U2< and 3I2>. The function enable the internal signal FuseFailDetZeroSeq if the measured zerosequence voltage is higher than the set value 3U0> and the measured zerosequence current is below the set value 3I0<.

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The function enable the internal signal FuseFailDetNegSeq if the measured negative sequence voltage is higher than the set value 3U2> and the measured negative sequence current is below the set value 3I2<. A drop off delay of 100 ms for the measured zero-sequence and negative sequence current will prevent a false fuse failure detection at un-equal breaker opening at the two line ends.
Sequence Detection
3I0< IL1 Zero sequence filter Negative sequence filter
a b

CurrZeroSeq 3I0
a b

IL2

a>b

100 ms t

CurrNegSeq 3I2 AND FuseFailDetZeroSeq

IL3

3I2< 3U0> UL1 Zero sequence filter Negative sequence filter

a>b

100 ms t

AND

FuseFailDetNegSeq VoltZeroSeq

a b

a>b VoltNegSeq

3U0

UL2

a b

UL3 3U2>

a>b

3U2

IEC10000036-1-en.vsd
IEC10000036 V1 EN

Figure 258:

Simplified logic diagram for sequence detection part

The calculated values 3U0, 3I0, 3I2 and 3U2 are available as service values on local HMI and monitoring tool in PCM600.

Input and output signals


The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions: The input BLOCK is activated The input BLKTRIP is activated at the same time as the internal signal fufailStarted is not present The operation mode selector OpMode is set to Off. The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockFUSE=Yes)

The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision function. It can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED itself in order to receive a block command from

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Section 11 Secondary system supervision

internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The input BLKSP is intended to be connected to the trip output at any of the protection functions included in the IED. When activated for more than 20 ms, the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted operations during the opening of the breaker, which might cause unbalance conditions for which the fuse failure might operate. The output signal BLKZ will also be blocked if the internal dead line detection is activated. The block signal has a 200 ms drop-off time delay. The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is open independent of the setting of OpMode selector. The additional drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage dependent function due to non simultaneous closing of the main contacts of the miniature circuit breaker. The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order to block the voltage related functions when the line disconnector is open. The impedance protection function is not affected by the position of the line disconnector since there will be no line currents that can cause maloperation of the distance protection. If DISCPOS=0 it signifies that the line is connected to the system and when the DISCPOS=1 it signifies that the line is disconnected from the system and the block signal BLKU is generated. The output BLKU can be used for blocking the voltage related measuring functions (undervoltage protection, synchro-check etc.) except for the impedance protection. The function output BLKZ can be used for blocking the impedance protection function. The BLKZ will only be activated if not the internal dead line detection is activated at the same time. The fuse failure condition is unlatched when the normal voltage conditions are restored. When the output 3PH is activated, all three voltage are low.

11.2.2.2

Delta current and delta voltage detection


A simplified diagram for the functionality is found in figure 259. The calculation of the change is based on vector change which means that it detects both amplitude and phase angle changes. The calculated delta quantities are compared with their

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respective set values DI< and DU> and the algorithm, detects a fuse failure if a sufficient change in voltage without a sufficient change in current is detected in each phase separately. The following quantities are calculated in all three phases: The change in voltage DU The change in current DI

The internal FuseFailDetDUDI signal is activated if the following conditions are fulfilled for a phase: The magnitude of the phase-ground voltage has been above UPh> for more than 1.5 cycle The magnitude of DU is higher than the corresponding setting DU> The magnitude of DI is below the setting DI>

and at least one of the following conditions are fulfilled: The magnitude of the phase current in the same phase is higher than the setting IPh> The circuit breaker is closed (CBCLOSED = True)

The first criterion means that detection of failure in one phase together with high current for the same phase will set the output. The measured phase current is used to reduce the risk of false fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not caused by fuse failure) is not by certain followed by current change and a false fuse failure might occur The second criterion requires that the delta condition shall be fulfilled in any phase at the same time as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other end onto a fault could lead to wrong start of the fuse failure function at the end with the open breaker. If this is considering to be an important disadvantage, connect the CBCLOSED input to FALSE. In this way only the first criterion can activate the delta function.

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Section 11 Secondary system supervision

DUDI Detection
DUDI detection Phase 1
IL1 One cycle delay |DI| DI< UL1 One cycle delay |DU| DU>
a a b a b

a>b

a>b

AND

UPh> IL2 UL2

a>b

20 ms t

1.5 cycle t

DUDI detection Phase 2 Same logic as for phase 1

IL3 UL3

DUDI detection Phase 3 Same logic as for phase 1

UL1

a b

a<b

IL1 IPh>

a b

a>b

AND OR AND

CBCLOSED UL2
a b

AND

OR

a<b

IL2

a b

a>b

AND OR AND

AND UL3
a b

OR

a<b

IL3

a b

a>b

AND OR AND OR FuseFailDetDUDI

AND

OR

IEC10000034-1-en.vsd
IEC10000034 V1 EN

Figure 259:

Simplified logic diagram for DU/DI detection part

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Section 11 Secondary system supervision


11.2.2.3 Dead line detection

1MRK505183-UEN C

A simplified diagram for the functionality is found in figure 260. A dead phase condition is indicated if both the voltage and the current in one phase is below their respective setting values UDLD< and IDLD<. If at least one phase is considered to be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated. If all three phases are considered to be dead the output DLD3PH is activated
Dead Line Detection
IL1 IL2 IL3 IDLD< UL1 UL2 UL3 UDLD< intBlock
a b a b a b a b a b a b

a<b AND a<b a<b

AllCurrLow

DeadLineDet1Ph a<b a<b a<b AND OR AND AND AND AND DLD3PH AND DLD1PH

IEC10000035-1-en.vsd
IEC10000035 V1 EN

Figure 260:

Simplified logic diagram for Dead Line detection part

11.2.2.4

Main logic
A simplified diagram for the functionality is found in figure 261. The fuse failure supervision function (SDDRFUF) can be switched on or off by the setting parameter Operation to On or Off. For increased flexibility and adaptation to system requirements an operation mode selector, OpMode, has been introduced to make it possible to select different operating modes for the negative and zero sequence based algorithms. The different operation modes are: Off; The negative and zero sequence function is switched off UNsINs; Negative sequence is selected UZsIZs; Zero sequence is selected

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UZsIZsORUNsINs; Both negative and zero sequence is activated and working in parallel in an OR-condition UZsIZs AND UNsINs; Both negative and zero sequence is activated and working in series (AND-condition for operation) OptimZsNs; Optimum of negative and zero sequence (the function that has the highest magnitude of measured negative and zero sequence current will be activated)

The delta function can be activated by setting the parameter OpDUDI to On. When selected it operates in parallel with the sequence based algorithms. As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq, FuseFailDetNegSeq or FuseFailDetDUDI, and the specific functionality is released, the function will activate the output signal BLKU. The output signal BLKZ will be activated as well if not the internal dead phase detection, DeadLineDet1Ph, is activated at the same time. The output BLKU can be used for blocking voltage related measuring functions (under voltage protection, synchrocheck, and so on). For blocking of impedance protection functions output BLKZ shall be used. If the fuse failure situation is present for more than 5 seconds and the setting parameter SealIn is set to On it will be sealed in over under-voltage as long as at least one phase voltages is below the set value USealIn<. This will keep the BLKU and BLKZ signals activated as long as any phase voltage is below the set value USealIn<. If all three phase voltages drop below the set value USealIn< and the setting parameter SealIn is set to On also the output signal 3PH will be activated. The signals 3PH, BLKU and BLKZ signals will now be active as long as any phase voltage is below the set value USealIn<. If SealIn is set to On fuse failure condition is stored in the non volatile memory in the IED. At start-up (due to auxiliary power interruption or re-start due to configuration change) the IED checks the stored value in its non volatile memory and re-establishes the conditions present before the shut down. All phase voltages must became above USealIn< before fuse failure is de-activated and inhibits the block of different protection functions. The output signal BLKU will also be active if all phase voltages have been above the setting USealIn< for more than 60 seconds, the zero or negative sequence voltage has been above the set value 3U0> and 3U2> for more than 5 seconds, all phase currents are below the setting IDLD< (operate level for dead line detection) and the circuit breaker is closed (input CBCLOSED is activated). The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is open independent of the setting of OpMode or OpDUDI. An additional drop-out timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of

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voltage dependent function due to non simultaneous closing of the main contacts of the miniature circuit breaker. The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order to block the voltage related functions when the line disconnector is open. The impedance protection function does not have to be affected since there will be no line currents that can cause malfunction of the distance protection. The output signals 3PH, BLKU and BLKZ as well as the signals DLD1PH and DLD3PH from dead line detections are blocked if any of the following conditions occur: The operation mode selector OpMode is set to Off The input BLOCK is activated The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockFUSE=Yes)

The input BLOCK is a general purpose blocking signal of the fuse failure supervision function. It can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED. Through OR gate it can be connected to both binary inputs and internal function outputs. The input BLKTRIP is intended to be connected to the trip output of any of the protection functions included in the IED and/or trip from external equipments via binary inputs. When activated for more than 20 ms without any fuse fail detected, the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted operations during the opening of the breaker, which might cause unbalance conditions for which the fuse failure might operate.

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Section 11 Secondary system supervision

Fuse failure detection Main logic


TEST TEST ACTIVE BlocFuse = Yes BLOCK BLKTRIP AND 20 ms t 100 ms t OR intBlock

AND

All UL < USealIn< AND SealIn = On OR AND AND

3PH

AND Any UL < UsealIn< FuseFailDetDUDI OpDUDI = On FuseFailDetZeroSeq AND AND OR 5s t

AND FuseFailDetNegSeq AND UNsINs UZsIZs OpMode UZsIZs OR UNsINs UZsIZs AND UNsINs OptimZsNs
a b

OR OR

CurrZeroSeq CurrNegSeq

OR

a>b

AND AND

DeadLineDet1Ph MCBOP

200 ms t

AND 150 ms t

OR

AND

BLKZ

All UL > UsealIn< VoltZeroSeq VoltNegSeq AllCurrLow CBCLOSED DISCPOS

60 sec t 5 sec t

OR AND

OR

AND

BLKU

OR

IEC10000033-1-en.vsd
IEC10000033 V1 EN

Figure 261:

Simplified logic diagram for fuse failure supervision function, Main logic

479 Technical reference manual

Section 11 Secondary system supervision 11.2.3 Function block


SDDRFUF I3P* U3P* BLOCK CBCLOSED MCBOP DISCPOS BLKTRIP BLKZ BLKU 3PH DLD1PH DLD3PH

1MRK505183-UEN C

IEC05000700-2-en.vsd
IEC05000700 V3 EN

Figure 262:

SDDRFUF function block

11.2.4

Input and output signals


Table 285:
Name I3P U3P BLOCK CBCLOSED MCBOP DISCPOS BLKTRIP

SDDRFUF Input signals


Type GROUP SIGNAL GROUP SIGNAL BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Default 0 0 0 0 0 Description Current connection Voltage connection Block of function Active when circuit breaker is closed Active when external MCB opens protected voltage circuit Active when line disconnector is open Blocks operation of function when active

Table 286:
Name BLKZ BLKU 3PH DLD1PH DLD3PH

SDDRFUF Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Start of current and voltage controlled function General start of function Three-phase start of function Dead line condition in at least one phase Dead line condition in all three phases

11.2.5
Table 287:
Name Operation IBase UBase

Setting parameters
SDDRFUF Group settings (basic)
Values (Range) Off On 1 - 99999 0.05 - 2000.00 Unit A kV Step 1 0.05 Default On 3000 400.00 Description Operation Off / On Base current Base voltage

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Values (Range) Off UNsINs UZsIZs UZsIZs OR UNsINs UZsIZs AND UNsINs OptimZsNs 1 - 100 1 - 100 1 - 100 1 - 100 Off On 1 - 100 1 - 100 1 - 100 1 - 100 Off On 1 - 100 1 - 100 1 - 100 Unit Step Default UZsIZs Description Operating mode selection

Name OpMode

3U0> 3I0< 3U2> 3I2< OpDUDI DU> DI< UPh> IPh> SealIn USealln< IDLD< UDLD<

%UB %IB %UB %IB %UB %IB %UB %IB %UB %IB %UB

1 1 1 1 1 1 1 1 1 1 1

30 10 30 10 Off 60 15 70 10 On 70 5 60

Operate level of residual overvoltage element in % of UBase Operate level of residual undercurrent element in % of IBase Operate level of neg seq overvoltage element in % of UBase Operate level of neg seq undercurrent element in % of IBase Operation of change based function Off/ On Operate level of change in phase voltage in % of UBase Operate level of change in phase current in % of IBase Operate level of phase voltage in % of UBase Operate level of phase current in % of IBase Seal in functionality Off/On Operate level of seal-in phase voltage in % of UBase Operate level for open phase current detection in % of IBase Operate level for open phase voltage detection in % of UBase

11.2.6

Technical data
Table 288:
Function Operate voltage, zero sequence Operate current, zero sequence Operate voltage, negative sequence Operate current, negative sequence Operate voltage change level Operate current change level

SDDRFUF technical data


Range or value (1-100)% of UBase (1100)% of IBase (1100)% of UBase (1100)% of IBase (1100)% of UBase (1100)% of IBase Accuracy 1.0% of Ur 1.0% of Ir 1.0% of Ur 1.0% of Ir 5.0% of Ur 5.0% of Ir

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Section 12 Control

Section 12

Control

About this chapter


This chapter describes the control functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

12.1

Synchrocheck, energizing check, and synchronizing SESRSYN


Function description Synchrocheck, energizing check, and synchronizing IEC 61850 identification SESRSYN IEC 60617 identification ANSI/IEEE C37.2 device number 25

sc/vc
SYMBOL-M V1 EN

12.1.1

Introduction
The Synchronizing function allows closing of asynchronous networks at the correct moment including the breaker closing time. The systems can thus be reconnected after an autoreclose or manual closing, which improves the network stability. Synchrocheck, energizing check (SESRSYN) function checks that the voltages on both sides of the circuit breaker are in synchronism, or with at least one side dead to ensure that closing can be done safely. SESRSYN function includes a built-in voltage selection scheme for double bus and 1 breaker or ring busbar arrangements. Manual closing as well as automatic reclosing can be checked by the function and can have different settings. For systems which are running asynchronous a synchronizing function is provided. The main purpose of the synchronizing function is to provide controlled closing of circuit breakers when two asynchronous systems are going to be connected. It is used for slip frequencies that are larger than those for synchrocheck and lower than a set maximum level for the synchronizing function.

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Section 12 Control 12.1.2


12.1.2.1

1MRK505183-UEN C

Principle of operation
Basic functionality
The synchrocheck function measures the conditions across the circuit breaker and compares them to set limits. The output is only given when all measured quantities are simultaneously within their set limits. The energizing check function measures the bus and line voltages and compares them to both high and low threshold detectors. The output is given only when the actual measured quantities match the set conditions. The synchronizing function measures the conditions across the circuit breaker, and also determines the angle change occurring during the closing delay of the circuit breaker, from the measured slip frequency. The output is given only when all measured conditions are simultaneously within their set limits. The issue of the output is timed to give closure at the optimal time including the time for the circuit breaker and the closing circuit. For single circuit breaker and 1 breaker circuit breaker arrangements, the SESRSYN function blocks have the capability to make the necessary voltage selection. For single circuit breaker arrangements, selection of the correct voltage is made using auxiliary contacts of the bus disconnectors. For 1 breaker circuit breaker arrangements, correct voltage selection is made using auxiliary contacts of the bus disconnectors as well as the circuit breakers. The internal logic for each function block as well as, the input and outputs, and the setting parameters with default setting and setting ranges is described in this document. For application related information, please refer to the application manual.

12.1.2.2

Logic diagrams Logic diagrams


The logic diagrams that follow illustrate the main principles of the synchronizing function components such as Synchrocheck, Energizing check and Voltage selection, and are intended to simplify the understanding of the function.

Synchrocheck

The voltage difference, frequency difference and phase angle difference values are measured in the IED centrally and are available for the synchrocheck function for evaluation. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need to be compensated. This is done with a setting, which scales up the line voltage to a level equal to the bus voltage. When the function is set to OperationSC = On, the measuring will start. The function will compare the bus and line voltage values with the set values for UHighBusSC and UHighLineSC.

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Section 12 Control

If both sides are higher than the set values, the measured values are compared with the set values for acceptable frequency, phase angle and voltage difference: FreqDiff, PhaseDiff and UDiff. If a compensation factor is set due to the use of different voltages on the bus and line, the factor is deducted from the line voltage before the comparison of the phase angle values. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and may not exceed the set value. Two sets of settings for frequency difference and phase angle difference are available and used for the manual closing and autoreclose functions respectively, as required. The inputs BLOCK and BLKSC are available for total block of the complete Synchrocheck function and block of the Synchrocheck function respectively. Input TSTSC will allow testing of the function where the fulfilled conditions are connected to a separate test output. The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions match the set conditions for the respective output. The output signal can be delayed independently for MANSYOK and AUTOSYOK conditions. A number of outputs are available as information about fulfilled checking conditions. UOKSC shows that the voltages are high, UDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows when the voltage difference, frequency difference and phase angle difference conditions are met.

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Section 12 Control

1MRK505183-UEN C

Note! Similar logic for Manual Synchrocheck.


OperationSC = On
AND AND

TSTAUTSY

TSTSC BLKSC BLOCK


OR AND AND 0-60 s t tSCA AND

AUTOSYOK

UDiffSC
AND

50 ms t

UHighBusSC UHighLineSC
AND 1

UOKSC UDIFFSC FRDIFFA PHDIFFA UDIFFME FRDIFFME


PHDIFFME

FreqDiffA PhaseDiffA voltageDifferenceValue frequencyDifferenceValue phaseAngleDifferenceValue

1 1

IEC07000114-2-en.vsd
IEC07000114 V2 EN

Figure 263:

Simplified logic diagram for the Synchrocheck function

Synchronizing

When the function is set to OperationSynch = On the measuring will be performed. The function will compare the values for the bus and line voltage with the set values for UHighBusSynch and UHighLineSynch, which is a supervision that the voltages are both live. If both sides are higher than the set values the measured values are compared with the set values for acceptable frequency, rate of change of frequency, phase angle and voltage difference FreqDiffMax, FreqDiffMin and UDiffSynch. Measured frequencies between the settings for the maximum and minimum frequency will initiate the measuring and the evaluation of the angle change to allow operation to be sent in the right moment including the set tBreaker time. There is a phase angle release internally to block any incorrect closing pulses. At operation the SYNOK output will be activated with a pulse tClosePulse and the function reset. The function will also reset if the synchronizing conditions are not fulfilled within the set tMaxSynch time. This prevents that the functions are, by mistake, maintained in operation for a long time, waiting for conditions to be fulfilled.

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Section 12 Control

The inputs BLOCK and BLKSYNCH are available for total block of the complete function respective of the synchronizing part. TSTSYNCH will allow testing of the function where the fulfilled conditions are connected to a separate output.
SYN1 OPERATION SYNCH OFF ON TEST MODE OFF ON
STARTSYN
AND

BLKSYNCH OR

S R

AND

SYNPROGR

UDiffSynch
50 ms

UHighBusSynch UHighLineSynch FreqDiffMax FreqDiffMin

AND

AND

SYNOK

OR AND OR

TSTSYNOK

FreqRateChange fBus&fLine 5 Hz PhaseDiff < 15 deg PhaseDiff=closing angle


AND

AND

tClose Pulse

tMax Synch

SYNFAIL

IEC06000636-2-en.vsd
IEC06000636 V2 EN

Figure 264:

Simplified logic diagram for the synchronizing function

Energizing check

Voltage values are measured in the IED centrally and are available for evaluation by the Energizing check function. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which scales the line voltage to a level equal to the bus voltage. The function measures voltages on the busbar and the line to verify whether they are live or dead. This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for bus energizing and UHighLineEnerg and ULowLineEnerg for line energizing. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and shall not exceed a set value.

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The Energizing direction can be selected individually for the Manual and the Automatic functions respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed independently for MANENOK and AUTOENOK conditions. The Energizing direction can also be selected by an integer input AENMODE respective MENMODE, which for example, can be connected to a Binary to Integer function block (B16I). Integers supplied shall be 1=off, 2=DLLB, 3=DBLL and 4= Both. Not connected input with connection of INTZERO output from Fixed Signals (FIXDSIGN) function block will mean that the setting is done from Parameter Setting tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both. The inputs BLOCK and BLKENERG are available for total block of the complete Synchronizing function respective block of the Energizing check function. TSTENERG will allow testing of the function where the fulfilled conditions are connected to a separate test output.

Voltage selection

The voltage selection module including supervision of included voltage transformer fuses for the different arrangements is a basic part of the Synchronizing function and determines the parameters fed to the Synchronizing, Synchrocheck and Energizing check functions. This includes the selection of the appropriate Line and Bus voltages and fuse supervision. The voltage selection type to be used is set with the parameter CBConfig. If No voltage sel. is set the default voltages used will be ULine1 and UBus1. This is also the case when external voltage selection is provided. Fuse failure supervision for the used inputs must also be connected. The voltage selection function, selected voltages, and fuse conditions are the Synchronizing, Synchrocheck and Energizing check inputs. For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply Disconnector Open and Closed positions but, it is also possible to use an inverter for one of the positions.

Voltage selection for a single circuit breaker with double busbars

This function uses the binary input from the disconnectors auxiliary contacts B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All other combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL respectively indicate the selected Bus voltage. The function checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers. Inputs UB1OK-UB1FF supervise the fuse for Bus 1 and UB2OKUB2FF supervises the fuse for Bus 2. ULN1OK-ULN1FF supervises the fuse for the Line voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively
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Section 12 Control

be used dependent on the available signal. If a fuse-failure is detected in the selected voltage source an output signal USELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK. The function logic diagram is shown in figure 265.
B1QOPEN B1QCLD B2QOPEN B2QCLD
AND AND

B1SEL B2SEL

1
AND

invalidSelection busVoltage

bus1Voltage bus2Voltage

UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF

OR

AND OR AND AND AND

selectedFuseOK USELFAIL

OR

OR

BLOCK

en05000779.vsd
IEC05000779 V1 EN

Figure 265:

Logic diagram for the voltage selection function of a single circuit breaker with double busbars

Voltage selection for a 1 1/2 circuit breaker arrangement

Note that with 1 breaker schemes two Synchrocheck functions must be used in the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus breaker and the Tie breakers is described. This voltage selection function uses the binary inputs from the disconnectors and circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Energizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to the busbar and the other side is connected either to line 1, line 2 or the other busbar depending on the arrangement. Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD, LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors
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Section 12 Control

1MRK505183-UEN C

respectively the Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL will give indication of the selected Line voltage as a reference to the fixed Bus 1 voltage. The fuse supervision is connected to ULNOK-ULNFF, and with alternative Healthy or Failing fuse signals depending on what is available for each of fuse (MCB). The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is connected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus to line, line to bus and line to line. The line 1 voltage is selected if the line 1 disconnector is closed. The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker is closed. The line 2 voltage is selected if the line 2 disconnector is closed. The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 Circuit breaker is closed.

The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-failure is detected in the selected voltage an output signal USELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK. The function block diagram for the voltage selection of a bus circuit breaker is shown in figure 266 and for the tie circuit breaker in figure 267

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Section 12 Control

LN1QOPEN LN1QCLD B1QOPEN B1QCLD LN2QOPEN LN2QCLD B2QOPEN B2QCLD


AND AND AND AND AND OR AND AND

LN1SEL

LN2SEL B2SEL invalidSelection

line1Voltage line2Voltage bus2Voltage UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF


OR OR OR AND AND

lineVoltage

selectedFuseOK USELFAIL

OR

AND

AND

ULN2OK ULN2FF BLOCK

OR

AND

en05000780.vsd
IEC05000780 V1 EN

Figure 266:

Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2 breaker arrangement

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Section 12 Control

1MRK505183-UEN C

LN1QOPEN LN1QCLD
AND

LN1SEL 1 B1SEL
AND

B1QOPEN B1QCLD
AND

AND

line1Voltage bus1Voltage LN2QOPEN LN2QCLD


AND

busVoltage

LN2SEL 1 B2SEL
AND OR

B2QOPEN B2QCLD
AND

invalidSelection

AND

line2Voltage bus2Voltage UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF BLOCK

lineVoltage

OR

AND OR AND

OR

AND

selectedFuseOK USELFAIL

OR

AND

AND

OR

AND

en05000781.vsd
IEC05000781 V1 EN

Figure 267:

Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2 breaker arrangement.

Fuse failure supervision

External fuse failure signals or signals from a tripped fuse switch/MCB are connected to binary inputs that are configured to the inputs of the synchronizing functions in the IED. Alternatively, the internal signals from fuse failure supervision can be used when available. There are two alternative connection possibilities. Inputs labelled OK must be connected if the available contact indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if the available contact indicates that the voltage circuit is faulty.
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Section 12 Control

The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage and the ULN1OK/ULN2OK and ULN1FF/ULN2FF inputs are related to the line voltage. Configure them to the binary input or function outputs that indicate the status of the external fuse failure of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are blocked. The synchronizing and the synchrocheck function requires full voltage on both sides and will be blocked automatically in the event of fuse failures.

12.1.3

Function block
SESRSYN U3PBB1* SYNOK U3PBB2* AUTOSYOK U3PLN1* AUTOENOK U3PLN2* MANSYOK BLOCK MANENOK BLKSYNCH TSTSYNOK BLKSC TSTAUTSY BLKENERG TSTMANSY B1QOPEN TSTENOK B1QCLD USELFAIL B2QOPEN B1SEL B2QCLD B2SEL LN1QOPEN LN1SEL LN1QCLD LN2SEL LN2QOPEN SYNPROGR LN2QCLD SYNFAIL UB1OK UOKSYN UB1FF UDIFFSYN UB2OK FRDIFSYN UB2FF FRDIFFOK ULN1OK FRDERIVA ULN1FF UOKSC ULN2OK UDIFFSC ULN2FF FRDIFFA STARTSYN PHDIFFA TSTSYNCH FRDIFFM TSTSC PHDIFFM TSTENERG UDIFFME AENMODE FRDIFFME MENMODE PHDIFFME MODEAEN MODEMEN IEC06000534-2-en.vsd
IEC06000534 V2 EN

Figure 268:

SESRSYN function block

12.1.4

Input and output signals


Table 289:
Name U3PBB1 U3PBB2 U3PLN1 U3PLN2

SESRSYN Input signals


Type GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL GROUP SIGNAL Default Description Group signal for voltage input busbar 1 Group signal for voltage input busbar 2 Group signal for voltage input line 1 Group signal for voltage input line 2

Table continues on next page

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Section 12 Control
Name BLOCK BLKSYNCH BLKSC BLKENERG B1QOPEN B1QCLD B2QOPEN B2QCLD LN1QOPEN LN1QCLD LN2QOPEN LN2QCLD UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF STARTSYN TSTSYNCH TSTSC TSTENERG AENMODE MENMODE Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN INTEGER INTEGER Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Description General block Block synchronizing Block synchro check Block energizing check

1MRK505183-UEN C

Open status for CB or disconnector connected to bus1 Close status for CB or disconnector connected to bus1 Open status for CB or disconnector connected to bus2 Close status for CB or disconnector connected to bus2 Open status for CB or disconnector connected to line1 Close status for CB or disconnector connected to line1 Open status for CB or disconnector connected to line2 Close status for CB or disconnector connected to line2 Bus1 voltage transformer OK Bus1 voltage transformer fuse failure Bus2 voltage transformer OK Bus2 voltage transformer fuse failure Line1 voltage transformer OK Line1 voltage transformer fuse failure Line2 voltage transformer OK Line2 voltage transformer fuse failure Start synchronizing Set synchronizing in test mode Set synchro check in test mode Set energizing check in test mode Input for setting of automatic energizing mode Input for setting of manual energizing mode

Table 290:
Name SYNOK AUTOSYOK AUTOENOK MANSYOK MANENOK

SESRSYN Output signals


Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN Description Synchronizing OK output Auto synchro check OK Automatic energizing check OK Manual synchro check OK Manual energizing check OK

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Section 12 Control
Name TSTSYNOK TSTAUTSY TSTMANSY TSTENOK USELFAIL B1SEL B2SEL LN1SEL LN2SEL SYNPROGR SYNFAIL UOKSYN UDIFFSYN FRDIFSYN FRDIFFOK FRDERIVA UOKSC UDIFFSC FRDIFFA PHDIFFA FRDIFFM PHDIFFM UDIFFME FRDIFFME PHDIFFME MODEAEN MODEMEN Type BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN BOOLEAN REAL REAL REAL INTEGER INTEGER Description Synchronizing OK test output Auto synchro check OK test output Manual synchro check OK test output Energizing check OK test output Selected voltage transformer fuse failed Bus1 selected Bus2 selected Line1 selected Line2 selected Synchronizing in progress Synchronizing failed Voltage amplitudes for synchronizing above set limits Voltage difference out of limit for synchronizing Frequency difference out of limit for synchronizing Frequency difference in band for synchronizing Frequency derivative out of limit for synchronizing Voltage amplitudes above set limits Voltage difference out of limit Frequency difference out of limit for Auto operation Phase angle difference out of limit for Auto operation Frequency difference out of limit for Manual operation Phase angle difference out of limit for Manual Operation Calculated difference in voltage Calculated difference in frequency Calculated difference of phase angle Selected mode for automatic energizing Selected mode for manual energizing

495 Technical reference manual

Section 12 Control 12.1.5


Table 291:
Name Operation SelPhaseBus1

1MRK505183-UEN C

Setting parameters
SESRSYN Group settings (basic)
Values (Range) Off On phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 No voltage sel. Double bus 1 1/2 bus CB 1 1/2 bus alt. CB Tie CB 0.001 - 9999.999 -180 - 180 0.040 - 25.000 Off On 50.0 - 120.0 50.0 - 120.0 2.0 - 50.0 0.003 - 0.250 0.050 - 0.250 0.000 - 0.500 0.000 - 60.000 Unit Step Default Off phase2 Description Operation Off / On Select phase for bus1

SelPhaseBus2

phase2

Select phase for bus2

SelPhaseLine1

phase2

Select phase for line1

SelPhaseLine2

phase2

Select phase for line2

CBConfig

No voltage sel.

Select CB configuration

UBase PhaseShift URatio OperationSynch UHighBusSynch UHighLineSynch UDiffSynch FreqDiffMin FreqDiffMax FreqRateChange tBreaker

kV Deg %UB %UB %UB Hz Hz Hz/s s

0.001 5 0.001 1.0 1.0 1.0 0.001 0.001 0.001 0.001

400.000 0 1.000 Off 80.0 80.0 10.0 0.010 0.200 0.300 0.080

Base voltage in kV Phase shift Voltage ratio Operation for synchronizing function Off/ On Voltage high limit bus for synchronizing in % of UBase Voltage high limit line for synchronizing in % of UBase Voltage difference limit for synchronizing in % of UBase Minimum frequency difference limit for synchronizing Maximum frequency difference limit for synchronizing Maximum allowed frequency rate of change Closing time of the breaker

Table continues on next page 496 Technical reference manual

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Section 12 Control
Values (Range) 0.050 - 60.000 0.00 - 6000.00 0.000 - 60.000 Off On 50.0 - 120.0 50.0 - 120.0 2.0 - 50.0 0.003 - 1.000 0.003 - 1.000 5.0 - 90.0 5.0 - 90.0 0.000 - 60.000 0.000 - 60.000 Off DLLB DBLL Both Off DLLB DBLL Both Off On 50.0 - 120.0 50.0 - 120.0 10.0 - 80.0 10.0 - 80.0 50.0 - 180.0 0.000 - 60.000 0.000 - 60.000 Unit s s s %UB %UB %UB Hz Hz Deg Deg s s Step 0.001 0.01 0.001 1.0 1.0 1.0 0.001 0.001 1.0 1.0 0.001 0.001 Default 0.200 600.00 2.000 On 80.0 80.0 15.0 0.010 0.010 25.0 25.0 0.100 0.100 DBLL Description Breaker closing pulse duration Resets synch if no close has been made before set time Minimum time to accept synchronizing conditions Operation for synchronism check function Off/On Voltage high limit bus for synchrocheck in % of UBase Voltage high limit line for synchrocheck in % of UBase Voltage difference limit in % of UBase Frequency difference limit between bus and line Auto Frequency difference limit between bus and line Manual Phase angle difference limit between bus and line Auto Phase angle difference limit between bus and line Manual Time delay output for synchrocheck Auto Time delay output for synchrocheck Manual Automatic energizing check mode

Name tClosePulse tMaxSynch tMinSynch OperationSC UHighBusSC UHighLineSC UDiffSC FreqDiffA FreqDiffM PhaseDiffA PhaseDiffM tSCA tSCM AutoEnerg

ManEnerg

Both

Manual energizing check mode

ManEnergDBDL UHighBusEnerg UHighLineEnerg ULowBusEnerg ULowLineEnerg UMaxEnerg tAutoEnerg tManEnerg

%UB %UB %UB %UB %UB s s

1.0 1.0 1.0 1.0 1.0 0.001 0.001

Off 80.0 80.0 40.0 40.0 115.0 0.100 0.100

Manual dead bus, dead line energizing Voltage high limit bus for energizing check in % of UBase Voltage high limit line for energizing check in % of UBase Voltage low limit bus for energizing check in % of UBase Voltage low limit line for energizing check in % of UBase Maximum voltage for energizing in % of UBase Time delay for automatic energizing check Time delay for manual energizing check

497 Technical reference manual

Section 12 Control 12.1.6 Technical data


Table 292:
Function Phase shift, jline - jbus Voltage ratio, Ubus/Uline Voltage high limit for synchronizing and synchrocheck Reset ratio, synchrocheck Frequency difference limit between bus and line Phase angle difference limit between bus and line Voltage difference limit between bus and line Time delay output for synchrocheck Voltage high limit for energizing check Reset ratio, voltage high limit Voltage low limit for energizing check Reset ratio, voltage low limit Maximum voltage for energizing Time delay for energizing check Operate time for synchrocheck function Operate time for energizing function

1MRK505183-UEN C

SESRSYN technical data


Range or value (-180 to 180) degrees (0.40-25.000) % of UBase (50.0-120.0)% of UBase Accuracy 1.0% of Ur at U Ur 1.0% of U at U >Ur 2.0 mHz 2.0 degrees 1.0% of Ur 0.5% 10 ms 1.0% of Ur at U Ur 1.0% of U at U >Ur 1.0% of Ur 1.0% of Ur at U Ur 1.0% of U at U >Ur 0.5% 10 ms -

> 95% (0.003-1.000) Hz (5.0-90.0) degrees (2.0-50.0)% of UBase (0.000-60.000) s (50.0-120.0)% of UBase > 95% (10.0-80.0)% of UBase < 105% (50.0-180.0)% of UBase (0.000-60.000) s 160 ms typically 80 ms typically

12.2

Autorecloser SMBRREC
Function Description Autorecloser IEC 61850 identification SMBRREC IEC 60617 identification ANSI/IEEE C37.2 device number 79

O->I
SYMBOL-L V1 EN

498 Technical reference manual

1MRK505183-UEN C

Section 12 Control Introduction


The autorecloser (SMBRREC) function provides high-speed and/or delayed autoreclosing for single or multi-breaker applications. Up to five reclosing attempts can be programmed. The first attempt can be single-, two and/or three phase for single phase or multi-phase faults respectively. Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit allows one circuit breaker to close first and the second will only close if the fault proved to be transient. Each autoreclosing function can be configured to co-operate with a synchrocheck function.

12.2.1

12.2.2
12.2.2.1

Principle of operation
Logic Diagrams
The logic diagrams below illustrate the principles applicable in the understanding of the functionality.

12.2.2.2

Auto-reclosing operation Off and On


Operation of the automatic reclosing can be set to Off or On via the setting parameters and through external control. With the setting Operation = On, the function is activated while with the setting Operation = Off the function is deactivated. With the setting Operation = External ctrl, the activation/deactivation is made by input signal pulses, for example, from a control system. When the function is set On and is operative the output SETON is activated (high). Other input conditions such as CBPOS and CBREADY must also be fulfilled. At this point the automatic recloser is prepared to start the reclosing cycle and the output signal READY on the SMBRREC function block is activated (high).

12.2.2.3

Auto-reclosing mode selection


The Auto-reclosing mode is selected with setting ARMode = 3phase(0), 1/2/3ph(1), 1/2ph(2), 1ph+1*2ph(3), 1/2ph+1*3ph(4), 1ph+1*2/3ph(5). The selected mode can be read as integer as per above list on output MODE. As an alternative to setting the mode can be selected by connecting an integer, for example from function block B16I to input MODEINT. Following integers shall be used: 1=3phase, 2=1/2/3ph, 3=1/2ph, 4=1ph+1*2ph, 5=1/2ph+1*3ph or 6=1ph+1*2/3ph. When INTZERO from Fixed signal function block is connected to the input MODEINT the parameter setting selected will be valid.
499

Technical reference manual

Section 12 Control
12.2.2.4

1MRK505183-UEN C

Start auto-reclosing and conditions for start of a reclosing cycle


The usual way in which to start a reclosing cycle, or sequence, is to start it when a line protection tripping has occurred, by applying a signal to the START input. It should be necessary to adjust three-phase auto-reclosing open time, (dead time) for different power system configurations or during tripping at different protection stages, the input STARTHS (start high-speed reclosing) can also be used. For a new auto-reclosing cycle to be started, a number of conditions need to be met. They are linked to dedicated inputs. The inputs are: CBREADY: CB ready for a reclosing cycle, for example, charged operating gear CBPOS: to ensure that the CB was closed when the line fault occurred and start was applied No blocking or inhibit signal shall be present.

After the start has been accepted, it is latched in and an internal signal Started is set. It can be interrupted by certain events, like an inhibit signal. To start auto-reclosing by CB position Open instead of from protection trip signals, one has to configure the CB Open position signal to inputs CBPOS and START and set a parameter StartByCBOpen = On and CBAuxContType = NormClosed (normally closed). One also has to configure and connect signals from manual trip commands to input INHIBIT. The logic for switching the auto-recloser On/Off and the starting of the reclosing is shown in figure 269. The following should be considered: Setting Operation can be set to Off, External ctrl or On. External ctrl offers the possibility of switching by external switches to inputs ON and OFF, communication commands to the same inputs, and so on. SMBRREC is normally started by tripping. It is either a Zone 1 and Communication aided trip, or a general trip. If the general trip is used the function must be blocked from all back-up tripping connected to INHIBIT. In both alternatives the breaker failure function must be connected to inhibit the function. START makes a first attempt with synchrocheck, STARTHS makes its first attempt without synchrocheck. TRSOTF starts shots 2-5. Circuit breaker checks that the breaker was closed for a certain length of time before the starting occurred and that the CB has sufficient stored energy to perform an auto-reclosing sequence and is connected to inputs CBPOS and CBREADY.

500 Technical reference manual

1MRK505183-UEN C

Section 12 Control

Operation:On Operation:Off Operation:External Ctrl ON OFF START STARTHS autoInitiate TRSOTF CBREADY CBPOS Additional conditions AND start AND tCBClosedMin t AND Blocking conditions Inhibit condistions count 0
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