Vous êtes sur la page 1sur 12

UTRON

Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM


GENERAL DESCRIPTION
The UT62256C is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62256C is designed for high-speed and low power application. It is particularly well suited for battery back-up nonvolatile memory application. The UT62256C operates from a single 5V power supply and all inputs and outputs are fully TTL compatible

UT62256C

FEATURES
Access time : 35/70ns (max.) Low power consumption: Operating : 40/30 mA (typical.) Standby : 3mA (typical) normal 2uA (typical) L-version 1uA (typical) LL-version Single 5V power supply All inputs and outputs are TTL compatible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mmx13.4mm STSOP

FUNCTIONAL BLOCK DIAGRAM


A4 A3 A14 A13 A12 A7 A6 A5 A8
ROW DECODER

PIN CONFIGURATION
A14 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Vcc
WE

. . .
MEMORY ARRAY 512 ROW 512 COLUMNS S

A7

A13 A8 A9 A11
OE

VCC VSS

A6 A5 A4 A3 A2 A1 A0 I/O1

UT62256C

A10
CE

I/O8 I/O7 I/O6 I/O5 I/O4

.
I/O1 . . I/O8

. .
COLUMN I/O

I/O2 I/O3 Vss

. . .

I/O CONTROL

. . .

COLUMN DECODER LOGIC CONTROL

PDIP/SOP
OE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 A10

CE WE OE

A10 A9 A11 A2 A1 A0

A11 A9 A8 A13

CE
I/O8 I/O7 I/O6 I/O5 I/O4 Vss I/O3 I/O2 I/O1 A0 A1 A2

PIN DESCRIPTION
SYMBOL A0 - A14 I/O1 - I/O8 CE
WE OE VCC VSS

WE

DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Power Supply Ground

Vcc A14 A12 A7 A6 A5 A4 A3

UT62256C

22 21 20 19 18 17 16 15

STSOP

____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

ABSOLUTE MAXIMUM RATINGS*


PARAMETER Terminal Voltage with Respect to VSS Operating Temperature Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec0 SYMBOL VTERM TA TSTG PD IOUT Tsolder RATING -0.5 to +7.0 0 to +70 -65 to +150 1 50 260 UNIT V W mA

*Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

TRUTH TABLE
MODE Standby Output Disable Read Write
Note: H = VIH, L=VIL, X = Don't care.

CE H L L L

OE X H L X

WE X H H L

I/O OPERATION High - Z High - Z DOUT DIN

SUPPLY CURRENT ISB, ISB1 ICC ICC ICC

DC ELECTRICAL CHARACTERISTICS (VCC = 5V10%, TA = 0 to 70)


PARAMETER SYMBOL Input High Voltage VIH Input Low Voltage VIL Input Leakage Current ILI Output Leakage ILO Current Output High Voltage Output Low Voltage Operating Power Supply Current VOH VOL ICC ICC1 ICC2 Standby Power Supply Current ISB ISB1 ISB ISB1 TEST CONDITION MIN. TYP. MAX. UNIT 2.2 VCC+0.5 V - 0.5 0.8 V -1 1 A -1 1 A

VSS VIN VCC VSS VI/O VCC CE =VIH or OE = VIH or WE = VIL IOH= - 1mA IOL= 4mA - 35 CE = VIL , II/O = 0mA ,Cycle=Min. - 70 CE = 0.2V; II/O = 0mA Tcycle other pins at 0.2V or =500ns Tcycle VCC-0.2V =1ms normal CE =VIH CE VCC-0.2V CE =VIH CE VCC-0.2V -L/-LL -L -LL

2.4 -

40 30 1 0.3 2 1

0.4 50 40 20 10 10 5 3 100 50

V V mA mA mA mA mA mA mA A A

____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

CAPACITANCE (TA=25, f=1.0MHz)


PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN.

MAX 8 10

UNIT pF pF

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS
Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 5ns 1.5V CL = 100pF, IOH/IOL = -1mA/4mA

AC ELECTRICAL CHARACTERISTICS (VCC = 5V10% , TA = 0 to 70)


(1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z SYMBOL UT62256C-35
MIN. MAX.

UT62256C-70
MIN. MAX.

UNIT

tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH


SYMBOL

35 10 5 5

35 35 25 25 25 -

70 10 5 5

70 70 35 35 35 -

ns ns ns ns ns ns ns ns ns
UNIT

UT62256C-35
MIN. MAX.

UT62256C-70
MIN. MAX.

tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ*

35 30 30 0 25 0 20 0 5 -

15

70 60 60 0 50 0 30 0 5 -

25

ns ns ns ns ns ns ns ns ns ns

*These parameters are guaranteed by device characterization, but not production tested.

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled)
(1,2,4)
tRC

Address

tAA tOH tOH

DOUT

Data Valid

READ CYCLE 2 ( CE and OE Controlled) (1,3,5,6)


tRC Address tAA
CE

tACE
OE

tOE tCLZ DOUT tOLZ High-z

tCHZ tOHZ tOH Data valid High-Z

Notes : 1.

WE is HIGH for read cycle.

2. Device is continuously selected CE =VIL. 3. Address must be valid prior to or coincident with CE transition; otherwise tAA is the limiting parameter. 4. OE is LOW. 5. tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured 500mV from steady state. 6. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ.

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

WRITE CYCLE 1 ( WE Controlled) (1,2,3,5)


tWC Address tAW
CE

tAS
WE

tCW

tWP

tWR

tWHZ DOUT

High-Z

tOW (4)

(4)
tDW tDH Data Valid

DIN

WRITE CYCLE 2 ( CE Controlled) (1,2,5)


tWC Address tAW
CE

tAS

tCW tWP

tWR

WE

tWHZ DOUT
High-Z

(4) tDW tDH

DIN Data Valid


Notes : 1.

WE or CE must be HIGH during all address transitions.

2. A write occurs during the overlap of a low CE and a low WE . 3. During a WE controlled with write cycle with OE LOW, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4. During this period, I/O pins are in the output state, and input signals must not be applied.

5. If the CE LOW transition occurs simultaneously with or after WE outputs remain in a high impedance state.
6. tOW and tWHZ are specified with CL = 5pF.

LOW

transition, the

Transition is measured 500mV from steady state.

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

DATA RETENTION CHARACTERISTICS (TA = 0 to 70)


PARAMETER Vcc for Data Retention Data Retention Current Chip Disable to Data Retention Time Recovery Time tRC* = Read Cycle Time SYMBOL TEST CONDITION VDR CE VCC-0.2V IDR Vcc=3V tCDR tR CE VCC-0.2V See Data Retention Waveforms (below) MIN. TYP. MAX. UNIT 2.0 5.5 V -L - LL 0 tRC* 1 0.5 50 20 A A ns ns

DATA RETENTION WAVEFORM


Data Retention Mode

VCC
4.5V VDR 2V
CE

4.5V tR

tCDR

VSS

CE

VCC -0.2V

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

PACKAGE OUTLINE DIMENSION


28 pin 600 mil PDIP PACKAGE OUTLINE DIMENSION

UNIT
SYMBOL

A1 A2 B B1 c D E E1 e eB L S Q1

INCH(BASE) 0.010 (MIN) 0.1500.005 0.020 (MAX) 0.055 (MAX) 0.012 (MAX) 1.430 (MAX) 0.6 (TYP) 0.52 (MAX) 0.100 (TYP) 0.625 (MAX) 0.180(MAX) 0.06 (MAX) 0.08(MAX) o 15 (MAX)

MM(REF) 0.254 (MIN) 3.8100.127 0.508(MAX) 1.397(MAX) 0.304 (MAX) 36.322 (MAX) 15.24 (TYP) 13.208 (MAX) 2.540(TYP) 15.87 (MAX) 4.572(MAX) 1.524 (MAX) 2.032(MAX) o 15 (MAX)

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

28 pin 330 mil SOP PACKAGE OUTLINE DIMENSION

UNIT
SYMBOL

A A1 A2 b c D E E1 e L L1 S y

INCH(BASE) 0.120 (MAX) 0.002(MIN) 0.0980.005 0.0016 (TYP) 0.010 (TYP) 0.728 (MAX) 0.340 (MAX) 0.4650.012 0.050 (TYP) 0.05 (MAX) 0.0670.008 0.047 (MAX) 0.003(MAX) o o 0 10

MM(REF) 3.048 (MAX) 0.05(MIN) 2.4890.127 0.406(TYP) 0.254(TYP) 18.491 (MAX) 8.636 (MAX) 11.8110.305 1.270(TYP) 1.270 (MAX) 1.702 0.203 1.194 (MAX) 0.076(MAX) o o 0 10

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

28 pin 8x13.4mm STSOP PACKAGE OUTLINE DIMENSION

UNIT
SYMBOL

Note E dimension is not including end flash the total of both sides end flash is not above 0.3mm.
2

2 5

A A1 A2 b c Db E e D L L1 y

INCH(BASE) 0.047 (MAX) 0.0040.002 0.0390.002 0.006 (TYP) 0.010 (TYP) 0.4650.004 0.3150.004 0.022 (TYP) 0.5280.008 0.0200.004 0.03150.004 0.08(MAX) o o 0 5

MM(REF) 1.20 (MAX) 0.100.05 1.000.05 0.15(TYP) 0.254(TYP) 11.800.10 8.000.10 0.55(TYP) 13.400.20 0.500.10 0.800.10 0.003(MAX) o o 0 5

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

ORDERING INFORMATION
PART NO. UT62256CPC-70 UT62256CPC-70L UT62256CPC-70LL UT62256CSC-35 UT62256CSC-35L UT62256CSC-35LL UT62256CSC-70 UT62256CSC-70L UT62256CSC-70LL UT62256CLS-35L UT62256CLS-35LL UT62256CLS-70L UT62256CLS-70LL ACCESS TIME (ns) 70 70 70 35 35 35 70 70 70 35 35 70 70 STANDBY CURRENT (A) 5 mA 100 A 40 A 5 mA 100 A 40 A 5 mA 100 A 40 A 100 A 50 A 100 A 40 A PACKAGE 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN STSOP 28PIN STSOP 28PIN STSOP 28PIN STSOP

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

10

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

REVISION HISTORY
REVISION REV. 0.9 REV. 1.0 DESCRIPTION 1. Original. 1. The test condition of ICC1 and ICC2 have been revised. 2. The symbols CE#,OE# and WE# are revised as
CE , OE and WE 3. The ordering information of PACKAGE ,STSOP-1 is revised as STSOP.

DATE Apr. 26,2001 MAY. 14,2001

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

11

UTRON
Rev. 1.0

32K X 8 BIT LOW POWER CMOS SRAM

UT62256C

THIS PAGE IS LEFT BLANK INTENTIONALLY.

_____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

12