EPE 2007 Aalborg, Denmark, 2 5 September 2007 ________________________________________________________________________

Superjunction devices & technologies Benefits and Limitations of a revolutionary step in power electronics
Dr. Gerald Deboy1 & Dr. Florin Udrea2 1. Infineon Technologies Austria AG, Siemensstr. 2, 9500 Villach / Austria Gerald.Deboy@infineon.com, tel. 43 51777 3541, fax 43 51777 3515 2. Engineering Department, University of Cambridge, Cambridge CB2 1PZ, UK fu@eng.cam.ac.uk, tel: 44 1223 74319, fax: 44 1223 748348

SCOPE AND BENEFITS

Superjunction has arguably been the most creative and important concept in power device field since the introduction of the IGBT in 1980s. It is the only concept known today that has challenged and ultimately proved wrong the well-known theoretical study on the limit of silicon in high voltage devices. What makes superjunction devices unique and makes them first choice in some market places but unattractive in others? What can we expect from superjunction device concepts in terms of moving the boundaries in power electronics? The tutorial will answer these questions based on a detailed view on all aspects of superjunction devices and technologies. We will walk you through fundamental physics to technological challenges and through SJ unique device characteristics to sophisticated application guide lines. The device concept will be compared to other methods of enhancing the conductivity of power devices to derive the characteristic set of benefits and limitations of superjunction devices. Several examples from major application fields such as lighting, power conversion and renewable energy will make the presentation beneficial for a wide audience.

CONTENTS
The concept of superjunction devices was invented at the beginning of 80s, but its technological realization took place only one decade ago. Commercial products and numerous publications fill today the market place. This is a perfect time to review, analyze and forecast the future of superjunction devices and technologies. The tutorial will also explore the technological hurdles and application barriers that need to be overcome to allow a beneficial use of this still controversially disputed device concept with respect to economic and environmental needs. Device concept and characteristics The drift region of superjunction device is formed of multiple, alternate n and p semiconductor stripes. Provided that the stripes are fairly narrow and the net doping in both stripes is approximately equal, it is possible to deplete the stripes at relatively low voltages. Upon depletion, the stripes appear to be an 'intrinsic' layer and a near uniform electric field distribution is achieved, resulting in a high breakdown voltage. Lateral SJ devices ( Fig 1 a &b) or Vertical devices ( Fig 1 c &d) can be manufactured using the SJ concept. While the former tend to be more suitable for integration, the latter could be used for discrete devices.

Tutorial: Superjunction devices & technologies Benefits and Limitations of a revolutionary step in power electronics

EPE 2007 Aalborg, Denmark, 2 5 September 2007 ________________________________________________________________________

(a)

(b)

Fig. 1 Schematic device structures incorporating the Super-Junction/3D-RESURF junction into the drift region. (a) vertically stacked stripes in lateral configuration, (b) stripes arranged in the third dimension 3D Resurf in lateral configuration, (c) and (d) are arrangements suitable for vertical MOSFETs (Cool MOS, MDMesh)

(c)

(d)

The most striking feature of all superjunction devices is its capability to break the limit line of silicon being imposed on conventional devices. This limit is based on the need to serve with one degree of freedom namely the doping profile of the n-region the conflicting goals of high break down voltage and ow on-state-resistance. Superjunction devices add due to their internal structure a second degree of freedom namely the design and pitch of the additional p-columns. The former vertical electric field is transformed into a three dimensional vectorial field with the at least theoretical capability to continuously reduce the RDSon by making the pitch of the p-columns smaller and smaller. What further device characteristics will be affected by this internal structure? What about switching speed, ruggedness, compatibility with electromagnetic irradiation? The first parameter catching the eye when analyzing datasheets of SJ devices is the strong non-linear capacitances. Whereas the input capacitance stays largely unchanged (getting however smaller in value due to the enormous chip shrink potential of the concept), the reverse capacitance and the output capacitance both become strongly non-linear. This effect is directly derived from the device concept where the expansion of the space charge layer now follows the intrinsic p/n-pattern and hence depletes the active area of the device at a much earlier stage than usual. This feature has two direct impacts on the application: the large value of the output capacitance at low voltage is observed as a kind of additional turn off delay time, which may become unusually long at low current levels as being typical in high line and / or low load conditions; the very small values at high voltage will allow an extremely fast dv/dt and di/dt. This high switching speed is naturally good to reduce the switching losses, SJ devices can touch the absolute physical limit of the switching losses, which is given by the energy stored in the output capacitance. On the other hand working in this domain makes dv/dt a linear function of load current and may lead to dv/dt values double or triple the values being common today. Therefore control of the maximum switching speed is a must during design-in of the device.

Tutorial: Superjunction devices & technologies Benefits and Limitations of a revolutionary step in power electronics

EPE 2007 Aalborg, Denmark, 2 5 September 2007 ________________________________________________________________________ Technology and Challenges
Reviewing the latest publications we can see that the quest for the lowest specific on-resistance is gaining momentum with special focus on 200 V and 600 V devices. The achieved RDSon*A is considered as the key performance indicator in all of these publications. Undisputed best-in-class performance in a given package format will benefit from a very low specific on-state resistance and so will cost of production for a given RDSon type. Furthermore the most stringent technological hurdles such as charge compensation and process tolerances have to be solved in a satisfactory manner to reach the proposed values. Fig. 2, below gives an overview.

S u p e r-ju n ctio n M O S F E T (L ow V o ltag e an d H ig h Vo lta ge)

1000 H ig h V oltag e V ertical S j ti L ateral S u p erju n ctio n

100 L ow V o ltag e V ertical S j ti

10

0.1 10 100 B reakd o w n V o ltag e (V )

S i Lim it P h ilips '02 M itsu bishi '0 0 Fu ji E lectric '0 5 T oshib a '0 6 Fu ji E lectric '0 6 T ak a ya '0 5 V e rtical R E S U R F M O S FE T , IS P S D 04 U nbala nced S J, U drea F. ' D ens o '0 6 S hind en gen '0 3 Infin eo n '0 5 T oshib a '0 4 T o yota '0 4 S upe r 3D M O S F E T (D en so '06 ) U M O S FE T , M iura '0 5 Lateral S up e rjunction (Infin eo n '0 6)

1000

Fig.2 Specific Ron resistance in [mcm2] function of breakdown voltage [V] for different superjunction technologies

Outlook and Challenges from the system point-of-view

SJ devices will continue to lead the path to lower specific on-resistance with accompanying progress on the basic technologies required to achieve this performance. Already today the latest generation of SJ devices can be driven at the limit of switching losses, so now further progress to be expected here, to realize the limit losses will however require higher and higher dv/dt as the output capacitance becomes more and more non-linear with extremely low values at elevated voltage levels. Layout and packaging techniques have therefore to allow double or triple the dv/dt values used today in practical designs. The question of parasitic board capacitances and inductances hence becomes crucial for the applicability of these modern devices. Ruggedness will stay on the high level being achieved today but will go down in energy related parameters such as total avalanche energy or single pulse SOA values. Other uses of superjunction concept The tutorial will also discuss the application of superjunction concept to power ICs, bipolar devices and terminations. Integrated lateral superjunction is now considered as a very low loss alternative to the Single, Double RESURF or even quasi-vertical devices. The on-state resistance in lateral super junction devices varies with the Vbr2 well below that of single RESURF or double RESURF ( where the power coeeficient is in excess of 2.3). However the charge balance in lateral devices is not straightforward as the substrate effect cannot be neglected. Therefore a dynamic balance of
Tutorial: Superjunction devices & technologies Benefits and Limitations of a revolutionary step in power electronics

EPE 2007 Aalborg, Denmark, 2 5 September 2007 ________________________________________________________________________

charge has to be taken into account. The tutorial covers in detail the design considerations for integrating a superjunction in high voltage IC process.

Schedule is as follows: Sunday, September 2nd - Tutorial day (Location to be advised)

08:00 - 09:00 09:00 09:30 09:30 - 10:10 10.10 - 10:50 10:50 - 11:10 11:10 - 11:50 11:50 - 12:20 12.20- 12.50 Registration for Tutorials Superjunction concept and modelling Superjunction devices static and dynamic characteristics/features and drawbacks Superjunction technologies challenges and limits Coffee break Integrated Superjunction the next generation of smart power and high voltage ICs Other forms and uses of superjunctions
Outlook and Challenges from System point of view

WHO SHOULD ATTEND

The tutorial should appeal to designers researchers and process engineers in the field of power devices, power ICs or high voltage technologies as well as product and application engineers in power management, power supplies, lighting, motor control etc. The content of the course is also highly suitable for academics and postgraduate students from universities or power electronics researchers from research institutes.

ABOUT THE INSTRUCTORS

Dr. Gerald Deboy is heading the Technical Marketing Department for power devices within the Automotive and Industrial Division of Infineon Technologies AG. He has a background of more than 15 years in research and application of power devices. Dr. Deboy has published more than 60 papers in journals and international conferences including three book contributions and holds 28 patents in power semiconductor devices. He pioneered research work on superjunction devices and brought the concept to commercial market introduction. His current work and research interest is focused on the application of power devices. Dr. Deboy is a Senoir member of the IEEE.

Dr. Florin Udrea is a reader in Engineering Department at Cambridge University working in the field of power electronics. Dr. Udrea has published over 200 papers in journals and international conferences and holds 22 patents in power semiconductor devices and sensors. Currently Dr. Udrea is leading a research group in power semiconductor devices and solid-state sensors, which has won during the last 10 years an international reputation. He pioneered work on lateral superjunction for power ICs. In August 2000 Dr Udrea co-founded with Prof. Gehan Amaratunga, Cambridge Semiconductor (Camsemi), a start-up company in the field of power integrated circuits. Dr. Udrea is currently a technical director in this company.

Tutorial: Superjunction devices & technologies Benefits and Limitations of a revolutionary step in power electronics

EPE 2007 Aalborg, Denmark, 2 5 September 2007 ________________________________________________________________________

References
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Tutorial: Superjunction devices & technologies Benefits and Limitations of a revolutionary step in power electronics