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Analysis and Design of a Low-Stress Buck-Boost Converter in Universal-Input PFC Applications

Jingquan Chen, Member, IEEE, Dragan Maksimovic, Member, IEEE, and Robert W. Erickson, Fellow, IEEE
AbstractIn converters for power-factor-correction (PFC), the universal-input capability, i.e., the ability to operate from any ac line voltage world-wide, comes with a heavy penalty in terms of component stresses and losses, and with restrictions on the dc output voltage. In this paper, we propose a new two-switch topology, boost-interleaved buck-boost (BoIBB) converter, which can offer signicant performance improvements over single-switch buck-boost converters (including yback, SEPIC, or Cuk topologies) or other two-switch buck-boost converters in universal-input PFC applications. The paper presents an analysis of the converter operation and component stresses, as well as design guidelines. High efciency (over 93%) throughout the universal-input ac line voltage range is demonstrated on an experimental 100-W, 200-V dc output, universal-input BOIBB PFC rectier. Index TermsBoost-interleaved buck-boost (BoIBB) converter, power-factor-correction (PFC), root-mean-square (RMS).

I. INTRODUCTION

T is well known that the boost converter topology is highly effective in power factor correction (PFC) rectier applications, provided that the dc output voltage is close to, but slightly greater than, the peak ac line voltage [1]. In universal-input applications, with the root-mean-square (RMS) input line voltage in the 90260 V range, the output voltage of the boost converter has to be set to about 400 V. At low line (90 V ), the switch conduction losses are high because the input RMS current has the largest value, and because the largest step-up conversion is required. The inductor has to be oversized for the large RMS current at low line input, and for the highest voltseconds applied throughout the input-line range. As a result, a boost converter designed for universal-input PFC applications is heavily oversized compared to a converter designed for a narrow range of input ac line voltages. Furthermore, because of the large energy storage lter capacitor at the output, the boost converter has the inrush current problem that can only be mitigated using additional components. In universal-input PFC applications, the capability of providing both step-up and step-down conversion is attractive because the output dc voltage can be set to any value. However, conventional single-switch buck-boost topologies, including the buck-boost, yback, SEPIC, and Cuk converters, have greatly

Manuscript received July 25, 2002; revised October 10, 2005. This paper was presented in part at IEEE APEC01. Recommended for publishing by Associate Editor Y.-F. Liu. J. Chen is with the FyreStorm Inc., Sunnyvale, CA 94086 USA (e-mail: jingquan.chen@ieee.org). D. Maksimovic and R. W. Erickson are with the Colorado Power Electronics Center, Department of Electrical and Computer Engineering, University of Colorado, Boulder, CO 80309-0425 USA. Digital Object Identier 10.1109/TPEL.2005.869744

increased component stresses and component sizes compared to the boost converter [2][6]. In general, if their conversion characteristics meet the input/output specications, the boost converter (for voltage step-up) or the buck converter (for voltage step-down) feature the smallest component stresses. This is a result of the direct energy transfer path from the input to the output in one of the switching subintervals in these two converter topologies. The boost and the buck converters require the minimum indirect energy delivery and therefore have the minimum component stresses for a given voltage conversion ratio. Based on this observation, it is of interest to investigate buck-boost converter topologies with two independently controllabe switches that can operate as boost (for voltage step-up) or as buck (for voltage step-down) converters during portions of an ac line cycle. Fig. 1 shows (a) the standard buck-boost converter and the two well-known two-switch buck-boost congurations, (b) the buck-cascaded buck-boost (BuCBB) converter, and (c) the boost-cascaded buck-boost (BoCBB) converter. When the two active switches are operated independently, the two-switch converters can achieve buck or boost operation with minimum indirect energy processing. As a result, at the expense of additional switches and controls, the two-switch buck-boost topologies can offer reduced component stresses. It has been shown that a number of other two-switch buck-boost congurations can be constructed. In [7], complete families of two-switch buck-boost converters that can achieve minimum indirect energy delivery have been generated through the synthesis method based on the equivalent ac and dc circuits [8]. A comparison of the two-switch buck-boost converter topologies in terms of the switch and the inductor stresses can be found in [7]. In particular, the boost-interleaved buck-boost (BoIBB) converter shown in Fig. 2 has been identied as a conguration with potentials for signicantly smaller switch stresses compared to the more conventional cascaded buck-boost converters of Fig. 1(b) and (c), and with lower conduction losses and reduced inductor stresses compared to the boost converter. In power factor correction applications, further advantages of this conguration include the ability to choose the output dc voltage arbitrarily, and the absence of the inrush current problem. The purpose of this paper is to present a detailed analysis of the operation and the component stresses in the BoIBB converter, as well as design guidelines and practical implementation techniques in universal-input PFC applications. Operating modes and basic steady-state characteristics of this converter are described in Section II. Operation of the BoIBB converter as a PFC rectier together with an analysis of the switch and

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Fig. 1.

(a) Standard buck-boost converter, (b) the buck-cascaded buck-boost (BuCBB) converter, and (c) the boost-cascaded buck-boost (BoCBB) converter.

Fig. 2.

Boost-interleaved buck-boost (BoIBB) converter.

inductor stresses and conduction losses are discussed in Section III, in comparison with the converters shown in Fig. 1. Section IV describes an experimental 100-W, 200-V dc output, universal-input BoIBB PFC rectier, with experimental results shown over the universal-input ac line voltage range.

II. OPERATING MODES AND STEADY-STATE CHARACTERISTICS OF THE BOOST-INTERLEAVED BUCK-BOOST CONVERTER The proposed boost-interleaved buck-boost (BoIBB) conis shown in verter with two controllable switches Fig. 2. In contrast to the cascaded topologies, such as the converters of Fig. 1(b) and (c), where the buck and the boost converter are simply connected in series, in the BoIBB converter and ) is effectively interleaved the boost switch cell ( and ). with the buck switch cell ( Let and be the duty ratios of the switches and , respectively. In continuous conduction mode (CCM), the voltsecond balance relations for the two inductors yield the for the BoIBB overall dc voltage conversion ratio converter (1)
Fig. 3. Operating modes of the BoIBB converter: (a) boost and (b) buck.

If is always on, 1, 1 1 , and the converter operates in the boost mode, which is shown in Fig. 3(a). The is zero. In this mode, the input current average voltage across and . is divided through If is always off, 0, , the converter operates and form a lowin the buck mode, as shown in Fig. 3(b). and is zero frequency lter. The average current through is equal to the difference between the and the voltage across input and the output voltage. The inductor in the buck mode has the same role as the inductor in the simple buck converter. The basic steady-state results for the two modes of operation are summarized in Table I.

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TABLE I STEADY-STATE RESULTS FOR THE BOIBB CONVERTER IN THE BOOST AND THE BUCK MODES OF OPERATION

III. OPERATION OF THE BOIBB CONVERTER AS AN IDEAL RECTIFIER In this section, we analyze operation of the BoIBB converter as an ideal PFC rectier. Expressions for the switch and the inductor RMS currents, and the volt-seconds applied to the inductors are derived, so that conduction losses and magnetic sizes can be evaluated. We also compare the total switch and inductor RMS currents of the BoIBB converter with the three converters shown in Fig. 1. In PFC rectier applications, the rectied input voltage is (2) In an ideal PFC rectier, the output voltage is regulated at a is proportional constant value , and that the input current to the input voltage (3) (4) where the emulated resistance is constant for a given output power. Fig. 4(a) shows the waveforms of the input and the output voltage in one half of a line period, for the case when the dc output voltage is chosen to be lower than the peak of the input voltage. The converter operates in the boost or the buck modes according to the condition of the input voltage and the output dc voltage, as shown in Fig. 4(b). In Section V, we show that the switchover between the boost and buck modes can be accomplished automatically using a relatively simple PWM controller, without the need to compare the input and the output voltage to facilitate the mode switching. Since the input voltage waveform is periodic with the period 2 (half line cycle) and symmetric with respect to 4, of 4]. Opthe analysis can be restricted to the time interval [0 eration in continuous conduction mode (CCM) is assumed. A. Analysis of Stresses 1) Boost Mode: In the time interval 0 , as shown in Fig. 4, the input voltage is lower than the output voltage, and the converter operates in the boost mode: the boost switch cell is active, while the buck cell is inactive ( is always on). In the case when the output voltage is higher than the peak of the input voltage, the converter operates in the boost mode always. In this case, the results of this section still with 4. The converter apply. One only needs to replace switching frequency is much higher than the ac line frequency. (8) where is the switching period. 4], where 2) Buck Mode: In the time interval [ is the line period, the instantaneous input voltage is greater than the output voltage, and the converter operates in the buck mode: the buck cell is active and the boost cell is inactive ( is always and form a low frequency lter between the input off). The average inductor currents in a switching period are

Fig. 4. (a) Waveforms of the rectied input voltage v (t) and the dc output voltage V and (b) duty ratios of the boost and the buck cells in the BoIBB converter operated as an ideal PFC rectier.

Therefore, we can assume quasi steady-state operation, which means that the switch duty ratios as functions of time can be found from the steady-state dc conversion results in Section II

(5) When is conducting, its current is the sum of the two inconducts the same current as . ductor currents, while is always off, and the current through In the buck mode, equals a small current ripple. Therefore, the total RMS curand can be found from (4) and (5), and (6) and rents of (7), shown at the bottom of the next page. The voltseconds apand during a switching period are the same as the plied to volt-seconds applied to the inductor in a simple boost converter, and are given by

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and the output, and have insignicant effects in quasi steadystate operation. and can be expressed as: The duty ratios of

TABLE II COMPARISON OF COMPONENT RMS CURRENTS AT LOW LINE (120 VRMS) AND HIGH LINE (240 VRMS) FOR A PFC RECTIFIER WITH THE DC OUTPUT 200 V AND THE OUTPUT POWER P 100 W VOLTAGE V

(9) The average inductor currents in a switching period are

(10) Both and are conducting currents in both boost and buck modes, and the RMS currents are found from (4), (5), and (10) as (11) and (12), shown at the bottom of the page. during a switching period are The voltseconds applied to the same as the volt-seconds applied to the inductor in the buck converter (13) The voltseconds applied to buck mode. B. Comparison of Stresses It is of interest to compare the switch and inductor RMS currents of the BoIBB converter to the three converters of Fig. 1, in are approximately zero in the PFC applications. We assume that the two-switch BuCBB and BoCBB converters are operated in the same way as the BoIBB and duty cycles shown in converter, with the switch Fig. 4. In the BoCBB converter of Fig. 1(c), the energy storage is at the output. Equations (14)(16), shown at the bottom of the next page, summarize the results for the standard buck-boost converter of Fig. 1(a), the BuCBB converter of Fig. 1(b), and the BoCBB converter of Fig. 1(c), respectively. As an example, Table II compares the component RMS currents in a 100-W BoIBB PFC rectier with the dc output voltage 200 V, to the RMS currents in the three converters of Fig. 1 for the low ac line input (120 Vrms) and the high ac line input (240 Vrms). At the low-line input, in this example, the two-switch buckboost converters always operate in the boost mode. According to

(6)

(7)

(11)

(12)

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(6), (15) and (16), the RMS current of the switch in this mode is the same for all three two-switch congurations. The RMS , which always stays on in the boost currents for the switch mode, are different. In the BoIBB and the BoCBB, the switch conducts the inductor current . In the BuCBB, conducts the inductor current , which is signicantly higher at the rms currents in the BoCBB, low-line input. At low line, the which is equal to the dc load current, is somewhat lower than in the BoIBB due to the ltering action of . For the high-line input, the three two-switch buck-boost converters operate in either the boost mode or the buck mode during different portions of a line cycle. In the buck mode, according has the same RMS current to (11), (15), and (16), the switch currents in in all three two-switch converters. The switch the boost mode are different, with the BoIBB having the lowest RMS current stress at high line. In the boost mode, the two inductors in the BoIBB share the input current, which is not the case in other two-switch conbuck-boost converters. Furthermore, in the buck mode, ducts zero dc current in the BoIBB converter. As a result, in the example of Table II, the BoIBB has the lowest total RMS inductor current. In the example of Table II, it can be observed that the component RMS current stresses in the two-switch converters are signicantly smaller than in the standard buck-boost converter. However, the standard buck-boost converter has only one inductor and only one transistor switch. Let us assume that the on-resistance of the transistor switch in the standard buck-boost and converter is two times lower that the on-resistance of in the two-switch buck-boost converters. Similarly, let us assume that the inductor series resistance in the standard buckboost and the BuCBB is two times smaller than the series reand in the BoCBB or BoIBB. Under these sistances of assumptions, Fig. 5 shows the switch and inductor conduction

losses normalized to the losses in the standard buck-boost, as . At high line, i.e., at low functions of the conversion ratio , the BoIBB switch conduction losses are the lowest of the three two-switch congurations. At low line, i.e., for , the switch conduction losses in the BoIBB are somewhat higher than in the BoCBB, but lower than in the standard buckboost. It should be noted that the switch voltage stresses in the two-switch converters are lower than in the standard buck-boost, resulting in an even more favorable comparison in terms of the transistor switch utilization in the BoIBB and the BoCBB compared to the standard buck-boost converter. The BuCBB converter has higher RMS current stresses because the buck switch has to conduct the input current in both buck and boost modes. The inductor conduction losses in the BoIBB and the BuCBB are substantially smaller than in the standard buck-boost both at low line and at high line. Furthermore, voltseconds applied to the inductors are signicantly smaller than in the conventional buck-boost converter, leading to reduced size of the magnetics. Notice, however, that the BuCBB advantages in terms of the inductor utilization are offset in part by the penalties in the switch conduction losses. In conclusion, the BoIBB converter features the most favorable results for the switch conduction losses and the inductor RMS current stresses over the universal-input voltage range.

IV. DESIGN CONSIDERATIONS In this section, we address some of the design considerations related to the selection of , , , and the dc output voltage in the BoIBB converter.

(14)

(15)

(16)

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Combining (17)(19) and using the results for yields the CCM condition

from (4)

(20) Dening tion in the boost mode becomes , the CCM condi-

(21) In order to operate in CCM throughout the line cycle, and under all input voltages and output power levels, from (21) we have (22) is the emulated input resistance for the largest ac where input voltage, and the lowest load power. inductor cur2) Buck Mode: In the buck mode, only the rent ripple is relevant for operation in CCM. The CCM condition can be derived from (23) where (24) which yields (25) The right-hand side expression in (25) has a maximum that depends on the ratio of the peak input voltage and the output 1.5 V, we have voltage . For
Fig. 5. Comparison of (a) the total switch conduction losses in the + two-switch converters normalized to the buck-boost converter, (I I )=(I =2) and (b) the inductor conduction losses in the two-switch converters normalized to the buck-boost converter, (I + )=(I =2). I

(26) and for 1.5 V, we have (27) From (25)(27), the conditions for CCM operation throughout the line cycle are if if . (28)

A. Conditions for CCM Operation The inductor current ripples are affected by the choice of and . In this section we derive conditions for operation in continuous conduction mode (CCM). is 1) Boost Mode: In the boost mode, when the diode and . Therefore, the CCM on, it conducts the sum of condition can be written as (17) where ples and are the peak inductor current rip-

The results of this section can be used to select the inductance values to achieve CCM operation over the entire line cycle, or over a desired portion of the line cycle, and over desired ranges of input voltages and loads. B. Selection of

(18) (19)

We select the capacitance so that the input voltage variations do not affect the output voltage or the input current through path when the converter operates in the buck mode, the ,

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i.e., so that the natural resonant frequency of above twice the line frequency

and

is well

(29) also affects the capacitor voltage ripple in the The value of boost mode. The peak-to-peak capacitor voltage ripple can be found as

(30) where is the output power. The ripple in (30) has the maximum value when when . (31)
Fig. 6. Experimental BoIBB rectier (L 2.25 F, C 150 F, f 100 KHz, V

The worst case is at the maximum power and the minimum input line voltage. Finally, it should be noted that there is no need to act as a low-frequency energy storage element. As a for result, the value selected according to (29) or (30), or according to the capacitor RMS current stress, is typically much smaller compared to the energy-storage capacitance . C. Selection of the dc Output Voltage Compared to a boost PFC rectier, an advantage of the BoIBB converter is that the output dc voltage does not have to be . For universal-input opgreater than the peak ac line voltage is in the range from approximately 125 V to approxeration, imately 370 V. If, for example, we select the dc output voltage 200 V, the ratio varies from 0.54 at high line to 1.6 at low line. In this range, according to the results of Fig. 5, the component stresses in the BoIBB are signicantly lower compared to the standard buck-boost converter. However, for PFC 0.5) applications where a low dc output voltage (e.g., is required, the BoIBB converter may not be the best solution, as shown by the stress analysis and the comparison in Fig. 5. V. EXPERIMENTAL RESULTS An experimental prototype (Fig. 6) has been built to verify feasibility and performance of the BoIBB converter. In our ex4 mH, 4 mH, 2.25 F, perimental setup, 150 F, and the switching frequency is 100 KHz. 200 V. and are The dc output voltage is set to International Rectier IRF840 [500-V, 8-A metal-oxide semiand conductor eld-effect transistors (MOSFETs)] and are Philips Semiconductor BYM26C (600-V, 2.4-A ultra-fast diodes). A. Controller Implementation In the experimental prototype shown in Fig. 6, the input current shaping and the output voltage regulation are achieved using a standard average current-mode PFC controller chip (UC3854 [9]). The input voltage, the input current and the output voltage are sensed and scaled to the proper levels following the usual practices with the UC3854 average current mode controller. To achieve proper operation of the switches and in the boost and the buck modes, the pulse-width

= 4 mH, L = 4 mH, C = = 200 V).

Fig. 7. Dual PWM generator using TL1451.

modulator (PWM) in UC3854 is not used. Instead, the output of the average current-mode compensator on the UC3854 chip is fed to a dual PWM chip (TL1451 [10]) to produce the switch control signals with the duty ratios and . These signals are then sent to a high and low side gate driver (IR2110 [11]) to control the high-side buck switch and the low-side boost switch . Fig. 7 shows a diagram of the TL1451 dual PWM generator , which is generated by the avcontrolled by the voltage erage current-loop compensator. TL1451 uses two dead-time comparators, such that it is possible to generate two independently controlled PWM signals. The two comparators compare and to the same triangle modulation the control inputs signal . As a result, the two PWM signals are synchrohas a valley of nized. The triangle waveform 1.45 V and a peak of 2.05 V. The duty cycle of the output PWM signal can be expressed as (32) where 600 mV, and is or . The two ampliers, which are included in the TL1451 chip

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Fig. 8.

Output duty ratios as functions of v

(t).

for the purpose of constructing voltage-loop compensators, are to achieve used for level-shifting of the control signal the desired duty-cycle modulation according to Fig. 4 (33) We assign PWM channel 1 to control the boost switch and . The buck/boost mode transichannel 2 to the buck switch tion occurs when the boost switch is completely off while the and buck switch is fully on, or when . In order to have a smooth mode transition, these two conditions should occur at the same time, which can be accomplished by designing the circuit according to the following: (34) (35) Another consideration in the selection of the two offset voltfalls into the proper output range ages is to ensure that of UC3854. If we dene (36) or equivalently (37) and as functions of the control the output duty cycles can be expressed as voltage

Fig. 9. v a line cycle.

(t) (solid curve) and v (t) (dashed curve) during one half of

(38) and

(39) The results in (38) and (39) are plotted in Fig. 8. (solid curve) as a In quasi steady-state operation, function of time is shown in Fig. 9 for one half of an ac line cycle. Notice that the BoIBB converter operates in the boost and in the buck mode when mode when . The transition between the boost mode and the buck mode occurs at . The experimental

Fig. 10. Rectied input voltage v (t) (top) and the ac portion of the control (t) (bottom): (a) low-line input (120 Vrms) and (b) high-line voltage v input (240 Vrms). Ch2: 100 V/div, Ch3: 500 mV/div.

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Fig. 12. Efciency of the experimental BoIBB PFC rectier as a function of the input line voltage.

The efciency is 93.8% and the total current harmonic distortion is 4.6%. Fig. 12 shows the rectier efciency as a function of the input line RMS voltage. In contrast to conventional PFC rectiers where the efciency is signicantly lower at low line, the efciency remains greater than 93% throughout the line voltage range (90 Vrms264 Vrms). VI. CONCLUSION A new two-switch topology, named boost-interleaved buck-boost (BoIBB) converter, is proposed for universal-input PFC applications. A comparison with conventional buck-boost or two-switch buck-boost converters shows that the BoIBB converter has advantages of lower switch voltage stresses, potentials for lower switch and inductor conduction losses, and reduced size of the magnetics. Experimental results are provided to verify the validity of the new topology. High efciency (over 93% throughout the whole ac line voltage range), and low current harmonic distortion at both high and low line inputs are demonstrated. REFERENCES
[1] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd ed. Norwell, MA: Kluwer, 2001. [2] R. Watson, G. C. Hua, and F. C. Lee, Characterization of an active clamp yback topology for power factor correction applications, IEEE Trans. Power Electron., vol. 11, no. 1, pp. 191198, Jan. 1996. [3] M. Brkovic and S. Cuk, Input current shaping using Cuk converter, in Proc. Intelec, 1992, pp. 532539. [4] R. Erickson, M. Madigan, and S. Singer, Design of a simple high power factor rectier based on the yback converter, in Proc. IEEE Applied Power Electron. Conf., 1990, pp. 792801. [5] R. Zane and D. Maksimovic, Nonlinear-Carrier control for high-powerfactor rectiers based on up-down switching converters, IEEE Trans. Power Electron., vol. 13, no. 2, pp. 213221, Mar. 1998. [6] D. S. L. Simonetti, J. Sebastian, F. s. dos Reis, and J. Uceda, Design criteria for SEPIC and Cuk converters as power factor prerequlators in discontinuous conduction mode, in Proc. IEEE IECON, 1992, pp. 282288. [7] J. Chen, D. Maksimovic, and R. Erickson, Buck-Boost PWM converters having two independently controlled switches, in Proc. IEEE Power Electron. Specialists Conf., 2001, pp. 736741. [8] D. Zhou, Synthesis of PWM dc-to-dc power converters, Ph.D. dissertation, California Inst. Technol., Pasadena, 1995. [9] UC 3854 Datasheet, Tech. Rep., Texas Instruments, 2005. [10] TL1451A Datasheet, Tech. Rep., Texas Instruments, 2005. [11] IR2110 Datasheet, Tech. Rep., International Rectier, 2005.

Fig. 11. Rectied input voltage v (t) (top) and the input ac line current i (t): (a) 120-V low-line input and (b) 240-V high-line input. Ch2: 100 V/div, Ch4: 0.5 A/div.

results of are reported in Fig. 10, which correspond well to the ideal waveforms in Fig. 9.

B. Experimental Results Experimental waveforms are shown in Fig. 11. The output power is 100 W. In Fig. 11(a), the input line voltage has a lowline RMS value of 120 Vrms and the converter operates in the boost mode always. The efciency is 93.7% and the total current harmonic distortion is 1.9%. The waveforms of Fig. 11(b) are for the high-line input (240 Vrms). The converter operates in the boost or the buck modes in different parts of the line period.

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Jingquan Chen (M02) received the B.S. degree in electrical engineering from Tsinghua University, Beijing, China, in 1995, the M.S. degree in power electronics from the Chinese Academy of Sciences, Beijing, in 1998, and the Ph.D. degree in electrical engineering from the University of Colorado, Boulder, in 2002. From 2002 to 2003, he was a Senior Member of Research Staff at Philips Research, Briarcliff Manor, NY. Since 2003, he has been with FyreStorm, Inc., Sunnyvale, CA, where he is currently a Principal Engineer in the Advanced Research and Development Group. His current research interests include synthesis, modeling, and the digital control of switching power converters.

Dragan Maksimovic (M89) received the B.S. and M.S. degrees in electrical engineering from the University of Belgrade, Belgrade, Yugoslavia, in 1984 and 1986, respectively, and the Ph.D. degree from the California Institute of Technology, Pasadena, in 1989. From 1989 to 1992, he was with the University of Belgrade. Since 1992, he has been with the Department of Electrical and Computer Engineering, University of Colorado, where he is currently an Associate Professor and Co-Director of the Colorado Power Electronics Center (CoPEC). His current research interests include power electronics for low-power, portable systems, digital control techniques, and mixed-signal integrated circuit design for power management applications. Dr. Maksimovic received the NSF CAREER Award and a Power Electronics Society TRANSACTIONS Prize Paper Award in 1997.

Robert W. Erickson (F00) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the California Institute of Technology, Pasadena, in 1978, 1980, and 1982, respectively. Since 1982, he has been a member of the Faculty of Electrical and Computer Engineering, University of Colorado, Boulder, where he is currently Professor and Chairman. He established and co-directs the Colorado Power Electronics Center, which is helping the industry in low-harmonic rectiers, dcdc converters for battery-powered systems, and magnetics modeling for multiple-output converters. He is the author of the textbook Fundamentals of Power Electronics, now in its second edition. He is the author of approximately 60 journal and conference papers in the area of power electronics. Dr. Erickson received the IEEE Power Electronics Society Transactions Prize Paper Award, for the paper Nonlinear Carrier Control for High-Power-Factor Boost Rectier in 1996.