DESIGN AND ANALYSIS OF PWM GENERATOR FOR HIGH FREQUENCY SWITCHING POWER SUPPLIES USING EMBEDDED SYSTEMS APPROACH.

Ms. Sheetal R.Mundada,R&D Engineer Mr. L.S.Sannabhadti,Director APLAB LIMITED,A-5,Aplab House,Waghale Estate,Thane-400604. Abstract: This paper consists of an analysis and design of PWM Generator used in high frequency switching power supplies using Embedded systems approach.The soft switched ac to dc full bridge converter operating in DCM (Discontinuous mode) is presented.The PWM generator is the Texas Microcontroller MSP430F149 coded and tested for PWM generation and Monitoring of various control signals and accordingly producing the control and display action.The operation and performance of the controller is verified using IAR Embedded systems Workbench in Practical working Environment. I.Introduction: As the integrated semiconductor technology becomes more advanced ,system designers as well as electronic manufacturers are emphasizing size and weight as important features of their product.Traditionally the bulkiest part of the system is the power supply ,with its heavy isolation transformer heat sinks and cooling fans as in case of series pass linear designs.The trend therefore in the recent years has been towards the development of high efficiency ,light weight and compact power supplies,the obvious solution is the High frequency Switching power supply.The soft switching technique used here reduces the switching losses while not decreasing the switching frequency.The full bridge ac to dc convertor is used which is the front end of UPS.Among

the various soft switching techniques ZVT circuit has been proposed for having the advantage of ease of control and good performance for wide line voltage and various load conditions.The main switch turns on at zero voltage whereas the dv/dt of the voltae across the main switch and di/dt of current in the diodes are controlled by auxillary circuit.The main switch turns off softly due to snubber capacitor parallel to it.Therefore the losses are reduced. The DCM has the advantage of power factor correction using simple control.The embedded controller MSP430F149 used for generating the PWM signal gives the advantage of low cost,ease of implementation,windows working platform and easy debugging procedure along with full simulation possible.The Embedded controller generates the PWM signal depending upon the atteneuated PFC output signals named +busv and busv with respect to positive and negative half cycles of the line input. Section two gives the details of power supply,Section three gives the design of target control board for MSP430F149 and Section four provides the details of Software implemented along with the results obtained. II. Switching power supply: The disadvantages of linear power supply are greatly reduced by switching power supply. Fig. Shows the block diagram of basic switching regulated power supply.In this

Ac

RECTIFIER & FILTER

SWITCHING ELEMENT

ISOLATION POWER TXMER

OUTPUT RECTIFIERS & FILTERS

FEEDBACK AND CONTROL Vref Fig:1 THE BASIC LINE SWITCHING POWER SUPPLY: of 230V ac line and producing the same 320V dc output voltage. The Filter capacitor is calculated as: C=It/dv. Where C=Capacitance in Microfarad. I=load current,A. T=time the capacitor must supply current ,ms Dv=allowable ripple (p-p),V. Which come out to be 3000 microfarad for 3KW. The input inrush current protection is provided by the NTC thermistors,without affecting the overall efficiency and the input transient voltage protection is provided by Metal Oxide Varistor transient voltage suppressor. Full Bridge convertor: The full bridge conveter topology is used ,is shown in fig.It shows the switch pairs (T1,T2) and (T3,T4) and switched as pairs alternatively at the selected switching freqequency.When (T1,T2) or (T3,T4) are on , Voi=(N2/N1)Vd,as shown in fig.b. VL= (N2/N1)Vd Vo 0<t<Ton. When both the switch pairs are off ,the inductor current splits equally between two secondary halves.

Scheme the ac line is directly rectified and filtered to produce the raw high voltage DC,which in turn is fed into switching element.The switch is operating at high frequency of 20Khz to 1Mhz range,chopping the dc voltage into high frequebcy square wave.This square wave is fed into the power isolation transformer ,stepped down to a predetermined value and then rectified and filtered to produce the required DC output. A portion of this output is monitored and compared against a fixed refernce voltage and the error signal is used to control the on-off times of the switch,thus regulating the output.Since the switch is either on or off it is dissipati little energy ,resulting in a very high overall power supply efficiency of 70 to 80 percent. The voltage Doubler Technique: The fig. Shows the voltage doubler technique.When the switch is closed ,the circuit may be nominally operated at 115Vac .During thetive half cycle of ac the capacitor C1 is charged to the peak voltage ,giving voltage of 160V dc,through diode D1.During the negative half cycle,the capacitor C2 is charged to 160Vdc through D4 ,resulting in 320V Dc across C1+C2.When the switch is open ,D1 to D4 form a full bridge rectifier capable of rectifying a nominal

Fig.2: Voltage Doubler. Fig.3: Full Bridge converter.

VL=-Vo. Ton<t<Ton+t Equating the time integral gives , Vo/Vd=2(N2/N1)D. Where D=ton/Ts, and 0<D<0.5. The diodes connected in antiparallel to the switches provide a path to current due to energy associated with primary leakage inductance. Ferrite material high frequency transformer is used. The output voltages of the dc power supplies are regulated to be within a specified tolerance band in response to the changes in the output load and input line voltages.This is accomplished using negative feedback control system.The converter output Vo is compared with its refence value .The error amplifier produces the control voltage Vc,Which is used to adjust the duty ratio d of the switches in the converter. Linerization of the power stage including the output filter using the state space averaging to obtain Vo(s)/d(s): The goal of the following analysis is to obtain a small signal transfer function

vo(s)/d(s),where vo and d are small perturbations in the output voltage vo and switch duty ratio d,resp, around their steady state dc operating values Vo and D.During each circuit state ,the linear circuit is described by means of state variable vector x consisting of the inductor current and the capacitor voltage.In the circuit description ,the parasitic elements such as resistance of filter inductor and equivalent series resistance(ESR) of the filter capacitor should be included.Here Vd is the input voltage. The following state equations can be written: Dx/dt=A1x+B1vd during d. Ts And Dx/dt = A2x+B2vd during (1-d). Ts Where A1 and A2 are state matrices and B1 and B2 are vectors. The output vo in all converters can be described in terms of their state variables alone as Vo=C1x during d. Ts & Vo=C2x during (1-d). Ts

Where C1 and C2 are transposed vectors. Further considering the Duty ratio D and solving by Laplace transform The transfer frunction is obtained as Tp(s)=Vo(s)/d(s) =C/[sI-A] [(A1-A2)X+(B1B2)Vd]+(C1-C2)X .The regulator used is 3525 current mode PWM controller which uses an inner loop to directly control the peak inductor current with the error signal,rather than controlling the duty ratio of the pulse width modulator. III.Designing of Target/control board for the Embedded controller: The Voltage appearing at the output of PFC is High voltage round about 400V dc ,which has to be atteneuated before feeding to microcontroller ,also for monitoring and display control action the corresponding voltages needs to be atteneutaed.The voltages from controller needs to be amplified before feeding to power section for further processing . This all is accomplished by designing the control board of the microcontroller. It is designed to perform following functions: 1.Atteneuate the high voltages i.e. Line volatage to less than 3.3 V . 2.Then rectifying the line voltage and to feed the microcontroller for sensing the presence of mains. 3.Atteneuating all the analog voltages such as the thermal,Bus,line,load. 4.Amplyfying the buspwm voltage coming from microcontroller to feed to power board. 5. Generating and amplifying the clock signal,relay signal to drive PFC section. This all is accomplished by the amplifier Ics TL074C and LM339D which are the quad amplifier and comparator Ics resp.

IV: BUSPWM generation using Embedded controller. To design a dedicated controller it is essential to monitor all stages and status of power supplies.The MSP430F149 has inbuilt 12-bit A/D converter, Five 16-bit Timer 60KB+256B Flash,2KB RAM. The Two ports P1 and P2 can be configured to generate interrupts on each pin. The analog voltage has been configured on the port P6 which is used for A/D conversion. Following is Flow chart for Generation of Pwm.

CONCLUSION: Thus the 8Khz PWM has been generated and tested for Varying analog voltages with corresponding positive and negative half cycles of line input.

References: [1] India International Conference on Power electronics-2004. [2] P.Chen and A.K.S. Bhat Analysis and design of a soft switched AC-to-DC converter operating in DCM.IICPE2004. [3]B.A. Miwa ,D.M. Otten and M.F. Schlecht , High efficiency power factor correction using Interleaving Techniques. IEEE-APEC 1992,pp.557568. [4]L.Balogh and R.Redl ,Power factor correction with interleaved boost converters in continous inductor current mode.IEEE-PESC,1993,pp168-174.

START 5]G.Hua ,C.Leu and F.C.Lee,Novel zero voltage transition PWM converters IEEE Transaction on Power Electronics,vol9 p,no.2,pp 213-219,Mar 1994. [6]H.Bodur and a.F.Bakan ,A new ZVT-PWM DC-DC Converter IEEE Transaction on Power Electronics,vol 17, no 1,jan 2002,pp40-47 [7]M.M.Jovanovic , A Technique for Rectifier reverse recovery related losses in high power boost converters. IEEE Transactions on Power Electronics, vol 12,no.2,sept1998,pp932-941 [8]I.D.Jitaru ,soft transitions Power factor correction circuits, HFPC Proceedings,May 1993,pp202-208. [9]D.M.Xu,C.Yang,L.MA, A novel single phase active clamped PFC Converter.,IEEE-APEC,1997,pp266271. [10]Texas Instruments,TI.com.

PNSEL=0 (Portpin) PNDIR=0 (Input) PNIE=1 (Interrupt request is enabled.) PNIES=0 (Low to high edge select.) Give External Interrupt as square wave. Line Zero ISR on Interrupt. SOC OF ADC I/P.

EOC

ADC EOC ISR.

CCR X=0