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TE MA 1

INTRODUCCIN AL
PROCESADO DIGITAL DE SEALES.
Conversin A/D, D/A
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
Objetivos del tema.
Conocer las ventajas que nos ofrece PDS.
Saber cuando es ms conveniente usar estos procedimientos digitales.
Saber qu conlleva el paso mundo continuo-mundo digital e inverso.
Conocer el Teorema de Muestreo y sus consecuencias.
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
Denicin y algunas aplicaciones.
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
Por procesado digital de seales se entienden todas aquellas tcnicas
orientadas al tratamiento de secuencias discretas.
Voz
Vocoders.
Reconocedores de usuario.
Rec. de voz (conversores
texto)
Imagen
Filtrado.
Reconocedores
(hyperspectral).
Cmpresin.
Audio
Efectos de audio.
Bsqueda canciones
tarareo.
MP3.
Video
Compresin.
Estimacin de movimientos.
Caracterizacin (sist. expertos)
Medicina
Seales unidimensionales
(ECG).
Imgenes (mamografa).
Sistemas expertos.
Comunicaciones
TODO, SALVO LA
TRANSMISION!!!!
Internet
Compresin seales.
Codicacin/Decod.
Sensores
Radar/Sonar.
TAC.
Optimizacin de procesos
y mucho ms......
Qu nos ofrece el procesado digital de seales
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
Facilidad de implementacin de sistemas
(amplicador analgico-amplicador digital)
Inmunidad a problemas fsicos de los componentes
(derivas trmicas y valores exactos)
Facilidad de cambio de los sistemas.
(cambio en las especicaciones de un ltro)
nica forma de realizar algoritmos de procesado
(algoritmos MPEG, MP3, vocoders, etc)
Mayor facilidad y precisin en el almacenamiento y
recuperacin de las seales.
Pero tenemos problemas.........
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
El Teorema de muestreo es una losa......problemas para
grandes frecuencias de muestreo (vdeo) que se traduce en
problemas de diseo hardware.....problemas en los
convertidores A/D, problemas de ruido........
Al realizar la conversin A/D y D/A aparecen errores y se tiene
una prdida de parte de informacin de la seal contina
original
Esquema general de un sistema de PDS.
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
Other digital
systems
Anti-aliasing
filter
ADC
x(n)
DSP
hardware
Other digital
systems
DAC
Reconstruction
filter
y(n)
x(t) x(t)
Amplifier
Amplifier
y(t) y(t)
Input channels
Output channels
Figure 1.1 Basic functional blocks of real-time DSP system
digital form, and converted back into an analog signal. Each of the functional blocks in
Figure 1.1 will be introduced in the subsequent sections. For some real-time applica-
tions, the input data may already be in digital form and/or the output data may not need
to be converted to an analog signal. For example, the processed digital information may
be stored in computer memory for later use, or it may be displayed graphically. In other
applications, the DSP system may be required to generate signals digitally, such as
speech synthesis used for cellular phones or pseudo-random number generators for
CDMA (code division multiple access) systems.
1.2 Input and Output Channels
In this book, a time-domain signal is denoted with a lowercase letter. For example, xt
in Figure 1.1 is used to name an analog signal of x with a relationship to time t. The time
variable t takes on a continuum of values between I and I. For this reason we say
xt is a continuous-time signal. In this section, we first discuss how to convert analog
signals into digital signals so that they can be processed using DSP hardware. The
process of changing an analog signal to a xdigital signal is called analog-to-digital (A/D)
conversion. An A/D converter (ADC) is usually used to perform the signal conversion.
Once the input digital signal has been processed by the DSP device, the result, yn, is
still in digital form, as shown in Figure 1.1. In many DSP applications, we need to
reconstruct the analog signal after the digital processing stage. In other words, we must
convert the digital signal yn back to the analog signal yt before it is passed to an
appropriate device. This process is called the digital-to-analog (D/A) conversion, typi-
cally performed by a D/A converter (DAC). One example would be CD (compact disk)
players, for which the music is in a digital form. The CD players reconstruct the analog
waveform that we listen to. Because of the complexity of sampling and synchronization
processes, the cost of an ADC is usually considerably higher than that of a DAC.
1.2.1 Input Signal Conditioning
As shown in Figure 1.1, the analog signal, x
H
t, is picked up by an appropriate
electronic sensor that converts pressure, temperature, or sound into electrical signals.
INPUT AND OUTPUT CHANNELS 3
Importante: las aplicaciones, en general, no tienen todas
las partes del esquema anterior; segn la aplicacin se
puede tener todo o parte del esquema
CONVERSIN A/D. MUESTREO.
Sampling introduces ambiguity into the discrete-time
representation, since many continuous-time signals can
produce the same sequence of samples.
0 5 10 15 20 25
0
0.5
1
1.5
2
2.5
3
3.5
n
x
[
n
]
x
1
(t)
x
2
(t)
Tenemos muestras discretas de una
seal continua....podemos tener
problemas de ambigedad a la hora
de determinar qu seal continua dio
lugar a la seal discreta que se obtiene
del muestreo
1.2 Periodic sampling
A discrete-time representation !!"" of a continuous-time
signal !
#
#$$%is obtained through periodic sampling:
where % is the sampling period and its reciprocal, &
'
&%'(%,
is the sampling frequency.
(Modified
from Porat)
Proceso por el cual se obtienen una serie de
muestras a partir de una seal continua. El
tiempo de adquisicin entre muestras se
conoce como periodo de muestreo (su
inversa es la frecuencia de muestreo); en la
mayor parte de las aplicaciones este tiempo
es constante.
Conversin Analgico-Digital. Muestreo
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
1.6. Teorema de Muestreo
Elecci on de F
s
Para ello necesitamos tener informaci on sobre el
contenido frecuencial de la se nal a muestrear. Ej: Voz < 4KHz,
TV < 5MHz, ... As, si conocemos esa F
max
podemos escoger una
F
s
adecuada (no aliasing) F
s
> 2 F
max
Recuperacion Una se nal muestreada correctamente (F
s
> 2
F
max
) podra ser recuperada sin perdida de informacion mediante un
interpolador (conversor D/A). La formula de interpolacion ideal
o apropiada se especica mediante el Teorema de Muestreo
de Nyquist.
Teorema De Muestreo De Nyquist. Si la frecuencia mas alta
contenida en una se nal analogica x
a
(t) es F
max
= B y la se nal se
muestrea a una velocidad F
s
> 2 F
max
2B, entonces x
a
(t) se
puede recuperar totalmente a partir de sus muestras mediante la
siguiente funcion de interpolaci on:
g(t) =
sin(2Bt)
2Bt
.
As, x
a
(t) se puede expresar como:
x
a
(t) =

n=
x
a

n
F
s

t
n
F
s

donde x
a
(n/F
s
) = x
a
(nT) x(n) son las muestras de x
a
(t).
Caso lmite: Cuando la se nal se muestrea a la frecuencia (o tasa)
mnima F
s
= 2B, la f ormula de reconstrucci on es:
x
a
(t) =

n=
x
a

n
2B

sin(2B(t n/2B))
2B(t n/2B)
15
Frecuencia de Nyquist
FN=2B
MUESTREO. UN EJEMPLO SENCILLO
!
" =
R
2
b+1



!
y(t) = A" cos w" t
( )



!
y(n " T) = A" cos w" n " T
( ) [ ]
# y(n) = A" cos
w" n
f
m
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)
= A" cos 2" # "
f
s
" n
f
m
2" k " #
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m

2" k " n " f


m
" #
f
m
$
%
&
'
(
)





!
y(n) = A" cos 2" # "
f
s
k " f
m
( ) " n
f
m
$
%
&
'
(
)
A nivel digital las frecuencias
f y fk!f
m
son indistinguibles

!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)

!
y(n) = A" cos 2" # "
f
s
f
m
$
%
&
'
(
)
" n
$
%
&
'
(
)
F
digital
=
f
s
f
m
* += 2" # " F
digital
y(n) = A" cos +" n
( )



!
y
1
(n) = A" cos #" n
( )
y
2
(n) = A" cos #+ 2" $
( )
" n
( )
y
1
(n) = y
2
(n)



!
y
1
(n) = A" cos #" n
( )
y
2
(n) = A" cos 2" $ %#
( )
" n
( )
= A" cos % #
( )
" n
( )
y
1
(n) = y
2
(n)





!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)

!
y(n) = A" cos 2" # "
f
s
f
m
$
%
&
'
(
)
" n
$
%
&
'
(
)
F
digital
=
f
s
f
m
* += 2" # " F
digital
y(n) = A" cos +" n
( )



!
y
1
(n) = A" cos #" n
( )
y
2
(n) = A" cos #+ 2" $
( )
" n
( )
y
1
(n) = y
2
(n)



!
y
1
(n) = A" cos #" n
( )
y
2
(n) = A" cos 2" $ %#
( )
" n
( )
= A" cos % #
( )
" n
( )
y
1
(n) = y
2
(n)





!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)

!
y(n) = A" cos 2" # "
f
s
f
m
$
%
&
'
(
)
" n
$
%
&
'
(
)
F
digital
=
f
s
f
m
* += 2" # " F
digital
y(n) = A" cos +" n
( )



!
y
1
(n) = A" cos #" n
( )
y
2
(n) = A" cos #+ 2" $
( )
" n
( )
y
1
(n) = y
2
(n)



!
y
1
(n) = A" cos #" n
( )
y
2
(n) = A" cos 2" $ %#
( )
" n
( )
= A" cos % #
( )
" n
( )
y
1
(n) = y
2
(n)




Las
frecuencias
digitales no
pueden crecer
sin lmite!!!
0<!<""0<F
digital
<1/2
MUESTREO. UN EJEMPLO SENCILLO
F
muestreo
=8000 Hz.
Procesado Digital de Seales, 4 Ingeniera Electrnica,
E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
MUESTREO. OTRA DEDUCCIN MS FORMAL.
Fall 2000 Copyright 1999 Andreas Spanias I-3
The Fourier Transform of Periodic Impulses (2)
It can be easily shown that
( )
! !
"
#" =
"
#" =
# $
k k
t jk
k e
T
0 0
0
1
! ! " !
!
( ) ! S
o
!
0
...
...
o
! 2
!
Fall 2000 Copyright 1999 Andreas Spanias I-3
The Fourier Transform of Periodic Impulses (2)
It can be easily shown that
( )
! !
"
#" =
"
#" =
# $
k k
t jk
k e
T
0 0
0
1
! ! " !
!
( ) ! S
o
!
0
...
...
o
! 2
!
Fall 2000 Copyright 1999 Andreas Spanias I-2
The Fourier Transform of Periodic Impulses
Sampling Issues
The switching function
s t t nT
n
( ) ( ) = !
=!"
"
#
!
( ) t s
0
T T 2 T 3 t
... ...
The frequency spectrum of the periodic impulse can be determined
in terms of the CFS, that is
#
"
!" =
=
k
t jk
k
e S t s
0
) (
"
T
dt e t
T
S
T
T
t jk
k
1
) (
1
2 /
2 /
0
= =
$
!
! "
!
where
Fall 2000 Copyright 1999 Andreas Spanias I-2
The Fourier Transform of Periodic Impulses
Sampling Issues
The switching function
s t t nT
n
( ) ( ) = !
=!"
"
#
!
( ) t s
0
T T 2 T 3 t
... ...
The frequency spectrum of the periodic impulse can be determined
in terms of the CFS, that is
#
"
!" =
=
k
t jk
k
e S t s
0
) (
"
T
dt e t
T
S
T
T
t jk
k
1
) (
1
2 /
2 /
0
= =
$
!
! "
!
where
Fall 2000 Copyright 1999 Andreas Spanias I-2
The Fourier Transform of Periodic Impulses
Sampling Issues
The switching function
s t t nT
n
( ) ( ) = !
=!"
"
#
!
( ) t s
0
T T 2 T 3 t
... ...
The frequency spectrum of the periodic impulse can be determined
in terms of the CFS, that is
#
"
!" =
=
k
t jk
k
e S t s
0
) (
"
T
dt e t
T
S
T
T
t jk
k
1
) (
1
2 /
2 /
0
= =
$
!
! "
!
where
Procesado Digital de Seales, 4
Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor
Emilio Soria
MUESTREO.
Fall 2000 Copyright 1999 Andreas Spanias I-9
Derivation of the Sampling Theorem
x t x t s t
s
( ) ( ) ( ) = where s t t nT
n
( ) ( ) = !
= !"
"
#
!
#
"
!" =
! =
n
s
nT t nT x t x ) ( ) ( ) ( !
and
) ( * ) (
2
1
) ( " "
#
" S X X
s
=
( )
$
%
&
'
(
)
! =
#
"
!" = k
o s
k X
T
X " " ! " " * ) (
1
) (
( )
#
"
!" =
! = *
k
o s
k X
T
X " " "
1
) (
Fall 2000 Copyright 1999 Andreas Spanias I-10
Sampling and Periodic Spectra
... ...

t 0
0
) (t x
) (! X
!
B B !
... ...
T 2T 3T
... ...
0
) (t x
s
0
) (!
s
X
!
B
s
!
s
! 2
s
! !
B !
t
1/T
Importante: SEPARACIN ENTRE
ESPECTROS....LA CLAVE DEL ALIASING EST
AH!!!!
Procesado Digital de Seales, 4 Ingeniera Electrnica, E.T.S.E
Universitat de Valncia, Profesor Emilio Soria
MUESTREO.

N

N
X
c
(j )
1
(a)

s

s
2
s
2
s
3
s

s
2
s
2
s
2
s
3
s
S(j )
(b)
0

N

s

N
X
s
(j )
1
(c)
T
2
T
(
s

N
)

s

X
s
(j )
1
(d)
T
(
s

N
)
Figure 4.3 Effect in the frequency
domain of sampling in the time domain.
(a) Spectrum of the original signal.
(b) Spectrum of the sampling function.
(c) Spectrum of the sampled signal with
s > 2N . (d) Spectrum of the
sampled signal with s < 2N .
F
r
o
m
D
is
c
r
e
te
-
T
im
e
S
ig
n
a
l P
r
o
c
e
s
s
in
g
, 2
e
b
y
O
p
p
e
n
h
e
im
, S
c
h
a
f
e
r
, a
n
d
B
u
c
k

1
9
9
9
-
2
0
0
0
P
r
e
n
tic
e
H
a
ll, I
n
c
.
MUESTREO DE SEALES PASA-BANDA.
Digital Signal Processing in 2700 seconds
Sampling Band-limited Signals
Consider a 2MHz band-limited signal riding on an 8MHz carrier.
A/D
Signal Input
(7-9MHz)
Local oscillator
(10MHz)
1-3MHz
I.F.
Fs > 6MHz
0
f (MHz)
9 7 -7 -9
The IF could be extracted by mixing with a local oscillator at 10MHz and
sampled at 6MHz, or could be directly sampled at > 18MHz.
Si aplicamos el teorema de muestreo deberamos
muestrear a 18 MHz, como mnimo; pero si muestreamos
a 10 MHz .........
Digital Signal Processing in 2700 seconds
Bandpass Sampling Example
Instead, lets directly sample the signal at only 10M samples/second.
0
f (MHz)
(Fs) (Fs/2)
Original
spectrum
Image
spectrum
10 5 9 7 3 1 -10 -5
In this case the Nyquist frequency would be 5MHz, and the original
spectrum is in the range of Fs/2 to Fs, instead of the range DC-Fs/2 (as we
are used to seeing).
The original spectrum is aliased into the lower half of the frequency band,
reflected about the Nyquist rate of 5MHz, appearing in the frequency
range 3Mhz - 1MHz.
So, we have successfully sampled the signal using a sampling rate almost
half the officially required rate
Obtenemos el espectro reejado entre 1 y 3 MHz. Si
ahora muestreamos la seal original a 6.5 MHz .....
Digital Signal Processing in 2700 seconds
Bandpass Sampling Example (cont)
What if we sample at only 6.5M samples/second??
f (MHz)
(Fs) (Fs/2)
Original
spectrum
Image
spectra
9.75
0.5
6.5 3.25
2.5 4 6
This time the original spectrum lies between Fs and 1.5Fs.
Here, the spectrum is reflected about the sampling rate, to appear in the
range from Fs/2 to Fs, spanning 6MHz - 4MHz.
It is then reflected a second time about Fs/2, finally appearing in the lower
half of the sampled frequency range between 0.5MHz and 2.5MHz.
Can we sample at an even lower rate and still get a unique spectrum??
Se obtiene el espectro de la seal original entre 0.5 y 2.5
MHz!!!!. Mediante operaciones de ltrado y modulacin
podramos obtener la seal original.
Las seales vistas hasta ahora se conocen como seales en banda base; el espectro de la
seales esta centrado en el origen. Seguidamente se analizarn seales en lo que esto no
ocurre, estas seales se conocen como pasa-banda.
En general, si se tiene una seal con un ancho de
banda B; con frecuencias lmites f
H
y f
L
B=f
H
-f
L

con Q=f
H
/B y n entero con n!Q la frecuencia de
muestreo f
s
debe cumplir los siguientes limites.
CUANTIZACIN.
Semester 1, 2004 ELEC 3303: Digital Signal Processing
L3.1
Chapter 3: Digital Signals
We will describe representation oI digital signals, their manipulation and
some useIul digital signals. Most of this has already been covered in
ELEC 2301: Signals & Systems (and repeated here for convenience)
with some minor differences.
Example 3.1
0.875 111
0.750 110
0.625 101
0.500 100
0.375 011
0.250 010
0.125 001
0.000 000
Range oI Analog
Inputs Mapping to
This Digital Code (V)
Quantization
Level (V)
Digital
Code
0625 . 0 000 . 0 ! " !
1875 . 0 0625 . 0 ! " !
3125 . 0 1875 . 0 ! " !
4375 . 0 3125 . 0 ! " !
5625 . 0 4375 . 0 ! " !
6875 . 0 5625 . 0 ! " !
8125 . 0 6875 . 0 ! " !
000 . 1 8125 . 0 " " !
3-bit signal in the range 0 V to 1V
010
110
000
001
011
100
110
111
100
010
Semester 1, 2004 ELEC 3303: Digital Signal Processing
L3.2
We usually plot the quantization level (rather than digital code) to
represent the digital signal.
When the stem plots Ior the digital signals get too cluttered, usually their
envelope is plotted.
Figure 3.2
Semester 1, 2004 ELEC 3303: Digital Signal Processing
L3.1
Chapter 3: Digital Signals
We will describe representation oI digital signals, their manipulation and
some useIul digital signals. Most of this has already been covered in
ELEC 2301: Signals & Systems (and repeated here for convenience)
with some minor differences.
Example 3.1
0.875 111
0.750 110
0.625 101
0.500 100
0.375 011
0.250 010
0.125 001
0.000 000
Range oI Analog
Inputs Mapping to
This Digital Code (V)
Quantization
Level (V)
Digital
Code
0625 . 0 000 . 0 ! " !
1875 . 0 0625 . 0 ! " !
3125 . 0 1875 . 0 ! " !
4375 . 0 3125 . 0 ! " !
5625 . 0 4375 . 0 ! " !
6875 . 0 5625 . 0 ! " !
8125 . 0 6875 . 0 ! " !
000 . 1 8125 . 0 " " !
3-bit signal in the range 0 V to 1V
010
110
000
001
011
100
110
111
100
010
Semester 1, 2004 ELEC 3303: Digital Signal Processing
L3.2
We usually plot the quantization level (rather than digital code) to
represent the digital signal.
When the stem plots Ior the digital signals get too cluttered, usually their
envelope is plotted.
Figure 3.2
Despues de muestrear se hace
necesario cuantizar la seal,
estamos en un mundo
discreto!!!!
CUANTIZACIN.
Se puede cuantizar redondeando
(hacemos corresponder el nivel
ms cercano) o por truncamiento
(hacemos corresponder el nivel
inferior)
the digital signal processing(DSP) system where the desired DSPalgorithm is performed. Depending
on the application, the output of the DSP system can be used directly in digital form or converted
back to an analog signal by a digital-to-analog converter (D/A). A digital ltering application may
produce an analog signal as its output, whereas a speech recognition system may pass the digital
output of the DSP system to a computer system for further processing. This section will describe
basic converter terminology and a sample of common architectures for both conventional Nyquist
rate converters and oversampled delta-sigma converters.
5.2 Fundamentals of A/ D and D/ A Conversion
The analog signal can be given as either a voltage signal or current signal, depending on the signal
source. Figure 5.2 shows the ideal transfer characteristics for a 3-bit A/D conversion. The output of
FIGURE5.2: Ideal transfer characteristics for an A/D converter.
the converter is an n-bit digital code given as,
D =
A
sig
FS
=
b
n
2
n
+
b
n1
2
n1
+. . . +
b
1
2
1
(5.1)
where A
sig
is the analog signal, FS is the analog full scale level, and b
n
is a digital value of either
0 or 1. As shown in the gure, each digital code represents a quantized analog level. The width
of the quantized region is one least-signicant bit (LSB) and the ideal response line passes through
the center of each quantized region. The converse D/Aoperation can be represented as viewing the
digital code in Fig. 5.2 as the input and the analog signal as the output. An n-bit D/A converter
transfer equation is given as
A
sig
= FS

b
n
2
n
+
b
n1
2
n1
+. . . +
b
1
2
1

(5.2)
where A
sig
is the analog output signal, FS is the analog full scale level and b
n
is a binary coefcient.
The resolution of a converter is dened as the smallest distinct change that can be resolved (pro-
c 1999 by CRC Press LLC
Deniciones
Niveles de cuantizacin: son los niveles
digitales
Rango dinmico (RD): Es la diferencia
entre los valores mximo y mnimo de
x(n); no confundir con el rango del
cuanticador (R)!!!!!!. Cuando se
sobrepasa el rango del conversor se
tiene el ruido de sobrecarga.
Resolucin: tamao del escaln entre
niveles digitales (b es el nmero de bits)
Rango de escala completa (FSR):
Cuanticador para seales bipolares.
Escala completa (FS): Cuanticador
para seales unipolares.
!
" =
R
2
b
#1



!
y(t) = A" cos w" t
( )



!
y(n " T) = A" cos w" n " T
( ) [ ]
# y(n) = A" cos
w" n
f
m
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)
= A" cos 2" # "
f
s
" n
f
m
2" k " #
$
%
&
'
(
)








!
y(n) = A" cos 2" # "
f
s
" n
f
m

2" k " n " f


m
" #
f
m
$
%
&
'
(
)








!
y(n) = A" cos 2" # "
f
s
k " f
m
( )
" n
f
m
$
%
&
'
(
)
CUANTIZACIN.
0 50 100 150 n
1
1
0
0 50 100 150 n
1
1
0
0 50 100 150 n
0.2
0.2
0
0 50
! 10
3
100 150 n
5
5
0
(a)
(b)
(c)
(d)
Figure 4.51 Example of quantization noise. (a) Unquantized samples of the signal
x[n] = 0.99 cos(n/10). (b) Quantized samples of the cosine waveform in part
(a) with a 3-bit quantizer. (c) Quantization error sequence for 3-bit quantization of
the signal in (a). (d) Quantization error sequence for 8-bit quantization of the
signal in (a).
From Discrete-Time Signal Processing, 2e
by Oppenheim, Schafer, and Buck
1999-2000 Prentice Hall, Inc.
Al cuantizar se comete un error
conocido, evidentemente, como
error de cuantizacin, que es
IRREVERSIBLE. Se introduce
ruido a la seal
conocido como ruido de
cuantizacin.
x[n] x[n] = Q(x[n])
x[n] = x[n] + e[n] x[n]
e[n]
+
Quantizer
Q()
Figure 4.50 Additive noise model for
quantizer.
From Discrete-Time Signal Processing, 2e
by Oppenheim, Schafer, and Buck
1999-2000 Prentice Hall, Inc.
Modelo para la cuantizacion
!
" =
R
2
b+1



!
y(t) = A" cos w" t
( )



!
y(n " T) = A" cos w" n " T
( ) [ ]
# y(n) = A" cos
w" n
f
m
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m
$
%
&
'
(
)
= A" cos 2" # "
f
s
" n
f
m
2" k " #
$
%
&
'
(
)


!
y(n) = A" cos 2" # "
f
s
" n
f
m

2" k " n " f


m
" #
f
m
$
%
&
'
(
)






!
y(n) = A" cos 2" # "
f
s
k " f
m
( )
" n
f
m
$
%
&
'
(
)
!
SNRQ=10" log
P
seal
P
ruido
#
$
%
&
'
(
= 6.02" b +1.25 ) 6" b
Regla de
los 6 dB b=nmero de bits del conversor
CUANTIZACIN. ERRORES
duced) at an analog input (output) for an A/D (D/A) converter. This can be expressed as
A
sig
=
FS
2
N
(5.3)
where A
sig
is the smallest reproducible analog signal for an N-bit converter with full scale analog
signal of FS.
Theaccuracyof a converter, often referred to also asrelativeaccuracy, istheworst-caseerror between
the actual and the ideal converter output after gain and offset errors are removed [1]. This can be
quantied as the number of equivalent bits of resolution or as a fraction of an LSB.
The conversion rate species the rate at which a digital code (analog signal) can be accurately
converted into an analogsignal (digital code). Accuracyis often expressed as a function of conversion
rate and the two are closely linked. The conversion rate is often an underlying factor in choosing the
converter architecture. The speed and accuracyof analogcomponents are a limitingfactor. Sensitive
analogoperations can either be done in parallel, at the expense of accuracy, or cycliclyreused to allow
high accuracy with lower conversion speeds.
5.2.1 Nonideal A/ D and D/ A Converters
Actual A/D and D/A converters exhibit deviations from the ideal characteristics shown in Fig. 5.2.
Integration of a complete converter on a single monolithic circuit or as a macro within a very large
scale integration (VLSI) DSP system presents formidable design challenges. Converter architectures
and design trade-offs are most often dictated by the fabrication process and available device types.
Device parameters such as voltage threshold, physical dimensions, etc. vary across a semiconductor
die. These variations can manifest themselves into errors. The following terms are used to describe
converter nonideal behavior:
1. Offset error, described in Fig. 5.3, is a d.c. error between the actual response with the ideal
response. This can usually be removed by trimming techniques.
FIGURE5.3: Offset error.
2. Gain error is dened as an error in the slope of the transfer characteristic shown in Fig. 5.4,
which can also usually be removed by trimming techniques.
c 1999 by CRC Press LLC
Error de
offset
FIGURE5.4: Gain error.
3. Integral nonlinearity is the measure of worst-case deviation from an ideal line drawn
between the full scale analog signal and zero. This is shown in Fig. 5.5 as a monotonic
nonlinearity.
FIGURE5.5: Monotonic nonlinearity.
4. Differential nonlinearity is the measure of nonuniform step sizes between adjacent steps
in a converter. This is usually specied as a fraction of an LSB.
5. Monotonicity in a converter speciesthat theoutput will increasewith an increasinginput.
Certain converter architectures can guarantee monotonicityfor a specied number of bits
of resolution. Anonmonotonic transfer characteristic is detailed in Fig. 5.6.
6. Settlingtime for D/Aconverters refers to the time taken from a change of the digital code
to the point at which the analog output settles within some tolerance around the nal
value.
c 1999 by CRC Press LLC
Error de
ganancia
FIGURE5.4: Gain error.
3. Integral nonlinearity is the measure of worst-case deviation from an ideal line drawn
between the full scale analog signal and zero. This is shown in Fig. 5.5 as a monotonic
nonlinearity.
FIGURE5.5: Monotonic nonlinearity.
4. Differential nonlinearity is the measure of nonuniform step sizes between adjacent steps
in a converter. This is usually specied as a fraction of an LSB.
5. Monotonicity in a converter speciesthat theoutput will increasewith an increasinginput.
Certain converter architectures can guarantee monotonicityfor a specied number of bits
of resolution. Anonmonotonic transfer characteristic is detailed in Fig. 5.6.
6. Settlingtime for D/Aconverters refers to the time taken from a change of the digital code
to the point at which the analog output settles within some tolerance around the nal
value.
c 1999 by CRC Press LLC
Error de no-
linealidad
FIGURE5.6: Nonmonotonic nonlinearity.
7. Glitches can occur during changes in the output at major transitions, i.e., at 1 MSB, 1/2
MSB, 1/4 MSB. Duringlarge changes, switchingtime delays between internal signal paths
can cause a spike in the output.
The choice of converter architecture can greatly affect the relative weight of each of these errors.
Data converters are often designed for low cost implementation in standard digital processes, i.e.,
digital CMOS, which often do not have well-controlled resistors or capacitors. Absolute values of
these devices can vary by as much as 20% under typical process tolerances. Post-fabrication
trimming techniques can be used to compensate for process variations, but at the expense of added
cost and complexityto the manufacturingprocess. As will be shown, various architectural techniques
can be used to allow high speed or highly accurate data conversion with such variations of process
parameters.
5.3 Digital-to-Analog Converter Architecture
The digital-to-analog (D/A) converter, also known as a DAC, decodes a digital word into a discrete
analog level. Depending on the application, this can be either a voltage or current. Figure 5.7 shows
a high level block diagram of a D/Aconverter. Abinary word is latched and decoded and drives a set
of switches that control a scaling network. Abasic analog scaling network can be based on voltage
scaling, current scaling, or charge scaling [1, 2]. The scaling network scales the appropriate analog
level from the analog reference circuit and applies it to the output driver. A simple serial string of
identical resistors between a reference voltage and ground can be used as a voltage scaling network.
Switches can be used to tap voltages off the resistors and apply them to the output driver. Current
scaling approaches are based on switched scaled current sources. Charge scaling is achieved by
applying a reference voltage to a capacitor divider using scaled capacitors where the total capacitance
value is determined by the digital code [1]. Choice of the architecture depends on the available
components in the target technology, conversion rate, and resolution. Detailed description of these
trade-offs and designs can be found in the references [1][5].
c 1999 by CRC Press LLC
Error de no-linealidad
+
funcin no creciente
CUANTIZACIN NO UNIFORME.
+
En algunas aplicaciones conviene utilizar un cuanticador
no uniforme en el que los escalones digitales no tienen
una separacin constante; de esta forma el error de
cuantizacin mximo es diferente segn el valor de la
seal de entrada
Mu-law u=255;
EEUU y Japn.
A-law A=87.56;
Europa.
CODIFICACIN.
Una vez que se tienen los
diferentes niveles de
cuanticacin tenemos que
codicar cada uno de esos
niveles.
La codicacin depender
de la aplicacin a
desarrollar as como de los
elementos hardware que se
dispongan.
En algunas aplicaciones
donde estos niveles son
asignados a determinados
smbolos la codicacin se
realiza siguiendo criterios
ms complejos (entropa).
CONVERSIN D/A
El procedimiento inverso al
muestreo, la reconstruccin de
la seal analgica a partir de
sus muestras, consistir en la
eliminacin de todas esas
copias espectrales digitales
mediante el uso de un ltro
paso-bajo ideal.
Como se ha visto el
proceso de muestreo
genera innitas copias
del espectro de la seal
analgica original.
RECONSTRUCCIN.
Fall 2000 Copyright 1999 Andreas Spanias I-12
Signal Reconstruction Analytically for ! !
s
=2B
) ( sinc ) (
2
1
) ( Bt d e H t h
t j
= =
!
"
" #
! !
"
!
) ( ) ( ) ( * ) ( ! !
s s
X H t x t h $
%
&
'
(
)
*
# =
+
"
#" = n
nT t nT x Bt t x ) ( ) ( * ) ( sinc ) ( #
+
"
#" =
# = ,
n
nT t B nT x t x )) ( ( sinc ) ( ) (
Remark: Note that the reconstruction filter interpolates between the
samples with sinc functions - hence the name interpolation filter.
E s t e
reconstructor
es ideal; no
se puede
implementar
Fall 2000 Copyright 1999 Andreas Spanias I-11
Signal Reconstruction using an Ideal Filter
... ...
T 2T 3T
... ...
0
) (t x
s
0
) (!
s
X
!
B
s
!
s
! 2
s
! !
B !
t
1/T
... ...

t
0
0
) (t x
) (! X
!
B B !
T
T
t
x
c
(t)
(a)
t
x
s
(t)
(b)
T
t
x
r
(t)
(c)
Figure 4.9 Ideal bandlimited
interpolation.
From Discrete-Time Signal Processing, 2e
by Oppenheim, Schafer, and Buck
1999-2000 Prentice Hall, Inc.
RECONSTRUCCIN.
1.9. Conversion D/A
Conversion D/A. = RECONSTRUCCI

ON + FILTRO SUAVI-
ZADOR.
Muestreo y mantenimiento: En la practica, la conversion D/A
se realiza normalmente combinando un conversor D/A con un cir-
cuito de muestreo y mantenimiento (sample-and-hold, S/H) se-
guido de un ltro pasabaja (suavizado).
Figura 1.11: Operaciones basicas para convertir una se nal digital en una
analogica.
Mantenedor de Orden Cero:
x(t) = x(nT), nT t (n + 1)T
Mantenedor de Orden Uno:
x(t) = x(nT) +
x(nT) x((n 1)T)
T
(t nT), nT t (n + 1)T
Interpolador lineal con retardo:
x(t) = x((n 1)T) +
x(nT) x((n 1)T)
T
(t nT), nT t (n + 1)T
En t = nT, x(nT) = x((n1)T) y en t = (n+1)T, x((n+1)T) =
x(nT) por lo que x(t) tiene un retardo inherente de T segundos al
interpolar la se nal verdadera x(t).
27
ALGUNOS COMENTARIOS
A la hora de muestrear una seal SIEMPRE hay que poner un ltro anti-
aliasing ya que se puede conocer a la perfeccin el contenido espectral de la
seal a muestrear pero no se conoce nada de las posibles interferencias
(ruido). Por ejemplo una seal de 40 KHz no es audible, pero al muestrear a
44 KHz (muestreo en un CD) aparece una componente alias de 4 KHz que
s lo es.........
En el proceso de conversin A/D se modica la seal original de forma
IRREVERSIBLE, tngase en cuenta el proceso de cuantizacin, por lo que
siempre habr una prdida de informacin en ese proceso.
Al nal del proceso de conversin D/A se suele poner un ltro conocido
como ltro de reconstruccin que se encarga de suavizar la seal obtenida
con los diferentes mantenedores.

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