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2, MARCH 2007
Fig. 3. IGBT carrier distribution for on-state and turn-off operation, showing
the depletion layer sweeping out the stored charge as the voltage increases
during turn-off. The boundary currents I 0 I are also indicated.
Fig. 2. Chopper cell circuit used in simulation, showing the AVC control
model. a current buffer stage [10]. This has a cutoff frequency of
and a dc gain of . A Simulink “viscous friction” block is
incorporated to account for the large-signal behaviour of the
feedback block and the amplifier block . Stray induc- amplifier.
tances have also been included. A gate resistor is added for
stability. IV. OPTIMIZATION METHOD
A. Device Models The gate drive optimization concentrates on optimizing the
reference voltage turn-on profile and gate resistance ,
The IGBT and diode models are based on those developed both to reduce the switching losses and to minimize the peak
using a Fourier-series-based solution of the ambipolar diffusion diode recovery voltage overshoot . This is achieved using a
equation (ADE) [6], [7]. These compact, physics-based models formal numerical optimization algorithm [7], [11]. Such an al-
offer an accurate solution of the device physics. They have been gorithm finds the optimum design by varying system parameters
developed for use in both PSpice and MATLAB/Simulink. Here, (e.g., component values, controller gains, or reference wave-
MATLAB is used as a convenient environment for the optimiza- form characteristics) and evaluating the system performance. In
tion algorithm, requiring the Simulink model implementation addition to the optimization algorithm, a suitable function must
[7]. be found to quantify the performance of the system to allow the
The carrier dynamics of the carrier storage region (CSR) are evaluation to proceed automatically. Since the evaluation relies
governed by the ambipolar diffusion equation (ADE) describing on simulation of the system, this function must process the sim-
the behaviour of the excess carrier density. In the Fourier-based ulation results to obtain the performance metric.
solution the excess carrier density is expressed as a Fourier se-
ries in space, which transforms the ADE into a set of ODEs A. Optimization Algorithm
[6]. The boundary conditions of the CSR—necessary to solve Optimization techniques rely on finding the minimum of
the ADE—are the hole and electron currents at each end. The an objective (or cost) function. This is specific to a particular
moving boundary at the gate side of the region determines the problem, and must depend on the system parameters. The
switching characteristics of the IGBT. The interaction of the de- optimum set of parameter values will give the minimum objec-
pletion layer formed during turn-off and the remaining stored tive function (e.g., finding the minimum power dissipation by
charge defines the gate input capacitance and output capacitance varying circuit parameters).
[8], [9]. The formulation used for the gate-collector capacitance The objective function typically embodies good engineering
is given in Appendix I. This is solved in relation to the ADE in a practice. In optimization of the AVC gate drive, the device
continuous manner as part of the model. The output capacitance power dissipation and the diode overshoot voltage cannot be
is implicitly modelled by the movement of the depletion layer expressed as analytic functions of the parameters (gate resis-
boundary as it sweeps out the stored charge, Fig. 3. A simplified tance, feedback gain, etc.). Therefore direct search algorithms
block diagram of the Simulink IGBT model is shown in Fig. 4. must be used to locate the minimum [12], [13]. This involves
Further details are given in [6], [7]. the objective function being evaluated at points surrounding the
current position in the parameter space, and an advantageous
B. AVC Model move being made.
The feedback circuit in Fig. 2 is a potential divider which According to the Hooke and Jeeves Search [13], shown in
reduces the large collector voltage to a suitable level for use in Fig. 5, after a move in a particular direction is made, the search
the control circuit. A single pole with a cutoff frequency of algorithm then tests to see if further movement in the same di-
and a dc gain of is assumed. The amplifier is realized rection would give another reduction in the objective function.
in the gate drive with a wide-bandwidth op-amp, LM7171, and This is known as a pattern move. The search is terminated when
376 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007
Fig. 4. Simulink IGBT model, with labels showing the functions of the various blocks.
B. Implementation
The optimization algorithm is implemented in MATLAB.
The objective function evaluation consists of running the
simulation in Simulink (using a MATLAB function call) and
analyzing the data within MATLAB. Simulation runs which
take longer than a set time are ignored as they generally involve
a lack of convergence, such that the particular simulation is
unlikely to produce a result.
While the reduction in switching losses is the main desired
objective, evaluating this from switching waveforms may be dif-
Fig. 5. Example of the Hook and Jeeves direct search with two variables. ficult to achieve. Therefore the total average power loss over
one complete switching cycle is taken instead. The diode peak
recovery voltage overshoot is simply found by searching for
there is no further improvement in objective function by moving the most negative diode voltage during the IGBT turn-on/diode
in any direction. turn-off switching event. The objectives may be combined into
BRYANT et al.: NUMERICAL OPTIMIZATION OF AN AVC 377
TABLE I
SYSTEM PARAMETERS
Fig. 9. Optimization (1): simulation waveforms for optimized and original pro-
files (P2, solid, and P1, dotted, respectively).
TABLE II
PROFILE PARAMETERS
place during the collector current fall. As the rate of current fall
depends on the small difference between the device voltage and
are given in Table III, showing that the overshoot the supply, the error in tracking the reference results in an error
in the diode reverse recovery voltage, , has been eliminated in the current fall. However, Table IV shows a close agreement
at the expense of a small increase in losses. between the simulated and experimental switching energies at
The effect of reducing the load current to 50 A is shown in the two current levels, showing that the improvement expected
Fig. 11 for profiles P1 and P3. The diode recovery occurred be- is obtained experimentally.
fore the second ramp in both cases. The optimization continued The practical effect of adopting a fixed profile for a range of
(index 3, Table III), at 50 A, giving profile P4, and a low diode load currents is illustrated in Figs. 17 and 18. Fig. 17 shows
overvoltage was maintained, Fig. 12. turn-on at a load current of 113 A, using profile P4. The second
ramp occurred before the completion of the diode recovery, ac-
C. Experimental Validation of Optimization Trends companied by an increased diode overshoot voltage. Fig. 18
Experimental and simulation waveforms for turn-on and shows turn-on at a load current of 50 A, using profile P3. The
turn-off are shown in Figs. 13 and 14, respectively, for a load diode recovery occurred during the first ramp, leading to in-
current of 113 A, using the optimized profile P3. Similar creased losses, Table IV.
waveforms are shown, in Figs. 15 and 16, for the reduced load
current of 50 A, using the optimized profile P4. The simu- VI. DISCUSSION
lated waveforms contain similar features to the experimental The results in Section V show that the simulation captures
waveforms. The tracking of the reference in the experimental the behaviour of the AVC gate drive sufficiently accurately to
results is not as close as that predicted by the simulation. The be used in formal optimization. In particular, the switching en-
experimental results in Fig. 14 show a small oscillation in the ergy predictions in Table IV are close to the experimental values.
rising collector voltage not contained in the simulation. In Some of the errors between the simulation and experimental
Figs. 8 and 14 active clamping of the collector voltage is taking waveforms may be accounted for by the models used in the
BRYANT et al.: NUMERICAL OPTIMIZATION OF AN AVC 379
Fig. 10. Optimization (2): simulation waveforms for the optimized profile P3 Fig. 12. Optimization (3): simulation waveforms at reduced current (50 A),
(solid), compared with those for profile P2 (dashed). with the profile optimized for 50 A (P4, solid) and that for 113 A (P3, dotted).
Fig. 11. Simulation waveforms for reduced current operation (50 A), with the Fig. 13. Experimental (dotted) and simulated (solid) waveforms for turn-on
original profile P1 (dotted) and the profile optimized for 113 A (P3, solid). with the optimized profile (P3) at 113 A.
simulation of the gate drive. The two-stage turn-on profile al- reverse recovery voltage becomes large in magnitude, as is ev-
lows the diode to recover before the IGBT collector voltage has ident from Fig. 9. This shows that the optimization correctly
reached its on-state value, although successfully achieving this determines that hard switching results in the minimum IGBT
depends on the choice of the profile. Clearly this may be ex- losses, Table IV. The reintroduction of a large diode peak re-
pected to increase the turn-on switching losses. Consequently, verse recovery voltage is unattractive, and the loss of control
optimization (1) effectively removes active control of the gate, over the IGBT is unacceptable when switching series-connected
forcing the IGBT into hard switching. However, the peak diode devices.
380 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007
Fig. 14. Experimental (dotted) and simulated (solid) waveforms for turn-off Fig. 16. Experimental (dotted) and simulated (solid) waveforms for turn-off
with the optimized profile (P3) at 113 A. with the optimized profile (P4) at 50 A.
TABLE IV
SWITCHING ENERGIES
and the gate around the edge of the cell, Fig. 19. It has been
observed from detailed device simulations that during turn-off,
the gate depletion layer expands from the edge of the intercell
region under the gate, and moves towards the P-well as the ac-
cumulation layer under the gate is removed. It is also assumed
that the depletion layer extends the same distance laterally as it
does vertically, and that the width of this depletion layer, ,
is set by the difference between the MOS channel voltage
and the gate voltage
(2)
[4] P. Palmer, Y. Wang, M. Abu-Khaizaran, and S. Finney, “Design of Yalan Wang (S’05) received the B.S. degree in
the active voltage controller for series IGBTs,” in Proc. PESC Conf., electrical engineering from Xi’an Jiaotong Univer-
Aachen, Germany, Jun. 2004, pp. 3248–3254. sity, Xi’an, China, in 2000 and is currently pursuing
[5] T. Lim, S. Finney, B. Williams, and P. Palmer, “Active clamping on the Ph.D. degree in the Department of Engineering,
series connected free-wheel diodes through active voltage control,” in University of Cambridge, Cambridge, U.K.
Proc. PESC Conf., Aachen, Germany, Jun. 2004. Her research interests are mainly in the drive and
[6] P. Palmer, E. Santi, J. Hudgins, X. Kang, J. Joyce, and P. Eng, “Cir- control of high-power semiconductor devices and se-
cuit simulator models for the diode and IGBT with full temperature ries device connection, including computer simula-
dependent features,” IEEE Trans. Power Electron., vol. 18, no. 5, pp. tion, analysis, circuit implementation, and testing.
1220–1229, Sep. 2003.
[7] P. Palmer, A. Bryant, J. Hudgins, and E. Santi, “Simulation and
optimization of diode and IGBT interaction in a chopper cell using
MATLAB and Simulink,” in Proc. Ind. Appl. Soc. Conf., Pittsburgh,
PA, Oct. 2002, vol. 4, pp. 2437–2444.
[8] A. Hefner, “An improved understanding for the transient operation of Stephen J. Finney received the M.Eng. degree in
the power insulated gate bipolar transistor (IGBT),” IEEE Trans. Power electrical and electronic engineering from Lough-
Electron., vol. 5, no. 4, pp. 459–468, Oct. 1990. borough University of Technology, Loughborough,
[9] P. Palmer and J. Joyce, “Circuit analysis of active mode parasitic os- U.K., in 1988 and the Ph.D. degree from Heriot-Watt
cillations in IGBT modules,” Proc. Inst. Elect. Eng. G., vol. 150, no. 2, University, Edinburgh, U.K., in 1994.
pp. 85–91, Apr. 2003. He worked for the Electricity Council Research
[10] Y. Wang, A. Bryant, P. Palmer, S. Finney, M. Abu-Khaizaran, and G. Center before joining the Power Electronics Re-
Li, “An analysis of high power IGBT switching under cascade active search Group, Heriot-Watt University in 1990.
voltage control,” in Proc. Ind. Appl. Soc. Conf., Hong Kong, Oct. 2005, From 1994 to 2005, he was a member of academic
pp. 806–812. staff at Heriot-Watt University and is currently a
[11] A. Bryant, X. Kang, E. Santi, P. Palmer, and J. Hudgins, “Two-step Senior Lecturer with the Institute of Energy and
parameter extraction procedure with formal optimization for physics- Environment, University of Strathclyde, Glasgow, U.K., specializing in power
based circuit simulator IGBT and PIN diode models,” IEEE Trans. electronic systems. He has published over 20 articles in IEEE and IEE journals.
Power Electron., vol. 21, no. 2, pp. 295–309, Mar. 2006. His research interests include the power electronics for high power applications
[12] W. Murray, Numerical Methods for Unconstrained Optimization. and the management of distributed energy resources.
London, U.K.: Academic, 1972.
[13] R. Hooke and T. Jeeves, “‘Direct search’ solution of numerical and sta-
tistical problems,” J. Assoc. Comput. Mach., vol. 8, no. 2, pp. 212–229,
Apr. 1961. Tee Chong Lim received the B.Eng and Ph.D.
[14] N. Shammas, M. Rahimo, and P. Hoban, “Effects of temperature, for- degrees in engineering from Heriot-Watt University,
ward current and commutating di/dt on the reverse recovery behaviour Edinburgh, U.K., in 2000 and 2005, respectively.
of fast power diodes,” in Proc. EPE Conf., Seville, Spain, 1995, vol. 1, He is currently a Research Fellow with Strathclyde
pp. 577–582. University, Glasgow, U.K. His research activity in-
[15] D. Jaeggi, C. Asselin-Miller, G. Parks, T. Kipouros, T. Bell, and P. cludes power electronics involving series connection
Clarkson, “Multi-objective parallel tabu search,” in Proc. Int. Conf. of semiconductor devices, gate drive circuits, and in-
Parallel Problem Solving Nature, Birmingham, U.K., Sep. 2004, pp. verter drives.
732–741.
[16] A. Bryant, D. Jaeggi, G. Parks, and P. Palmer, “The influence of op-
erating conditions on multi-objective optimization of power electronic
devices and circuits,” in Proc. IEEE 40th Annu. Ind. Appl. Soc. Conf.,
Kowloon, Hong Kong, Oct. 2005, pp. 1449–1456.