IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I1

ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 43, NO. 12, DECEMBER 1996

843

CMOS Class-AB Current Mirrors for Precision Current-Mode Analog-Signal-Processing Elements

Shoji Kawahito and Yoshiaki Tadokoro Abstract-CMOS class-AB current mirrors for high-precision currentmode analog-signal-processingelements are described. The class-AB configuration allows us to reduce the offset error caused by device mismatch, the nonlinearity distortion, and power consumption. The offset error due to the device mismatch is greatly reduced by the reduction of the bias current. The class-AB current-mirror has less sensitivity to the mismatch since the bias current relative to the signal current can be reduced. The excellent precision is confirmed by Monte Carlo simulation and SPICE based on 1 pm CMOS LSI parameters.

fVDD f

t -0 lout

I. INTRODUCTION
Current-mode analog signal processing circuitry is quite useful for high-frequency low-power applications such as filters and data converters, especially in the mixed analog-digital LSI. The basic circuits can be implemented by the process technology for digital LSI. There are two types of current-mode analog signal processing circuits; continuous-time circuits and switched-current circuits [11, 121. The basic building block is a current-mirror, especially a MOS currentmirror. To treat bidirectional current at the input and the output of the current mirror, bias currents are usually supplied at the input and the output. This type of circuit is considered as a class-A configuration. As a result of statistical analysis of the precision, it is clear that the presence of large bias current relative to the signal current leads to the offset error of the current due to the device mismatch. In this brief, we present that a class-AB current mirror as the basic building blocks of current-mode analog signal processing circuits is effective for precision continuous-time filters. A gain programmable class AB current mirror using MOS transistors operated in weak inversion has been reported recently [3]. The fixed-gain class-AB current mirror operates in ordinary strong inversion, and can treat large current swing [ ] The class-AB configuration using both p4. channel and n-channel current mirrors allows to reduce the bias current relative to the signal current. This leads to the reduction of the offset current at the output caused by the mismatch between MOSFET's used for the current-mirrors. The complementary circuit configuration is also effective to reduce the harmonic distortion, since the input current-to-voltage characteristic has quite good linearity for wide input-current range. The reduction of bias current also leads to the low-power dissipation. These characteristics are examined by the simulations using Monte Carlo method and the SPICE.
11. CLASS-AAND CLASS-AB CURRENT MIRRORS

(a) (b) Fig. 1. (a) Class-A and (b) class-AB current mirrors with bias circuits.

Fig. 2. Bias circuits for the class-AB current mirror. voltage, respectively. The variance of the drain current due to the mismatch of the MOSFET uyd is given by

[5], where is the if there is no correlation between I(, and mean value of z, and U: is the variance of z. Similar relationship can be obtained for p-channel MOSFET with the drain conductance coefficient of lip the threshold voltage of VQ. Similarly, we can and calculate the variance of the error of output current of the class-A : current mirror, a when Gaussian current signal (standard deviation is u , , ~ )is added at the input, and the bias current I B generated by p-channel MOSFET is supplied at the input and the output as follows:

Fig. l(a) shows the class-A current mirror with the bias circuits, which is the basic building block for the continuous-time currentmode filters [l]. All the MOS transistors operate in the saturation region of the drain current-to-voltage characteristic. The simple drain characteristic of n-channel MOSFET in saturation region is given by Id = Kn(V,, - V T , ) ~ where K , is the drain conductance coefficient, V,, is the gate-to-source voltage, is the threshold Manuscript received July 3, 1995; revised November 12, 1995. This paper
was recommended by Associate Editor S. Ioaei.

The authors are with the Department of Information and Computer Sciences, Toyohashi University of Technology, Toyohashi 441, Japan. Publisher Item Identifier S 1057-7130(96)07630-6.

From this equation, it is clear that the mismatch error greatly depends on the presence of the bias current. If he bias current IB is reduced relative to the signal current uslg,the signal-to-error ratio is greatly improved. However, in the case of the class-A current mirror, negative signal current larger than I B can not be treated, and the signal is clipped for such signal current. To avoid this signal clipping, I B should be larger than 3uSlg. class-AB current mirror shown in The Fig. l(b) allows us to treat the signal current larger than I B , so that the mismatch error, especially offset error, can be reduced. In this

1057-7130/96$05.00 0 1996 IEEE

844

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I1

ANALOG AND DIGITAL SIGNAL PROCESSING, VOL 43, NO 12, DECEMBER 1996

TABLE I DEVICE R M T R OF MOSFET USED FOR CURRENT P A EE S A MIRRORS

100 t

Channel lengthwm) Channel width@

Standard

0 0 11 .0
Threshold voltage, VT (V) Standard , deviation of V,

0.1 0.1
1.47

1.23

mi (mv)

Fig 3

Bias current dependency of the mismatch errors

circuit, the input current is separated into two current components to the nMOS current mirror and PMOS current mirror. The input transistors, M1 and M 2 are also biased by the current mirror scheme shown in Fig. 2. The bias currents for the nMOS and PMOS current mirrors can be set to I B which is same as the input current of the bias circuit. If the drain conductance coefficients and the absolute values of the threshold voltage are the same for M1 and M 2 , the current components, I , and I p in Fig. 2 is given by

vB30p
1
10

I B / a sig

v 1 B

(3) for - 4 1 ~ 5 I,, 5 4 1 ~ For I,, < - ~ I BI,, = I,, and I p = 0. . For I,, > ~ I B p = I,, and I, = 0. Obviously, the relationship I, I,, = I , Ip is always satisfied. Under the above-mentioned characteristic condition, the linear input current (I,,)-to-voltage given by I,, = 44is obtamed for the input current 5 , range of - 4 1 ~5 IIn ~ I Bwhere IC,, is the dram conductance coefficient of the transistors .MI and M i . This is advantageous in the application to continuous-time current-mode filters to reduce the harmonic distortion. The relationship between the bias current and the mistmatch error for class-A and class-AB current-mirrors are obtained by Monte Carlo simulation as shown in Fig. 3. The both axes are normalized by the signal current. In this analysis, the 1 pm CMOS LSI implementation is assumed, and the parameters used in this analysis are summarized in Table I. The standard deviations of the parameters is based on the data in [6]. A Gaussian signal whose standard deviation is oslg= 500 p A is assumed as the input signal to allow the statistical simulation using Monte Carlo method. For large bias current region, es have nearly the same mismatch error, and the error of the class-A current mirror is agree with the the0 component is offset error. However, in the current is less than 3oSlg,the error of the class-A current minor is drastically increased because of the signal clipping. In contrast, in the t mirror, the mismatch error can be further reduced bias current. T h s value is finally re value limited by the current gain error due to the class-AB current mrror has two signal passes through nMOS and PMOS current mirrors, so that the current gain error is larger than those of the theoretical value of the class-A current mirror without considering the current clipping effect. From Fig. 3, the total error of

(x,)

Fig. 4. A class-AB current rmrror using cascode circuits. the class-AB current mrror in the case I B = oSlg/4is about 1/3 of that of class-A current-mirror in the case I B = ~ C T , , ~ . 111. PRACTICAL CLASS-ABCURRENT MIRROR In order to achieve high precision, the error due to drain conductance, or channel-length modulation effect should be also reduced. The cascode scheme is useful for reducing the error. The practical class-AB current mirror employing the cascode schemes for PMOS and nMOS current mirrors is shown in Fig. 4. The current-transfer and the input voltage-to-current characteristics of the designed class-AB current mirror is obtained by the circuit simulator SPICE using the device parameters (level-3 MOSFET model) of 1 pm CMOS LSI process, as shown in Fig. 5. The power supply voltage is 5 V. The transistor size of the current mirror is same as those in Table I. The transistor size of M I and Mz is the channel length of 1 p m for both transistors and the channel width of 100 p m and 300 pm, respectively. Extremely good linearity in current transfer characteristic whose current gam is 1 is obtained, despite the nonlinear relation between input current and the current component of PMOS or nMOS current mirror. The linearity of the input current-to-voltage (I-V) is also excellent as shown in Fig. 5(b). Continuous-time filter design using current-mode technique is based

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-11:

ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 43, NO. 12, DECEMBER 1996

845

500

Suppressing Chaos with Hysteresis in a Higher Order Neural Network

Lip0 Wang

T 250
?!

.I:
b .

U *.

0 -250

-500

-250 0 250 Input current @A)

500

02

c-

0.1

B
8

- -0.1
1 Z

? ;

-02
-500 -250 0 250 Input current @A) 500

(b) Fig. 5. Current transfer and input current-to-voltage characteristics. on linear approximation of the I-V characteristics, and the class-AB current mirror allows to do the linear approximation for relatively large signal current swing. This leads to the reduction of the harmonic distortion due to the nonlinearity of the I-V characteristics. IV. CONCLUSIONS This brief describes the property of the high-precision class-AB current mirror. The complementary current transfer nature allows us to reduce the bias current compared to the signal current, and this property leads to the reduction of the mismatch sensitivity to the current offset error. The basic idea of this c1ass-M current-mirror can be also applied to switched-current signal processing circuits.
REFERENCES

Artificial neural networks (ANNS)attempt to mimic various features of a most powerful computational system-the human brain. Since ANNS consist of a large number of parallel array of simple processing elments (neurons), they are naturally suited for todays fast-developing VLSI technology. For instance, Linares-Barranco et al. [l] designed a programmable analog neural oscillator with hysteresis appropriate for monolithic integrated circuits. Dynamic systems have many applications; however, stability is often desired. We show analytically that hysteresis at the single neuron level can provide a simple means to preserve stability in an ANN even when the nature of the system is chaotic. Wang and Ross [2] studied static retrieval performance of a network of binary hysteretic neurons in the presence of random noise. They showed that neuronal hysteresis, which results in a tendency for each neuron to remain in its current state, helps the neurons to resist random signals and avoid random response, thereby improving the overall retrieval ability of the network. Through numerical simulations to solve an optimization problem, Takefuji and Lee [3] used binary hysteretic neurons to accelerate the convergence to the global minimum by suppressing oscillatory behaviors encountered during the convergence process. However, these oscillatory behaviors should be considered numerical artifacts, since the dynamics in neural networks used for these optimization problems are nonoscillatory and the convergence process represents a descent on a Lyapnov energy surface. In this brief we consider N binary hysteretic neurons with the following updating rule (Fig. 1) (see (1) at the top of the next page) where S,(t) represents the state of neuron i at time t and a is the half-width of the bistable region. The total input for neuron i is

,=1

i,k=l

where
n

S. S. Lee, R. H. Zele, D. J. Allstot, and G. Liang, CMOS continuoustime current-mode filters for high-frequency applications, ZEEE J. Solid-state Circuits, vol. 27, pp. 323-329, 1993. J. B. Hughes, N. C. Bird, and J. C. Macbeth, Switched currents-A new technique for sampled-data signal processing, in Proc. ZEEE Znt. Symp. Circuits Syst., 1989, pp. 1584-1587. J. R. Angulo, Wide range gain programmable class AB linear current mirrors for low supply voltage operation, IEEE Trans. Circuits Syst. ZI, vol. 41, pp. 631-634, Sept. 1994. 2. Wang, Wideband class AB (push pull) current amplifier in CMOS technology, Electron. Lett., vol. 26, pp. 543-545, Apr. 1990. K. R. Lakshnnikumar, R. T. Hadaway, and M. A. Copeland, Characterization and modeling of mismatch in MOS transistors for precision analog design, IEEE J. Solid-state Circuits, vol. SC-21, pp. 1057-1066, 1986. M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, Matching properties of MOS transistors, ZEEE J. Solid-state Circuits, vol 24, pp. 1433-1440, 1989.

are the modified first- and second-order Hebbian synaptic efficacies, gp is the pth stored pattern, and p is the number of patterns stored. The coefficients y and 7 2 measure the relative strengths of first- and l second-order interactions. We have introduced synaptic disruptions in the efficacies T,, and Z , k by choosing random variables and C2,k as follows: C is 1 with a probability (GIN), CtJk is 1 , with a probability ( 2 C / N 2 ) , and Ctjk are zero otherwise. We also include in (2) a background Gaussian noise 71% with a standard deviation oo in order to take into account the presence of signal transmission noise. In the absence of neuronal hysteresis (a = 0), the above higherorder system was discussed by Wang, Pichler, and Ross [4]. The

c,,

cz,

Manuscript received March 18, 1995; revised November 12, 1995. This paper was recommended by Associate Editor S . Kiaei. The author is with the School of Computing and Mathematics, Deakin University,Clayton, Victoria 3168, Australia. Publisher Item Identifier S 1057-7130(96)07627-6.

1057-7130/96$05.00 0 1996 IEEE