T 2004

Projection Television Technical Training & Troubleshooting Manual

ECHNICAL RAINING

V25

V25 WS-48515 WS-55515 WS-65515

V25+

V25++

WS-55615 WS-55815 WS-65615 WS-65815 WS-73615

MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.

V25 CHASSIS TECHNICAL TRAINING AND TROUBLESHOOTING MANUAL TABLE of CONTENTS Introduction
Models ............................................................................................................... 1 Features ............................................................................................................... 2 CableCARD ...................................................................................................... 3 HDMI ............................................................................................................... 7

Chapter 1... Disassembly and Service

Disassembly Procedures .................................................................................. 1-1 PCB & Main Component Locations ................................................................... 1-3 DM3 PCB Replacement .................................................................................... 1-5 Composite Cabinet ............................................................................................ 1-6

Chapter 2... Alignment Procedures

Service Menu Access Codes ............................................................................. 2-1 Initial Setup ........................................................................................................ 2-1 Circuit Adjustment Mode .................................................................................... 2-3 Convergence Adjustment Mode ......................................................................... 2-5 Alignment Data Storage Locations ..................................................................... 2-6

Chapter 3... Power Supply

Power Supplies ................................................................................................. 3-1 Standby Power Supply ....................................................................................... 3-2 Switched Power Supply ..................................................................................... 3-3

Chapter 4... Control Circuitry

Basic uPC Requirements .................................................................................. 4-1 Reset Circuitry ................................................................................................... 4-2 Input Command Circuitry .................................................................................. 4-3 Control Block Diagram ....................................................................................... 4-4 Parallel Inputs & Outputs .................................................................................... 4-8

Chapter 5 ... Video/Color Circuitry

Overall Block Diagram ....................................................................................... 5-1 RGB CRT Drive & Protect Circuitry .................................................................... 5-2

Chapter 6 ... Sync, Deflection and High Voltage

Overall Block Diagram ...................................................................................... 6-1 Sync Signal Path ............................................................................................... 6-2 Vertical Deflection .............................................................................................. 6-3 Horizontal Deflection .......................................................................................... 6-4 Deflection Loss Detection .................................................................................. 6-5 High Voltage & HV Regulation............................................................................ 6-6 X-Ray Protect .................................................................................................... 6-7

Chapter 7... Convergence Circuitry

Overall Block Diagram ...................................................................................... 7-1 Waveform Generator and D/A Converter .......................................................... 7-2 LPF and Summing Amplifiers ............................................................................ 7-3 Convergence Output Circuitry ........................................................................... 7-4

Chapter 8 ... Sound Circuitry

Overall Block Diagram ...................................................................................... 8-1 Digital Audio Out ................................................................................................ 8-2

Chapter 9 ...Troubleshooting Tips

Using the Front Panel LED ................................................................................. 9-1 Disabling the CRT Protection Circuits ................................................................ 9-2

II

Introduction
Chassis V25 V25+ V25++ 48" W WS-48515 Screen 55" W WS-55515 WS-55615 WS-55815 Size 65" W WS-65515 WS-65615 WS-65815 73" W WS-73615 Table 1: V25 Models

The V25 Chassis is carried in 4 screen sizes with 3 feature levels for 2004 and 2005. This CRT based projection television is a full featured, integrated HDTV using all the latest technologies. A breakdown of V25 models is shown in Table 1. Weights and Dimensions are shown in Table 2.

9" CRTs available in 65" & 73 Models MediaCommand with 5 Format Memory Card Reader (JPG/MP3/WMA Player) Quad Field Focus (CRT Beam Forming) New Features CableCARD HDMI Combined Digital/Analog Tuner CableCommand (Digital Cable Control) ChannelView (On Screen Channel List) Full Screen Freeze Frame ColorPure (Lens color filtering) Serviceability Features Modular design with "Light Box" Self Diagnostics Serviceable to Component or PCB level. Reduction in number of stand-up PCBs. Service Adjustment Data Reset. This section will provide further explanation of: 1) CableCARD 2) HDMI

Features
Table 3 shows some of the major features by model category. Some of the features are carried over from previous years and some are totally new. In addition to all the user features, the V25 chassis includes the many serviceability features technicians are used to when working on Mitsubishi PTVs. Significant Carry Over Features IEEE1394, FireWire (Digital Interface) NetCommand 4.0 with IR Learning (A/V System Control) PerfectColor (Advanced Color Control) AMVP 2nd Generation (Line Doubler, Raster Formatter, Color Control, Digital Video Processor).

Model WS-48515 WS-55515 WS-55615 WS-55815 WS-65515 WS-65615 WS-65815 WS-73615

Weight 172 lbs 213 lbs 213 lbs 195 lbs 327 lbs 327 lbs 276 lbs 313 lbs Table 2:

Height Width Depth Spkrs 49 in 44.5 in. 24 in. 5" 10W 53 in 56 in 34 in 6" 10W 50.5 in 51 in 28 in 6" 10W 50.5 in 51 in 27 in 5x7" 10W 62 in 59 in 28 in 6" 10W 62 in 59 in 28 in 6" 10W 62 in 58 in 28 in 5x7" 10W 66 in 66 in 30 in 6" 10W V25 Weight & Dimensions

ColorTuned DiamondShield

Integrated HDTV Receiver

Anti-Glare DiamondShield

Tru-Focus Lenses

NetCommand 4.0

QuadField Focus

ColorPure Filters

Chassis V25 V25 V25 V25+ V25+ V25+ V25++ V25++

Models WS-48515 WS-55515 WS-65515 WS-55615 WS-65615 WS-73615 WS-55815 WS-65815

X X X X X X X X

X X X X X X X X

X X X X X X X X

X X X X X X

X X X X X X

X X X X X X

X X X X X X X X X X X X X X X X X X

X X X X X X X X

X X X

X X X X X X X X Table 3: Features

MediaCommand

ChannelView

PerfectColor

CableCARD

HDMI Input

9" CRTs

AMVP II

ANT-1 MAIN

CableCARD
September 2003 the FCC released the regulations for the Plug and Play Cable Standard. This provides a national standard for cable systems effective July 1, 2004. The goal of the standard is to promote digital cableready devices that can plug into each other and any digital cable system in the United States. Two important aspects of the standard are: 1) Any consumer with a HD digital cable box can have it replaced at no charge with a box that includes an IEEE1394 interface. 2) A national standard for de-scrambling cable systems using a Point Of Deployment (POD) module, now commonly referred to as a CableCARD. These aspects impact Mitsubishi Bigscreen customers in the following ways. All Mitsubishi digital TVs with a IEEE1394 interface are readily equipped to have a single wire digital interface for a HD cable box. The provision standardizing Digital CableReady products will allow the consumer to purchase a TV with an integrated cable box with the assurance it will be compatible with their local cable providers equipment, even if they relocate. This eliminates the need for a separate cable box. TVs that are designated Digital Cable-Ready will include the POD feature consisting of a removable module, provided by the cable operator for de-scrambling.

In addition to enabling the reception of both scrambled and unscrambled digital cable broadcasts, the standard will support more options such as: Emergency Alert Messages Interactive Program Guide Services Impulse Pay Per View Services Video On Demand Other messaging and interactive services All V25 and V26 Chassis models are Digital CableReady. Hardware Requirements Digital Cable Ready hardware requirements include: The host device (TV or Set Top Box), owned by the consumer, should provide generic cable tuning for unscrambled digital and analog broadcasts. In addition to the cable tuner, the host must include an Out-Of-Band (OOB) tuner to receive data for decoding scrambled broadcasts and receiving program guide and other feature specific information. A removable POD security module, owned by the cable operator, that is programmable for conditional access to specialized broadcasts. An interface connector between the host device and the module that allows the host to accept PODs provided by different cable operators. Simply stated, a CableCARD slot. The interface uses the PCMCIA, Type II protocol. So, the POD module is similar in appearance to many of the modules used with lap top computers. See Figure 1.

The PCMCIA (Personal Computer Memory Card International Association) interface has 68 pins. Type II cards measure (L)85.6mm (W)54.0mm (D)5.0mm. Pin assignments are shown in Table 4. A full explanation of each pin will not be discussed here. POD modules can be either Single-Stream (S-Card) or Multi-Stream (M-Card). When power is applied, the host examines the configuration of the VS2# and MDET pins to determine which of the two type cards has been inserted. An S-Card can only operate with a single tuner device. With todays demand for multi-tuner receivers with features like PIP and Digital Video Recorders, a second generation M-CARD is required.

Figure 1: PCMCIA CableCARD

P C Card P C Card Pin Memory Memory S ig nals I/O 1 GND DC 2 D3 I/O 3 D4 I/O 4 D5 I/O 5 D6 I/O 6 D7 I/O 7 CE1# I 8 A 10 I 9 OE# I 10 A 11 I 11 A 9 I 12 A 8 I 13 A 13 I 14 A 14 I 15 W E# I 16 REA DY O 17 VCC DC in 18 VPP1 DC in 19 A 16 I 20 A 15 I 21 A 12 I 22 A 7 I 23 A 6 I 24 A 5 I 25 A 4 I 26 A 3 27 A 2 28 A 1 29 A 0 30 31 32 33 34 D0 D1 D2 WP GND I I I I I/O I/O I/O O DC

S -CARD S -CARD M-CARD M-CARD S ig nals I/O S ig nals I/O GND D3 D4 D5 D6 D7 CE1# Un u s ed OE# Un u s ed DRX CRX Un u s ed M CLKO W E# IREQ# VCC VPP1 M IVA L M CLKI Un u s ed QT X ETX ITX CTX Un u s ed Un u s ed A1 A0 D0 D1 D2 IOIS16# GND I/O I/O I/O O DC DC I/O I/O I/O I/O I/O I I I I O I O DC in DC in I I O O O I GND Un u s ed Un u s ed Un u s ed Un u s ed Un u s ed Un u s ed Un u s ed Un u s ed Un u s ed DRX CRX M OCLK Un u s ed Un u s ed Un u s ed VCC VPP1 Un u s ed Un u s ed M ICLK QT X ETX ITX CT X Un u s ed SCT L SCLK SDI Un u s ed Un u s ed Un u s ed M DET GND I I I DC

I I O

DC in I

I O O O I

P C Card PC Card Pin Memory Memory S ig nals I/O 1 35 GND DC 36 CD1# O 37 D11 I/O 38 D12 I/O 39 D13 I/O 40 D14 I/O 41 D15 I/O 42 CE2# I 43 VS1# O 44 RFU 45 RFU 46 A 17 I 47 A 18 I 48 A 19 I 49 A 20 I 50 A 21 I 51 VCC DC in 52 VPP2 DC in 53 A 22 I 54 A 23 I 55 A 24 I 56 A 25 I 57 VS2# O 58 RESET I 59 W A IT# O 60 RFU 61 REG# 62 BVD2 63 BVD1 64 65 66 67 68 D8 D9 D10 CD2# GND I O O I/O I/O I/O O DC

S -CARD S -CARD M-CARD M-CARD S ig nals I/O S ig nals I/O GND CD1# M DO3 M DO4 M DO5 M DO6 M DO7 CE2# VS1# IORD# IOW R# M ISTRT M DI0 M DI1 M DI2 M DI3 VCC VPP2 M DI4 M DI5 M DI6 M DI7 VS2# RESET W A IT # INPA CK # REG# M OVA L M OST R T M DO0 M DO1 M DO2 CD2# GND DC O O O O O O I O I I I I I I I DC in DC in I I I I O I O O I O O O O O O DC GND CD1# M DO3 M DO4 M DO5 M DO6 M DO7 Un u s ed VS1# Un u s ed Un u s ed M IST RT M DI0 M DI1 M DI2 M DI3 VCC VPP2 M DI4 M DI5 M DI6 M DI7 VS2# RESET Un u s ed SDO Un u s ed Un u s ed M OSTRT M DO0 M DO1 M DO2 CD2# GND O O O O O DC DC O O O O O O O

I I I I I DC in DC in I I I I I/O I O

O DC

Table 4: C ableC A RD P C MC IA P in Assignm ents

Figure 2: Multi-Stream Receiver A block diagram of a multi-tuner receiver with PIP capabilities is shown in Figure 2. When two different digital cable channels are selected to be viewed together within a PIP, the two MPEG digital bitstreams output from the QAM tuner/demodulators are directed to a multiplexor where they are temporarily combined together. The multiplexed bitstream is then sent, one complete MPEG transport packet at a time, across the interface to the CableCARD for decryption. Decryption is accomplished using data received by way of the Out-Of-Band (OOB) tuning circuitry. After decryption, the bitstream is then de-multiplexed and the separate MPEG signals are decoded. The two video signals are then combined by conventional PIP circuitry. A single M-CARD is capable of supporting up to 5 QAM-256 tuner/demodulators. M-CARDs are also backward compatible with singlestream systems. Of course, single stream receivers are far simpler since they dont require the additional tuning, multiplex or MPEG decoder circuitry. The POD interface also provides a communication link between the cable service provider and the host devices microprocessor circuitry. This enables the download of data such as channel maps and program guides. This communication link also uses the Out-Of-Band tuner, (named because the carrier frequency is out of the TV RF band). The frequency used can be between 70 and 130 MHZ. The actual tuning frequency is determined by the POD module. Operation When a CableCARD is first used, it must go through an authentication process that binds the card and host. This is accomplished by automatically displaying an onscreen message similar to that shown in Figure 3. Please call XYZ Cable at 555-555-1234 to activate cable service. They will need these numbers: Host ID: XXX-XXX-XXX-XXX-X CableCARD ID: XXX-XXX-XXX-XXX-X See owners manual for further information. Figure 3: Card-Host ID Menu Note: To re-access the ID Menu in the V25 & V26 Chassis, press <TV MENU> <9-9-9>. (CableCARD required for menu to appear)

After the customer calls the cable company and supplies the necessary information, the cable company can activate the card by sending a specifically addressed data packet. After authentication, an on-screen message similar to that shown in Figure 4 will be displayed. Actual messages may vary because they are determined by the cable provider. Messages are displayed for a maximum of 2 minutes. CableCARD is active Host ID: XXX-XXX-XXX-XXX-X CableCARD ID: XXX-XXX-XXX-XXX-X Contact your cable operator for further information. Press HOME key to exit. Figure 4: Card-Host Activation Screen

This assumes a system with one-way (receive only) communication. Future generations may have two-way capabilities. These systems will not require the user to perform these functions. Copy Control Information (CCI) Under the standard, Copy Control Information (CCI) is used to indicate the copying rules that may be included with high value programming. CCI can indicate: Copy Freely - Any number of copies can be made. Copy Once - Only one copy is permitted. Copy No More - A copy has been made and no more are permitted. Copy Never - Copying is not allowed. Content encoded with CCI that has been decrypted by a CableCARD must be protected by re-encryption when placed back on any digital interface such as IEEE1394. In addition, any analog outputs will include copy protection.

Figure 5: V25 Chassis - Signal Block Diagram

Signal Block Diagram A block diagram of the V25 signal flow, shown in Figure 5, shows the major components associated with the CableCARD. The Main Tuner, TU8701, receives the digital cable signal. The OOB Tuner, TU8702, receives the OOB data. After decoding takes place in IC8806, the MPEG transport bitstream and OOB data is relayed to PCB-DM3. The POD Interface then exchanges the data with the CableCARD plugged into the PCMCIA slot. After de-scrambling, the data is passed along for MPEG Decoding. PIP/POP insertion and raster scaling can also occur in the same IC. After passing through the Doubler circuit for D/A conversion, the signal is directed to the VCJ and then to the CRTs.

HDMI High-Definition Multimedia Interface was developed to transmit uncompressed digital television and audio signals from DVD players, set-top boxes and other audiovisual sources to television sets, projectors and other displays. HDMI can carry all ATSC digital high definition video formats and more. In addition, it supports up to 8 channel digital audio and optionally, bi-directional control and status information. As long as video formats and resolutions are compatible, devices meeting the specification for HDMI will be capable of inter-operating with one another regardless of the manufacturer of the product. Because of its additional capabilities, HDMI is used instead of MonitorLink (DVI) in much of Mitsubishis 2004/2005 product line. However, with the use of a simple adaptor, HDMI is backwards compatible with DVI. So, models with DVI connections can be connected to those with HDMI. Of course, the connection will have the limitations of the DVI device, making it a digital video connection only. Audio would need a separate connection.

CEC DDC DVI EDID HDCP HPD TMDS

Acronyms/Abbreviations Consumer Electronics Control Display Data Channel Digital Visual Interface Extended Display Identification Data High-bandwidth Digital Content Protection Hot Plug Detect Transition Minimized Differential Signaling Table 5

Shared Technologies HDMI shares many of the same technologies used by DVI. These shared technologies include: Transition Minimized Differential Signaling (TMDS) Display Data Channel (DDC) Extended Display Identification Data (EDID) High-bandwidth Digital Content Protection (HDCP) Hot Plug Detect (HPD) An explanation of DVI and the shared technologies can be found in the June/July 2003 edition of the Expander and in the V23 Chassis Training Manual. The various abbreviations and acronyms used in this text are detailed in Table 5.

HDMI Block Diagram Figure 6 shows a HDMI block diagram. Those familiar with DVI will notice both similarities and differences between the two. The HDMI cable has 4 differential pairs. Channels 0, 1, 2 and a Clock make a up a single link TMDS. The TMDS link carries both video and audio data. The 24 bit video data is divided into 3 channels, 8 bits per channel. The TMDS encoder converts the data into a 10 bit, DC balanced, differential output. Like DVI, HDMI can be configured in a single or dual link mode. However, since single link HDMI can support video resolutions up to 1080p, consumer electronic products will use it exclusively.

Figure 6: HDMI Block Diagram

The audio data is included with the video in a data packet using an additional 10 bit word transmitted during periods when the video signal is inactive (blanking). The Clock signal is used as a timing reference for data recovery. The Display Data Channel is a bi-directional I2C data bus. This bus is used for the following: 1) Allows the host to read the EDID EEPROM to learn the displays configuration and capabilities. 2) Provides a data bus for HDCP operation. Optionally, an additional serial data bus can be provided so data can be exchanged for device status and control.. HDMI uses the Consumer Electronics Control, CEC, data protocol.

HDMI Connectors
There are two types of connectors used by HDMI. Type A connectors, for single link use, have 19 pins. Type B, dual link connectors, have 29 pins. The Type A connectors used by consumer electronic products are shown in Figure 7. Pin assignments are shown in Table 6. Physically, HDMI connectors resemble the USB types used in computer products. They are less than half the size of DVI connectors. While no specification is set for maximum cable length, cables will be available up to 15 meters (about 50 feet) in length.

Pin 1

Pin 19

Pin 19

Pin 1

Pin 2

Pin 18

Pin 18

Pin 2

Plug

Receptacle
Figure 7: HDMI - Type A Connectors

PIN 1 3 5 7 9 11 13 15 17 19

SIGNAL TMDS Data 2+ TMDS Data 2TMDS 1 Shield TMDS Data 0+ TMDS Data 0TMDS Clock Shield CEC (Optional) SCL (DDC Clock) DDC/CEC Ground Hot Plug Detect

PIN 2 4 6 8 10 12 14 16 18 Table 6

SIGNAL TMDS 2 Shield TMDS Data1+ TMDS Data 1TMDS 0 Shield TMDS Clock+ TMDS ClockNo Connection SDA (DDC Data) +5.0 VDC

HDMI Input Block Diagram Figure 8 depicts a block diagram of the HDMI input circuitry used on the V25 Chassis. The circuitry is similar in other models. TMDS Data and Clock signals are applied directly to IC2000. Vcc for the EEPROM, IC2020, is supplied by the host device via the HDMI connector, pin 18. At the same time, this potential is fed back to pin 19 for Hot Plug Detection. The host device communicates over the DDC bus directly with the EEPROM to retrieve the EDID. IC2010 is used to convert the 5V I2C to 3.3V logic for compatibility with IC2000 when HDCP data is exchanged.

IC2000 decodes and outputs analog Y, Pr, Pb along with Horizontal and Vertical sync signals for selection by the TV video input select circuitry. IC2000 also decodes and outputs digital audio onto a I2S bus where it is sent to the digital to analog converter, IC2300, to obtain stereo audio for the TVs audio output. Note: Because NetCommand is used for device communication and control in the V25 chassis, CEC is not used. So, pin 19 of the HDMI Input has no connection.

Figure 8: V25 Chassis - HDMI Block Diagram

CableCARD is a trademark of Cable Television Laboratories, Inc. High-Definition Multimedia Interface and HDMI are trademarks of HDMI Licensing, LLC. DDC and EDID are trademarks of the Video Electronics Standard Association. TMDS is a registered trademark of Silicone Image, Inc. HDCP is a trademark of Digital Content Protection, LLC.

10

Chapter 1 Disassembly and Service

Figure 1-1: Lightbox Removal - 48 Models With 8 different models, mechanical features and disassembly procedures vary in the V25. Since all features and disassembly procedures are in the Service Manual, this chapter will only provide a general discussion. The V25 has the following mechanical features: Removable Lightbox Two piece cabinet (65 & 73 models) Customer Removable DiamondShield Composite Cabinet Back (V25++)

Lightbox
Like previous Mitsubishi projection TV chassis, the V25 is based on a modular design that allows the lightbox to be removed for service. Even without the front control panel, card reader or front inputs, it is still fully functional by use of the remote control. This allows easier access to test points, etc. And, when shop service becomes necessary, this design has several more benefits. No lifting of heavy, bulky cabinets No cabinet or screen damage. Less customer inconvenience.

1-1

The lightbox removal procedure for 48 V25 models is shown in Figure 1-1. 1. Remove the Back Board by removing 7 screws (a), 2 screws (b) and 8 screws (c). 2. Remove the Back Cover by removing 8 screws (d). 3 Remove 4 screws (e) to remove the Board Slide. 4. Remove 8 screws (f) to remove the Board Shelves. 5. Remove screw (g) holding the chassis. 6. Remove 4 screws (h) securing the Light Box Assembly. 7. Be certain that all cables and connectors between the Light Box Assembly and external items are disconnected (e.g. speaker plugs, etc.), including the USB and IEE1394 connectors from the Card Reader to the DM. 8. Slide the Light Box Assembly from the cabinet. The procedure is similar for all models. The 48 versions do not require the removal of the black plastic Back Cover. Refer to the Service Manual for specific disassembly instructions on all models.

NOTE: When V19, V21, V23 and V25 models are first plugged in, the front panel LED will flash for about 1 minute indicating the boot time required before the Power On command will be recognized. In addition, V23 models have a Energy Mode, If set to Low, the 1 minute boot time does not start until after the Power on command is given. If the lightbox is being serviced without the front panel, no indication of these requirements will be present. V25 models do not have the Energy Mode feature. Although not required, for the reasons noted, it is usually better to have the front panel connected when servicing the lightbox.

Main Chassis Removal

Refer to Figure 1-2 to remove the Main Chassis. 1. Undo the cable wire ties to the Front Panel, Speakers, CRTs, etc. 2. Unplug the Card Reader USB and 1394 cables from the DM module (If required). 2. Remove screw (a) securing the Main Chassis [and screws (b) in models WS-55815 and WS-65815] . 3. Release the Chassis Locks on each side of the chassis. 4. Slide the Chassis out the rear of the unit. 5. Tilt upward to access the bottom of the main chassis.

1-2

Chassis (b)

(a)

Chassis Figure 1-2: Main Chassis Removal

PCB & Major Component Locations

PCB and major component locations are shown in Figures 1-3 and 1-4. The major circuit functions performed on each PCB are listed in Table 1-1.
PCB-DM3 NetCommand PIP-POP IEEE1394 Picture Format Card Viewer 3:2 Pull Down OSD-Menus Line Double Digital uPC Control 480i to 480p MPEG Decoder Audio D/A Conv. PCB-Tuner PCB-Terminal A/V Inputs A/V Selection 3D-Y/C NTSC Video Decoders Sys 6 - Learning PCB-Signal Control uPC VCJ Convergence Audio Amp Vertical Defl.

PCB-Main PCB-DBF PCB-HDMI Tuners : Main, Sub & OOB Horizontal Defl. Dynamic DVI Decoder Digital Demodulator High Voltage Beam Audio D/A Converter Power Supplies Forming Audio Processor SVM (Corner Focus) Table 1-1: PCB Functions

1-3

DM3-PCB FIF-PCB

TUNERPCB E2P-PCB

PCB Locations

SIGNAL-PCB

HDMI-PCB

DBF-PCB

TERMINALPCB

MAIN-PCB Figure 1-3: PCB Locations

Figure 1-4: Main Component Locations

1-4

DM3 PCB Replacement

Follow the procedure below to replace the DM3 PCB. 1. Unplug the Card Reader USB and 1394 cables from the DM3 PCB and refer to the Chassis Removal Procedure to slide the chassis towards the rear of the set. 2. Remove screws (a) and remove DM cover. 3. Remove screws (b) and nuts (c). 3. Remove the PCB-E2P from the original DM and plug it into the replacement DM.

4. Remove the PCB-FIF from the DM and install onto the replacement DM (V25+ and V25++ only). 5. If CableCARD is installed, remove from the original DM and plug it into the replacement DM. 5. Disconnect all wiring and connectors. NOTE: After replacement, notify customer to contact cable company to reprogram CableCARD. To access the CableCARD ID Menu, press <TV MENU> <9-9-9>

(a) (a)

(c) (b) (b)

(a) (a)

(a)

Figure 1-5: DM Replacement

1-5

V25++ Composite Cabinet Back

The WS-65815 features a unique composite cabinet back that offers several advantages. Rounded edges in the back have a modern appearance. Unit construction gives it high strength. Low Weight - about 100 lbs lighter than comparable 65 models! The disassembly procedure for the cabinet front differs from conventional cabinets. Note how the Cosmetic Front Panel is removed. Refer to Figure 1-6.

1. Remove the Speaker Grille by pulling forward. 2. Remove 2 screws (a) securing the Cosmetic Front Panel. 3. Slide the Cosmetic Front Panel 1 inch to the right, then lift away from the TV. 4. Remove 6 screws (b) to remove the Board Front. 5. Unplug the LF connector. 6. Remove the 4 screws (c) securing the Screen Assembly. 7. Lift the Screen Assembly up and away from the cabinet.

Figure 1-6: V25++ Cabinet Front Disassembly

1-6

Chapter 2 Alignment Procedures

Chassis Option Menu Adjustment Mode VZ5/VZ6/V15 1-3-7-0 2-3-5-7 VZ7/VZ8/V16 1-2-7-0 1-2-5-7 V17 8-2-7-0 8-2-5-7 VZ9/V18/V19 0-1-7-0 0-1-5-7 V20/VK20 2-2-7-0 2-2-5-7 V21 2-1-7-0 2-1-5-7 K20/V22/V23/V24 0-3-7-0 0-3-5-7 V25 2-4-7-0 2-4-5-7 Convergence Mode 2-3-5-9 <6><5><4> 1-2-5-9 <6><5><4> 8-2-5-9 <6><5><4> 0-1-5-9 <6><5><4> 2-2-5-9 <6><5><4> 2-1-5-9 <6><5><4> 0-3-5-9 <6><5><4> 2-4-5-9 <6><5><4> OSD Position Adjust Mode Adjust Mode Adjust Mode Adj. Mode/0-1-8-8 Adjust Mode 2-1-8-8 Adj. Mode/0-3-8-8 Adj. Mode/0-3-8-8

Service Menu Access Codes

With the exception of the Service Menu access codes, the general alignment procedures for the V25 chassis remains the same as previous HD chassis. A chart showing all recent Service Menu Access Codes is provided above. This chapter will give an overview of the following alignment procedures. Initial Setup - Option Menu Circuit Adjustment Mode Convergence Adjustment Mode Alignment Data Storage Locations For specific alignments, refer to the Service Manual.

1) Select the "MENU" display by pressing the "MENU" button once. 2) Press the number buttons "2", "4", "7", "0" in sequence to select the "OPTION MENU" display. See Figure 2-1. 3) Press the "ADJUST" button to select "INITIAL." 4) Press "ENTER." NOTE: At this time, all Main Menu and A/ V settings will be set to the factory default settings and channel 3 will be automatically selected.
(MENU-2-4-7-0) OPTION MENU Initial Power restore DTV Port Direct Key Mode

Initial Setup
Option Menu - Initial Setup Prior to alignment, the procedures for initial setup should be followed so that all customer Main Menu and A/V settings are set to the factory defaults listed in Table 2-1 and Table 2-2. Follow the steps below for the initial set-up: 2-1

:OFF :Auto :OFF

Figure 2-1

MAIN MENU DEFAULT SETTINGS

SETUP Edit Setup Review () Enabled Antenna 1 () Enabled Antenna 2 () Enabled Input 1 () Enabled Input 2 () Enabled Input 3 () Enabled Component 1 () Enabled Component 2 () Enabled HDMI () Enabled Card 1 (V25++) () Enabled Card 2 (V25++) () Enabled Card 3 (V25++) () Enabled Card 4 (V25++) Icon Position As above Ant-1, Ant-2, ComFlash Input-1, Input-2, Input-3, Comp-1, Comp-2, HDMI, Cards 14 Transport Menu Energy Mode Language Digital Record Device Channel View ANTENNA Antenna Memorize Channels Channel Memory Prefer Digital On Standard English PVR OFF TIME Clock Setting Manual Time 12:00 AM Date 01/01/01 Daylight Saving Applies CAPTIONS Analog Captions On if Mute Background Gray Digital Captions On if Mute Digital Settings Appearance Default V-CHIP LOCK V-CHIP Off TV Rating TV-PG () Enabled FV-Fantasy Violence () Enabled D-Sexual Dialog () Enabled L-Adult Language () Enabled S-Sexual Situation () Enabled V-Violence () Enabled Program not Rated Movie Rating PG V-Chip Time Start Time 12:00 AM Stop Time 12:00 AM Lock By Time Lock by Time Off Lock Time NA Unlock Time NA Front Button Lock Off AUDIO/VIDEO SETTINGS A/V Memory Reset Ant-1 Audio Volume 30% Bass 50% Treble 50% Balance 50% Surround Off Listen to Stereo Level Sound On TV Speakers On Audio 2 Out Main Video Contrast 100% Brightness 50% Sharpness 50% Color 50% Tint 50% Color Temp. High Video Noise Standard Film Mode On VSM Sharpness On Video Mute On Black Enhancement On Advanced Color Balance Manual PerfectColor A/V Memory for Ant-A All Centered PIP/POP Source Ant 1 Ch 3 PIP Position Lower Right POP Position Right Half PIP/POP Format Dble. Window Format Stretched

ANT 1 Air Ch-3 Deleted ---

Table 2-1: Main Menu Factory Defaults

A/V RESET DEFAULT SETTINGS (By Input) INPUTS Compon. Card 1~4 1394 (If Ant 1/2 HDMI connected) 1/2/3 1/2 (V25++ Only) Max. Max. Max. Max. Max. Max. Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center High High High High High High Standard Standard Standard N/A Standard N/A On On On N/A On N/A On On On On On On Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center Center OFF OFF OFF OFF OFF OFF Stereo N/A N/A N/A N/A N/A On On On On On On

A/V Memory Contrast Brightness Sharpness Color Tint Color Temp. Video Noise Image Type
Define Edge VSM

Bass Treble Balance Surround Listen To Level Sound

Table 2-2: Audio Video Factory Defaults

2-2

Circuit Adjustment Mode

Most of the adjustments can only be performed using the remote hand unit. See Figure 2-2. Many of the adjustments must be performed in both the 480i and 1080i modes. Video/Color adjustments must be performed in the 480i and 1080i modes, and data must be preset in the 480p (DVD) mode. Note: Set the Remote Operational Mode to NetCommand. (Hold the Power button and press 9-3-5 in sequence.) This slows the remotes response and makes adjustments easier. When adjustments are complete, set the Remote to its original Operational Mode. (Hold the Power button and press 0-0-0 in sequence) Activating the Circuit Adjustment Mode The current signal source determines if the activated Adjustment Mode is 480i or 1080i. 1. Select the signal source (480i or 1080i). 2. Press the "MENU" button on the remote control so the Main Menu is displayed. 3. Press the number buttons "2", "4", "5", "7" in sequence. The screen will change to the Circuit Adjustment Mode. See Figure 2-3. Note: Repeat steps 2 and 3 if the circuit adjustment mode does not appear on screen.

Figure 2-2: Remote Control

CHASSIS FUNCTION ADJ ITEM

V25 CRT-VC 22
ABBREV.

CBOF

16
DATA

480i

SIGNAL

Figure 2-3: Circuit Adjustment Mode

2-3

Selection of adjustment Functions and Adjustment Items To select an adjustment item in the circuit adjustment mode, first select the adjustment function that includes the specific adjustment item to be selected. Then select the adjustment item. Refer to the following pages for the listing of adjustment functions and adjustment items. 1) Press the "AUDIO" button on the remote hand unit to select an adjustment function. Each time the button is pressed, the Function changes in the sequence shown in Figure 2-4. 2) Press the VIDEO button to select a specific Adjustment Item. The Item number increases each time the VIDEO button is pressed. Changing Data After selecting an adjustment Item, use the ADJUST UP/DOWN buttons to change data. Press ADJUST DOWN to decrease the data value. Press ADJUST UP to increase the data value. Saving Adjustment Data Press ENTER to save adjustment data in memory. The character display turns red for approximately one second in this step. Note: If the circuit adjustment mode is terminated without pressing ENTER, changes in adjustment data are not saved.

CRT_VC CRT-JNGL Adjustment Functions

MMTX SMTX

Figure 2-4: Adjustment Functions

Terminating the Circuit Adjustment Mode Press the MENU button on the remote hand unit twice to terminate the adjustment mode. Note: The circuit adjustment mode can also be terminated by turning the power OFF. Toggle Between Reception Modes Pressing 3 when in the Adjustment Mode, CRTVC Function toggles between 480i, 480p, 1080i. However, data changes are not automatically saved. Press ENTER to save data before pressing 3. Service Mode Reset To reset items in the Service Mode to their original factory adjusted values: 1) Press <TV MENU><2-4-5-7> to enter the Service Mode. Press <0> 2) Select Restore Backup. 3) Press <ENTer> On Screen Display Position Adjustment Mode Activation 1) Select 480i or 1080i source. 2) Press MENU-0-3-8-8

2-4

Convergence Adjustment Mode

The Convergence mode is used to perform raster geometry correction and convergence adjustments. These adjustments must be made in both the SD (NTSC 480i) and HD (1080i) modes. Note: Before activating the Convergence mode, turn Video Mute Off. The internal crosshatch pattern will not be displayed with Video Mute On, only a blue background is displayed. Convergence Mode Activation 1. Press MENU-2-4-5-9 2. When the Convergence Mode is activated, this display appears on a Green Crosshatch. See Figure 2-5. Selecting the HD or SD Mode
MODE SD or HD FUNCTION SUB-FUNCTION

Press the DEVICE button. Use the UP-DOWN-RIGHT-LEFT direction buttons to select ANT-DTV, then press ENTER. Press MENU-2-4-9-5 in sequence to activate the Coarse Green HD Convergence mode. Convergence Mode Functions In the Convergence Mode there are three main Functions (Categories). Pressing 6 activates CONV MISC Pressing 5 activates COARSE CONV Pressing 4 activates FINE CONV CONV MISC (Press 6) This mode is used to preset data values controlling the Convergence Generator, and to perform the HV Regulation adjustment. 1) Use the VIDEO button to select an item. 2) Use the ADJUST buttons to change data. NOTE: When Item 1 HVOL is selected the screen goes black except for the data display. This occurs since a black screen is required when making the HV Regulation adjustment.

SD COARSE GREEN 0 HSTA 00

ITEM NO.

ABREV

DATA

Figure 2-5: Convergence Mode 1. Select the Signal Source before entering the Convergence Mode, either an NTSC or HD source. 2. Enter the Convergence Mode If the signal source is NTSC, the SD mode is activated. If the signal source is HD, the HD mode is activated. 3. Activating the HD mode when no HD signal is available

COARSE CONV (Press 5) There are four Sub Functions in the Coarse mode, COARSE GREEN, COARSE RED, COARSE BLUE and DF. COARSE GREEN .... used to make Coarse Raster Geometry Adjustments. COARSE RED ... used to make Coarse Red Convergence Adjustments. COARSE BLUE ... used to make Coarse Blue Convergence Adjustments. DF ... used to preset data values controlling the Dynamic Beam Focus circuit drive signal.

2-5

1) Use AUDIO button to select a Sub Function 2) Use the VIDEO button to select an Adjustment Item. 3) Use the ADJUST buttons to change data. FINE CONV (Press 4) This mode is used to perform Fine Raster Correction, and Fine Red and Blue Convergence Adjustments. There are three Sub Adjustment Functions, selected with the AUDIO button: FINE GREEN .... a Green Crosshatch is displayed, to make Fine Raster Corrections. FINE RED .... a White Crosshatch is displayed, to make Fine Red Convergence Adjustments. FINE BLUE .... a White Crosshatch is displayed, to make Fine Blue Convergence Adjustments. In the Fine mode a Cursor is added to the Crosshatch. See Figure 2-6. The ENTER button toggles the Cursor between two modes: MOVE (blinking Cursor) .... use the ADJUST buttons to select any of 64 points on the Crosshatch. ADJUST (Non blinking Cursor) .... the ADJUST buttons adjust the active color at the current Cursor position, horizontally or vertically. The on-screen display changes in the Fine mode, as shown in Figure 2-7. The display shows the vertical and horizontal data for the current Cursor Position, and the horizontal and vertical coordinates for that position. Saving Data and Exiting the Convergence Mode Press MENU twice to exit the Convergence mode. Data is automatically saved at this time.

Figure 2-6: Fine Convergence Mode

V23 CONV FINE V13 VERTICAL DATA H-4 GREEN SD HORIZ. DATA

Figure 2-7: Fine Convergence

Alignment Data Storage Locations

Data accessed in the Convergence Adjustment Mode is stored in IC8D01 located on the PCB-Signal. Replacement PCBs are supplied pre-aligned so that only fine adjustments should be necessary after replacement. All other service alignment data is stored on the PCB-E2P located on the DM assembly. When replacing the DM assembly, retaining the original PCB-E2P will minimize the need for any realignment.

2-6

Chapter 3 Power Supply Circuitry

The block diagram above shows the main sections of the Power Supply circuitry. As in previous models, two types of DC supplies are generated, Standby and Switched. Standby supplies are generated as long as

the TV is connected to an AC power source. Switched supplies are activated when the TV is switched On. Switch Mode Regulators are the source for both types of supplies.

3-1

Figure 3-1: Standby Power Supply

Standby Power Supply

The Standby Regulator circuit is shown in Figure 3-1. Since its operation is similar to that in previous models, a lengthy description is not required. Key points of operation are: 1) D9A01 supplies DC power to the regulator transformer's primary winding. IC9A20 regulates the conduction frequency through the primary by an internal FET (Source is pin 3, Drain is pin 1).

2) Start up voltage (16 volts) is supplied by R9A20 and R9A21 to pin 4 of IC9A20. 3) Feedback for regulation is from the STBY 12V supply through IC9A21 and PC9A50 to pin 6 of IC9A20. 4) Pin 3 PROVIDES the Source ground return by way of R9A22. 5) Initial surge current is limited when the set is first plugged in by R9A02. When AC current is detected, the relay K9A50 closes, shunting the resistor. Full current is then available to the set.

3-2

Figure 3-2: Switched Power Supply

3-3

Switched Power Supply

Figure 3-2 shows the Switched Power Supply Regulator. Portions of the Standby Supply are also shown for clarity. The theory of operation is the same for both circuits. 1) D9A01 supplies DC power to the regulator transformer, T9A50, primary winding. IC9A50 regulates the conduction frequency through the primary by an internal FET (Source is pin 2, Drain is pin 3). 2) On-Off is controlled by switching the Start up voltage (16 volts) to pin 4 of IC9A50. 3) Feedback for regulation is from the 120V supply through IC5A01 and PC9A50 to pin 1 of IC9A50. 4) Pin 2 PROVIDES the Source ground return by way of R9A54 and R9A55. On-Off 1) PON2 command from the TV uPC turns on Q9A51. 2) This activates a Photo Coupler in PC9A50. 3) This turns on Q9A50 feeding 16V to pin 4 of the regulator.

3-4

Chapter 4 Control Circuitry

As in the three earlier integrated HDTV chassis, V19, V21 and V23, the V25 uses two Microprocessors in the Control circuitry. 1) TV PC controlling the analog circuitry. 2) DM3 PC controlling the digital circuitry. The two PCs constantly communicate with each other. User commands are input to the TV PC. Digital commands are forwarded from the TV PC to the DM PC. The TV PC generates Control commands from two sources.: 1) User commands from the front panel or remote control 2) Commands from the DM3 PC.

Even though circuitry is becoming more complex, the same basic requirements must be met for a PC to operate.

Basic PC Requirements
Figure 4-1 illustrates the four basic requirements for the TV PC operation in the V25. 1) DC Supply 3.3V-ES and 5VS. 2) Ground Returns pins 8, 9 and 14. 3) Timing Signal 15 mHz Clock Oscillator 4) Reset circuitry sets the PC to its nominal starting point There is similar circuitry for the DM3 PC. Since the DM3 is considered a replaceable component we are

4-1

not showing the details of the DM3 circuitry. Figure 41 shows only the DC supplies and Reset signal going to the DM module.

Reset Circuitry
Figure 4-2 illustrates the Reset circuitry in more detail. The normal and Reset logic are shown in the diagram.

IC7A02 is the Reset IC. A Low from pin 1 resets the TV PC. IC7A02 is a Watch Dog type of Reset IC that monitors the PCs operation. It has an internal counter that is continually reset by pulses from the PC, input at pin 4 of the IC. If the PC locks up, no pulses are generated. The counter reaches its maximum count and a reset pulse is output at pin 1 to reset the PC.

4-2

Both the PCs have the ability to reset each other if communication is lost. If the TV PC gets no response from the DM, it outputs a High at pin 73 of IC7A00. The High drives the DM-RESET input at the KD connector. Conversely, if the DM PC gets no response from IC7A00, the DM outputs a Low at the KD connector. The Low, through IC7A02 activates the TV Reset pulse. When the front panel System Reset button is pressed, both PCs are reset.

The front panel Buttons are in a conventional resistive ladder configuration. Pressing a button changes the voltage at the KSC0 or KSC1 input of the PC. The command is identified by the change in voltage at the KSC input. There are differences in the Remote input circuitry due to the Remote Learning feature. As in previous models there are two Remote Preamps: 1) A conventional Mitsubishi Preamp. 2) A wideband Preamp amplifying the IR signals of most manufacturers. IR signals from a Mitsubishi Remote are directed to the RMC input of IC7A00. Other manufacturers IR signals are amplified by the Wide Band Preamp, directed through IC7P01 to the IR Emit-

Input Command Circuitry

Figure 4-3 illustrates the Command Input circuit. It is similar to the input circuitry on many models so an in depth description is only necessary on those parts that are different.

4-3

ter Outputs. In addition this circuitry is used for the IR Learning feature. Figure 4-4 shows the circuitry used for the NetCommand feature. Remote commands intended for external devices are relayed from the TV uPC to the DM3 PCB. From there, they are either directed to a

IEEE1394 bus or to the System 6 IR circuit on the Terminal PCB for broadcast on an IR emitter.

Control Block Diagram

Figure 4-5 shows the overall control circuitry along with the Serial Data lines indicating the circuits they control.

4-4

4-5

PC Parallel Inputs
The parallel inputs to the PC are status inputs or signals inputs required for control purposes. Four of these inputs can cause the set to shut down. AC-OFF Input Informs the PC if AC Power is lost. The monitoring circuit is shown in Figure 4-6. Samples of the input AC are applied to the base of Q9A55. D9A02 removes the negative half of the sine waves. The remaining positive half cycles keep Q9A55 conducting. With Q9A55 conducting PC9A21 conducts, turning Q7A45 On. The conduction of Q7A45 holds the AC-OFF input to IC7A00 Low. If AC power is lost, Q9A55, PC9A21 and Q7A45 all quit conducting, allowing pin 45 of IC7A00 to go High. This informs the Control circuitry power has been lost. The PC responds by rapidly storing all user programming and service adjustments to memory. It also outputs a High on the Power Good line, informing the DM of the power loss.

SHORT Detect The short Detect circuitry is shown in Figure 4-7. If a short occurs in the + or 25V supplies, pin 44 on IC7A00 is driven Low indicating a short and the TV will shut Off. With -25V shorted, the 12VS supply turns Q9A52 On, pulling the SHORT line Low. If +25V is shorted D9A52 is forward biased and the short line goes Low. X-RAY Protect Refer to Figure 4-8, the X-Ray input is at pin 47 of IC7A00, and is normally High. The X-Ray Protect circuit monitors: Excessive HV Excess CRT Beam Current Excess HV circuit Current If any of the preceding occurs, the X-Ray line goes Low, and the TV shuts Off. The monitoring circuits for X-ray Protect are described in the detail in the Deflection and HV Section.

4-6

4-7

Deflection Loss Protect Refer to Figure 4-9. Loss of either horizontal or vertical deflection or the +25 volt source causes a High condition at pin 94 of the uPC. The detection circuitry is discussed in chapter dealing with deflection.

Parallel Inputs & Outputs

Most of the parallel inputs and outputs are listed in Tables 4-1 & 4-2. Most of them have been used before and need no explanation.

IC7A00 Additional Inputs

Pin # 6 7 62 64 92 93 94 97 100 Na m e SD-SUB SD-MAIN H-SYNC-IN V-SYNC-IN AFT1 AFT2 VBLK CV-IN-2 CV-IN-1 Source Sub Tuner Sync Detector Main Tuner Sync Detector ASIC Horizontal Sync ASIC Vertical Sync Main Tuner AFT voltage. Sub Tuner AFT voltage Deflection Loss Detect circuit Sub Video (CCD, V-chip,etc) Main Video (CCD, V-chip,etc)

Table 4-1: PC Inputs

Additional IC7A00 Outputs

Pin # 42 49 50 51 52 56 57 80 82 86 87 Name BLNK-CRT PON-2 PON-1 BWC FO F31K DEFL-MUTE MUTE SPKR POWERGOOD MTRENBL DM SUB PWR Purpose Blanks CRTs during Input &Channel changes. Power ON: (Defl, Conv, HV, etc. circuitry) Power ON: Signal Processing circuitry) Band Width Control for Doubler Output Sets the Free Run Horizontal Frequency Decreases H-Defl DC supply for 31.5 kHz. Decreases H-Defl DC supply during freq. change. Mutes the TV's Speakers Informs the DM that the DC Power is ok Mutes Monitor Out Audio Activates/Deactivates the DM Standby Power

Table 4-2: PC Outputs

Data Storage
Like previous chassis, service data is stored in 2 separate EEPROMS. Convergence Data: IC8D01 located on the Signal PCB. Service Data: PCB-E2P located on the DM3 PCB

When replacing the Signal PCB, replacement PCB's are pre-aligned to minimize the adjustments required. When replacing the DM3 PCB, transfer the original E2P PCB from the old DM3 to the replacement.

4-8

Chapter 5 Video/Color Circuitry

The above block diagram illustrates the Video/Color circuitry in the V25 chassis. The A/V Switch circuitry selects main and sub picture signals from NTSC signal sources. Note that all picture sources are processed by the DM3 circuitry. Also the diagram indicates that the Sub Picture source can only be from a NTSC source, an External Component Input or the HDMI input.

Video Path
Figure 5-1 illustrates the Video Signal Path. All analog sources are selected on the Terminal PCB. Note: While HDMI is a digital input, it is converted to analog on the HDMI PCB before being sent to the Terminal PCB. As discussed in the Introduction, the Main Tuner is capable of digital or analog reception. When analog, the signal is sent to the Terminal PCB. When digital, the signal is demodulated and sent directly to the DM3 PCB.

5-1

The following functions are performed on the DM3 PCB: Line Doubling Display Formatting PIP/POP Color Management 3:2 Pull Down On Screen Display CableCARD Interface Digital Signal I/O (IEEE1394 & Card Reader) Digital Signal Processing

CRT Drive & Protect Circuitry

Figure 5-2 shows the CRT Drive circuitry. Since it is the same as that in the V21 & V23, no explanation is necessary. The CRT Protection circuitry is also the same as the V21 & V23, but a review may be in order. When Q2W03 conducts, it turn On Q2W05, Q2W08 and Q2W11. The conduction of the three transistors removes RGB drive to the CRT's. The conduction of Q2W03 is controlled from two sources: 5-2

1) The ENABLECRT command from the PC, momentarily blanks the CRTs during channel or input selection changes. 2) The VBLANK line. The logic on the VBLANK line is controlled by Deflection Loss Detection circuitry.

A High on VBLANK blanks the CRTs. The Deflection Loss Detection circuitry is discussed in detail in the Section on Deflection and HV.

5-3

5-4

Chapter 6 Sync, Deflection & High Voltage

The Overall Sync, Deflection and High Voltage circuitry in the V25 is shown in the Block Diagram at the top of the page. The V25 can display either of two scanning formats, 480p or 1080i. The horizontal scanning frequency for 480p is 31.5 kHz, and 1080i is 33.75 kHz. Conventional 480i TV signals have a scanning rate of 15.75 kHz. For these signals, line doubling circuitry changes the signal format from 480i to 480p. In NTSC and Component format signals, horizontal and vertical sync must be extracted from the Y signal by the NTSC Decoder. Sync Select circuitry selects the Main picture sync source. The selected output is used to synchronize the Horizon-

tal and Vertical Deflection Generators. If the source signal is 480i, horizontal sync is doubled, before synchronizing the Horizontal Drive Generator. Horizontal deflection drive is amplified by the Horizontal Output circuitry and directed to the horizontal windings in the Deflection Yokes. The signal from the Horizontal Output is also directed to HV Drive circuitry. HV Drive is amplified at directed to the Flyback transformer. Vertical sync synchronizes the Vertical Deflection Generator. Output from the Vertical Generator is amplified in the Vertical Output circuitry and directed to the vertical windings in the Deflection Yokes.

6-1

Sync Signal Path

Figure 6-1 illustrates the Sync Signal Path. IC2K01 selects the Analog Sync. Sync must be extracted from NTSC, Composite and Component Format Y Signals. NTSC and Composite signals are 480i scanning format. Component signals can be 480i, 480p or 1080i. IC2N01 the Main NTSC Decoder, extracts horizontal and vertical sync when the source signal is composite or component video. The selected sync is directed to the PCB-Signal via connector JA, and then to the DM3 circuitry.

The Sub Sync Signal Path for the Sub-Picture signals is on the PCB-Terminal. It functions the same as the Main Sync Signal Path using different pin sets. The sub sync signals are used by DM3 circuitry for POP/PIP signal processing. The selected sync is directed to the Doubler circuitry on the DM3. If the selected source is 480i, the number of horizontal lines are doubled. When the selected source is 480p or 1080i, no line doubling is required. However, since all sync signals, 480i, 480p and 1080i pass through the DM3, the TV cannot be operated with the DM3 PCB unplugged.

6-2

Vertical Deflection
Figure 6-2 shows the Vertical Deflection circuitry. The Vertical Deflection Generator in the VCJ outputs pushpull type of vertical deflection drive signal, +VDR at pin 53 and VDR at pin 52. Both signals are applied to the Vertical Output IC, IC4B01. The amplified output from IC4B01 is directed to the vertical coils in the Deflection Yokes.

D4B01 and C4B04 make up the pump-up circuitry. Feedback from the Deflection Yokes ground return at pin 4 of DY, to pin 1 of IC4B01 provides linearity and S correction.

6-3

Horizontal Deflection
Figure 6-3 illustrates the Horizontal Deflection Drive and Output circuitry. Horizontal drive signal from the VCJ is amplified by Horizontal Drive circuitry including transistors Q5A35, Q5A40, Q5A33, Q5A39 and Q5A32. The output from Q5A32 is directed to Q5A31, the Horizontal Output transistor. The output from Q5A31 takes three paths: 1) To the horizontal windings in the Deflection Yokes 2) Through C5A32 to the HV Drive circuitry. 3) Through T5A31, providing the source for the CRT filament supply.

Horizontal Deflection DC Supply Circuitry The DC supplies for Q5A32 and Q5A31 are derived from the Horizontal Deflection DC Supply circuitry. IC5A04 regulates Q5A31 using pulse width modulation. Inputs to IC5A04 circuitry are: HDRV - Provides timing. HMUTE - Reduces the Deflection DC supply during scanning frequency changes. EWDRV - Adds side pincushion correction, controlled by the EWDRV signal from the VCJ (Vertical Parabola). F31K - Increases the supply voltage by approximately 10 volts for the 33.75 kHz scan format (1080i), over the 31.5 kHz scan (480p).

6-4

Deflection Loss Detection

To prevent damage to the CRTs, the video must be blanked and the TV must shut Off if deflection is lost. The Deflection Loss Detection circuit is similar to previous models, as shown in Figure 6-4. Q4B01 monitors vertical deflection, and Q5A38 monitors horizontal deflection. The conduction of both transistors holds their respective collector volt-

age below the forward bias point of the diode in their collector circuit's (D4B04 or D5A12). If either Q4B01 or Q5A38 stop conducting, indicating a loss of deflection, the increase in that transistors collector voltage drives the V-Blank line High. The VBlank line goes to the CRT Blanking and uPC circuitry immediately removing all drive to the CRTs and shutting down the TV.

6-5

HV & HV Regulation
Figure 6-5 illustrates the HV and HV Regulation circuitry. Drive from the Horizontal Deflection Output circuitry is applied the HD-IN input of IC5A00. IC5A00 amplifies the signal which is output at pin 1, and through Q5A07 and Q5A09, is applied to the gate of Q5A51. The output of Q5A51 is the drive signal for the Flyback transformer, T5A51. In the Flyback, the signals are stepped up and rectified to generate the HV and Focus voltages for the three CRTs. The amount of HV generated depends of the conduction time of Q5A51, the longer the conduction time the more energy supplied to the Flyback, and HV increases. HV is regulated by controlling the duty cycle of the drive signal to Q5A31. A sample of the HV, HV-DC-FB, is derived from an internal resistive divider in the Flyback and is output at 6-6

pin 13. The HV sample is applied to the non-inverting input of an OP-Amp in IC5A01. The HV ADJ voltage in applied to the inverting input of a second OP-Amp in IC5A01. The outputs of both OP-Amps are combined and directed to pin 4 of IC5A00. DO NOT measure the HV-DC-FB voltage at pin 13 of the T5A51. The meter may load down the internal resistive divider, resulting in excessive HV.

X-Ray Protect
X-Ray Protect circuitry is the basically the same as in previous models, as shown in Figure 6-6. The X-Ray Protect circuit in the V25 monitors three items: 1) Q5A51 (HV Output) current, by monitoring Q5A51 source voltage. 2) Excessive HV, by monitoring the rectified voltage from D5A57. 3) Excessive CRT Beam current, by monitoring the voltage at pin 10 of T5A51.

Each of the monitored sources is applied to an input of an OP-Amp in IC5A02. The second input of each OPAmp is connected to a specific reference. The outputs of all three Op-Amps are tied together at the X-Ray line. The X-Ray line is normally High. If any of the monitored sources exceeds its specific reference the X-Ray line is pulled Low, shutting Off the TV. The connection from the source of Q5A51 to pin 5 of IC5A00 provides further protection. If the source volt6-7

age becomes excessive (excess current), IC5A00 immediately removes all drive to Q5A51. Q5A20 and its associated circuitry comprise an Arc Protect circuit. If a CRT Arcs, this circuitry immediately removes HV Drive. If X-Ray Protect shuts the TV Off, pressing the Power button will turn the TV back On (it may shut Off again if the problem still exists). If Arc Protect is activated, AC power must be removed and re-applied before it can be switched back On.

6-8

Chapter 7 Convergence Circuitry

Convergence Circuitry - Overall Block Diagram

The Overall Block Diagram above shows the V25 Convergence Circuitry.. A Waveform Generator generates the convergence correction signals timed from horizontal and vertical sync pulses. The correction signals from the Waveform Generator are in a serial digital format. The following Digital/Analog Converter changes the digital signals to analog signals. The analog signals from the D/A Converter are directed LPF (Low Pass Filter) and Summing Amplifiers. Any remaining high frequency digital signals are removed and the analog correction signals are amplified. Green correc-

tion signals are added to the red and blue signals in the Amplifiers, hence the name Summing Amplifiers. The correction signals are amplified by Output Amplifiers and are directed to the sub coils in their respective Deflection Yokes. This is the same basic circuitry used in the last few chassis types. The major difference in V25 Convergence circuitry is that it is all located on the Signal PCB.

7-1

Waveform Generator & D/A Converter

Figure 7-1 illustrates the Convergence Waveform Generator and Digital/Analog Converter circuitry. Horizontal Sync from the doubler circuitry is applied to pin 31 of IC8D00. Vertical Sync is applied to pin 27. From these two signals, IC8D00 generates six Convergence Correction signals, consisting of horizontal and vertical correction signals for each CRT. Correction signals from IC8D00 are converted to analog signals in IC8E03 and are then directed to LPF and Summing Amplifiers. Convergence Control signals are also shown in Figure 7-1. These include: C-SCL Serial Clock C-SDA I2C Data line CONVMUTE disables the Convergence circuitry when the set is first powered on, off, 7-2

and when exiting the convergence mode (when data is stored in memory). CONVBUSY Allows IC8D00 to notify the PC if it is busy. CONVACK Acknowledgment line, allows notification to the PC that a command was received. CONVRST Convergence Reset IC8D00 also generates the signals for the internal crosshatch pattern. These are the C-OSDR, C-OSDG and C-OSDB signals that are directed to the VCJ. The C-BLK signal from IC8D00 times the crosshatch pattern insertion in the picture. Two additional signals from IC8D00 are HV-ADJ and DF. HV-ADJ is set by the service HV adjustment and is directed to the HV Regulation circuitry. DF (Dynamic Focus) is a parabolic signal used by the DBF (Dynamic Beam Focus Circuitry).

LPF & Summing Amps

Figure 7-2 illustrates the LPF and Summing Amplifiers. The circuitry consists of three ICs, IC8E00, IC8E01 and IC8E02. Each correction signal from IC8D00 goes through two stages of amplification: 1) The first stage is part of the LPF. 2) The second stage is the Summing Amplifier. Green horizontal and vertical correction signals are added to the Red and Blue Summing Amplifier inputs.

7-3

Convergence Output Circuitry

Figure 7-3 shows the Convergence Output circuitry located on the PCB-Power. The correction signals are amplified and directed to the Sub Vertical and Sub Horizontal coils located within their respective red, green and blue Deflection Yokes.

CONVMUTE, at pin 2, disables the Convergence Output circuitry when the set is first powered on, off, and when exiting the convergence mode (when data is stored in memory).

7-4

Chapter 8 Sound Circuitry

The V25 Sound Circuitry is shown above in the Block Diagram, Figure 8-1. All the analog signal select circuitry on the Terminal PCB is conventional. The sound signal from the DM3 PCB is initially received in a digital format from the ATSC/QAM Tuner, the IEEE 1394 inputs, or the Media Card Player. This digital sig-

nal is sent from the DM3 to the Tuner PCB on connector DB. IC3002 performs the D/A conversion. The analog DM audio or the analog HDMI audio (D/A conversion is performed on the HDMI PCB) is selected by IC3006 & IC3007 before being sent to the Sound Processor, IC3004.

8-1

Three functions of the Sound Processor, IC3004 are: 1) Audio Signal selection between: DM/HDMI Terminal PCB Main Tuner (NTSC) 2) A/D signal conversion for the selected signal. 3) Signal selection for the Monitor Output. After conversion, the digital audio is sent to the DM3 PCB. The DM3 performs D/A conversion and sends L & R audio to the Audio Amplifier, IC3E01, on the Signal PCB for the TV speakers.

Digital Audio Output

There is one additional audio output signal in the V25 chassis, External Digital Audio Output on the rear of the DM3. This is an AC-3 digital data stream (when available from a digital source). It allows connection to an external A/V Receiver with an AC-3 Decoder. If the signal has been fully encoded, and the AC-3 Decoder is capable of producing 5.1 surround sound, 5 full audio channels (20 kHz) and one low frequency enhancement channel (120 Hz) can be reproduced. Note: This Output does not apply to digital audio played from the Media Card Player.

8-2

Chapter 9 Troubleshooting Tips

LED Indications Off Fast Blink for 70 sec. Fast Blink (doesn't stop) Slow Blink Conditions Probable Cause After AC is applied Standy Power Supply or TV PC not running After AC is applied Normal - DM PC is booting up TV PC is running, but DM3 failed to boot up. After AC is applied DM3 Fan not operating. Set is Off Normal - Timer is set for Automatic Turn ON

Table 9-1: Front Panel LED Indications

Use the following tips when troubleshooting the source of a problem in the V25 chassis.

Using The Front Panel LED

The Front Panel LED helps isolate the cause of the following problems. The TV will not turn On. The TV turns On, and then Shuts Off. If the TV will not turn On, the LED response indicates the possible cause of the problem. Table 9-1 lists the possible LED response when this problem occurs. When the TV turns On and then shuts Off, the LED Diagnostic Error codes help isolate the problem. This is the same LED Diagnostic featured on some previous model TVs. Figure 9-1 shows the LED Error Code Activation Procedure, an is describe in the following: 1) With the TV Off 2) Press and hold the front panel "MENU" and "DEVICE" buttons for 5 seconds. 3) The LED will flash the Error Code indicating what caused the TV to shut Off. 4) The Error Code will be repeated 5 times. 5) When the LED stops flashing the mode is automatically terminated.

Reading the Error Codes The Error Codes are two digit numbers. The LED: Flashes the value of the most significant digit (MSD). Then there is a pause. Flashes the value of the least significant digit (LSD). The Error Code is repeated 5 times. As an example, Figure 9-2 illustrates the LED drive for Error Code "23". Table 9-2 lists the Error Codes and their possible cause.

9-1

+25V & -25V Supplies For problems with the +25V & -25 V supplies, check for excessive current draw by the Convergence circuit. Unplug the Convergence Yokes at connector VU on the Signal PCB. If the current returns to normal, suspect a defective Convergence Output Amplifier. The Vertical Output Amplifier, also on the Signal PCB, is another likely suspect for excessive current draw on the +25V source. Deflection Troubleshooting. Troubleshooting problems in the CRT Protect, Deflection Loss Detection and the Deflection circuits, sometimes involves disabling the CRT Protect circuitry and then Powering up the TV. IMPORTANT To prevent any possible phosphor damage, unplug all 3 CRT PCB's from the CRT's. After disconnecting the CRT's, the protection circuits can be disabled as follows. 1) Remove zener diode D5A13 on the Main PCB to troubleshoot the Horizontal circuit. 2) Remove D4B01 on the Signal PCB to troubleshoot the Vertical circuit. 3) Remove R5A08 on the Main PCB to troubleshoot the +25V source. The set then can be switched On for troubleshooting without damaging CRT phosphors.

Error Code Probable Cause 12 No error detected 21 X-Ray Protect 22 Short Protect 23 Loss of Deflection Table 9-2: Error Codes

Possible checks for each condition are as follows: 12 Check the Power Supply and AC Off circuits on the Main PCB. 21 Check the HV, HV Regulator, and XRAY circuits on the Main PCB. 22 Check the +25V and -25V supplies on the Main PCB. 23 Check the +25V supply first, then the Horizontal Deflection circuit on the Main PCB, then the Vertical Deflection circuit on the Signal PCB.

9-2

Copyright 2004 Mitsubishi Digital Electronics America, Inc. 9351 Jeronimo Road Irvine, CA 92618-1904 T/M V25