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Issue 25

Abolfazl Razi
WiseNet Lab

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TA B L E O F C O N T E N T S
Abolfazl Razi
WiseNet Lab
Interview with Abolfazl Razi - PhD Student at the University of Maine

4 8 11 12 17 23

TABLE OF CONTENTS

Multiple Access for Passive Sensors

Learn about the roles and importance of passive sensors in the electronics industry.

BY ABOLFAZL RAZI

Featured Products State Machine Coding Styles

BY RAY SALEMI
An examination of state machines and the coding styles used to implement them.

Filter Selection and Design: The Gateway to System Performance

BY TAMARA SCHMITZ WITH INTERSIL
Properly select, model and integrate elements of filter circuit design to maximize performance.

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Adolfazl Razi
Abolfazl Razi - PhD Student at the University of Maine, ECE Department

INTERVIEW

FEATURED INTERVIEW

WiseNet Lab
math theory and become more knowledgeable about these things. I also was very interested in assembling electronic kits like radio and led blinkers. While studying in high school, I realized how fantastically an electrical phenomenon can be described by mathematical equations. All of this led me into the field of electrical engineering, so I chose it as my academic major, and as time passes I love it more. What are your favorite hardware tools that you use? I have used different hardware based on different projects requirements. This spans a wide category from a tiny smart card reader to a huge mobile switching center. Recently I have been working with a Xilinx Virtex4 FPGA board to design a new interrogator system for passive sensors. It is a very multipurposed and powerful board and at the same time is easily

How did you get into electronics/engineering and when did you start? I have always been interested in mathematics because to me, it is the only science completely based on solid proofs one follows from another. Most physical phenomena, hypotheses and theories,

are not understandable and provable without the magic of mathematical equations. When I was in high school, I got the book Schaums Mathematical Handbook of Formulas and Tables as a gift. I studied it and got familiar with new topics like derivatives and integrals. This book made me so eager to learn

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INTERVIEW
programmable by MATLAB DSP tools. I am also very lucky to have access to a powerful and expensive SPIRENT SR5500 wireless channel simulator in our lab that helps me simulate different cellular systems like GSM, WiMAX and LTE. I can examine the performance of various transmission techniques and coding schemes on wireless radio channels. Sometimes it compares the performance of the codes developed in MATLAB under idealistic assumptions against what is really happening in the wireless channels. This instrument makes a good connection between the theory stuff we learned in university and the practical world of industry. What are your favorite software tools that you use? Maybe Id better tell you my second favorite software, since I think the most popular software among all communication engineers is definitely MATLAB, and I am not an exemption. I use MATLAB mostly to simulate communication systems. I also use different software in different projects. I prefer the VB family for general programming because of its capabilities and simplicity. I recommend it for anyone who wishes to enter the programming world. I developed a professional software built to control a companys call center using VB6. I also developed a SIMCARD test suite under VB.NET. I am a C++ fan too, and have developed a charging entity of a PABX switching center. I have used other software like TEMS Investigation, GemXplore, and Mentum planet v4.5 when I was working on cellular networks. Recently I have used 4nec2 software for array antenna modeling, which is a very powerful software to easily model any wire-based antennas. I like to try different software and cant imagine how hard it would be to research without it. consuming tests and traced calls and mobile activities in the region at three different levels. One test involved checking the signaling links between a radio base transceiver station (BTS) and the network, which was called A-Interface using a network analyzer. Another test was monitoring Air-interface between the BTS and mobile stations (MS) with TEMS Investigation toolbox, and I was checking the interface between the mobile equipment (ME) and the SIMCARD using PC/SC debugging tools. At last our teamwork paid off and we found the signaling problem that was due to a wrong error code that MSs were receiving from an adjacent local mobile network. The code was No PLMN Access while it had to be PLMN prohibited. This wrong signaling message caused the FPLMN file in the SIMCARD to be filled with a wrong value and prevented MSs from making calls. I always remember this successful mission that solved an annoying problem for many customers in that area. What is on your bookshelf? Most of my books are Ebooks in my computer. On my bookshelf, I have a few reference books in my research area. Two of them that I most frequently need to read, are Tomas Covers book on Information Theory, and Costellos on Coding Theory. I recently borrowed a book from the library titled Surface Acoustic Wave Devices for Mobile and Wireless Communications

FEATURED INTERVIEW

My first trick is asking somebody who may know the answer before endlessly fighting a problem. This way we can spend our time more efficiently.
What is the hardest/trickiest bug you have ever fixed? I believe every problem looks easy just after it is solved! One very challenging problem I faced goes back to three years ago when I was working for a mobile operator. We realized that some customers were being pushed out of the network and couldnt make phone calls. Two technical groups had worked on the problem without any progress before a team of two other experts and I got into the project. We started very time-

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INTERVIEW
written by Colin K. Campbell. This book has been very useful for me. My experience says that reading the right book that teaches the fundamentals is always a necessary step when getting into a new area of research. Do you have any tricks up your sleeve? My first trick is asking somebody who may know the answer before endlessly fighting a problem. This way we can spend our time more efficiently. The second point I always remind myself is that the computers are developed to work fine and almost error-free. So, I very often try to shift my math or engineering problems into the computer world by means of simulation. Sometimes, I compare my results on a piece of paper with the simulation results step by step. It is a timeconsuming process and needs patience, but usually it works and helps me to localize the issues in my problems. What has been your favorite project? My recent favorite project is dealing with interference effect in passive wireless sensor networks (PWSN). Passive sensors are widely used to sense various parameters like temperature, humidity, and stress, where battery-run active sensors do not operate well due to harsh conditions. The passive sensors we are using are reflective delay lines implemented on Surface Acoustic Wave (SAW) devices. Can you tell us more about the Surface Acoustic Wave (SAW) devices? These devices are composed of an antenna, an interdigital transducer (IDT), and a bunch of reflectors, all printed on a piezoelectric substrate like YZLiNbO3. To utilize these devices, an electromagnetic wave is radiated by an interrogator system. The electromagnetic wave is received by the antenna and is converted to an acoustic wave by the IDT, and is propagated through the device surface. The wave is partially reflected back by the reflectors and is radiated back to the interrogator system by the same antenna. The reflected wave carries information about the sensing parameterin our case temperatureas well as the sensors identity defined by the reflector patterns. In this project we try to develop an efficient algorithm to extract this information by analyzing the reflected wave. The goal is to achieve higher accuracy in the range of operation and to increase the number of sensors in a single-interrogator system. The difficulty of employing traditional signal processing techniques is that these devices are passive in nature and all the intelligence should be moved to the interrogator side. Also, the signal level is very low compared to the active battery-powered sensors, and that makes the analysis even more challenging. I think we are still in the beginning, and there is still much to be done. Do you have any noteworthy engineering experiences? I remember a fun trick I learned from one of my professors when I was an undergraduate. In Microwave circuit design lab, sometimes the high frequency circuits like oscillators and RF filters were not working properly even after comprehensive checks and careful analysis. Our professor taught us a very easy trick to use as a last step when every regular test looked disappointing. He said to just put your finger on the back of the electric board and move it slowly and check the output signal carefully. When you obtain the desired signal, just solder a 20 to 100 pico Farad capacitor where you have put your finger on the board. It was very surprising to us to see that this trick was working fine for some circuits. What are you currently working on? Currently I am working on developing interference reduction algorithms for passive wireless sensor networks. Our projects are financially supported by NASA.

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Multiple Access r
fo assive ensors
By Abolfazl Razi
Why are sensors so important? The role of sensors in our daily life is more important than we may think. We are surrounded by different sensors helping us to do our tasks. Almost every building is equipped with fire and smoke sensors, as well as surveillance camera systems. TVs come with infrared sensors. Any typical car is equipped with various sensors like speedometer, fuel, temperature, oil pressure and charging gauges, door lock and brake indicators, and so on. The role of sensors in industry is even more essential. Every electrical appliance utilizes different types of sensors. An airplane flight goes smoothly and stays safe largely due to thousands of sensors. Any modern factory today is totally controlled by the advanced sensing systems. Health monitoring systems along with robotic technology help physicians on disease diagnosis, treatment, and performing surgical operations. So it is kind of hard to imagine the world without sensors. Wireless Sensor Networks The use of sensors is growing fast and finds new applications in the field of habitat monitoring, traffic control, energy distribution, and healthcare. A system including a number of sensors spread out in an area that collect data and transmit it to a central station to be processed is called a Wireless Sensor Network (WSN). In past decades, WSN is intensively investigated from

PROJECT

FEATURED PROJECT

P S

Figure 1: Showing how we are surrounded by sensors.

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PROJECT
different aspects including sensor fabrication, sensor utilization, data communication, data processing, application development, and market study. Our main focus in this project is on the communication part. The trend in WSN technology is to build sensors as small and cost efficient as possible. In the next-generation sensor systems, a sheer number of very tiny sensors are spread out in an area to collect different data types with very low resolution and high accuracy. One of the challenging problems in this field is how to develop efficient communication protocols to carry this huge amount of information between sensors and the control unit in a reliable fashion. Passive sensors Traditional sensors are of active type. Active, in sensor technology, means that the sensors are battery-run electrical devices. They include a measurement block, a data processing unit that converts the measurement to electrical signals, a radio transceiver that transmits the signals to the destination, and a control unit that controls different parts. Even though these sensors are very effective and widely used, in some applications they are not applicable due to harsh conditions like extremely high temperature. For instance, inside a jet engine where the temperature can go as high as 1,000 degrees, no active sensor can survive because of battery explosion. In these applications battery-free passive sensors are the only possible choice. The WSN composed of passive sensors is called PWSN. BPSK Modulated Reflective Delay Line The technology we have used to implement a passive sensor is based on Surface Acoustic Wave (SAW) devices. SAW devices are battery-free, long lasting, rugged sensors that operate based on the fact that acoustic wave velocity on the device depends on the measured parameter like temperature, stress, and so on. These devices are implemented in various types including (i) Resonators, (ii) Delay lines, and (iii) Reflective delay lines. In this project, we are working on temperature sensing using binary coded reflective delay lines that can be individually accessed by DS-CDMA codes in a multiple access fashion. As shown in Figure 2, each device is composed of an antenna, an Inter Digital Transducer (IDT), and two series of reflectors with mirrored pattern, all printed on a temperature-sensitive substrate such as YZ-LiNbO3. An ElectroMagnetic (EM) radio wave is radiated by an interrogator system. The EM wave is received by the antenna in the middle of the device and is converted to an Acoustic Wave (AW) by IDT. The AW travels through the device surface in both directions and is partially reflected back by specifically shaped reflectors at two ends of the device. The AW then is converted back to an EM wave and radiated by the antenna. This reflected signal is sensed by a very sensitive interrogator system and is convolved with the original signal. The resulting curve, as illustrated in Figure 3, includes two peaks and the distance between peaks reveals information about the measured parameter, in our case temperature. These devices and interrogator system are developed at the University of

FEATURED PROJECT

1 ... 0 1 0 0

0 0 1 0 ... 1

d1

d2

Figure 2: An example of passive sensor: a Binary modulated reflective delay line

SAW Device.

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PROJECT
FEATURED PROJECT

Figure 2: A sample response signal of the sensors.

Maine as a joint project in LAST and WiseNet labs. Multiple Access and Interference Problem In some applications, the interrogation technique is based on a point-to-point communication, where a single sensor is placed close to the data source and an interrogator system communicates with the sensor to read the measurement. In some applications, due to the existence of many data sources, or the need for higher measurement accuracy and resolution, more sensors are required to be put in a cluster. In this case, when we are targeting a particular sensor, other sensors also respond to the interrogation signal that causes an undesired interference effect and makes it difficult to read the measurement of a specific sensor. So we need to implement a Multiple

Access (MA) technique for the communication system. To do so in active WSN cases, different schemes such as TDMA, FDMA, and CDMA are used at sensor side. However, in a PWSN, since the passive sensors cannot perform signal processing, it is much more challenging. In fact, we need to realize the MA technique on the sensor fabrication or push all the intelligence to the interrogator side. In the first phase of our project, we use a combinational method. Orthogonal codes are developed on the sensors by using different reflector patterns on the device. In the interrogator side, BPSK modulated DSCDMA signals with GOLD codes are employed. This enables us to have a simple MA system with a few sensors. Now we are thinking of extending our technique and going further by employing new techniques

to remove interference among sensors and improve the system performance. One idea is to employ a rotational directional antenna structure based on array antennas in the interrogator system that enables us to target a specific sensor and reduce the interference level. Also, we are working on implementing an intelligent multi-stage interference removal technique, in which we first try to detect the patterns of interfering signals and then remove them from the received signals by advanced signal processing methods. This phase of the project is still in the beginning steps and we are currently working on it.

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F E AT U R E D P R O D U C T S
Scheme-it Online Schematic Tool
Electronic components distributor Digi-Key Corporation, recognized by design engineers as having the industrys broadest selection of electronic components available for immediate shipment, and Aspen Labs, creator of EEWeb, have produced the industrys first online schematic drawing tool, Scheme-it. Digi-Key is excited to launch Scheme-it, the industrys only fully-online schematic tool, said Tony Harris, chief marketing officer, Digi-Key Corporation. With Scheme-it, engineers are able to easily create the blueprint for any design while gaining access to Digi-Keys expansive product listing in one online experience. For more information, please click here.

FEATURED PRODUCTS

Analog System Monitor and Controller

LMP92018 is a complete analog monitoring and control circuit which integrates an eight channel 10-bit Analog-to-Digital Converter (ADC), four 10-bit Digital-to-Analog Converters (DACs), an internal reference, an internal temperature sensor, a12-bit GPIO port, and a 10MHz SPI interface. The eight channels of the ADC can be used to monitor rail voltages, current sense amplifier outputs, health monitors or sensors while the four DACs can be used to control PA (Power Amplifier) bias points, control actuators, potentiometers, etc. Both the ADC and DACs can use either the internal 2.5V reference or an external reference independently allowing for flexibility in system design. For more information, please click here.

Small iNEMO Inertial Module

STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications and the leading supplier of MEMS (Micro-Electro-Mechanical Systems) for consumer and portable applications,1 announced a new inertial module that integrates three-axis sensing of linear and angular motion in a miniature 3 5.5 1mm package. Reducing size by almost 20% over devices currently in production, STs newest iNEMO module with six degrees of freedom delivers advanced motion-sensing capabilities in todays spaceconstrained consumer applications, such as smart phones, tablets and other portable electronic devices and will enable even more sleek products in the future. In addition to the spacesaving benefits, STs newest iNEMO module enhances user experience and motion-sensing realism through its advanced design and real-time sensor data fusion capabilities. The module design ensures precise alignment of the two sensors reference axes and superior thermal and mechanical stability, while STs iNEMO Engine data-fusion software employs sophisticated prediction and filtering algorithms to automatically correct measurement distortions and inaccuracies. For more information, please click here.

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Ray Salemi

Verification Consultant

State Machines
Coding Styles
State machines are so common that there are tools devoted to creating them by drawing circles and arts. There are simulators that will recognize your state machine and animate it to help you debug it. There are even synthesis tools that will add error correcting logic to your state machine so that it can recover from the single event upsets that can happen at high altitude or in electrically noisy environments. You can take advantage of these tools by programming state machines using a commonly accepted coding style. Last month we began our discussion of this coding style when we saw how to create named states and a designated state register. This month well examine various coding styles that we can use to create the nextstate and output generating logic. We are venturing into the world of combinatorial coding style, a subject that is so controversial that adult engineers have nearly come to blows when strong drink is present at a design review meeting. (What, You dont have strong drink present at your design review meetings?) This article examines three basic coding styles you can use to implement a state machine. We will use this simple state machine as our example: the life of a dog.
barking
mouth <= 1;

other_dog

1 tired 3 2 sleeping happy 1 food

tail <= 1;

2 food eating
mouth <= 1;

Figure 1

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TECHNICAL ARTICLE
The dog leads a simple life. By default he sleeps, but if you feed him hes happy and then starts eating. After hes done eating he goes back to being happy unless he gets tired, you feed him again, or another dog walks in the street. If there is another dog, he starts barking, if you feed him he eats, and if hes tired he goes back to sleep. The dog state machine has three inputs: tired, food, and other_dog. The dog state machine has two outputs: mouth and tail. The mouth operates when the dog is barking or eating, the tail operates when the dog is happy (product marketing might argue that the tail could also operate when eating, but were not implementing that approach). Were going to code up our dog several ways. Were going to see that HDL gives you control over how your final code implements a state machine. There are two steps to the process. First well choose a state machine architecture, then well code it up. The key is to realize that there are my possible state machine architectures and that they all deliver different benefits and challenges. All state machine architectures have three or four pieces: 1. Combinatorial logic to determine the next state. 2. Combinatorial logic to determine the output based on the state. 3. A state register. 4. Clocked output signals (optional). The simplest way to implement a state machine is to create a process for the first three pieces:
Next Stage Logic

register, and a cloud of logic implementing the output. Here is the code that implements this simple state machine:
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TECHNICAL ARTICLE

always @(current_state, food, other_dog, tired) begin : next_stage_block_proc case (current_state) sleeping: if (food) next_state = happy; else next_state = sleeping; eating: next_state = happy; happy: if (other_dog) next_state = barking; else if (food) next_state = eating; else if (tired) next_state = sleeping else next_state = happy; barking: next_state = happy; default: next_state = sleeping; endcase end // Next State Block

71 72 73 74 75 76 77 78 79 80 81 82 83

always @(current_state ) begin : output_block_proc // Combined Actions mouth = 0; tail = 0; case (current_state) eating: mouth = 1; happy: tail = 1; barking: mouth = 1; endcase end // Output Block

Output Logic
89 90 91 92 93 94 95 96

always @( posedge clk, negedge rst ) if (!rst) current_state <= sleeping; else current_state <= next_state;

Next State

State Register

Figure 3

You can code this kind of state machine with three separate processes. This has the advantage of clarity. Each process does one thing. Notice that the output logic and the next-state logic have different sensitivity lists. The output is only sensitive to the current state, while the next-state logic is sensitive to the state and the input signals. This is the definition of a Moore state machine. We can also create a Mealy state machine if the output logic is dependent upon the inputs as well as the state, as we see here:

State Register

Output Logic

State Register

Next Stage Logic

Output Logic

Figure 4

Lets use a Mealy state machine to create a dog who barks whenever there is another dog outside, regardless of our dogs current state. The rest of the state machine code is the same as in Figure 2. The only difference is that we set the mouth signal to be equal to the other_dog signal before

Figure 2

We have a cloud of logic implementing the next state based upon the inputs and current state, a current state

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TECHNICAL ARTICLE
checking the state. Now another dog will get the mouth going regardless of what our dog is doing (this is a fairly accurate simulation of my dog).
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38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

always @ (current_state, food, other_dog, tired) begin : next_state_block_proc case (current_state) sleeping: begin mouth = 0; tail = 0; if (food) next_state = happy; else next_state = sleeping; end eating: begin mouth = 1; next_state = happy; end happy: begin mouth = 0; tail = 0; if (other_dog) next_state = barking; else if (food) next_state = eating; else if (tired) next_state = sleeping; else next_state = happy; end // case: happy barking: begin mouth = 1; tail = 0; next_state = happy; end endcase

TECHNICAL ARTICLE

//----------------------------------------------// Output Block for machine csm //----------------------------------------------always @( current_state, other_dog ) begin : output_block_proc mouth = other_dog; tail = 0; case (current_state) eating: mouth = 1; happy: tail = 1; barking: mouth = 1; endcase end // Output Block

Figure 5

Now that weve seen how we can separate the next-state logic from the output logic, I have to tell you that I dont like this coding style because it uses two case statements to respond to the same information. This means that if I add a state to my state machine, I have to add it to both the next-state and the output case statements. I have a hard enough time getting things right once, I hate having to get things right twice. We can get around the problem with this architecture:

Figure 7

State Register

Next-State & Output Logic

That said, I have one more pet peeve that we may want to address. If the outputs of this state machine directly drive the outputs of a module or component, then I have a problem with unclocked outputs. Unclocked outputs create design problems: 1. Synthesis tools cannot do timing analysis across module boundaries. This means that if you have 10ns between clocks, then you can run into trouble if generating the combinatorial outputs from one block that takes 6ns while processing the combinatorial inputs of another block that takes 5ns. Both blocks think they are meeting timing, but together they are not. 2. You can get glitches on the output signals if they are settling after youve changed your state. 3. Your synthesis tool will miss optimizing opportunities because it cannot see a complete combinatorial circuit that crosses module boundaries.

Figure 6

See Figure 7 for the code. Now I have one process that is sensitive to the state and the input signals. The case statement is a little more complex because I need to describe the outputs response to the input signals in each state, and once again I can wind up duplicating conditions if different states respond to the input differently.

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TECHNICAL ARTICLE
You can avoid all these problems by clocking your output signals. This creates a circuit where your output signals appear one clock cycle after the state that generates them, but you avoid the problems of unclocked outputs. This design looks like this: See Figure 9 for the code. There is no single optimum style. Instead of slavishly using one style because it was the first one we learned, the best approach is to understand all our options and make a conscious decision.
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TECHNICAL ARTICLE

State Register

always @( posedge clk, negedge rst ) begin : clocked_block_proc if (!rst) begin mouth <= 0; tail <= 0; current_state <= sleeping; end else begin // Combined Actions case (current_state) sleeping: begin mouth <= 0; tail <= 0; if (food) current_state <= happy; else current_state <= sleeping; end eating: begin mouth <= 1; current_state <= happy; end happy: begin mouth <= 0; tail <= 1; if (other_dog) current_state <= barking; else if (food) current_state <= eating; else if (tired) current state <= sleeping; else current_state <= happy; end barking: begin mouth <= 1; tail <= 0; current_state <= happy; end endcase end end // Clocked Block

Next-State & Output Logic

Output Flops

62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

Figure 8

Now we have one process that implements the entire state machine. This process is sensitive to the clock and the reset. On every clock edge the state machine outputs the signals associated with the current state and moves the state machine to the next state. Notice that mouth and tail are registers now, so they get set on line 51 along with the current state. This state machine will deliver clean edges on every clock. Summary Weve now examined several ways to code a state machine. Design tools, simulators, and synthesis tools will all recognize and generate state machines that you code using any of these techniques. This of course raises the question, Which is best? The answer is, Whichever best matches your application. If you have a complex output circuit, you may choose to separate it from the next-state logic. You may find that youd rather duplicate the state case statement rather than duplicate the logic that responds to inputs. You may not be able to afford the clock cycle it takes to create clocked outputs. You may have coding styles at work that limit your approach.

Figure 9

About the Author Ray Salemi is a veteran of the EDA industry and has been working with Hardware Description Languages since he joined Gateway Design Automationthe company that invented Verilog. Over the course of his career he has worked at Cadence, Sun Microsystems, and Mentor Graphics. Ray is currently an Applications Engineer Consultant with Mentor Graphics.

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Single, Low Voltage Digitally Controlled Potentiometer (XDCP)

ISL23315
The ISL23315 is a volatile, low voltage, low noise, low power, I2C Bus, 256 Taps, single digitally controlled potentiometer (DCP), which integrates DCP core, wiper switches and control logic on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the I2C bus interface. The potentiometer has an associated volatile Wiper Register (WR) that can be directly written to and read by the user. The contents of the WR controls the position of the wiper. When powered on, the ISL23315s wiper will always commence at mid-scale (128 tap position). The low voltage, low power consumption, and small package of the ISL23315 make it an ideal choice for use in battery operated equipment. In addition, the ISL23315 has a VLOGIC pin allowing down to 1.2V bus operation, independent from the VCC value. This allows for low logic levels to be connected directly to the ISL23315 without passing through a voltage level shifter. The DCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing.

Features
256 resistor taps I2C serial interface - No additional level translator for low bus supply - Two address pins allow up to four devices per bus Power supply - VCC = 1.7V to 5.5V analog power supply - VLOGIC = 1.2V to 5.5V I2C bus/logic power supply Wiper resistance: 70 typical @ VCC = 3.3V Shutdown Mode - forces the DCP into an end-to-end open circuit and RW is shorted to RL internally Power-on preset to mid-scale (128 tap position) Shutdown and standby current <2.8A max DCP terminal voltage from 0V to VCC 10k, 50k or 100k total resistance Extended industrial temperature range: -40C to +125C 10 Ld MSOP or 10 Ld TQFN packages Pb-free (RoHS compliant)

Applications
Power supply margining RF power amplifier bias compensation LCD bias compensation Laser diode bias compensation

10000

8000 RESISTANCE ()

6000

4000

2000

50

100

150

200

250

TAP POSITION (DECIMAL)

FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP POSITION, 10k DCP

FIGURE 2. VREF ADJUSTMENT

August 15, 2011 FN7778.1

Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010, 2011 All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

Filter Selection & Design:

Tamara Schmitz
Senior Principal Applications Engineer And Global Training Coordinator

The Gateway to System Performance

All too often, designers spend so much time focusing on the specification and selection of their complex, higher-cost devices such as processors, FPGAs, and ADCs, that they dont fully take into account the major performance impacts, as well as cost and power issues, that are driven by the selection and integration of socalled low-end components such as filters. In fact, the specification and design of filter circuitry can often be among the most important factors that determine overall system success. For instance, if the filtering design in a relatively low-bandwidth application fails to eliminate high-bandwidth noise at the front-end of the signal chain, the system has to burn extra power just to propagate that unwanted noise down the signal chain. Or, when processing signals of a certain bandwidth such as in a channel-based radio receiver, an inadequate filtering design can lead to unnecessary processing of signals from adjacent channels. This leads to a waste of power and a potential degradation of the target signal.

Proper filter design also prevents the signal path from contributing noise to other parts of the system, such as keeping high-frequency signals from coupling back into the power circuit and causing instability or fluctuations. In essence, bypass capacitors are actually the simplest category of analog filters and are widely used in all types of designs. Below is a brief overview of the role of filters, the types of filters, and differences between digital and analog approaches and passive versus active filtering designs. Then, there are some specific design tips for simulating and selecting analog filters for an example application to drive high performance analog-digital converters (ADCs). The Role of Filters Filters are electronic signal processing circuits that are aimed at removing unwanted frequency components from the signal, enhancing wanted signals, or both.

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Electronic filters generally can be grouped into the following categories: High-pass filters attenuation of frequencies below the cut-off points. Low-pass filters attenuation of frequencies above the cut-off points. Band-pass filters attenuation of frequencies both above and below the target frequency band. Notch filters attenuation of certain frequencies while allowing all others to pass. The frequency response of a filter is typically characterized in terms of Bode Plots, which express amplitude gain in decibels and phase in radians or degrees. The bandwidth, f, of a filter is defined as energy versus frequency. The Q factor of the filter is defined by f0 / f where f0 is the center frequency of a bandpass filter and f is the bandwidth. See Figure 2 for example curves. The higher the Q, the narrower and sharper the peak will be. In essence, the Q-factor is a measure of quality for a particular resonance point on the frequency spectrum. Depending on the specific application requirements, there are a number of different filter configurations that can be considered to provide alternatives with regard to optimizing the Q factor, the filters stability and other key characteristics: Chebyshev filter slight peaking/ripple in the passband before the corner; Q>0.7071 for 2ndorder filters. Butterworth filter flattest amplitude response; Q=0.7071 for 2nd-order filters. LinkwitzRiley filter desirable properties for audio crossover applications; Q = 0.5 (critically damped). Bessel filter best time-delay, best overshoot response; Q=0.577 for 2nd-order filters. Paynter or transitional Thompson-Butterworth or compromise filter faster fall-off than Bessel; Q=0.639 for 2nd-order filters. Elliptic filter or Cauer filter add a notch (or zero) just outside the passband, to give a much greater slope in this region than the combination of order and damping factor without the notch. Digital Filters Digital filters sample discrete time signals and need to operate on digital inputs in order to provide digital outputs. Digital filtering is a more complex approach than analog and is typically used in conjunction with FPGAs or microcontrollers, where there is already a significant amount of things like programming and digital gates. Because the signals in these systems need to be digitized to go into the FPGA or microprocessor anyway, it is not a major cost to the system to digitize the signals first and then conduct filtering within the digital processing chain. A digital filter usually consists of an analog-to-digital converter to sample the input signal, followed by a microprocessor and some peripheral components such as memory to store data and filter coefficients etc. In a typical digital filtering application, software running on a digital signal processor (DSP) reads input samples from an A/D converter, performs the mathematical manipulations dictated by theory for the required filter type, and outputs the result via a D/A converter. In mathematical terms, filtering is in essence the multiplication of the signal spectrum by the frequency domain impulse response of the filter. For an ideal lowpass filter, the pass band part of the signal spectrum is multiplied by one and the stopband part of the signal by zero. In addition to adding complexity, digital filters generally consume more power than analog approaches. Also, because digital filters use a sampling process and discrete-time processing, there is an inherent latency factor, which must be taken into account with regard to overall design objectives. Digital filter designs can be simplified by limiting the number of bits used, depending on the accuracy requirements of the application. Digital filters are most often used in systems that require complex signal management and/or a high degree of precision. Since these designs digitize the signal before they perform operations on it, they offer a great degree of flexibility for complex mathematical functions. This makes it very easy to change the coefficient in order to tune the filter for the desired output, such as in a Finite Impulse Response (FIR) filter design.

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Analog Filters Analog filters are used to process continuous-time signals and work directly on analog inputs, typically providing a near instantaneous response from input to output. In the ideal case, an analog filter would provide 100 percent transmission within the specified frequency passband and 100 percent attenuation outside of that passband. However, in the real world, analog filters can only approximate this ideal performance, with some attenuation in the passband and less than 100 percent attenuation over the stopband frequency range. passive filters are typically composed of just the four basic linear elements: resistors, capacitors, inductors, and transformers. More complex passive filters may involve nonlinear elements, or more complex linear elements, such as transmission lines. A passive filter has several advantages over an active filter: Guaranteed stability. Passive filters scale better to large signals (tens of amperes, hundreds of volts). No power consumption. May be less expensive in discrete designs (unless large coils are required).
Filter Type Digital Filters Characteristics Digital Inputs & Digital outputs High complexity Greater flexibility Application Area FPGA & microprocessor based systems High-precision, complex filtering requirements Analog-only signal chains Front-end filtering in mixed-signal design

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Analog Filters

Analog inputs & analog outputs Lower cost Lower power

Passive filters are commonly used in applications involving higher voltage and current levels, such as speaker crossover designs, filters in power distribution networks, and power supplies. Passive filters are uncommon in monolithic integrated circuit designs, where active devices are inexpensive compared to resistors and capacitors, and inductors are prohibitively expensive. Active filters are implemented using a combination of passive and active (amplifying) components, and require an outside power source. Operational amplifiers are frequently used in active filter designs. These can have high Q factor, and can achieve resonance without the use of inductors. However, their upper frequency limit is limited by the bandwidth of the amplifiers used. Active filters have three main advantages over passive filters: Inductors can be avoided. Passive filters cannot obtain a high Q without inductors but they are large and expensive at low frequencies, have significant internal resistance, and may pick up surrounding electromagnetic signals. The shape of the response, the Q factor, and the tuned frequency can be set simply by varying resistors and one parameter can often be adjusted without affecting the others. The amplifier powering the filter can also be used to buffer the filter from the electronic components it drives or is fed from, thereby eliminating variations that could affect the shape of the frequency response.

Figure 1: Comparison of Digital and Analog Filtering Approaches.

Analog is generally the preferred solution when the designs filtering requirements are relatively simple and especially if minimizing system cost and/or power consumption is an important factor. Passive vs. Active If a very precise filter is required, designers may build it from scratch using all passive components. However the cost, space and complexity can often become prohibitive. So, where possible, most designs lean toward an active filter approach using a combination of op amps and passives. This section provides a very brief overview of the differences and the tradeoffs between passive and active filter approaches. By definition, a passive filter is made only from passive elements. It does not require an external power source beyond the signal itself. Since most filters are linear,

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Design Example: Modeling an Active Filter for High-performance ADCs When creating any mixed-signal system, the first thing that the designer typically chooses is the ADC because the system needs a certain number of bits, and a specified speed and sampling frequency. Once the ADC has been selected, everything else in the supporting circuitry is aimed at driving the ADC to the optimal specifications, without degrading performance. It is critical that the op amps and other components in the filter circuit provide high-speed signal processing without adding to the noise floor in order for the ADC to run as close as possible to its maximum specified dynamic range or resolution. To model the specifics for implementing an active filter, engineers need simulation tools that can take the target filter shape and deliver a set of op amps and external passives that accurately achieve the desired filter response. There are a number of such tools available online but its important to keep in mind the key differences between modeling with ideal specifications versus modeling for real-world production. Most tools estimate amplifier frequency response with a single-pole approximation instead of taking into account the second and third order effects present in commercial amps. When filters were designed for low frequencies and the amplifiers had abundant bandwidth compared to the application, this was a reasonable estimation. This is no longer true and a better simulation tool is crucial. One such comprehensive simulation tool can be accessed at web.transim.com/iSimFilter. It is also imperative that the model simulation goes beyond specifying just the op amps and also models the various resistors and capacitors needed to complete an optimal filter circuit for the specific application. For example, Figure 2 shows a simulation from the iSimFilter tool that models noise gain in dB for various resistor levels. The Sallen-Key filter (SKF) used in this example is an electronic filter topology used to implement secondorder active filters, (The alpha values listed represent the ratio of feedback resistor to gain resistors). In our specific design example for driving a high-speed ADC, such as the 500MSPS ISLA112P50 12-bit and the ISLA214P50 14-bit ADCs, the recommended op amp solution is the ISL55210, which operates at very low power (115mW) and has negligible noise with respect to the ADC. Therefore, adding gain and filtering has virtually no impact on the system SFDR. The ISL55210 features very high slew rates, low noise, ultra-low distortion and

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SKF Noise Gain VS Resistor Ratio

a = 0.17 a = 0.4 a = 0.85 a = 1.1 a = 2.15 a = 3.1 1.00E+04 1.00E+04 1.00E+04 1.00E+04

Noise Gain (dB)

Frequency (Hz)
Figure 2: iSimFilter Modeling of Sallen Key Filter Noise for Various Resistor Levels

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+3.3V 495 105MHz SINGLE TONE 180mVpp for -1dBFS 100 Vi 50 0.1F Vcm ADT4-1WT 100 1:2 35mA (115mW) 10k 500kHz 40.2 0.1F 33nH 210 Vdif 0.1F 210 33nH 40.2 20pF V 500MSPS 495 Vdif 20log ( -------- ) = 17.3dB gain Vi CLK 180MHz SPAN V+ 20pF

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ISLA112P50
12 Bit <500mW

+ ISL55210

Figure 3: Filter design with ISL55210 and support circuitry.

provides a 4GHz gain bandwidth with input noise of only 0.85nV/Hz and consistent performance over a wide temperature and gain range. The op amp suppresses even-order harmonic distortion, which is usually caused by asymmetrical or unbalanced signal paths, and supports gains greater than two with minimal bandwidth or SFDR degradation. Figure 3 illustrates a typical filter design using the ISL55210 and passives support circuitry to drive a 12-bit ISLA112P50 ADC. Summary Filtering may seem to be a simple design issue and therefore it doesnt always get the attention that it deserves. But filter circuits actually are the sentinels at the gateway to the signal path and are critical for achieving full performance in the higher-cost devices that form the heart of the overall system. Proper selection, modeling and integration of the op amps, passives and other elements of the filtering circuitry can make or break the success of the overall design. Even the most advanced ADCs, processors and other high-end devices become a waste of money if

they cant be driven as close as possible to their optimal specification levels. About the Author Tamara Schmitz is a Senior Principal Applications Engineer and Global Technical Training Coordinator at Intersil Corporation, where she has been employed since 2007. Tamara holds a BSEE and MSEE in electrical engineering and a PhD in RF CMOS Circuit Design from Stanford University. From 1997 until 2002 she was a lecturer in electrical engineering at Stanford; from 2002 until 2007, she served as assistant professor of electrical engineering at San Jose State University.

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