Elektroniske kretser Oppgave 1

Feedback amplifier.

1. Introduction.

The purpose of this exercise is to become familiar with the concept of feedback through
practical investigations. This technique is frequently used in most areas of electrical
engineering.

The text of the exercise is made relatively comprehensive in order to give general information
about feedback and aim therefore at the practical part of this special laboratory exercise.

Feedback in amplifiers gives better performance in several important ways, including:

a) Increased stability in the amplification. The gain is less dependent on the parameters of
the amplifier elements.

b) Feedback reduces distortion in the amplifier.

c) The bandwidth of the amplifier is increased.

d) It is easier to achieve desired input and output impedances.

These advantages are achieved at the expence of gain which is less than the amplifier gain
without feedback. Stability, nonlinear distortion, bandwidth requirements and impedance
matching are very important concepts that are part of a long list of problems, f.ex. in
telecommunications.

In the practical part of the exercise we are going to look at three different ways of using
feedback.

I A purely resistive feedback in an opamp that gives 40 dB gain from DC and to an upper
cut off frequency.

II Feedback of a field effect transistor used as a voltage controlled resistor in order to

give better linearity properties.

III Feedback used to automatically control the output level of the amplifier (AGC).

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2. Feedback.

A feedback amplifier can be split as shown in fig. 1.1 if the elements fullfill the following
requirements:

a) The active part (amplifier) tranfers the signal only forward.

b) The passive feedback network transfers the signal only backwards.

c) The extra load at the amplifier's input and output due to the feedback network can be
ignored.

xi y
x + H( ω)
-
H βy
Hβ ( ω )

Fig. 1.1. Mathematical model of a feedback amplifier.

These requirements are often not fullfilled. The requirement a) can be met by choosing an
amplifier with high gain, while the requirements b) and c) are not met. When the impedance at
the input and output of the amplifier is concerned, the feedback network presents an extra load
to the amplifier and one no longer has an ideal division. In such cases it is neccessary to use
other methods to carry out an accurate analysis of the amplifier. This problem is beyond the
scope of this exercise, but you can find more information on this topic in the literature, f.ex.
[1] ,[2].

For the model in fig. 1.1 we have:

y = H(ω )( x − Hβ (ω ) y) (1)

In general, x and y do not have to be the quantities of the same kind. F.ex. x can be current and
y can be voltage or vice versa. The transfer functions H(ω) and Hβ(ω) can consequently
represent gain functions or impedance functions. In a case where we consider voltage or
current gain, we can usually replace H(ω) with A(ω) (A-"amplification") and Hβ (ω) with
β (ω).

If we insert these quantities into (1) and solve with respect to the gain y/x , we get:

A
Ax→ y = (2)
1 + βA

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A is the gain without feedback (open loop gain) and Ax→y is the gain of the amplifier with
feedback (closed loop gain).

From the formula we see that when |βA| >> 1 we get:

A 1
Ax→ y ≈ = (3)
βA β

Consequently, the gain is only dependent on the outer feedback network. Different undesired
qualities of the active element , such as nonlinear amplitude and fase, variation of gain with
time, are therefore eliminated with feedback.

The active network as well as the feedback network are two-ports. There are 4 different
circuits, shown in figure 1.2, dependent on the way the inputs and the outputs of the ports are
connected together.
RG

A(ω) ZL
R Us A(ω)
G

ZL
Us
β(ω) β(ω)

a) Series-series feedback. b) Parallel-parallel feedback.

R
G

R A(ω) ZL Us
G A(ω )

ZL
Us
β(ω) β(ω)

c) Series-parallel feedback. d) Parallel-series feedback.

Fig. 1.2. Different feedback circuits.

In circuits a) and d) we have a series connection at the output. The feedback signal is
proportional to the current in the load impedance. This is often called current feedback. In
circuits b) and c) in fig. 1.2 we have a feedback signal that is proportional to the voltage at the
output, ergo voltage feedback.

3. Feedback and operational amplifiers.

Now we are going to take a look at two amplifier circuits with opamps.

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3.1. Non-inverting amplifier.

Here the signal generator is connected to the non-inverting input as shown in fig. 1.3.

R2

R1
-
A
+
3
Uo
R3

Us

Fig. 1.3. Amplifier circuit with an opamp.

The circuit can be redrawn as shown in fig. 1.4.

Fig. 1.4. The amplifier in fig. 1.3 drawn in another way.

We see from the figure that this circuit is an example of a series-parallel-connection. Since an
operational amplifier has very high input impedance relatively to R1 and R2, high gain A and
low output impedance, all three requirements for an ideal feedback amplifier are met.

We calculate the following expression for the gain Au = Uo/Us based on figure 1.4:

A A
Au = R1 = (4)
1+ A 1 + βA
R1 + R2

If |βA| >> 1 we get:

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Elektroniske kretser Oppgave 1

R2 (5)
Au ≈ 1 +
R1

This amplifier is so simple that we can easily write mesh equations for the circuit and perform
complete calculations. We have the following calculation equivalent:

Fig. 1.5. Calculation equivalent for the amplifier circuit as shown in fig. 1.3.

3.2. Voltage gain.

We get the following circuit equations:

R1 ( I1 − I2 ) + ( Ri + R3 ) I1 = Us (6)

R1 ( I2 − I1 ) + ( R2 + Ro ) I2 + AU1 = 0 (7)

R3 includes also the generator resistance. With respect to the long term stability (Stability of
the offset adjustment with respect to temperature variations) R3 should be equal to the
resistance of the parallel connection R1 and R2:

R1R2
R3 = (8)
R1 + R2

We solve with respect to Au = Uo/Us and find:

ARi ( R1 + R2 ) + R1Ro
Au = (9)
ARi R1 + ( R1 + Ri + R3 )( R2 + Ro ) + R1Ri + R3 R1

If

(10)
Ri >> R1, Ri >> R3, R1 >> Ro and R2 >> Ro

this expression can be substantially simplified. We get:

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A
Au ≈
R1 (11)
1+ A
R1 + R2

This is the same expression as we found in (4). If we also assume that

R1
βA = A >> 1 (12)
R1 + R2

we get:

R2
Au ≈ 1 + (13)
R1

The result is a voltage gain that is independent of the characteristics of the opamp. It is only
dependent on the outer components.

3.3. Input impedance.

The input impedance is calculated with little load at the output, i.a. the load impedance must
be much larger than Ro. The input impedance is defined as:

Us
Zinn = (14)
I1

From (6) and (7) we find:

R1 1
I1 = I2 + Us (15)
R1 + Ri + R3 R1 + Ri + R3

and

R1 − ARi
I2 = Us (16)
ARi R1 + ( R1 + Ri + R3 )( R2 + Ro ) + R1Ri + R3R1

We can then find Zinn from (15) and (16):

( A + 1) Ri R1 + ( R1 + Ri + R3 )( R2 + R0 ) + R3 R1 (17)
Z inn =
R1 + R2 + R0
If we assume as earlier that Ri >> R3, Ri >> R1, R1 >> Ro and R2 >> Ro we get:

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( A + 1) Ri R1 + Ri R2
Zinn ≈ (18)
R1 + R2

If we also assume that |A| >> 1 and |A| R1 >> R2 :

AR1 A (19)
Z inn ≈ Ri =R
R1 + R2 Au

The input impedance increases therefore as a function of the ratio between the voltage gain
without and with feedback.

With the approximations done here, we see that (15) or (16) are reduced to:

R1
I1 ≈ I (20)
Ri 2

1
I2 ≈ Us (21)
R1

This means that the current through the parallel resistance R2 is defined by the signal voltage
and the resistor R1. Furthermore, it means that I1 << I2. Therefore, the current through R1 is
approximately equal to the current through R2.

3.4. Output impedance.

Output impedance is defined as:

Uo
Zut = | (22)
Io Us =0

where Io is the current drawn by the circuit when a generator is attached at the output with the
voltage Uo. In this case we get relatively complicated expressions and will therefore confine
ourselves to calculating Zut under the assumption that Ri >> R1 and Ri >> R3 so that we can
ignore the current I1 compared to I2, and the voltage over R3 compared to the voltage over Ri.
In this case we get:

R1
U1 ≈ − Uo (23)
R1 + R2

and

Uo U − AU1
I0 ≈ + o (24)
R1 + R2 Ro

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Zut is solved from those:

Ro ( R1 + R2 )
Zut ≈ (25)
Ro + ( R1 + R2 ) + R1A

With R1 >> Ro, R2 >> Ro and |A| >> 1, (25) is reduced to:

Au (26)
Z ut ≈ R0
A

The output impedance is divided and the input impedance is multiplied by the same factor.
The feedback gives a significant reduction in output impedance since A is usually much larger
than Au.

3.5. Inverting amplifier.

In the other amplifier circuit we are going to study, we move the signal generator to the
inverting input as shown in fig. 1.6. In this case we cannot directly separate the β-network
from the amplifier itself.

R
2

R1
-
A
+

Us Uo
R
3

Fig. 1.6. Amplifier circuit with a signal source connected to the inverting input.

We are going to take here only the calculations when Ri >> R1 so that the current into the input
of the opamp can be ignored compared to the current through R2. In this case we get a
calculation equivalent as shown in fig. 1.7.
I
R1 R 0
2

+ R
0
Us U
U I - o
1 1
- AU 1
+

Fig. 1.7. Calculation-equivalent for the circuit in fig. 1.6.

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Elektroniske kretser Oppgave 1

The circuit equations are then:

( R1 + R2 + Ro ) I1 − AU1 − Us = 0 (27)

(28)
U 1 = U s − R 1 I1

If we solve (27) and (28) with respect to I1:

A +1 (29)
I1 = U
(A + 1)R 1 + R 2 + R o s

Now we find the output voltage Uo:

U o = R o I1 − A(U s − R 1 I1 ) = (R o + AR 1 ) I1 − AU s (30)

3.6. Voltage gain.

From (29) and (30) we find:

Uo R2 A − Ro (31)
Au = =−
Us R2 + Ro + ( A + 1) R1

Usually Ro << R2 so that (31) can be reduced to:

(32)
−A
Au =
R1
1+ ( A + 1)
R2

We get:

R1(1 + A)
β≈ (33)
R2 A

For small A, β becomes independent of the gain of the amplifier and it is not possible to make
a division as described earlier. If |A| >> 1, β becomes independent of A. Then:

R1
β≈ (34)
R2

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If we assume further that

R1
βA ≈ A >> 1 (35)
R2

we get:

R (36)
Au ≈ − 2
R1

3.7. Input impedance.

We assume the same way as for the previous circuit that the amplifier is little loaded at the
output (|ZL| >> Ro). Then we can find the input impedance directly from (29):

Us R2 + Ro
Zinn = = R1 + (37)
I1 A+1

With Ro << R2 and |A| >> 1:

R2  A 
Z inn ≈ R 1 + = R 1 1 + u  (38)
A  A 

The input impedance does not differ much from R1 since Au/A is usually a small quantity.

3.8. Output impedance.

From fig. 1.6 we see that (Us = 0):

Uo Uo + AU1
Io = + (39)
R1 + R2 Ro

and U1 =R1I1 (40)

If we combine those two equations, we get:

Uo R o (R 1 + R 2 )
Z ut = ≈ (41)
Io Uc =0
R o + R 1 + R 2 + AR 1

The expression is reduced to

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Elektroniske kretser Oppgave 1

1+ Au
Z ut ≈ R o (42)
A

if Ro << R1 + R2 and |A| >> |Au|.

The output impedance is therefore reduced with feedback.

4. Electronic gain control.

In the practical exercise we are going to use a JFET as a voltage controlled resistor. Drain and
source contacts of this component are connected to the ends of a channel area of n-doped
silisium, while the gate contact is connected to a p-doped area that surrounds the channel.
When the pn-junction between the gate and the channel is reverse biased, a conducting
depletion layer is formed in that part of the channel area that borders to the p-doped area. This
causes the channel cross section to decrease and the resistance RD between the drain and the
source to increase. The resistance RD can be controlled by varying the voltage between the
gate and the source. If we replace R1 in the amplifier circuit with a FET we can controll the
voltage gain electronically.

As the first approximation we assume that RD is independent of the drain-source voltage-uDS.

This is true for small signal amplitudes. If the amplitude increases, RD will vary with uDS and
we get nonlinear distortion. If we measure iD as a function of uDS with constant gate-source
voltage uGS, we get the curve shown in fig. 1.8, curve a).

With uGS as the parameter we get the curves as in fig. 1.9. The slope of different curves around
the origin shows how a FET works as a variable resistor controlled by uGS (for small
variations about iD = 0, uDS = 0).

A iD
u

A
u
b)

A uo
iD

≈ 0.5V u
DS

a)

Fig. 1.8. a) Drain-current in a FET as a function of drain-source voltage, with constant gate-source voltage.
b) The curve for the voltage gain in fig. 1.3, when a FET is used instead of R1.

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Oppgave 1 Elektroniske kretser

I (mA) U =0
D GS -1 -2
-3
0.5

-4

-0.5 0.5 1.0 U (V)

DS

Fig. 1.9. Output characteristic for a FET about the origin.

For iD-uDS-characteristics in fig. 1.9 the following analytical expressions are true [2] p. 157.

  u  u  u DS  
2

i D = I DSS 21 − GS
 DS
−   (43)
  U P  (− U P )  U P  


IDSS is defined by the saturation current with uGS = 0V. The pinch off voltage UP, corresponds
to uGS when the channel is strangulated. UP is negative for our n-channel JFET.

From (43) we see that if the square term of uDS is disregarded, we get a linear relation, so that
RD becomes independent of uDS for small amplitudes.

The linearity can however be extended to gield for larger amplitudes by connecting two equal
resistors RF as shown in fig. 1.10.

If we remember that gate current is equal to 0

uGG + uDS
uGS = (44)
2

We are going to study this in the practical exercise and shall therefore study the distortion that
appears closely.

From fig. 1.9 we see that the slope of the curves iD(uDS) in the origin decreases when uGS
becomes more negative, and if RD is substituted instead of R1 in the amplifier circuit in fig. 1.3
(or fig. 1.11) the gain (Au ≈ R2/R1) will decrease when uGS decreases. In addition, it can be
seen that the curves are bent.

Au can be expressed as a 1. order series in uDS :

Au = Auo +α ⋅uDS (t ) (45)

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Elektroniske kretser Oppgave 1

where α = δAu |u =0
δu DS DS
If the input signal is a sinus (us(t) = Ûs sinωt), we can also assume that uDS(t) is a sinus. We
assume further that ω is so small that we can disregard the phase shift in the circuit.

The output voltage becomes

uo ( t ) = Au ⋅ us ( t ) = ( Auo + αU∃ds sin ωt ) ⋅U∃s sin ωt (46)

If we multiply and arrange the terms, we get

αÛ ds Û s αÛ ds Û s
u o (t ) = A u u s (t ) = + A uo Û s sinωt − cos2ωt (47)
2 2

+12V

Ra

RF 2N5458
10 K
R2
G
RF
UGG
Rb
S D
R3 A

-12V
U
o
Us

Fig. 1.10. Voltage controlled amplifier with a field effect transistor feedback to reduce its nonlinearity.

From (47) we see that in addition to the desired term AuoÛssinωt we have a direct voltage and
a 2. harmonic term. Since Ûds ≈ Ûs in this circuit, we see that both of these terms increase as
the square of the signal amplitude (Important.)

As mentioned earlier the curves in fig. 1.8 have a certain slope. If we take this into account
and include higher order terms into the expression for Au i, uo(t) will include harmonic
components besides 2. harmonic.

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Oppgave 1 Elektroniske kretser

5. Preliminary study.

1. Insert equation (44) into equation (43) and show linearity improvement.

2. Calculate the value of resistor R1 in the amplifier in figure 1.11 so that the voltage gain
Uo/Us at low frequencies is 100 (40 dB). Assume R2 = 22 kΩ. R3 = R1||R2.

3. Explain the operation of the circuit in figure 1.13. Assume that the diode is ideal and
appears as a short circuit when forward biased, and as an open circuit when reverse
biased.

6. Laboratory exercise.

1. First in this practical exercise, we are going to study the amplifier circuit shown in
figure 1.11. Pin numbers are indicated in the figure. Connect the circuit. NB! If a
variable resistor is needed, use the potentiometers that were handed out. Otherwise, use
usual resistors.

+12V
R2

R1
2
- 7
6
R3 µA741
3 5
1
+
k 4 10K Uo
Us

k
-12V

Fig. 1.11. Non-inverting amplifier circuit with an operational amplifier.

Disconnect the generator, short-circuit over k-k, and adjust the "offset"-
potentiometer to Uo = 0.

Measure the circuit's amplitude- og phase response using an oscilloscope, (in other
words |Au| = |Uo/Us|(dB) and ∠A u as a function of frequency). Be careful not to make
the input signal too strong. It can overload the circuit. Do not increase the input level if
the output amplitude is on the order of 5V. Sketch the measured amplitude response
in dB and the phase response in degrees.

Find ∠A u (the phase shift of the amplifier) for:

a) Low frequencies (f.ex. a couple of hundreds of Hz).

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Elektroniske kretser Oppgave 1

b) The frequency where the gain is reduced by 3 dB compared to the maximum

value.
c) At high frequencies. (Choose a frequency where the amplitude is reduced by appr.
20 dB compared to the maximum value.)

+12V

Ra

10 K R2
2N5458
G
UGS +12V
Rb
D A 7
S R3
-12V 1 5
2.2K
4 10K Uo
Us

-12V

Fig. 1.12. An amplifier circuit with electrically adjustable gain.

To be able to adjust the gain electrically , we insert a field effect transistor instead of R1.
A 2,2 kΩ resistor in parallel with UDS is used to set the lower gain limit.

All the measurements in the rest of the exercise are done at the frequency of 1 kHz.
Choose Ra = 15 kΩ and Rb = 5,6 kΩ and connect the circuit in figure 1.12.

2. Measure the voltage gain Au = Uo/Us as a function of UGS. Verify the curve shape on
the oscilloscope.
Adjust UGS so that Au is appr. 15. What is the voltage amplitude Ûds when the
output signal is about to be clipped?
Sketch this output signal including any DC offset (use DC-coupling on the
oscilloscope). Can you, based on the theory, make any statements about the
presence of upper harmonics in the output signal?
Vary the input signal level and observe how the DC-level and the wave shape of the
output signal change accordingly. Use also the XY-setting on the oscilloscope to
examine the linearity properties of the amplifier. Sketch and comment.

3. Insert a resistor RF = 100 kΩ as shown in figure 1.10. (2,2 kΩ in parallel with UDS .
Keep the offset adjustment made previously). Adjust UGS to give the same gain as in
section 2 (Au ≈ 15).
Investigate if this gives better linearity.
Sketch the curve shape for the same Ûds as in section 2. Use again the XY-setting
and compare this to the result from the preliminary study. Sketch.

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4. We will finally use our amplifier to illustrate the third form of feedback that is of huge
practical importance - automatic gain control (AGC, compression circuit). AGC is used
when we wish to keep the amplifier's output level appr. constant despite of the
variations in the input level for different reasons. In this case we ractify and lowpass
filter the output signal as shown in figure 1.13, and use this slow varying voltage as a
control signal to the field effect transistor.

Connect and measure the output voltage as a function of the input voltage for this
circuit. Comment.

2.2K R
2

S D

R A
3
G R
F
Uo
U
s
R
F

100K 5 µF 1N4448

Fig. 1.13. Compression amplifier. Offset adjustment is not indicated in the figure.

Replace the 2,2 kΩ resistor in parallel with the transistor with a 4,7 kΩ one.
Measure the output voltage as a function of the input voltage. Comment.

7. Literature.

[1] J.W. Nilsson og S.A. Riedel: "Electric circuits", 6th edition, Addison-Wesley, 1999

[2] G. Rizzoni: "Electrical Engineering", 4nd edition, McGraw-Hill, 2003

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