Vous êtes sur la page 1sur 17

COURSES OFFERED:

GATE
CLASS ROOM COACHING
LONG TERM COACHING
SHORT TERM COACHING
CORRESPONDANCE COACHING
CLASS ROOM TEST SERIES
ONLINE TEST SERIES
IES
LONG TERM CLASS ROOM COACHING
CORRESPONDANCE COACHING


PSUS
BSNL
JTO
MANAGEMENT TRAINEES
JAO
AP GENCO , AP TRANSCO
ELECTRICITY BOARD IN ALL STATES
DRDO
BHEL
TTA
ECET
ALL COMPETITIVE EXAMS ETC.,

CONCESSION OFFERS:




FREE COACHING FOR CLASS TOP TWO STUDENTS.

FEE CONCESSION BASED ON MERIT.


ADDRESSES OF OUR INSTITUTIONS:


HYDERABAD
SAIMEDHA COACHING CENTRE
G-12,SWARNA JYANTHI COMPLEX,
BESIDE MYTHRIVANAM,
AMEERPET.
PINCODE : 500 038.
CONTACT NOS : 9490272227 , 040 23731234.

BANGLORE
SAIMEDHA COACHING CENTRE
# 102 , CENTRAL COMPLEX,
RAJIVGANDHI CIRCLE,
SHESHADRI PURAM,
NEAR MAGESTIC,
BANGLORE.
CONTACT NOS : 09035375436 , 09482072960.

TIRUPATHI
SAIMEDHA COACHING CENTRE
18-1-291/1,BHAVANI NAGAR,
BESIDE TTD ADMINISTRATIVE BUILDING
PINCODE : 517 101.
CONTACT NOS : 9989133304 , 0877 2220213.

VIJAYAWADA
SAIMEDHA COACHING CENTRE
RAMA KRUPA COMPLEX,
FIRST FLOOR,
OPP ANDHRA BANK,
RING ROAD BRANCH,
BENZ CIRCLE,
VIJAYAWADA.
PINCODE : 520010.
CONTACT NOS : 9490768873 , 0866 2493316.


OBJECTIVE BITS ON ELECTRONIC DEVICES AND CIRCUITS:

1) The three terminals of a bipolar junction transistor are called
(a) p, n, p (b) n, p, n
(c) input, output, ground (d) base, emitter, collector

2) In a pnp transistor, the p regions are
(a) Base and emitter (b) Base and collector (c) Emitter and collector

3) For operation as an amplifier, the base of an npn transistor must be
(a) Positive with respect to the emitter
(b) Negative with respect to the emitter
(c) Positive with respect to the collector
(d) 0V

4) The emitter current is always
(a) Greater than the base current (b) Less than the collector current
(c) Greater than the collector current (d) Answers (a) and (c)

5) The [
DC
of a transistor is its
(a) Current gain (b) voltage gain (c) power gain (d) internal
resistance

6) If I
C
is 50 times larger than I
B
, then [
DC
is
(a) 0.02 (b) 100 (c) 50 (d) 500

7) The approximate voltage across the forward-biased base emitter junction of a
silicon BJT is
(a) 0 V (b) 0.7 V (c) 0.3 V (d) V
BB


8) The bias condition for a transistor to be used as a linear amplifier is called
(a) Forward-reverse (b) Forward-forward
(c) Reverse-reverse (d) Collector bias

9) If the output of a transistor amplifier is 5 V rms and the input is 100 mV rms,
the voltage gain is
(a) 5 (b) 500 (c) 50 (d) 100

10) When operated in cutoff and saturation, the transistor acts like a
(a) Linear amplifier (b) Switch (c) Variable capacitors (d) Variable
resistor

11) In cutoff, V
CE
is
(a) 0 V (b) Minimum (c) Maximum (d) Equal to
V
CC

(e) Answers (a) and (b) (f) Answers (c) and (d)

12) In saturation V
CE
is
(a) 0.7 V (b) equal to V
CC
(c) minimum (d) maximum
13) To saturate a BJT,
(a) I
B
= I
C(sat)
(b) I
B
> I
C(sat)
/ [
DC

(c) V
CC
must be at least 10 V (d) The emitter must be grounded

14) Once in saturation, a further increase in base current will
(a) Cause the collector current to increase
(b) Not affect the collector current
(c) Cause the collector current to decrease
(d) Turn the transistor off

15) If the base-emitter junction is open, the collector voltage is
(a) V
CC
(b) 0 V (c) floating (d) 0.2 V

16) The JFET is
(a) A unipolar device (b) A voltage-controlled device
(c) A current-controlled device (d) Answers (a) and (c)
(e) Answers (a) and (b)

17) The channel of a JFET is between the
(a) Gate and drain (b) Drain and source
(c) Gate and source (d) Input and output

18) A JFET always operates with
(a) The gate-to-source pn junction reverse-biased
(b) The gate-to-source pn junction forward-biased
(c) The drain connected to ground
(d) The gate connected to source

19) For V
GS
= 0 V, the drain current becomes constant when V
DS
exceeds
(a) Cutoff (b) V
DD
(c) V
P
(d) 0 V

20) The constant-current area of a FET lies between
(a) Cutoff and saturation (b) Cutoff and pinch-off
(c) 0 and I
DSS
(d) Pinch-off and breakdown

21) I
DSS
is
(a) The drain current with the source shorted

(b) The drain current at cutoff


(c) The maximum possible drain current
(d) The midpoint drain current

22) Drain current in the constant-current area increases when
(a) The gate-to-source bias voltage decreases
(b) The gate-to-source bias voltage increases
(c) The drain-to-source bias voltage increases
(d) The drain-to-source bias voltage decreases

23) In a certain FET circuit, V
GS
=0V, V
DD
= 15 V, I
DSS
= 15 mA, and R
D
= 470. If
R
D
is decreased to 330 , I
DSS
is
(a) 19.5 mA (b) 10.5 mA (c) 15 mA (d) 1 Ma


24) At cutoff, the JFET channel is
(a) At its widest point (b) Completely closed by the depletion region
(c) Extremely narrow (d) Reverse-biased

25) A certain JFET data sheet gives V
GS(off)
= -4 V. The pinch-off voltage, V
P
,
(a) Cannot be determined (b) is -4 V (c) depends on V
GS
(d) is +4 V
26) A diffused resistor in an IC
(a) Is fabricated before transistor diffusion
(b) Is fabricated after transistor diffusion
(c) Can be fabricated with precision for any resistance value
(d) Is formed along with fabrication of transistors.

27) The photoetching process consists in
(a) Remove the photoresist
(b) Curbing lines on the wager before dicing
(c) Diffusing impurities
(d) Removed of layer from selected portion

28) Isolation diffusion in a monolithic IC creates concentration of acceptor atoms in the region
between the isolation islands of the order of
(a) 10
15
cm
-3
(b) 10
20
cm
-3
(c) 10
25
cm
-3
(d) 10
25
cm
-3


29) Substrate in a monolithic IC chip has thickness of about
(a) 1 mm (b) 5 mm (c) 50 mm (d) 200 mm

30) Epitaxial growth is used in integrated circuit
(a) Because it produces low parasitic capacitance
(b) Because it yields back-to-back isolating junctions
(c) To grow single crystal n-doped silicon on a single-crystal p-type substrate
(d) To grow selectively single-crystal p-doped silicon of one resistivity on p-type
substrate of a different resistivity.

31) The buried layer in an integrated circuit is

(a) Doped (b) doped (c) located in the base region


(d)Used to reduce the parasitic capacitance

32) The typical number of diffusions used in making epitaxial-diffused silicon integrated circuit
is
(a) 1 (b) 2 (c) 3 (d) 4

33) The material popularly used for contracts and interconnections in ICs is
(a) Copper (b) aluminum (c) silver (d) zinc

34) In order to form a structure contacting both pnp and npn transistors, monolithic IC requires
(a) 3 layers (b) 4 layers (c) 5 layers (d) 6 layers

35) Epitaxial growth in IC chip
(a) May be n-type only (b) may be p-type only
(c) Involves growth from liquid phase (d) involves growth from gas phase

36) In n-well CMOS fabrication substrate is
(a) Lightly doped n-type (b) lightly doped p-type
(c) Heavily doped n-type (d) heavily doped p-type

37) The chemical reaction involved in epitaxial growth in IC chips takes place at a temperature
of about
(a) 500
0
C (b) 800
0
C (c) 1200
0
C (d) 2000
0
C

38) A single monolithic IC chip occupies area of about
(a) 20 mm
2
(b) 200 mm
2
(c) 2000 mm
2
(d) 20,000 mm
2
s

39) Silicon dioxide layer is used in IC chips for
(a) Providing mechanical strength to the chip
(b) Diffusing elements
(c) Providing contacts
(d) Providing mask against diffusion

40) The p-type substrate in a monolithic circuit should be connected to
(a) Any dc ground point
(b) The most negative voltage available in the circuit
(c) The most positive voltage available in the circuit
(d) No ware, i.e be floating

41) The collector-substrate junction in the epitaxial collector structure is approximately
(a) A step- graded junction (b) A linearly graded junction
(c) An exponential junction (d) none of the above

42) The sheet resistance of a semiconductor is
(a) An important characteristic of a diffused region especially when used to form
diffused resistors
(b) An undesirable parasitic element
(c) A characteristic whose value determines the required area for a given value of
integrated capacitance
(d) A parameter whose value is important in a thin-film resistance

43) Monolithic integrated circuit system offer greater reliability than discrete-component systems
because
(a) There are fewer interconnections
(b) High temperature metalizing is used
(c) Electric voltage are low
(d) Electric elements are closely matched

44) Silicon dioxide is used in integrated circuits
(a) Because of its high heat conduction
(b) Because it facilities the penetration of diffusants
(c) To control the location of diffusion and to protect and insulate the silicon surface
(d) To control the concentration of diffusants.

45) Increasing the yield of an IC
(a) Reduces individual circuit cost
(b) Increases the cost of each good circuit
(c) Results in a lower number of good chips for wafer
(d) Means that more transistors can be fabricated on the same size wafer.


46) The main purpose of the metallization process is
(a) To act as a heat sink
(b) To interconnect the various circuit elements
(c) To protect the chip from oxidation
(d) To supply a bonding surface for mounting the chip

47) In a monolithic-type IC
(a) Each transistor is diffused into a separate isolation region
(b) All components are fabricated into a single crystal of silicon
(c) Resistors and capacitors of any value may be made
(d) All isolation problems are eliminated

48) Isolation in ICs is required
(a) To make it simpler to test circuits
(b) To protect the transistor from possible thermal run away
(c) To protect the components mechanical damage
(d) To minimize electrical interaction between circuit components

49) Almost all resistor are made in a monolithic IC
(a) During the base diffusion
(b) During the collector diffusion
(c) During the emitter diffusion
(d) While growing the epitaxial layer

50) The equation governing the diffusion of neutral atom is
(a)
N
t
= D

2
N
x
2
(b)
N
x
= D

2
N
t
2

(c)

2
N
t
2
= D
N
x
(d)

2
N
x
2
= D
N
t

51) An abrupt silicon in thermal equilibrium at T = 300 K is doped such that


E
c
- E
F
= 0.21 eV in the n- region and E
F
- E
v
= 0.18 eV in the p-region. The
built-in potential barrier V
bi
is
(a) 0.69 V (b) 0.83 V (c) 0.61 V (d) 0.88 V

52) A silicon pn junction at T=300K has N
d
= 10
14
cm
-3
and N
a
=10
17
cm
-3
. The
built-in voltage is
(a) 0.63 V (b) 0.93 V (c) 0.026 V (d) 0.038 V

53) In a uniformly doped GaAs junction at T=300 K, at zero bias, only 20% of
the total space charge region is to be in the p-region. The built in potential
barrier is V
bi
= 1.20 V. The majority carrier concentration in n-region is
(a) 1 x10
16
cm
-3
(b) 4 x10
16
cm
-3
(c) 1 x10
22
cm
-3
(d)4x10
22
cm
-3


Statement for Q ( 4-5 ):
An abrupt silicon pn junction at zero bias and T = 300 K has dopant
concentration of N
a
=10
17
cm
-3
and N
d
= 5 x 10
15
cm
-3
.
54) The Fermi level on n-side is
(a) 0.1 eV (b) 0.2 eV (c) 0.3 eV (d) 0.4 eV

55) The Fermi level on p-side is
(a) 0.2 eV (b) 0.1 eV (c) 0.4 eV (d) 0.3 eV

Statement for Q ( 6-8 ):
A silicon pn junction at T=300 K with zero applied bias has doping
concentration of N
d
= 5 x 10
16
cm
-3
and N
a
= 5 x 10
15
cm
-3
.

56) The width of depletion region extending into the n-region is
(a) 4 x 10
-6
cm (b) 3 x 10
-6
cm (c) 4 x 10
-5
cm
(d) 3 x 10
-5
cm

57) The space charge width is
(a) 3.2 x 10
-5
cm (b) 4.5 x 10
-5
cm (c) 4.5 x 10
-4
cm (d) 3.2x10
-
4
cm

58) In depletion region maximum electric field |E
mux
| is
(a) 1 x10
4
V/cm (b) 2 x10
4
V/cm (c) 3x10
4
V/cm (d) 4x
10
4
V/cm

59) An n-n isotype doping profile is shown in fig.P2.2.9. The built in potential
barrier is
(n
i
= 1.5 x 10
10
cm
-3
)
N
d
(cm
10
10
0
Fig.P2.2.





(a) 0.66 V (b) 0.06 V (c) 0.03 V (d) 0.33 V
Statement for Q ( 10-11 ):
A silicon abrupt junction has dopant concentration N
a
= 2 x 10
16
cm
-3
and N
d

= 2 x 10
15
cm
-3
. The applied reverse bias voltage is V
R
= 8 V.
60) The maximum electric field |E
mux
| in depletion region is
(a) 15x10
4
V/cm (b) 7x10
4
V/cm (c) 3.5x10
4
V/cm (d) 5x10
4
V/cm

61) The space charge region is
(a) 2.5 m (b) 25 m (c) 50 m (d) 100 m

62) A uniformly doped silicon pn junction has N
a
=5 x 10
17
cm
-3
and N
d
=10
17
cm
-
3
. The junction has a cross-sectional area of 10
-4
cm
-3
and has an applied
reverse bias voltage of V
R
=5 V. the total junction capacitance is
(a) 10 pF (b) 5 pF (c) 7 pF (d) 3.5 pF

63) Reverse recovery current in a diode depends on
(a) Forward field current (b) storage charge
(b) Temperature (d) PIV

64) Choose proper substitutes for X and Y to make the following statement
correct Tunner diode and A valanche photodiode are operated in X bias
and Y bias respectively.
(a) X:reverse, Y:reverse
(b) X:reverse, Y:forward
(c) X:forward, Y:reverse
(d) X:forward, Y:forward

65) The values of voltage (V
D
) across a tunnel diode corresponding to peak
and valley currents are V
P
and V
V
respectively. The range of tunnel diode
voltage V
D
for which the slope of its 1 - V
D
characteristics is negative
would be
(a) V
D
<0 (b) 0V
D
<V
P
(c) V
P
V
D
<V (d) V
D
V
V

66) A tunnel diode is
(a) High resistivity p n junction diode
(b) A slow switching device
(c) An amplifying device

(d) A very heavily doped p-n diode



67) In a p
+
n junction diode under reverse bias, the magnitude of electric field
is maximum at
(a) The edge of the depletion region on the p-side
(b) The edge of the depletion region on the n-side
(c) The p
+
n junction
(d) The center of the depletion region on the n-side

68) The junction capacitance of a p-n junction depends on
(a) Doping concentration only
(b) Applied voltage only
(c) Both doping concentration applied voltage only
(d) Barrier potential only

69) Under small signal operation of a diode
(a) Its bulk resistance increase
(b) Its junction resistance predominates
(c) It acts like a closed switch
(d) It behaves as a clipper

70) The reverse current of a silicon diode is
(a) Highly bias voltage sensitive
(b) Highly temperature sensitive
(c) Both bias voltage and temperature sensitive
(d) Independent of bias voltage and temperature

71) In switching diode fabrication, a dopant is introduced into silicon which
introduces additional trap levels in the material thereby reducing the
mean life time of carriers. This dopant is
(a) Aluminium (b) Platinum (c) Gold (d) Copper

72) The diffusion potential across a p-n junction
(a) Decreases with increasing doping concentration
(b) Increases with decreasing doping concentration
(c) Does not depend on doping concentration
(d) Increases with increasing in doping concentration
Statement for Q( 23-24 ):
An ideal one-sided silicon n
+
p junction has uniform doping on both sides of
the abrupt junction. The doping relation is N
d
=50N
a
. The built-in potential
barrier is V
bi
= 0.75 V. The applied reverse bias voltage is V
R
= 10.

73) The space charge width is


(a) 1.8 m (b) 1.8 mm (c) 1.8 cm (d) 1.8 m

74) The junction capacitance is
(a) 3.8x10
-9
F/cm
2
(b) 9.8x10
-9
F/cm
2
(c) 2.4x10
-9
F/cm
2
(d) 5.7x10
-
9
F/cm
2

75) Two p
+
n silicon junction is reverse biased at V
R
= 5V. The impurity
doping concentration in junction A are N
a
= 10
18
cm
-3
and N
d
= 10
-15
cm
-3
,
and those in junction B are N
a
= 10
16
cm
-3
and N
d
= 10
16
cm
-3
. The ratio of
the space charge width is
(a) 4.36 (b) 9.8 (c) 19 (d) 3.13
76) When a diode is forwarding biased and the bias voltage id increased , the
forward current will
(a) Increase (b) decrease (c) not change

77) When a diode is forward biased and the bias voltage is increased,
the voltage across the diode (assuming the partial model) will
(a) Increase (b) decrease (c) not change

78) When a diode is reverse biased and the bias voltage is increased,
the reverse current (assuming the partial model) will
(a) Increase (b) decrease (c) not change

79) When a diode is reverse - biased and the bias voltage is increased,
the reverse current (assuming the complete model) will
(a) Increase (b) decrease (c) not change

80) When a diode is forward biased and the bias voltage is increased,
the voltage across the diode (assuming the complete model) will
(a) Increase (b) decrease (c) not change

81) If the forward current in a diode is increased, the diode voltage
(assuming the complete model) will
(b) Increase (b) decrease (c) not change

82) If the forward current in a diode is decreased, the diode voltage
(assuming the complete model) will
(a) Increase (b) decrease (c) not change

83) If the barrier potential of a diode is exceeded, the forward current
will
(a) Increase (b) decrease (c) not change

84) Every known element has

(a) The same type of atoms


(b) The same number of atoms
(c) A unique type of atom
(d) Several different types of atoms

85) An atom consists of
(a) One nucleus and only one electron
(b) One nucleus and one or more electrons
(c) Protons, electrons and neutrons
(d) Answers (b) and (c)

86) The nucleus of an atom is made up of
(a) Protons and neutrons (b) Electrons
(c) Electrons and protons (d) Electrons and neutrons

87) The atomic number of silicon is
(a) 8 (b) 2 (c) 4 (d) 14
88) The atomic number of germanium is
(a) 8 (b) 2 (c) 4 (d) 32

89) The valence shell in a silicon atom has the number designation of
(a) 0 (b) 1 (c) 2 (d) 3

90) Valence electrons are
(a) In the closest orbit to the nucleus
(b) In the most distant orbit from the nucleus
(c) In various orbits around the nucleus
(d) Not associated with a particular atom

91) Energy required to break a covalent in semiconductor is

(a) Always equal to 1.6 e V
(b) Greater in Ge than in Si
(c) Equal to the width of the forbidden energy gap
(d) is the same in Ge as in Si

92) The diffusion length of a carrier depends on
(a) the shape of the semiconductor
(b) the life time of the carriers alone
(c) the mobility and life time of the carriers
(d) the mobility of the carriers alone.

93) A positive ion is formed when

(a) A valence electron breaks away from the atom


(b) There are more holes than electrons in the outer orbit
(c) Two atoms bond together
(d) An atom gains an extra valence electron

94) The most widely used semiconductive material in electronic devices
is
(a) Germanium (b) carbon (c) copper (d) silicon

95) The energy band in which free electrons exist is the
(a) First band (b) second band (c) conduction band (d) valence band

96) Electron hole pairs are produced by
(a) Recombination (b) thermal energy (c) ionization (d) doping

97) Recombination is when
(a) An electron falls into a hole
(b) A positive and a negative ion bond together
(c) A valance electron becomes a conduction electron
(d) A crystal is formed
98) In a semiconductor crystal, the atoms are held together by
(a) The interaction of valence electrons
(b) Forces of attraction
(c) Covalent bonds
(d) Answers (a),(b), and (c)
99) Each atom in a silicon crystal has
(a) Four valence electrons
(b) Four conduction electrons
(c) Eight valence electrons, four of its own and four shared
(d) No valence electrons because all are shared with other atoms

100) Pure semiconductors are poor conductor because

(a) they have no valence electrons
(b) all valance electrons are in e-pairs
(c) they have a number of holes
(d) there are fewer es than protons
KEY:
1-d 2-c 3-a 4-d 5-a 6-c 7-b 8-a 9-c 10-b
11-d 12-c 13-b 14-b 15-a 16-c 17-b 18-a 19-c 20-d
21-c 22-a 23-c 24-b 25-d 26-d 27-d 28-b 29-b 30-c

31-b 32-c 33-b 34-c 35-d 36-b 37-c 38-c 39-d 40-b
41-a 42-a 43-a 44-c 45-a 46-b 47-b 48-d 49-a 50-a
51-a 52-a 53-a 54-c 55-c 56-a 57-b 58-c 59-b 60-b
61-a 62-d 63-a 64-c 65-c 66-d 67-c 68-c 69-b 70-b
71-a 72-d 73-a 74-d 75-d 76-a 77-c 78-c 79-a 80-a
81-c 82-b 83-a 84-c 85-d 86-a 87-d 88-d 89-d 90-b
91-c 92-c 93-a 94-d 95-c 96-b 97-a 98-d 99-c 100-b

Vous aimerez peut-être aussi