Document Type: Tutorial NI Supported: Yes Publish Date: Mar 18, 2011

LabVIEW FPGA Module Training

Overview Welcome to the LabVIEW FPGA Module Training Course. This free training material is divided into 10 lessons. There is a slideshow attached directly to this document. Download, unzip, and double click the index.htm linkn in the folders. The Slideshow contains slides and accompanying explanatory notes. Below you will see the outline for each section To get more training and detailed exercises check out the full FPGA training module here. This material was developed to be an introduction to LabVIEW FPGA. Previous knowledge of LabVIEW is highly recommended. Table of Contents 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. Download Slideshow and Descriptions Lesson 1 - Introduction to FPGA Lesson 2 - LabVIEW FPGA Basics Lesson 3 - FPGA Programming Basics Lesson 4 - FPGA I/O Lesson 5 - Timing an FPGA VI Lesson 6 - Data Sharing on FPGA Lesson 7 - Single-Cycle Timed Loops Lesson 8 - Basic Host Integration Lesson 9 - DMA Transfer Lesson 10 - Modular FPGA Programming Appendix A - Pipelining

Download Slideshow and Descriptions LabVIEW FPGA Training Module Lesson 1 - Introduction to FPGA Introduction to FPGA Technology LabVIEW FPGA System Comparison with DAQmx LabVIEW FPGA Applications Lesson 2 - LabVIEW FPGA Basics Evaluating System Requirements FPGA System Architectures Reconfigurable I/O (RIO) Architectures Software Installation Windows Hardware Configuration Real-Time Hardware Configuration Creating a LabVIEW FPGA Project Lesson 3 - FPGA Programming Basics Introduction to FPGA Programming Defining FPGA Logic with LabVIEW Developing the FPGA VI Interactive Front Panel Communication Selecting an Execution Mode Compiling the FPGA VI Basic Optimizations Lesson 4 - FPGA I/O Introduction to FPGA I/O Configuring FPGA I/O I/O Types Integer Math Fixed-Point Math CompactRIO Error Handling Lesson 5 - Timing an FPGA VI Timing Express VIs Implementing Loop Execution Rates Creating Delays Between Events Measuring Time Between Events Benchmarking Loop Periods

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Lesson 6 - Data Sharing on FPGA Parallel Loop Execution Shared Resources Variables Memory Items Race Conditions FPGA FIFOs Comparison of Data Sharing Methods Lesson 7 - Single-Cycle Timed Loops Dataflow in LabVIEW FPGA Single-Cycle Timed Loop (SCTL) FPGA Clocks SCTL Errors Lesson 8 - Basic Host Integration Windows Host integration Developing a Windows Host VI Introduction to Real-Time (RT) Developing an RT Host VI Developing a Windows VI Shared Variable Network Communication Prepare RT Host for Final Application Lesson 9 - DMA Transfer LabVIEW FPGA and Host Communication DMA FIFOs Lossless Data Transfer Interleaving Lesson 10 - Modular FPGA Programming Review of SubVIs Using SubVIs on the FPGA Reentracny and non-reentrancy in FPGA Using Name Controls and Constants Testing FPGA SubVIs LabVIEW FPGA IPNet Appendix A - Pipelining Pipelining Using Pipelining in SCTLs

Downloads fpga_training_slides.zip

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