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Surface & Coatings Technology 203 (2009) 20212029

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Surface & Coatings Technology


j o u r n a l h o m e p a g e : w w w. e l s ev i e r. c o m / l o c a t e / s u r f c o a t

Evaluation of the mechanical behaviour of nanometre-thick coatings deposited using an atmospheric pressure plasma system
Barry Twomey a,, Gerry Byrne a, Alan Hynes b, Liam O'Neill b, Denis Dowling a
a b

School of Electrical, Electronic and Mechanical Engineering, UCD, Beleld, Dublin 4, Ireland Dow Corning Plasma Solutions, Owenacurra Business Park, Midleton, Co. Cork, Ireland

a r t i c l e

i n f o

a b s t r a c t
This study evaluated the use of pin-on-disc wear testing as a technique to examine the mechanical behaviour of nanometre thick plasma deposited coatings. The coatings were deposited onto polyethylene terephthalate and silicon wafer substrates by directly injecting an aerosol of siloxane liquid precursors into a helium/oxygen atmospheric pressure plasma. The siloxane precursors examined were hexamethyldisiloxane, polydimethylsiloxane and tetramethyldisiloxane. The mechanical performance of 21 (3) nm thick coatings was compared using a pin-on-disc wear test technique and fragmentation tests. An increase in the level of precursor plasma exposure was found to be associated with an increase in coating surface energy and a reduction in coating roughness and resulted in enhanced wear resistance. Fragmentation tests revealed a transition from ductile failure to brittle failure as the level of plasma exposure increased. This correlated with the reduction in coating wear rates. Wear track depth and proximity to the coating/substrate interface were both found to inuence the rate or wear. A simple correlation between wear rate and applied force is presented as a method for comparing coating performance using pin-on-disc wear testing. 2009 Elsevier B.V. All rights reserved.

Article history: Received 5 August 2008 Accepted in revised form 29 January 2009 Available online 12 February 2009 Keywords: Silicon oxide Fragmentation test Pin-on-disc Atmospheric pressure plasma Nano-coating PECVD

1. Introduction Silicon-containing coatings have found applications in the packaging [13], biomedical [4], automotive [5] and microelectronic [6] industries. Commonly these coatings are deposited using low-pressure plasma enhanced chemical vapour deposition (PECVD) [13] techniques. The requirement for the vacuum process however limits the exploitation of this technology due to batch-reel processing and an increased overall system size or system footprint. As a result, there has been an increasing interest in the use of atmospheric pressure plasmas for continuous inline processing [79]. The objective of this study is to evaluate how both the siloxane precursor chemistry and the level of exposure of the precursor to the plasma inuence the mechanical properties of the deposited coatings. This comparison study was carried on coatings of comparable coating thickness (21 3 nm) deposited from three liquid siloxane precursors using an atmospheric pressure plasma. The following siloxane precursors of similar molecular structures, as shown in Fig. 1, were used polydimethylsiloxane (PDMS), hexamethyldisiloxane (HMDSO) and tetramethyldisiloxane (TMDSO) and their molecular weights are 236.5, 162.4 and 134.3 g/mol respectively. Due to the thinness of the SiOx coatings deposited, it was not possible to use conventional testing techniques [10,11] (e.g. scratch testing) to evaluate mechanical performance. In this study therefore, the pin-on-disc wear

test method [12] and fragmentation testing [13] were used to correlate how increasing precursor plasma exposure inuences mechanical behaviour of deposited coatings. 2. Experimental set-up 2.1. Atmospheric pressure plasma treatment The coatings were deposited using the Dow Corning SE-1100 AP4 atmospheric pressure plasma system, previously described elsewhere [1416]. This system is comprised of 2 vertical plasma chambers arranged in conjunction with a dedicated web handling system, as illustrated in Fig. 2. The 300 320 mm electrodes consist of a conductive liquid housed in a dielectric perimeter and have a 5 mm electrode gap. An applied plasma power of 1000 W was delivered to the electrodes using a radio frequency power supply (frequency c. 20 kHz). Manual valved rotameters were used to control gas ows. Helium and oxygen gas ow rates were maintained at of 20 l/min and 0.1 l/min respectively. A syringe pump was used to supply reactive uids to 2 atomisers positioned at the top of the plasma deposition chamber. Burgener Ari Mist High Pressure atomisers were used. The siloxane precursors were sourced from Sigma Aldrich with a purity of at least 98% for each. Polyethylene terephthalate (PET) lm of 50 m thickness and 10 cm width, available from AB Supplies Ltd. (UK), was passed through the electrodes using the integrated web handling system. Each siloxane was continuously nebulised into the plasma zone as the PET lm was passed through the chamber at a speed of 1.5 m/min. At this line speed, the

Corresponding author. Tel.: +353 1 7161834; fax: +353 1 7161942. E-mail address: barry.twomey@ucd.ie (B. Twomey). 0257-8972/$ see front matter 2009 Elsevier B.V. All rights reserved. doi:10.1016/j.surfcoat.2009.01.042

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Fig. 1. Chemical structure of liquid siloxane precursors (n = 1 for 1 cst PDMS used in this work).

residence/deposition time of the plasma is 25 s per pass. Coatings on 2 2 cm Si wafers were achieved by mounting the wafer on the PET lm as it was passed through the chamber. 2.2. Coating characterisation Contact angle measurements were obtained using the sessile drop technique using an OCA 20 video capture apparatus from Dataphysics Instruments. Drop volumes of 1.5 l of the following liquid were used to determine surface energy: deionised water, diiodomethane and ethylene glycol. Surface energy was then determined using the OWRK (Owens, Wendt, Rabel and Kaelble) method [17]. In each measurement, three drops were deposited over the width of the sample and their contact angle was measured after settling on the surface for 10 s. The coating surface energy was calculated from the average contact angle value for each of the probe liquids. Coating surface energies were measured one week after deposition. This was carried out to reduce the variation that can arise from surface energy changes due to hydrophobic recovery which occurs immediately after plasma treatment [18]. Although contact angle measurements can be affected by coating surface roughness [19], it is anticipated that this effect will be small relative to the large changes in coating functionality achieved by varying the precursor plasma exposure [14,16]. The pin-on-disc wear tests were carried out using an Implant Sciences ISC-200PC tribometer on coated PET and Si wafer samples. Each sample was tested at a constant linear speed of 2 cm/s between the substrate and the loaded stylus. Loads of 10 g were used on a 3 mm tungsten carbide ball (pin) during testing. The PET test samples were mounted on glass slides using double sided tape. The tape was positioned to avoid being under the test area of the coated PET samples. Fragmentation testing was undertaken through the uniaxial loading of 10 2 cm PDMS coated PET samples [2,13]. Samples were taken parallel to the direction of the polymer lm. Three samples

for each coating were tested and an average crack density value was obtained. Coating morphology, surface roughness and wear track depth was examined using a Wyko NT1100 optical prolometer operating in phase shift interferometry (PSI) mode. A Hitachi S-4300 scanning electron microscope (SEM) was used to examine the coating fragmentation at the edge of the wear tracks and as a result on uniaxial straining. Wear track width was measured using an Olympus GX51 inverted microscope. A CP-II (Veeco) atomic force microscope (AFM) was employed to perform the top surface morphology analysis and surface roughness (Average roughness Ra and Root Mean Square roughness Rq) measurements of the coating using a 100 micron scanner and scan rate of 1 Hz. Ra and Rq were measured over 2 2 m areas. While Ra values are widely used as a measure of surface roughness the Rq values are also included to describe the spread of height deviation about the mean [20]. The AFM images were recorded in non-contact mode with silicon (phosphorous doped) cantilevers (nominal spring constant = 40 N/m, tip radius b10 nm). Coating thickness and refractive index were measured using a Wollam M2000 variable angle spectroscopic ellipsometer on Si wafer samples. The Cauchy model was used to determine the thickness and optical constants of coatings deposited on silicon wafers [21]. By determining the optical constants for the coatings the accurate refractive index values can be obtained. This enables accurate measurement of coating thickness for organosiloxane coatings rather than assuming SiO2 material properties when determining coating thickness. Measurements were carried out at multiple angles of incidence (6075 by 5) to improve the measurement condence (0.005 max error). 3. Results and discussion The effect of increasing precursor plasma exposure on the chemistry and morphology of the deposited coatings has been described in detail elsewhere [16]. In order to build up coating thickness, the polymer was passed a number of times through the deposition chamber (Fig. 2). Ellipsometry measurements of coating thickness demonstrated that for a given set of deposition conditions, the coating thickness was largely independent of siloxane type with average values of 23 2 nm, 20 2 nm and 19 1 nm for HMDSO, PDMS and TMDSO deposited coatings respectively. During deposition, the level of precursor plasma exposure was varied by altering the ow rate of the liquid precursor and at a constant plasma input power [14], as shown in Table 1. At applied powers of 1000 W, the average plasma input power during deposition is approximately 220 W, as reported elsewhere for the AP4 system [16]. For simplicity the precursor plasma exposure is presented as the average input power/precursor volume per pass. Low levels of plasma exposure were generated using high precursor ow rates of 50 l/min, intermediate levels at 32.5 l/min and high levels of plasma exposure were obtained by reducing the precursor ow rate to 17 l/min. These three levels of plasma exposure will be referred to as A, B and C

Table 1 Coating deposition conditions and precursor plasma exposure level Reference No. of passes Precursor ow rate (l/min) Estimated plasma exposure per pass (W/l) A 4 50 10.6 B 8 32.5 16.2 C 20 17 31.1

Fig. 2. Schematic of atmospheric pressure plasma liquid deposition process and experimental setup.

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B. Twomey et al. / Surface & Coatings Technology 203 (2009) 20212029 Table 2 Surface energy (dispersive and polar) for coatings deposited at increasing plasma exposure rates (from A to C) Reference Surface energy (mJ/m2) Dispersive (mJ/m2) Polar (mJ/m2) HMDSO A 30 23 7 B 47 24 23 C 66 27 39 PDMS A 29 22 7 B 54 26 28 C 64 28 36 TMDSO A 41 25 16 B 63 28 35 C 65 27 38 2023

respectively from here on. The number of passes was chosen to ensure that all coatings produced a similar coating thickness. Irrespective of the liquid precursor used, the average coating thickness of all the deposited coatings was 21 3 nm, as determined using ellipsometry. It is anticipated that increasing the plasma exposure will cause an increase in the level of crosslinking and coating oxidation. According to the model of vacuum plasma polymerisation developed by Yasuda [22], in order to maintain the same level of plasma polymerization at decreasing precursor volumes (Va N Vb), the input discharge power (W) also has to decrease (Wa/Va = Wb/Vb). By assuming ideal gas behaviour, the number of moles of precursor delivered can be expressed in terms of volume (V). Similarly, when using liquid precursors, this model can be applied to atmospheric pressure deposition if it is assumed the liquids are non-compressible [22]. The number of moles per liquid volume (mol/l) will vary between the different precursors (TMDSO N HMDSO N PDMS), although for an individual precursor, increasing the precursor volume will require a proportional increase in input power to achieve the same level of polymerisation. Surface energy measurements were used to study the effect of the changing precursor plasma exposure on coating chemistry and plasma polymerisation. As shown in Table 2, as the plasma exposure of the siloxane precursor to the plasma is increased (from A to C), the surface energy is also found to increase. It is primarily the polar component that was found to increase with increasing plasma exposure, while the dispersive remains almost constant at 2228 mJ/m2. Due to the increased polarity of the SiO bond over the SiC bond, an increase polar surface energy indicates an increase in the oxygen content of the deposited coatings [14,16,23]. This conclusion is supported by XPS analysis of the HMDSO deposited coatings where the highest surface energy value was found to be associated with a 90% Q-type (SiO2) siloxy chemistry [16]. Coating refractive index was determined using ellipsometry measurements at 632.8 nm through interpretation using the Cauchy model [21]. The inuence of PDMS precursor on the refractive index of the deposited coatings is given in Fig. 3. The polar component of the coating surface energy is observed to increase alongside the coating refractive index for increasing plasma exposure. An increase in coating

refractive index is commonly associated with a decrease in the organic fraction of the coating, as correlated with surface energy results, and an increase in coating density [24,25], and is in good agreement with the hypothesis that the coatings become more oxidised as the plasma exposure increases. AFM analysis demonstrated a decrease in the coating surface roughness and the level of particulates present in the deposited coatings for increasing plasma exposure, and decreasing precursor ow rates. Surface roughness was measured over an area of 2 2 m on coatings deposited on Si wafer substrate. A minimum of 10 measurements were made per coated sample with the average roughness values presented in Table 3. As shown in this table, the roughness of the HMDSO, PDMS and TMDSO coatings were found to decrease with increasing plasma exposure. This is primarily due to the decrease in the number of particulates present on the surface with increasing exposure, as illustrated in Fig. 4. It has been previously reported that particulate formation is likely to be caused by increased gas phase reaction as the volume of the precursor in the plasma increases [15,26]. These particulates have typical diameters in the range 50 to 300 nm. 3.1. Mechanical testing Mechanical testing was undertaken using the pin-on-disc wear test on coatings deposited on PET and Si wafer as well as fragmentation testing on PET coated samples. It was observed that coatings deposited on Si wafers had improved wear performance over those deposited on PET. In order to generate a signicant wear track, 50 revolutions were required for the coatings deposited on PET in contrast to the 150 revolutions required for coatings deposited on Si wafer. The most probable explanation is the increased rigidity provided by the Si wafer substrate to the nanometre coating. The pin-on-disc wear tests of coated PET resulted in almost complete coating delamination and the formation of clearly dened wear track edges. However, due to the relatively high surface roughness of the polymer substrate (28 nm), accurate track depth values could not be determined. These measurements were carried out on Si wafer substrates however, due to the decreased surface roughness values (N1 nm). Wear resistance is dened as the resistance to surface damage or material removal in a sliding motion [27] and in this study is presented in terms of wear track width (m) for coated PET and both wear track depth (nm) and width (m) for coated Si wafer samples. 3.2. PET substrate Pin-on-disc wear tests were carried out on HMDSO, PDMS and TMDSO coated PET samples. The generated wear tracks obtained for coatings with the same coating thickness (21 nm) were examined using SEM. A difference in the fracture patterns at the edge of the wear track was observed between coatings of different surface energies

Table 3 Surface roughness (Ra and Rq) values of HMDSO, PDMS and TMDSO coated Si deposited at increasing plasma exposure from A to C for 2 2 m areas measured using AFM Reference HMDSO PDMS 13.4 3.5 1.6 TMDSO 7.7 5.3 2.0

Surface roughness (Ra) (nm) A 13.0 B 9.3 C 2.2 Surface roughness (Rq) (nm) A 26.5 B 18.2 C 5.5

Fig. 3. Coating refractive index and polar component of surface energy for PDMS coatings deposited at increasing plasma exposure.

26.6 10.0 3.9

18.7 13.2 5.4

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Fig. 4. Decrease in coating roughness and particulates particulate formation observed with AFM for HMDSO deposited at increasing plasma exposure (A to C left to right) 2 2 m measurement area (also available in colour). (For interpretation of the references to colour in this gure legend, the reader is referred to the web version of this article.)

Fig. 5. Cracking pattern observed at the edge of the wear track for HMDSO coatings on PET with increasing plasma exposure rates: A (left) to C (right).

deposited from the same precursor. As illustrated in Fig. 5, as the plasma exposure rate increases the sharp cracking patterns (indicative of a brittle more inorganic coating fracture) become more dominant. The conditions for these wear tests are as follows: load 10 g, linear speed 2 cm/s, revolution 50. As the level of plasma exposure increased, the width of the pin-ondisc wear track was observed to decrease, as illustrated in Fig. 6. Wear track widths were measured at 10 points around the track and an average value obtained. The error bars correspond to the standard deviation of these measurements. It has been reported for microscratch testing that the width (b) of the scratch track is an indicator of

the scratch hardness (HS) for a given coating [1012] i.e. at a given load (FN), a softer coating produces a wider scratch track. HS = 8FN : b2 1

Fig. 6. Wear track width measurements on HMDSO, PDMS and TMDSO coated PET. Coatings deposited at increasing plasma exposure (A to C).

If this observation is applied to pin-on-disc wear testing, it suggests that, for siloxane coatings, as the of plasma exposure increases, the coating hardness also increases as demonstrated by decreased wear track width [28,29]. The observed wear resistance (best to worst) of the siloxane precursors for each of the deposition conditions is as follows: PDMSNTMDSONHMDSO. As the thicknesses and coating chemistry of the deposited coatings are similar, the difference in wear resistance may be associated with the rate of polymerisation of the precursor. Due to its already partially polymerised structure (three Si and two O units), the PDMS precursor may more readily form longer chain length, more highly oxidised, wear resistant structures [30]. For TMDSO, the high reactivity of the SiH functionality over the SiCH3 due to its decreased bond strength will result in increased rates of polymerisation over HMDSO [23,30] and therefore an increase in wear resistance. To determine if there is a correlation between the load applied to the pin and the wear rate of the coatings, a series of tests were undertaken on PDMS coated PET samples. Wear tracks were generated using loads of both 5 and 10 g for 25 revolutions. The linear speed was maintained at 2 cm/s. Wear track width measurements were made at 10 points around the track and an average value obtained. The resulting wear track widths are shown in Fig. 7 and, as expected, it was observed that as the load increased, the width of the wear track also increased for each of the PMDS coatings. The wear track width however was not found to linearly increase with the test load. As shown in Eq. (1), it is the square of the wear track width that is proportional to the load (FN). By replotting the data in terms of the stylus contact area (AS = ( b2) / 8)) [31,32], the

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Fig. 7. Wear track width (left) and contact area (right) measurements for 5 and 10 g wear test loads for PDMS coatings deposited on PET at increasing plasma exposure (A to C).

relationship between increasing load and contact area becomes more linear. This may suggest that for very low contact areas, contact adhesion effects play an increasingly important role. To examine the reproducibility of the pin-on-disc technique, ten experiments were carried out using both low and high SiOx content HMDSO coating on PET. These coatings were deposited at both 4 passes at 50 l/min (A) and 20 passes at 17 l/min (C) and were tested under the following conditions: load 10 g, linear speed 2 cm/s, revolution 50. The resulting wear track width had average values of 170 m for coating A and 77 m for coating C, demonstrating the increased wear resistance of the coatings deposited at higher plasma exposure. The percentage error for these measurements was found to be 14%, which is in good agreement with the wear track data presented in Fig. 6. 3.3. Si wafer substrate As detailed earlier the lower surface roughness of the Si wafer substrates facilitates more accurate measurement of wear track depth. Wear tests were carried out under a load of 10 g for 150 revolutions at a constant linear speed of 2 cm/s. For uncoated Si wafers, the average wear track depth and width were 52 nm and 48 m were observed after 150 revolutions respectively. For the coated samples, the wear track depth and width were found to vary with plasma exposure, as detailed in Table 4. Wear track depth values are measured relative to the coating surface and do not include height variations attributed to pile-up or sink-in at the edge of the wear track. For the more SiOx type coatings insufcient wear took place to break through the thickness of the coating. For more organosiloxane coatings, the wear track depth exceeded the depth of the deposited coating, indicating that wear of the Si wafer substrate has also occurred. This is illustrated in the optical prolometry images in Fig. 8 (images presented have same z-scale). For each of the three siloxane

precursors tested it was observed that only coatings deposited at the highest level of plasma exposure (C) exhibited an absence of substrate wear under the test conditions used, as shown in Table 4. Coatings deposited at lower levels of plasma exposure (A and B) exhibited wear track depths greater than the coating thickness and wear tracks similar to that of uncoated Si wafer. In conclusion, as observed previously for coatings deposited on the PET substrates (Fig. 6), the wear track width increased as the plasma exposure decreased. 3.4. Coating friction The coefcient of friction was measured for HMDSO deposited coatings using a TEER Coatings POD-2 pin-on-disc tester. Tests were carried out at loads of 1 N (100 g) at a linear speed of 2 cm/s for 100 revolutions. It can be seen in Fig. 9 that the friction characteristics for HMDSO coatings A and B exhibit similar friction to that of uncoated Si wafer (0.65). This value is slightly higher than a previously reported value of 0.55 [33] although the results presented here were obtained at higher applied loads (1 N versus 0.2 N). It has been reported that increased applied loads may result in higher friction values being obtained [34]. The similar friction values obtained for A and B coatings to that of Si wafer are not unexpected as these coatings exhibited similar wear rates to that of the uncoated Si wafer. However, coatings deposited at the highest plasma exposure (C) exhibit a lower friction up to approximately 50 revolutions. After this point, the friction value reaches that of the other samples. This indicates coating failure after 50 revolutions (at the higher loads of 100 g) with the friction values thereafter matching those of uncoated silicon wafer. The average error relative to the number of revolutions is given in Fig. 10. This graph is the result of 4 measurements carried out on uncoated Si wafer under the same test conditions. The error is a measure of the standard deviation between the four tests. It is seen that the error is highest (14%) after the lead in period and then settles to a lower value of approximately 6% once the contact between the pin and the substrate stabilises and is in good agreement with friction theory [35]. 3.5. Coating thickness In order to determine the inuence of coating thickness on wear performance, a number of PDMS coatings with increasing coating thickness were compared. The coatings were deposited at a precursor ow rate of 32.5 l/min for 8, 12 and 16 passes through the plasma. As detailed in Table 5, the coating surface energy remains almost constant as the coating thickness increases from 18 to 44 nm. Pin-on-disc wear tests were carried out on coated Si wafer samples using different test conditions than those detailed previously in an effort to reduce wear

Table 4 Coating thickness versus wear track depth and width for coatings deposited at increasing plasma exposure rates (from A to C) on Si wafer Reference Coating thickness (nm) Wear track depth (nm) Depth b coating thickness Standard deviation (nm) Wear track width (m) Standard deviation (m) HMDSO A 24 61 Fail 10 10 2 B 24 52 Fail 5 75 7 C 20 13 Pass 5 93 21 PDMS A 22 72 Fail 7 17 4 B 18 61 Fail 11 42 5 C 20 13 Pass 4 72 6 TMDSO A 18 70 Fail 4 9 1 B 19 44 Fail 2 51 4 C 20 4 Pass 2 73 6

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Fig. 8. Wear track depth analysis for 20 and 24 nm thick SiOx type (top) and organosiloxane type (bottom) coatings deposited from HMDSO. Plot area 220 m 250 m (right) (also available in colour). (For interpretation of the references to colour in this gure legend, the reader is referred to the web version of this article.)

track depth. The conditions for these wear tests are as follows: load 10 g, linear speed 2 cm/s, number of revolutions 100. A minimum of 8 measurements were carried out to calculate the average wear track depth, shown in Table 5. Under these conditions, the average wear track depth for the uncoated Si wafer was 33 nm. For the coated samples, the wear track only fully penetrates the depth of the coating for the thinnest 18 nm coating. The thicker coatings (32 and 44 nm) provide adequate wear resistance i.e. the coating provided enough protection to prevent the pin breaking through to the substrate. It can be seen in Fig. 11 that the wear track geometry varies with coating thickness. As the coating thickness increased from 18 to 44 nm the sharp pile-up ridge at the edge of the wear track decreases into a lower and wider ridge. As the coating surface energies are equivalent, the

indication is that this difference in performance is not associated with a change in coating chemistry. This change may be due to an interface effect associated with the covalent bonding at the interface layer between nanometre thick coatings and the substrate resulting in a reduction in wear track depth. A similar interface effect has been reported previously for DLC [33] and SiOx [36] coatings. With increasing wear depth there is a corresponding increase in contact area. As the contact area increases, van der Waals forces are also reported to increase [33]. According to the DMT (Derjaguin et al.) contact adhesion model, the van der Waals forces act outside the region of contact [33]. An increase in these forces with increasing contact area may result in a broadening of the pile-up effect observed at the edge of the coating wear track as shown in Fig. 11. Another explanation is that as the distance between the coating/substrate

Fig. 9. Pin-on-disc friction measurements for uncoated Si wafer and HMDSO coatings deposited at increasing plasma exposure (A to C).

Fig. 10. Average friction error on Si wafer samples plotted against number of revolutions.

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B. Twomey et al. / Surface & Coatings Technology 203 (2009) 20212029 Table 5 Surface energy and thickness values for PDMS coatings deposited increasing numbers of passes at a constant ow rate (32.5 l/min) No. of passes Coating thickness (nm) Wear track depth (nm) Standard deviation (nm) Wear track width (m) Surface energy (mJ/m2) Dispersive (mJ/m2) Polar (mJ/m2) 8 18 22 4 46 54 26 28 12 32 17 2 37 49 29 20 16 44 36 4 93 53 30 23 2027

(FN) and the wear track width (b). For pin-on-disc wear tests, R NN X, resulting in: A2 = 2RX; and b2 = 8RX 4 3

interface and the coating surface increases, there is more freedom for material ow in the plastic deformation zone below the indenter. If this is reduced with decreasing coating thickness, material will tend to pile-up closer to the indenter [37]. 3.6. Effect of pinsubstrate interactions To determine a relationship between wear track geometry and coating performance, a simple equation is proposed as a measure of pin-on-disc hardness or surface performance based on the scratch test technique. Assuming ideal wear track geometry, wear track width (b) can be expressed in terms of the contact radius of the pin (A), the radius of the pin (R) and the contact depth of the pin (X) as follows: A= q 2RX X 2 2

For a multi-pass wear test, the total normal applied force, FTotal, is proportional to the applied load (L) and the number of passes (N). Substituting into the Eq. (1), pin-on-disc hardness (HPOD) can be expressed as: HPOD ~ N: L : R: X 5

where A is half the wear track width (b/2). Scratch hardness (HS) has already been shown in Eq. (1) to be related to the normal applied force

As shown in Eq. (5), HPOD or surface performance is proportional to the total applied load (N L) and inversely proportional to the radius of the pin (R) and the wear track depth (X). As shown in Table 4, a large increase in wear track width was observed between coated samples B and C for each of the siloxanes. Using Eq. (2), it was determined that the observed wear track widths were on average 2.8, 2.3 and 1.2 times greater than the calculated values for A, B and C coatings respectively. This behaviour appears to be associated with the depth of penetration of the pin into the coatings with higher penetration being observed for organosiloxane coatings (A) than for silica type coatings (C). A similar trend was also observed for uncoated Si wafer wear track with increasing wear track depth. As shown in the previous section, there is an apparent increase in the contact adhesion between the coating and the pin resulting in variations in wear track shape. With these

Fig. 11. Wear track depth analysis for PDMS deposited coating (top 32 nm thick; bottom 44 nm thick). Plot area 300 m 250 m (also available in colour). (For interpretation of the references to colour in this gure legend, the reader is referred to the web version of this article.)

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Fig. 12. Fracture pattern observed for (20 2 nm) PDMS coatings on PET with increasing plasma exposure rates: A (left) and C (right). Note the higher crack density observed for organic type coatings (left).

considerations in mind, wear track depth and width measurements both appear to be inuenced by factors such as pile-up, sink-in or pin/ substrate interactions in addition to wear track depth. The use of Eq. (5) for determining surface characteristics using pin-on-disc wear testing can in theory also be applied to a multi-layer samples by determining the wear rate associated with each layer (load/wear depth) as outlined in more detail by Williams [32] and Ahn et al. [31] for scratch testing. In conclusion, it has been observed that pin-on-disc wear testing can be undertaken on coatings deposited on both exible polymeric and rigid surfaces. At a constant coating thickness, the average error in wear track width on tests carried out on coated exible surfaces was observed to be approximately 14%. On coated Si wafer substrates the average error for wear-track depth and width measurements were 20 and 13% respectively. However, the wear track width values were observed to be greater than the theoretical values calculated from the wear track depth and radius of the pin as the depth of the wear track increased. This may be due to coating interface and contact adhesion effects between the pin and the substrate as the wear track depth and contact area increased. 3.7. Fragmentation testing Coating fragmentation testing was undertaken to evaluate how the organic/inorganic properties of siloxane coatings inuence the crack density (number of cracks per m length of coating). The test were carried out through uniaxial loading of PDMS coated PET samples deposited at increasing plasma exposure (thickness 20 2 nm). Three 10 2 cm samples were taken parallel to the direction of the coating process and loaded to a nominal strain of 25%. This level of strain was chosen as it typically achieves crack density saturation for SiOx coatings [38]. A distinct difference in the fragmentation patterns is observed for organosiloxane coatings deposited at lower levels of plasma exposure. The fracture patterns for these coatings appear to indicate ductile tearing compared to the straight line brittle cracking of the silica-type coatings as illustrated in Fig. 12. It was observed that for more organosiloxane type coatings, incomplete cracks were present. This may be a result of insufcient coating straining and a higher tensile strain may be needed to develop these cracks completely. Larger, incomplete, cracks (Nhalf image width) were taken as complete cracks [13] and in order to make a comparative assessment, crack density was measured at 25% strain. It was observed that the crack density increased from 0.83 to 1.61 m 1 as the level of plasma exposure decreased. This is in agreement with a previous nding that indicated increased crack density for increasing organic coating fraction in siloxane coatings [38]. This result corresponds to a move from polymeric behaviour to glass like, in agreement with the increased wear resistance of coatings deposited under increased plasma exposure.

4. Conclusions A range of polymeric and SiOx (silica) type coatings were obtained from PDMS, HMDSO and TMDSO siloxane precursors. Deposited coating properties of these three precursors were found to be largely independent of precursor type but was signicantly inuenced by the level of plasma exposure, with higher plasma exposure leading to more inorganic, silica-coating chemistry as determined previously and indicated by surface energy. Increased coating surface energy was observed to correlate with an increase in coating refractive index and a decrease in particulate formation. The suitability of the pin-on-disc wear technique to evaluate the mechanical behaviour of nanometre thick coatings was investigated. In a comparison pin-on-disc study with siloxane deposited coatings, it was observed that silica type coatings exhibited improved wear resistance over organosiloxane type coatings. For the siloxane precursors studied, the wear performance is in the order of PDMSN TMDSON HMDSO. The coated substrate, as well as the physical and chemical properties of the coating plays an important role in the ability to use this method and need to be accounted for during testing. For the evaluation of the wear performance of nanometre thick siloxane coatings on polymer substrates, the use of pin-on-disc wear track width rather than depth was found to be more reproducible with an average error of 14%. As a result of the elastic deformation of the polymeric substrate at low loads, substrate depth measurements cannot be accurately determined. The increased roughness of the polymeric substrate over Si wafer substrate also limits the effectiveness of depth measurement techniques. For the rigid and low roughness Si wafer substrates, both wear track depth and width measurements exhibited a relatively high level of reproducibility (20 and 13% respectively) for coatings with similar thickness. Differences in the wear track width and depth were observed however with increasing coating thickness for coatings deposited at the same level of plasma exposure. This may be due to an interface effect between the coating and the substrate as the wear track depth approaches that of the coating thickness. Fragmentation testing was carried out to support the results of the pin-on-disc wear tests. An increase in fragment density for coatings deposited at lower plasma exposures was observed. This corresponded with a tendency towards ductile failure, during fragmentation, of the more organosiloxane coatings as observed in the pin-ondisc wear tests.

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