VLSI COURSE LOGICAL DESIGN

MINDLINK PVT.LTD

CONTACT PH:9059675700

VLSI COURSE
Course Details and concepts are as follows: RTL Coding and Simulation (FRONT END) A real time project is chosen and will be designed using VHDL or Verilog and will also be simulated for verifying the functionality of the RTL. BACKEND Tool Usage o VLSI Tool usage flow from Synthesis to GDSII will be explained through industry o Synthesis and DFT through RTL Compiler. FloorPlanning, Placement, Clock Tree Synthesis and Routing through soc Encounter. Final Stage of project work o Students, after they are comfortable with the above indicated flow and will continue their work in the core assigned stream using the above mentioned industry standard EDA tools. Introduction to VLSI design o VLSI definition o Why VLSI needed o What is a Silicon chip o Challenges and trends power, speed and area Future technologies

VLSI LANGUAGES : I. VERILOG TOPICS Overview of Digital Design with Verilog HDL 2. Hierarchical Modeling Concepts Basic Concepts Modules and Ports Gate-Level Modeling Dataflow Modeling Behavioral Modeling Tasks and Functions II. VHDL TOPICS Overview of Digital Design with VHDL Levels of representation and abstraction FOR DETAILS CONTACT : 9059675700

Basic Structure of a VHDL file Lexical Elements of VHDL Data Objects: Signals, Variables and Constants Data types:Integer types,Floating-point types,Physical types, Array Type, Record Type. Operators Behavioral Modeling: Sequential Statements, Loop statement Dataflow Modeling Concurrent Statements Structural Modeling

Basic Digital Design o Arithmetic circuits o Sequential and Combinational circuits o State machines o Digital design issues VLSI Course :1 o o o o o I Semiconductor physics, diode & MOSFET models CMOS Technology Cmos process flow, parasitics, cmos fabrication techniques CMOS Logic, CMOS capacitances Layout design rules, stick diagram

VLSI Course :2 o Cell Layout & Chip Floorplanning o Standard cell layout structure, multi-cell layout, power & signal routing, use of metal layers, floorplanning o Structure & Operation of Digital Functions o Basic Gates (MUX, En/Decoder, FF, Shifters, Registers, etc.) o Arithmetic Circuits, mainly adders (Manchester in CMOS) o Memory (SRAM, DRAM, ROMs, PROMs, PLA, FPGA) o Microprocessor datapath with ALU, SRAM, and shifter o Advanced Logic Structures o Dynamic, differential, pass-gate o Submicron Issues o MOSFET submicron models, design considerations/limits, submicrontechnology (physical structures) FOR DETAILS CONTACT : 9059675700

Advanced Course Topics VLSI technology issues Submicron fabrication MEMS Next-generation alternatives to CMOS-BiCMOS or compound semiconductors o Quantum or bimolecular devices o Advanced Digital Systems o Analog/mixed-signal design o o o o

FOR DETAILS CONTACT : 9059675700