Flat Panel Displays

Programmable Solutions for the Broadcast Industry

FPGA Companion Chips

FPGA can be added to ASSP to increase flexibility and/or performance
Various storage interfaces Various peripheral interfaces Used in conjunction with programmable nature of the platform to add enhanced services Video Enhancement algorithms

Offload intensive algorithms to FPGA for hardware acceleration

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Panel Board
S3 configuration and glue logic

CPLD

Flash Memory
Source Driver

Scalar (ASSP Chip) Gamma Correction De-Interlace OSD

H Sync and V Sync 7x LVDS

Timing Control
LVDS to LVTTL
R,G,B 8-bit LVTTL

Video Data

Over Drive Gamma Correction DDR SDRAM Controller

Gate Driver

LCD Panel

SSTL2_II

SSTL2_II

DDR DDR SDRAM SDRAM

DDR SDRAM

Xilinx

Memory

CPU

Non-Xilinx

Mixed Signal

Embedded Logic

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Video Board
GPIO Expand

I2C GPIO

MCU GPIO

SDRAM

NTSC/PAL/ SECAM YCrCb YPrPb S-Video SCART D-SUB DVI-A DVI-B

Tuner TV Video Decoder (ASSP Chip)

Scalar (ASSP Chip) Gamma Correction De- Interlace OSD

(Spartan-3E Pre / Post Processing)

7x LVDS
LVDS

PDP / LCD Panel

R,G,B
DVI Switch

Picture Quality processing 3D Color Management Precise Gamma Correction

R,G,B

TMDS

SSTL2_II

DDR SDRAM

Xilinx

Memory

CPU

Non-Xilinx

Mixed Signal

Embedded Logic

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FPGAs For Video Processing

Where and Why Does It Make Sense?
Customer need
Superior image quality and differentiation Custom algorithms - Retain IP - Improve and update Quick time-to-market

FPGA attributes that help customers

Low-cost FPGAs High-performance DSP fabric - Embedded multipliers
Allows experimentation and ability to retain and improve IP

Business demands
Zero-NRE and quick time-to-market Manage customer demand and inventory

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FPGAs For Panel Driver/Controller

Where and Why Does It Make Sense?
Customer need
Leverage same Image processing chipset for different panels
Sizes, suppliers, resolutions, newer technology

Minimize EMI and number of external components Quick time-to-market

FPGA attributes that help customers - Cost is king!

High-performance panel driver solutions - LVDS and RSDS
Dramatically lower EMI

Sophisticated DCMs and state machines for timing control High-performance memory solutions - internal and external I/F Soft processor solutions to improve logic efficiency

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Storage Reference Designs

PCMCIA
Card-side (Spartan & CPLD) Host-side (Spartan only)
Memory Stick PCMCIA

CompactFlash+
Card-side (Spartan & CPLD) Host-side (Spartan only)

SD/MMC
Card-side (Spartan & CPLD) Host-side (Spartan only)

SD Card Hard Disk Drive

IDE/ATA
Host-side only (Spartan)
Multimedia Card Compact Flash

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Display IP & Ref Design Solutions

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7:1 LVDS Rx TCON Precise Gamma Correction Image Dithering Engine Color Temperature Adjustment Dynamic False Contour Reduction RSDS Tx Mini-LVDS Tx PPDS I/F Dynamic Gamma Correction Motion Artifact Estimation and Compensation FCT Favorite Color Transform Brightness & Contrast Adjustment Hue and Saturation Adjustment Sharpness Enhancement Noise Reduction LVDS Tx

System Setup Display Panel Application

Reference Design -266Mbps DDR SDRAM Memory Controller(Now available from TED) -105MHz LVDS Channel Link I/F (Tx/Rx) 10bit supported RSDS Controller -TCON with image enhancement algorithm Connect to Column driver -DVI I/F
LVDSFFC RSDSFPC

directly from RSDS I/F for the data which is converted by FPGA.

Graphics Operation Board Video signal can be input from Graphics operation board to this evaluation board through LVDS(Channel Link).

TCON with image enhancement algorithm

To Display driver IC.

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System Setup Video Board Application

Reference Design -266Mbps DDR SDRAM Memory Controller -Support DVI I/F -105MHz LVDS Channel Link I/F (Tx/Rx) -Image Enhancement/Processing Algorithm
LVDSFFC

Image Enhancement Algorithm

LCD panel module

Connect to panel TCON board directly through LVDS (Channel Link) DVI-I Cable Video signal can be input from Graphics operation board to this evaluation board DVI I/F

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FIR Filters for Xilinx FPGAS

Most audio, image and video processing can be done based around finite impulse response (FIR) filters
Programmability allows experimentation with different coefficients, filter windows etc to get the best quality
256 Tap FIR Filter Example

IP Core or Reference Design XAPP219 Transposed Form FIR Filters MAC FIR Serial Distributed Arithmetic FIR Filter Parallel Distributed Arithmetic FIR Filter Distributed Arithmetic FIR Filter

See www.xilinx.com/ipcenter for more details

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Why FPGAs for A/V Processing?

High Computational Workloads
Conventional DSP Processor - Serial

1 GHz 256 clock cycles

= 4 MSPS

FPGA-based DSP - Parallelism

500 MHz 1 clock cycle

= 500 MSPS

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Spartan-3 Video Advantages

Off the shelf devices Faster time-to-market Rapid adoption of standards Real time prototyping
Flexibility of DSP Processors Flexibility of DSP Processors

Parallel processing Support high data rates Optimal bit widths No real-time software coding
Performance of Custom ICs Performance of Custom ICs

Spartan-3 DSP Solutions Offer the Best of Spartan-3 DSP Solutions Offer the Best of Both Worlds With Low Cost! Both Worlds With Low Cost!
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FPGA-Based DSP for Video

Unrivalled DSP Performance
TeraMAC/s via FPGA and Embedded Multiplier fabric for:
Multimedia Compression - MPEG2, MPEG4, H.264, MJPEG, JPEG2000 Video Processing - Integrated Line Buffers, Enhancement, Pattern Recognition, Noise
Reduction, Resizing, Rotation, Scalability Convergence of emerging technologies in Multimedia over IP & wireless

For Standard Definition Pixel Rates (13.5 MHz pixels)

SDTV Test equipment, Broadcast test equipment, Studio effects equipment, scan rate
converters, frame rate converters, MPEG-2 codecs

For High Definition Pixel Rates or Multiple Channels of Standard Definition (74.25 MHz pixels)
HDTV Test equipment, Broadcast test equipment, Home Theatre
projection devices, Advanced studio effects, Conversions from SDTV, MPEG-2 4:2:2 profile codecs

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Video Effects FPGA Solutions

SDTV, HDTV, Dual-Link, 2K/4K Film resolutions Real Time 3D Effects
Transforms, splits, warps

Editing functions
Keyers, Mixes, Wipes, Fades, Dissolves

3D Cube Colour Correction De-interlacer, HD-SD up-down conversion Phong shading model & textures for 3D surfaces Real time image transfer over PCI Express To or from graphics, disk and PC memory

Effects done in FPGA frees up valuable CPU resources Real Time - All The Time
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Low Cost Packaging Options

QFG32 (5 x 5mm) CP56 (6 x 6mm) CS48 (7 x 7mm) VQ100 (16 x 16mm) FT256 (17 x 17mm) PC44 (17.5 x 17.5mm) FG320 (19 x 19mm) FG400 (21 x 21mm) TQ144 (22 x 22mm) FG484 (23 x 23mm) PQ208 (30.6 x 30.6mm) FF1760 (42.5 x 42.5mm)

Pb-Free Packaging Available

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Time-to-Market Value
Fastest time to market Additional Profit from Field Upgrades 1st to Market Profit Reduced Profit for Late Introduction

Revenue

Longest time in market

Time

Quicker time to market and reprogrammability provide the best chance of achieving full product profit potential

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Receiver Solutions
Xilinx CPLDs and FPGAs provide time-to-market and flexibility advantages for receiver systems
Quickly interface receiver chipsets to host processor without waiting for ASSP/ASIC re-spin Or add extra features to receiver units, like hard drive or smart card reader

Ease of integration
Small packaging and minimal thermal impact

Power saving benefits without performance sacrifice

Operating mode and battery management Support higher automotive voltages or lower consumer voltages

Adds additional performance

Reduce processor workload by handling interfaces Expand microprocessor I/O
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Xilinx Flat Panel Solutions

Reprogrammability allows rapid evaluation of differentiating features/algorithms
Base system on market leading ASSPs but add your own flavour with FPGA coprocessing

Time-to-market of programmable solution is a key benefit Various system connectivity options supported
Easily create flexible bridges between disparate protocols

Full flexibility to support numerous resolutions, frame rates and formats System integration for lower BOM plus EMI & power management

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Xilinx in the Broadcast Chain

Gamma Correction Codecs Scaling/Resampling Colour Space Network Interfacing Chip Interfacing Video Filtering Effects (Wipe/Key) Memory Control FEC/Modulation System Control
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Real Time HD/Multichannel DSP

Highest performance on-chip DSP blocks, multipliers and memory Reduce size of DSP farms Support real time HD processing Support multiple channels of SD processing through resource sharing Reduce cost-per-channel for FEC and modulation

DVB-S2 FEC & Modulation

Mode Adapt Stream Adapt
FEC

BCH

LDPC

Interleave

Mapper

Framing

Modulator

Medium Access Controller (PowerPC) Gigabit Network Interface

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Cost Effective Connectivity

Significant cost-per-channel reductions Portfolio of audio/video connectivity solutions
SDI, HD-SDI and DVB-ASI Video-over-IP
SDI Equalizer $10 SDI Equalizer $10 SDI Equalizer $10

XC3S1000-5 $40

Wide range of general telecom, datacom and backplane solutions available

Ethernet, PCI Express, ATM, Fibre Channel, SONET, SPI RapidIO, HyperTransport

SDI Equalizer $10

~70% cheaper than ~70% cheaper than ASSP SDI solutions! ASSP SDI solutions!

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Flexible Embedded Processing

8-bit Microcontroller Simple state-machines and localised on-chip control Pixel processing & display control

32-bit Microprocessors Cost/performance tradeoffs Extensive peripherals, RTOS & bus structures Networking & wireless comms, control & instrumentation
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GbE MAC GbE MAC

Buffer

Filter

Remapper

LVDS Backplane I/F

Baseband Processing

VxWorks O/S Data Path Ctrl

Xilinx in Broadcast
Programmable Solutions for the Broadcast Industry

Interfaces & Connectivity

Codecs

Video & Audio Processing

Transmission & Reception

End Applications

More info on a wide range of applications and technologies www.xilinx.com/broadcast

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