LM412 Sample and Hold

Posted on November 15, 2010 by Rend This is a LM412 sample and hold circuit. This circuit uses discrete components. This circuit also uses MPF102 JFET transistor and LM412 dual op-amps. The source is prevented to charge the capacitor by the MPF102. The LM412 is used because this op-amp has zero input bias current. This circuit has two mode, hold mode and sample mode. When this circuit is used as HOLD, the wire must be connected manually to -12V and when used as SAMPLE, just leave disconnect. This circuit also uses a diode that is used to catch the output if the feedback loop is broken and the JFET turns OFF. To prevent this action from the output feedback loop, the 33K resistor is used. The JFET will not turn off and the op-amp saturates at the supply rail, if the diode is removed. Here is the circuit:

This circuit has rate of 0.77mV/s or droop of 0.23V in 5 minutes. The leakage of this circuit is about 77pA. The leakage of this circuit is depend on the capacitor. Since the capacitor has transient behavioral and electrolytic leakage. The best capacitor of this circuit are polypropylene, Mylar or polystyrene. Another problem of this circuit is dielectric hysteresis. The voltage changes on charge and discharge are not the same. Beside that, the dielectric absorption is also the problem of this circuit. Dielectric absorption is condition where there is past state memory. It is caused by the capacitor that get small voltage as time goes by when the capacitor freshly discharged. These problems is caused by dielectric behavior and structure. This entry was posted in Control Electronics, Signal Processing and tagged Sample and Hold. Bookmark the permalink.,

Sample and hold circuit using op-amp

As the name indicates , a sample and hold circuit is a circuit which samples an input signal and holds onto its last sampled value until the input is sampled again. Sample and hold circuits are commonly used in analogue to digital converts, communication circuits, PWM circuits etc. The circuit shown below is of a sample and hold circuit based on uA 741 opamp , n-channel E MOSFET BS170 and few passive components.
Description

As the name indicates , a sample and hold circuit is a circuit which samples an input signal and holds onto its last sampled value until the input is sampled again. Sample and hold circuits are commonly used in analogue to digital converts, communication circuits, PWM circuits etc. The circuit shown below is of a sample and hold circuit based on uA 741 opamp , n-channel E MOSFET BS170 and few passive components. In the circuit MOSFET BS170 (Q1) works as a switch while opamp uA741 is wired as a voltage follower. The signal to be sampled (Vin) is applied to the drain of MOSFET while the sample and hold control voltage (Vs) is applied to the source of the MOSFET. The source pin of the MOSFET is connected to the non inverting input of the opamp through the resistor R3. C1 which is a polyester capacitor serves as the charge storing device. Resistor R2 serves as the load resistor while preset R1 is used for adjusting the offset voltage. During the positive half cycle of the Vs, the MOSFET is ON which acts like a closed switch and the capacitor C1 is charged by the Vin and the same voltage (Vin) appears at the output of the opamp. When Vs is zero MOSFET is switched off and the only discharge path for C1 is through the inverting input of the opamp. Since the input impedance of the opamp is too high the voltage Vin is retained and it appears at the output of the opamp. The time periods of the Vs during which the voltage across the capacitor (Vc) is equal to Vin are called sample periods (Ts) and the time periods of Vs during which the voltage across the capacitor C1 (Vc) is held constant are called hold periods (Th). Taking a close look at the input and output wave forms of the circuit will make it easier to understand the working of the circuit.

Circuit diagram

Sample and Hold circuit using uA741 opamp

Input and output waveforms.

Input and output waveforms - Sample and hold circuit

Notes

The circuit can be assembled on a vero board. Use +15V/-15V DC dual supply for powering the opamp. Capacitor C1 must have minimum leakage current possible and thats why a polyester capacitor is used here. Mount the IC uA741 on a holder.

The type number of the MOSFET Q1 is not very significant here and so substitution is possible if BS170 is not available. BS170 is a 60V, 500mA n-channel enhancement mode MOSFET available in TO-92 package. Preset resistor R1 can be used for offset adjustments.