NUST School of Electrical Engineering and Computer Science (SEECS)

Department of Electrical Engineering

EE-241 Digital Logic Design Credit Hours: 3+1 Instructor: Nasir Mahmood Email: nasir.mahmood@seecs.edu.pk Office Tel : 9085 2106 Mobile : 0321-5160554 Office: A-217, Faculty Block Schedule: Lec: Tue: 0900-1050 Hrs CR 4 Thu: 1100-1150 Hrs CR 10 Fri: 0900-0950 Hrs CR 4 Lab: Mon: 1000-1250 Hrs Spring-2011 BEE1 A TA: Sayyed Ali Asad Ullah Bukhari, Lab Engr Email: ali.asadullah@seecs.edu.pk

Consulting Hours: Wed: 1200-1250 Hrs Thur: 1200-1250 Hrs Any other Time : by appointment via tel/email

Course Objective:
A one semester course that provides Electrical Engineering students with materials, fundamental to the design and analysis of digital circuits. This course introduces the logic operators and gates to lay the framework for strengthening the understanding of computer building blocks. Combinational and sequential circuits are studied along with their constituent elements comprising adders, encoders and multiplexers as well as latches, flip-flops, counters and registers etc. The course provides necessary information to the students for in-depth study of computer engineering subjects. This course is to be taken by the fourth semester undergraduate students pursuing their studies in Electrical Engineering at SEECS. Upon successful completion of the course the students will be able to: 1) Design and analyze both combinational and synchronous sequential circuits. 2) Demonstrate basic skills in working with computer-aided-design (CAD) tools, including knowing the rudiments of a hardware description language (Verilog).

Text Books:
Digital Design (Fourth Edition) by M. Morris Mano and Michael D. Ciletti

Reference Books:

(No specific book but to name a few)

1) Digital Design (Third Edition) by M. Morris Mano 2) Digital Fundamentals (Eighth Edition), by Floyd. 3) Logic and Computer Design Fundamentals (Third Edition), by M. Morris Mano and

Charles R. Kime. 4) Fundamentals of Logic Design (Fifth Edition), by Charles H. Roth, Jr. 5) Digital Systems: Principles and Applications (Tenth Edition) by Tocci. Widmer. 6) Contemporary Logic Design by Randy H. Katz 7) Fundamentals of Digital Logic with Verilog Design, 2e by Stephen BrownIZvonko Vranesic
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Main Topics to be Covered:

Digital Systems. Binary Numbers. Number Base Conversions. Octal and Hexadecimal Numbers. Complements. Signed Numbers. Binary Codes. Floating Point Representations. Basic Definitions. Axiomatic Definition of Boolean algebra. Basic Theorems and Properties of Boolean Algebra Boolean Functions. Canonical and Standard Forms. Other Logic Operations. Digital Logic Gates. Integrated Circuits The K-Map Method. Four-Variable Map. Product of Sums and Sum of Products simplifications. Introduction to Five-Variable Map. Quine-McCluskey minimization technique. Don't-Care Conditions. NAND and NOR Implementation. Other Two-Level Implementations Combinational Circuits. Analysis Procedure. Design Procedure. Binary AdderSubtractor. Decimal Adder. ALU Design using Combinational Circuits. Binary Multiplier. Magnitude Comparator. Decoders. Encoders. Multiplexers Sequential Circuits. Latches Flip-Flops. Analysis of Clocked Sequential Circuits. State Reduction and Assignment Registers. Shift Registers. Ripple Counters Synchronous Counters. Other Counters

Weightages
Final grades will be computed according to the following recipe:Quizzes : 10% One Hour Tests : 30% (@15% for each OHT) Home Assignments : 5% Lab Work : 5% Design Project : 10% (The students will submit proposals during the week following 2nd OHT) Final Exam : 40%

Grading Policy
Quiz Policy The quizzes are a mandatory component of the overall assessment. The purpose of quizzes is to keep the students up-to-date with the lecture material and to test basic understanding of the course concepts. Each quiz will consist of questions that target specific topics from the most recent as well as previous week lectures. There will be at least 6 unannounced quizzes conducted in the class any time during the lecture. No make-up provisions for the missed quizzes. Conduct of Labs The labs will be conducted for three hours in each week. For the conduct of lab the students will be divided into groups with strength averaging 2-3 students per group. A lab handout comprising pre-lab, in-lab, and post-lab report parts will be provided to students for study and analysis during the week preceding each lab session. The students are expected to complete pre-lab work before lab starts and also come prepared for the lab. The students will be evaluated during each lab on the basis of demonstration, oral viva, and lab report submitted by them individually on completion of lab work. The students are required to be punctual in the lab;
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late comers will be penalized in award of marks. Digital and Embedded System lab will be used for lab work. Assignments In order to give sufficient practice and comprehensive understanding of the subject, a minimum of 5 home assignments will be given to the students. The students are advised to do the assignment themselves. Copying of assignment is highly discouraged and taken as cheating case and will be forwarded for strict disciplinary action. The questions in assignments will be more challenging to give students the confidence and extensive knowledge about the subject and enable them to prepare for the exams well. Home works will be submitted at the beginning of class on the due date. Any assignment submitted after due date/time will be graded as zero. No make-up provisions for missed assignments. Design Projects The students will be allocated course projects during the week following second OHT and evaluated before final exams based on extent of analysis and synthesis procedures learnt by them during the semester and correctly mapped onto actual design of circuits. The students will be grouped into syndicates with each syndicate having a maximum strength of 3 students depending upon the complexity level of digital design. However, any student desirous of carrying out design work individually will be encouraged and graded in the same pretext. Tools / Software requirements Verilog Hardware Description Language (Verilog HDL) software and HDL simulator ModelSim version 5.7f will be used for the design and simulation of logic circuits. Digital and Embedded System lab will be used for hands on practice.

Other Matters
Academic Honesty and Plagiarism Plagiarism is the unacknowledged use of other peoples work, including the copying of assignment work, and laboratory results from the other students. Plagiarism is considered as a serious offence by the university and severe penalties apply. Therefore, all the students must display originality of efforts and avoid plagiarism in any form. Classroom Etiquettes It is the collective responsibility of all the students to make the class environment conducive for learning. To maintain a proper atmosphere for learning, the following standards of classroom behavior will be observed:1) Students will be on time for class. The teacher considers late comers disrespectful of those who manage to be on time. 2) The students will show courtesy to others in the classroom by not talking when the teacher or a fellow classmate is speaking. 3) If a student decides to attend the class, he or she will not disrupt class by leaving before the lecture has ended. 4) All cell phones must be switched OFF prior to entering the class.