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Characterization of an Inverting Amplifier using an ideal Op-Amp

Introduction:
This section of the report investigates the characteristics of an ideal op-amp and then goes on to compare the achieved results with that of a real op-amp. All relevant simulations of the design were performed using OrCAD PSpice Student Edition 9.1.

Figure 1: Inverting Amplifier using ideal op-amp

Investigation of the Closed Loop Gain:

An inverting amplifier is constructed as shown in the diagram above. The closed loop gain for this configuration is derived as follows: Assuming that (a) the +ive and ive inputs to an op-amp are at the same potential and (b) the opamp has an infinite input resistance (i.e. the op-amp draws no input current), we get: Applying KCL at ive input of the op-amp, [(VN VIN) / R1] + [(VN - VOUT) / R2] = 0 From the first assumption, VP = VN = 0 V VOUT / VIN = - R2 / R1 To obtain a gain of 10, a transient analysis was performed with R1 = 1 k and R2 = 10 k with a 1 kHz AC voltage source of 1 V. A negative gain of 10 is also seen to be achieved as shown below:

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Figure 2: Negative gain of -10

Investigation of the Output Voltage Saturation:

Next, the same transient simulation is performed with a parametric sweep of R2 from 5k to 20k. The output response is shown below:

Figure 3: Output voltage saturation

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3 The observed phenomenon is known as the output voltage saturation of an op-amp. As R2 is increased to 15k, the output voltage swing reaches the +ive and ive power supply of the op-amp (+/- 15 V). Hence, all output voltages are clipped at 15 V irrespective of the gain of the amplifier. This can only be corrected by using an op-amp with a greater power supply voltage range. In order to validate the assumptions made earlier, voltage and current markers were placed as shown in the diagram.

Figure 4: Placement of current and voltage markers to measure input voltage and current

Investigation of the Input Differential Voltage and Current:

The current markers were in such a way to show that the current leaving R1 is exactly the same as the current entering R2 and the results achieved validate our assumption since IR1 IR2 is always 0 A (as shown below). An alternative to this approach is shown in the next section on A741 op-amp.

Figure 5: Input current to the op-amp Ahmed F Rahim MSc SoC University of Southampton

4 Finally, the differential voltage markers indicate that a voltage of peak value 10 V exists between the two input terminals of the op-amp (shown below). This should not come as a surprise, since it was assumed that the open loop gain of an ideal op-amp is infinite. However, from the device it was seen that the op-amp had a finite gain of 106 (which is still very high to be considered infinite). The input voltages share the following relationship with the output voltage: VP VN = VO / AO Hence, VDIFF = VP VN = 10 / 106 = 10 V.

Figure 6: Differential input voltage of the op-amp

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Characterization of an Inverting Amplifier using an ideal Op-Amp

Investigation of the Closed Loop Gain:
The above analysis was repeated for same inverting amplifier configuration using a A741 op-amp (non ideal) and the results obtained are discussed along with the relevant graphs.

Figure 7: Inverting amplifier using A741 op-amp

The transient analysis shows a negative gain of 10 which is as expected.

Figure 8: Negative gain of 10 Ahmed F Rahim MSc SoC University of Southampton

Investigation of the Output Voltage Saturation:

Next a parametric sweep of R2 was performed which gives the same results as obtained in the case of an ideal amplifier. Output voltage is seen to saturate at ~ 15 V as shown in the accompanying diagram.

Figure 9: Output voltage saturation

Investigation of the Input Differential Voltage and Current:

Finally, the input differential voltage and the input current were obtained using the same procedures as before. The input differential voltage was found out to have a peak value of 10 mV indication that the open loop gain of the amplifier at 1 kHz is 103 (60 dB). This value is similar to what is quoted in the datasheet (web link provided in the Bibliography section) from Texas Instruments A741 op-amp (~60 dB).

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Figure 10: Differential input voltage of the op-amp

The input current to the circuit was obtained by slightly modifying the circuit. A DC voltage source of 0 V was connected between the ive input and the node connecting to R2. A current marker placed on the input pin of the DC source gives the value of the input current. The modification to the schematic is shown below:

Figure 11: Modification of the circuit to measure input current

An input current of peak value of 10 nA with a mean value of 80nA was observed. The datasheet indicates a typical input bias current of 80 nA which is well in line with the results achieved.

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Figure 12: Input bias current of the op-amp

Investigation of the Open Loop Gain:

The DC open loop gain of the op-amp can be found by removing the feedback loop and placing a 1 M resistor at the output of the op-amp, as shown below:

Figure 13: Circuit for measuring DC open-loop gain

An AC sweep was performed over the frequency range of 1Hz to 1GHz. An open loop gain of 101 dB (~105) with a 3 dB cut-off frequency of 5.76 Hz and unity gain bandwidth of 853 kHz was observed. This is well aligned with the data provided in the datasheet as shown in the accompanying diagram.

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Figure 14: DC open-loop gain from simulation (top) as compared to the reference graph from datasheet (bottom)

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Investigation of the Input Offset Voltage:

The input offset voltage refers to the DC input voltage which, when applied, causes the output to be 0 V. The following test circuit was used to determine the DC input offset voltage.

Figure 15: Circuit for measuring input offset voltage

The DC voltage source was swept over the range of 1 100 V. An offset voltage of 19.18 V was obtained from the graph as shown below.

Figure 16: Graph showing the input off set voltage for which output voltage = 0 V

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Investigation of the Input and Output Resistance:

The input and output resistance of the amplifier was obtained by using the Transfer Function analysis of PSpice. The output variable was set be the voltage across a 1 k load resistor at the output, while the input source was set to be a 1 kHz sinusoidal voltage source (as shown in Figure 13). These are of the same order of magnitude as indicated in the datasheet (typical values of 2 M and 75 for input and output resistances respectively). The relevant section of the output file is shown below: **** SMALL-SIGNAL CHARACTERISTICS

V(vout)/V_V7 = -1.730E+05 INPUT RESISTANCE AT V_V7 = 9.963E+05 OUTPUT RESISTANCE AT V(vout) = 1.317E+02 Finally, in order to investigate the closed loop frequency response, the following test circuit was used.

Figure 17: Circuit for measuring closed-loop frequency response

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Investigation of the Unity Gain Bandwidth and Cut-off Frequency at Higher Frequencies:
An AC sweep was performed over a frequency range of 1 Hz 1GHz for different values of closed loop gain (this was done by varying R2). The results are shown below: Resistance 1k 5k 10k 15k Gain (in dB) 0 13.979 20 23.521 3 dB Cut-off Frequency 654.038 kHz 182.983 kHz 95.219 kHz 64.344 kHz Unity Gain Bandwidth X 795.627 kHz 863.310 kHz 863.317 kHz

With increasing gain, 3 dB bandwidth is observed to change drastically while the unity gain bandwidth increases gradually saturates ~ 900 kHz. This is very much in line with the unity gain bandwidth value of 1 MHz as mentioned in the datasheet.

Figure 18: Closed loop frequency response for different values of gain (in dB)

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Design and Analysis of a 2nd order Low Pass Butterworth filter using Sallen and Key Architecture
Introduction:
This section of the report provides an in-depth discussion on the design and characterization of a 2nd order Low Pass Butterworth filter (with a cut-off frequency (fc) of 700 Hz) implemented using Sallen and Key architecture. Keeping complex theoretical concepts of filter design at a minimum, the report mainly focuses on the following areas: (a) (b) (c) (d) (e) A basic derivation of the filter transfer function T(j) along with other relevant entities. Component Selection. AC and Transient Analysis of the Low Pass filter with A741 op-amp. Comparison of the simulation results with an ideal Low Pass filter. Discussion on the limitations of the Sallen and Key architecture.

A Brief discussion on Sallen and Key Architecture:

Figure 19: Sallen and Key architecture for a Low Pass filter (Source: Please refer to Ref: [b] in the Bibliography section)

A typical implementation of the Sallen and Key architecture for a Low Pass filter is shown above. The working principle of the circuit is very straight forward as summarised below: (a) At frequencies well below the cut-off frequency, the capacitances C1 and C2 appear as open circuits to the input signal VI. Hence, the circuit can simply be thought of as a unity gain buffer. (b) At frequencies much higher than the cut-off frequency, the same capacitances appear as short circuits. The high frequency input signal is simply short-circuited to the ground and does not appear at the input (as well as the output) of the amplifier. (c) At frequencies near the cut-off frequency, the impedance of C1 and C2 is of the same order as that of R1 and R2. Hence, a positive feedback loop is formed through C2 which provides Q enhancement of the signal. (d) It can also be deduced from the topology that gain at lower frequencies can be achieved by passing a fraction of the output voltage through the negative feedback path.

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Simplified Circuit Analysis of a 2nd order Butterworth filter:

Figure 20: Sallen and Key architecture for a 2 order Butterworth Low Pass filter with negative feedback (Source: Please refer to Ref: [b] in the Bibliography section)

nd

Applying Kirchhoffs Current Law (KCL) at node f, we get: (Vf VI) / Z1 + (Vf Vp) / Z2 + (Vf VO) / Z4 = 0 Vf [(1 / Z1) + (1 / Z2) + (1 / Z4)] = (VI / Z1) + (Vp / Z2) + (VO / Z4) Applying Kirchhoffs Current Law (KCL) at node p, we get: Vp / Z3 + (Vp Vf) / Z2 = 0 Vf = Vp(1 + Z2 / Z3) Applying Kirchhoffs Current Law (KCL) at node n, we get: Vn / R3 + (Vn VO) / R4 = 0 Vn = VO [R3 / (R3 + R4)] [Eq. 3] [Eq. 2] [Eq. 1]

For Eq. 1 and Eq. 2, an ideal op-amp was assumed and hence the current through the +ive and the ive terminals of the op-amp were ignored. Substituting the Eq.2 in Eq.1, we get: Vp = VI [ Z2Z3Z4 / (Z2Z3Z4 + Z1Z2Z4 + Z1Z2Z3 + Z22Z4 +Z22Z1) ] + VO [ Z1Z2Z3 / Z2Z3Z4 + Z1Z2Z4 + Z1Z2Z3 + Z22Z4 +Z22Z1 ] [Eq. 4]

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Derivation of the Loop Transfer Function:

The equations derived in the previous section can be further reduced to the following: Vn = bVO Vp = cVI + dVO Where, b = R3 / (R3 + R4) c = Z2Z3Z4 / (Z2Z3Z4 + Z1Z2Z4 + Z1Z2Z3 + Z22Z4 +Z22Z1) d = Z1Z2Z3 / (Z2Z3Z4 + Z1Z2Z4 + Z1Z2Z3 + Z22Z4 +Z22Z1) In addition to this, we define the frequency dependant open loop gain of the amplifier as a(f). Combining these derivations together, we can construct the gain block diagram as shown below:

Figure 21: Gain block diagram for the Low Pass filter (Source: Please refer to Ref: [b] in the Bibliography section)

The following observations can be made from the gain block diagram, VO = a(f)Ve Ve = cVI + dVO bVO Substituting [Eq. 5] in [Eq. 6] and then solving for VO/VI, we get: VO / VI = (c / b) [1 + (1 / a(f)b) (d / b)]-1 Assuming af is very large (~103 - 106) over the frequencies of interest, VO / VI = (c / b) [1 (d / b)]-1 Putting the values of c, b and d in Eq. 7, we get: VO / VI = K / [ Z1Z2 / Z3Z4 + Z1 / Z3 + Z2 / Z3 + Z1(1-K) / Z4 + 1 ] Where K = 1 / b, which is also the closed loop DC gain of the amplifier. Next, by putting Z1 = R1, Z2 = R2, Z3 = 1 / sC1, Z4 = 1 / sC2 VO / VI = K / {s2R1R2C1C2 + s[R1C1 + R2C1 + R1C2(1 K)] + 1}
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[Eq. 5] [Eq. 6]

[Eq. 7]

[Eq. 8]

[Eq. 9]

16 Finally, by defining as shown below, Eq. 9 can be reduced to the standard Filter Transfer equation for a 2nd order Butterworth Low Pass Filter: Q = R1R2C1C2 / [ R1C1 + R2C1 + R1C2(1 K) ] fc = 1 / (2R1R2C1C2) s = j2f HLP = K / [ - (f/fc)2 + j(f/ Qfc) + 1 ] [Eq. 10]

Component Selection:
In order to simplify the component selection, we set the resistor values as a ratio r (R1 = rR and R2 = R) and keep the capacitance values the same (i.e. C1 = C2 = C). The selection range of capacitor values is limited, in practice, as compared to resistors. Hence, it makes perfect sense to keep them equal. Special consideration needs to be taken while selecting the capacitance values. If the capacitance values are set too low (~ 1 pF), the parasitic capacitances (in practical situations) would play a dominant role at higher frequencies. The closed loop gain K could be set to 2 since gain is not a requirement for this design. This also implies that R4 / R3 ratio must be 1 in order to set K = 1 + R4 / R3 = 2. For this exercise, R3 = R4 = 1k. From Eq. 10, it can be seen that the when the signal frequency (f) is very close the cut-off frequency (fc), the transfer function simply reduces to HLP = KQ. Q is known as the quality factor and enhances the input signal at the cut-off frequency. A high value of Q can lead to an unstable circuit and hence the value of Q should be kept low. The best response of the filter is achieved when Q = 0.7 to 1. For this exercise, Q is set to be 0.7. The above simplifications reduce the fc and Q to the following: Q = r / (1 + 2r rK) = r (as K = 2) and fc = 1 / 2RCr. Q = 0.7 implies that r = 0.49 and together with C = 10nF and fc = 700 Hz, we get: R = 1 / 2 * 3.142 * 10n * 0.7 * 700 32.5k Therefore, the final component values are: (a) (b) (c) (d) R1 16k R2 32.5k C1 = C2 = 10nF R3 = R4 = 1k

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AC and Transient Analysis:

The circuit was constructed using the above component values and an AC analysis was performed by sweeping an AC voltage source of 1V over a frequency range of 1 Hz to 10 GHz. In both cases, a A741 op-amp was used as the amplifier.

Figure 22: Circuit for AC and Transient analysis

The results achieved were shown in Figure 23. A 3dB cut-off frequency of ~700 Hz was achieved along with a stable gain of ~6 dB (K =2) in the pass band and a constant attenuation of -39.849 dB in the stop band. Also, the filter has a unity gain bandwidth of ~1 kHz along with a phase margin of ~ 63. However, the filter response at frequencies well above the cut-off frequency (f > 60 kHz) is similar to that of a high pass filter. This phenomenon is due to the non-linear nature of the op-amp which was assumed to be ideal all along. Also, at higher frequencies, the frequency dependant output impedance (assumed constant in the ideal case) of the op-amp becomes comparable to the other component values and therefore needs to be considered in all relevant equations. This phenomenon would be discussed in depth in the subsequent sections. For the transient analysis, a sinusoidal signal of 300, 600, 1k and 2kHz was fed into the circuit and the response was recorded for 2 ms. The filter response for each case is shown in Figure 24. The results achieved were as expected.

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Figure 23: Gain vs Frequency (top) and Phase vs Frequency (bottom) graphs

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Figure 24: Transient response of the filter to different sinusoidal frequencies

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Comparison of the achieved results with a Low Pass filters using an ideal op-amp:

Figure 25: Circuit for comparing non-ideal filter response with an ideal response

In order to compare the achieved results with that of the ideal case, a test circuit was constructed as shown in Figure 25. Two identical Sallen and Key low filters were connected in parallel to same AC voltage source which was then swept over a frequency range of 1 Hz 1GHz. The results are shown in Figure 26.

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Figure 26: Gain vs Frequency (top) and Phase vs Frequency (bottom) response

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22 The graphical comparison shown above demonstrates that the A741 based filter behaves similarly as compared to an ideal op-amp filter up to ~ 50 kHz, after which it clearly starts to behave as a high pass filter. Also evident from the phase response is the existence of additional poles at the higher end of the spectrum. These additional poles share the same characteristics as that of a Butterworth 1st order high pass filter. At this point, it is important to discuss about the output impedance of the non-ideal amplifier which gives rise to this phenomenon. Beyond the cut-off frequency, the filter works as expected since the amplifier has an adequate frequency response. At frequencies well above the cut-off, the capacitances become more and more short circuited and the filter can be modelled as shown in the diagram below.

Figure 27: High frequency model for the low pass filter (Source: Please refer to Ref: [b] in the Bibliography section)

ZO is the output impedance of the amplifier which is very small compared to the other resistances and can be safely ignored at low frequencies. The transfer function of the filter derived from the above circuit is: VO / VI = [(R1 / R2) + (R1 / ZO) + 1]-1 As ZO << R1, this equation simply reduces to: VO / VI = (ZO / R1) This is well aligned with the achieved results (up to ~ 50 kHz). However, the ZO is dependent on its open loop impedance and the loop transmission as shown below: ZO = ZOPEN / 1 + a(f)b The feedback factor b is constant as set by the feedback resistors. The open loop gain is frequency dependant and decreases at 20 dB / decade above the cut-off frequency of the amplifier. Hence, ZO starts to increase with the same rate thereby transforming the circuit into a high pass filter. From the diagram below, it is clearly seen that the initial rate of increase is at 20 dB / decade. At the higher end of the spectrum, the parasitic capacitances associated with ZOPEN come into play and hence the rate gets reduced.

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Figure 28: High pass filter behaviour at frequencies

In order to compensate for this non-linearity, a low pass filter can be connected to the output of the A741 op-amp as shown below. This would, to some extent, nullify the effect of the high pass filter at high frequencies.

Figure 29: Low pass filter added to the output for compensating high frequency behaviour

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24 Using a RC filter of 100 and 47nF, a satisfactory response could be achieved as shown below.

Figure 30: Response at high frequencies after compensation

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Comparison with the Ideal 2 Pole Butterworth Filter Response generated using Matlab:

Figure 31: Response of a 2 pole Butterworth Low Pass filter with fc = 700Hz and K =2, generated using Matlab

The ideal 2 pole Butterworth Filter Response (shown above) is the same as that of the filter based on ideal op-amp. Furthermore, this validates the derivations comparisons done in the previous sections.

Conclusion:
The Sallen and Key architecture is an efficient way of implementing filters. It requires limited number of components to implement the filter function and offers great flexibility to vary the different factors (Q, fc etc) due to the inclusion of an active element. However, as seen during this exercise, the limitation of the filter does not come from its architecture. It comes from the limitations of the non-linear and frequency dependent parameters of the op-amp itself. Hence, for better performance it is advisable to use an op-amp with better characteristics.

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Bibliography:
(a) Datasheet for A741 General Purpose Operational Amplifier, as accessed from Texas Instruments. See Link (b) Application Report on Active Low Pass filter Design, as accessed from Texas Instruments technical archive at http://www.ti.com/lit/an/sloa049b/sloa049b.pdf (c) Sedra A. S., Smith K. C., Microelectronic circuits, Oxford University Press. (d) ELEC 6021 Lecture Notes on Op-Amps and Filters.

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