RAJESH KUMAR BATHIJA

Contact address: 2-D-6, New Housing Board, Shastri Nagar, Bhilwara, Rajasthan Mobiles :09414399891, 09413684841 Email: suharsh.rajesh@gmail.com

Teaching Experience

More than 12 Years of Teaching Experience (Since Aug,02, 1999 to till date):

Presently I am working in Institute of Technology & Management, Bhilwara as Asst. Professor in ECE deptt., since June 01, 2011. Worked in Mewar University (Self-financed State University), Gangrar, Chittorgarh as HOD of ECE Deptt (Asst. Professor in ECE deptt.) since Oct., 06,2009 to May 24, 2011. Also I am In-charge of B.Tech. III Year Students (Total 206 students).

Worked in Mody Institute of Technology & Science, (Deemed-to Be University) Lakshmangarh as a Lecturer from July 2002 to Oct., 05, 2009. Worked as a Lecturer in Electronics Deptt. in B.M.A.S.Engg. College Agra (Sharada Group of Institutions) from 21st Aug. 2000 to 20th July 2002. Worked as a Lecture in Electronics Dept. in I.T.M. GWALIOR from 2nd Aug. 1999 to 19th Aug. 2000. School - level Qualification EXAM. PASSED 10th 12th Technical Qualification DEGREE BOARD M.P. Board M.P. Board DISCIPLINE YEAR 1990 1992 PERCENTAGE 58.91 % 69.12 % YEAR OF PASSING 1998 DIV. II I PERCEN TAGE 72.27%

BOARD/INSTITUTE

B.E

Electronics & Indira Gandhi Govt Engg Telecommuni College (Dr. H. S. Gaur cation Univ.) Sagar, M.P VLSI DESIGN FET, MITS,Lakshmangarh Distt. Sikar Rajasthan

M. E. (PartTime)
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2009

8.34(CGP A)

PhD PhD Guide

Dissertation of M.Tech. Project of B.E.

Enrolled in RTU, KOTA on August 2011 with title VLSI implementation of Vedic Multiplier Dr. R.S. Meena, (Asso. Prof. RTU, Kota) Done Dissertation of M. Tech. (VLSI Design) in Reconstruction of signal using Kalman Filter in Domino Logic, Technology 90nm in the year 2008-09 under the supervision of Dr. Sankar Sarkar Sir MINOR: Made a photosensitive device for wrapper cutting machine in GODREJ SOAP Pvt. Ltd. MALANPURE, BHIND, and GWALIOR in 1998. MAJOR: To study the BRODBAND COMMUNICATION USING ASYNCRONOUS TRANSFER MODE in final year of B.E.

Presently Working Lab Development & Project Guided

On DSK TMS 320C6713,6414,5416,551 for DSP On Tanner Tools v12.6 for VLSI Design for layout and schematic design Labview Set Electronics Lab, Circuit Lab in ITM Gwalior from 1999 to 2000. Set Circuit Lab, Communication Labs in B.A.M.S. Engg. College from 2000 to 2002. Worked as a Board of Studies Secretary in MITS, Laxmangarh from 2005 to 2009. Worked as a Academic Councils Secretary in MITS, Laxmangarh from 2005 to 2009. Set Digital Signal Processing Lab, Circuit Lab, Communication Labs in MITS, Laxmangarh from 2002 to 2009 Guided several projects (18) in Mody College of Engineering. & Technology, Lakshmangarh, Sikar, Rajasthan. A few interesting are: 1) To make movable platform to reduce the time, waste in decelerate the train, boarding the train, accelerate the train. 2) To save the life of driver & passengers from Head-On-Collision. 3) To save the life of a pedestrian from an accident. 4) Generating 16-point FET algorithm on DSK TMS320C6713.
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Paper Published

Paper presented in National Conference (An IEEE sponsored conference) Innovative Developments In Electronics Arena organized by Arya Group Of College, Jaipur on December12,2009 on the topic VLSI Signal Processing A Gateway For Wireless communication

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Paper presented in National Conference on ICT: Theory, applications and practices during March 5 - 6, 2010 at SPSU, Udaipur on the topic A Pipline Systolic Architecture For A Kalaman Filter Reconstruction Using CMOS Logic In 90 Nanometer Technology

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Paper presented in National Conference on ICT: Theory, applications and practices during March 5 - 6, 2010 at SPSU, Udaipur on the topic A TV Ghost Canceller .
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Workshop

Attended workshop & Hands-on-Practice on VLSI Design at NIST, Behrampur,Orissa on 19-23 Oct., 2005, supported by Texas Instruments Worked as Secretary in a National level workshop organized by B.M.A.S. (Now HITM) Engg. College, Agra

Conference Organization Worked as Technical Session Management Head in the National level Conference ETREE-12 organized by ITM Bhilwara form feb25-26, 2012. Area of Interest Computer Skills Subjects Taught Digital signal Processing & VlSI Design Operating Systems: Ms-DOS, Win9x, 2000. Computer Languages: C, C++, VHDL, Verilog HDL. Signal & system, DSP, VLSI,circuit theory, EDC, microwave, radar,

Personal Detail
Date of Birth Marital Status Nationality Wifes Name Mothers Name Father's Name References August 15, 1977 Married (2 sons) Indian Mrs. Poonam Bathija (PGT Chemistry, EGPS, Bhilwara) Late Mrs. KAUSHALYA BATHIJA (House Wife) Shri G. S. BATHIJA (Retd. High School Teacher) 1. Prof. S.N. Gupta (former professor from IIT, Delhi) Add: JECRC Engineering College, Sitapura, Jaipur Phone: 09460124570 2. Prof. S. Sarkar (former professor from IIT, Roorkee) Add: Shobhit University, Meerut Phone: 09458819002 The information stated above is true to the best of my knowledge and spirit. (Rajesh Kumar Bathija)

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