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4.1 Power Supply

Power supply is a reference to the source of electrical power. It is used to convert the available AC supply (230 V) into a suitable low voltage DC supply (+12 V and -12 V). The power supply circuit is built using the following components Step down Transformer Bridge Rectifier Filter Voltage Regulator

The block diagram representation of power supply is shown in figure 4.1


1 AC Supply

Figure 4.1 Power Supply Block Diagram The circuit diagram of power supply is shown in figure 4.2
1 7812 2 3 +12V


1 7805 2 IN 4007 3


IN 4007






IN 4007

IN 4007



Figure 4.2 Power Supply Circuit Diagram

4.1.1Step down Transformer The step down transformer is used to step down the available 230 V single phase AC supply into two 12 V supply with common neutral point. The transformer has primary winding and secondary winding. The primary winding is connected to 230 V phase voltage with respect to neutral. The secondary winding is center tapped and consists of three terminals (+12 V, 0, -12 V). The voltage between each end terminal and center tap is equal to 12 V but opposite in phase. The secondary of the transformer is connected as rectifier input. 4.1.2 Bridge Rectifier The bridge rectifier is used for AC to DC conversion. It consists of four diodes of IN4007 connected as shown in figure 4.2. Diodes D1 and D2 are forward biased during positive half cycle and diodes D3 and D4 are forward biased during negative half cycle. The output of the rectifier is not a pure DC and it is pulsating in nature. 4.1.3 Filter The filter circuit or the smoothing circuit is used to convert the rippled DC components into pure DC voltage. The passive elements like capacitors or inductors are mainly used as filters. In this circuit only capacitor is used as a filtering component. The circuit shows a 1000F capacitor connected across each supply rail with respect to the ground terminal. The capacitor charges till the maximum peak voltage is reached and discharges during falling of voltage. This charging and discharging property makes averaging of supply. The filtered waveform is essentially a DC voltage with negligible ripples. 4.1.4 Voltage Regulator The voltage regulator is a circuit which maintains constant output voltage irrespective of input supply and load variations. Voltage regulators comprise a class of widely used ICs. The regulator IC unit contains the circuitry for reference source, comparator amplifier, control device and overload protection all in a single IC. Here IC 7812 is used for positive 12 V voltage regulation and IC 7912 is used for negative voltage regulation as shown in figure 4.2. These are single chip ICs having three terminals such as input connected to supply, output connected to load and common terminal for both input and output. The positive voltage regulator is connected in the positive rail with respect to ground and negative voltage regulator is connected to the negative rail with respect to common ground terminal.

4.2 ADC 0808

The ADC 0808 is used to convert the analog input signal into digital output signal. In this project, ADC 0808 is used to convert the analog voltage and current signals from PT and CT after they are filtered in the SCU. The output of the ADC is connected to the microcontroller input for further processing and calculation.

4.2.1 General Description The ADC 0808, ADC 0809 is a data acquisition component. It is a monolithic CMOS device with an 8-bit analog to digital converter, 8-channel multiplexer, microprocessor compatible control logic. The 8-bit analog to digital converter uses successive approximation as the conversion technique. The converter features a high impedance chopper stabilized comparator, a 256 R voltage divider with analog switch tree and a successive approximation register. The 8-channel multiplexer can directly access any 8-single ended analog signal. 4.2.2 Features It can be easily interfaced to all microprocessors. It operates ratiometrically or with 5 VDC or analog span adjusted voltage reference. It does not require zero or full scale adjustments. It has 8-channel multiplexer with control logic. It has 0 V to 5 V input range with single 5 V power supply. Its outputs meet TTL voltage level specifications. It is available in standard hermetic or molded 28-pin DIP package. ADC 0808 is equivalent to MM74C949. ADC 0809 is equivalent to MM74C949-1.

4.2.3 Specifications Resolution- 8 Bits. Total Unadjusted Error- +1//2 LSB and +1 LSB. Supply- 5 VDC single supply. Power consumption- 15 mW. Conversion Time- 100 s.

4.2.4 Pin diagram and Description The analog input is given to an ADC and the digital output is obtained from the chip without adding control signals. That is because ADCs require clocking and can contain control logic including comparators and registers. The ADC0808/ADC0809 contains all of these and also has a multiplexer. This means that in order to get it to work, there is a total of seven control signals that must be sent from the external inputs. These are the address lines, A, B, and C, Address Latch Enable (ALE), Clock, Start, and Output Enable (OE). There is also one control signal which is sent, it is the End of Conversion (EOC) signal.

1 2 3 4 5 6 7 8 9 10 11 12 13 14


IN2 IN1 IN0 A0 A1 A2

28 27 26 25 24 23 22 21 20 19 18 17 16 15



ALE D7 D6 D5 D4 D0 REFD2

Figure 4.3 Pin Diagram of ADC 0809 Address Lines: The chip has an 8 channel multiplexer where there are three address select lines: A, B, and C. C is the most significant bit and A is the least significant bit. See the table below for details.

Selected Channel IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7

Analog Address Line C L L L L H H H H B L L H H L L H H A L H L H L H L H

Table 4.1 Address Selection Lines

ALE: ALE is required to load the selected address lines into the ADC. Once loaded the multiplexer sends the appropriate channel to the converter on the chip. The ALE should be pulsed for at least 100ns in order that the addresses get loaded properly. As with all control signals it is required to have an input value of Vcc - 1.5 V to 15 V for high and 1.5 V to -0.3 V for low. CLOCK: The clock signal is required to cycle through the comparator stages to do the conversion. There are 8, 8 clock cycle periods required in order to complete an entire conversion. This means that an entire conversion takes at least 64 clock cycles. (Up to 72 if the start signal is received in the middle of an 8 clock cycle period.) The clock should conform to same range as all other control signals. The maximum frequency of the clock is 1.2MHz. The maximum clock frequency is affected by the source impedance of the analog inputs. START The purpose of the start signal is two fold. On the rising edge of the pulse the internal registers are cleared and on the falling edge of the pulse the conversion is initiated. Like the ALE pulse the minimum pulse width is 100ns. The signal can be tied to the ALE signal when the clock frequency is below 500 kHz. At greater clock speeds the user must make certain that enough time has passed since the ALE signal was pulsed so that the correct address is loaded into the multiplexer before a conversion begins. Note that it can take up to 2.5 s for this to occur. OE The Output Enable signal causes the ADC to actually output the digital values on the output lines. The ADC stores the data in a tri-state output latch until the next conversion is started, but the data is only output when enabled. EOC The (End of Conversion) signal goes low once a conversion is initiated by the start signal and remains low until a conversion is complete.

4.2.5 Circuit Diagram




10uf 0.1uf LED






D7 D6 D5


19 18 8 15 14 17


D4 IN0 D3 IN1 D2 D1 D0


27 28 1 2 3 4 5



7 9 10 25 24 23








Figure 4.4 Circuit Diagram of ADC 0809 4.2.6 Functional Description Multiplexer The device contains an 8-channel single-ended analog signal multiplexer. A particular input channel is selected by using the address decoder. The address is latched into the decoder on the low-tohigh transition of the address latch enable signal.




Figure 4.5 Block Diagram of ADC 0809 The Converter The heart of this single chip data acquisition system is its 8-bit analog-to-digital converter. The converter is designed to give fast, accurate, and repeatable conversions over a wide range of temperatures. The converter is partitioned into 3 major sections: the 256R ladder network, the successive approximation register, and the comparator. The converters digital outputs are positive true. The 256R ladder network approach was chosen over the conventional R/2R ladder because of its inherent monotonicity, which guarantees no missing digital codes. Additionally, the 256R network does not cause load variations on the reference voltage. The bottom resistor and the top resistor of the ladder network are not the same as the remaining resistors of the network. The difference in these resistors causes the output characteristic to be symmetrical with the zero and full-scale points of the transfer curve. The first output transition occurs when the analog signal has reached +12 LSB and succeeding output transitions occur every 1 LSB later up to full-scale. The successive approximation register (SAR) performs 8 iterations to approximate the input voltage. For any SAR type converter, n-iterations are required for an n-bit converter. In the ADC0808, ADC0809, the approximation technique is extended to 8 bits using the 256R network.

The A/D converters successive approximation register (SAR) is reset on the positive edge of the start conversion (SC) pulse. The conversion is begun on the falling edge of the start conversion pulse. A conversion in process will be interrupted by receipt of a new start conversion pulse. Continuous conversion may be accomplished by tying the end-of-conversion (EOC) output to the SC input. The most important section of the A/D converter is the comparator. This section is responsible for the ultimate accuracy of the entire converter. It is also the comparator drift which has the greatest influence on the repeatability of the device. A chopper-stabilized comparator provides the most effective method of satisfying all the converter requirements. The chopper-stabilized comparator converts the DC input signal into an AC signal. This signal is then fed through a high gain AC amplifier and has the DC level restored. This technique limits the drift component of the amplifier since the drift is a DC component which is not passed by the AC amplifier. This makes the entire A/D converter extremely insensitive to temperature, long term drift and input offset errors.

4.3 Micro controller

4.3.1 Introduction The microcontroller 89S52 is manufactured by Atmel. This is 8051 based Full Static CMOS controller with Three-Level Program Memory Lock, 32 I/O lines, 3 Timers/Counters, 8- Interrupts Sources, DPTRs, 8K Flash Memory, 256 Bytes On-chip RAM. 4.3.2 Features Extensive Boolean processing (Single - bit Logic) Capabilities. 8 Bit CPU optimized for control applications. On - Chip Flash Program Memory. On - Chip Data RAM. Bi-directional and Individually Addressable I/O Lines. Multiple 16-Bit Timer/Counters.

4.3.3 Pin Diagram

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 P1.2 P1.3 P1.4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


P0.4 P0.5 P0.6 P0.7 VPP ALE/PRG PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0

P1.5 P1.6 P1.7 RST P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 D17 D18 GND

Figure 4.6 Pin Diagram of Micro Controller 89s52 Pins 1-8: Port 1 Each of these pins can be configured as input or output. Pin 9: RS Logical one on this pin stops microcontrollers operating and erases the contents of most registers. By applying logical zero to this pin, the program starts execution from the beginning. In other words, a positive voltage pulse on this pin resets the microcontroller. Pins 10-17: Port 3 Similar to port 1, each of these pins can serve as universal input or output. Besides, all of them have alternative functions: Pin 10: RXD Serial asynchronous communication input or Serial synchronous communication output. Pin 11: TXD Serial asynchronous communication output or Serial synchronous communication clock output. Pin 12: INT0 Interrupt 0 input Pin 13: INT1 Interrupt 1 input Pin 14: T0 Counter 0 clock input Pin 15: T1 Counter 1 clock input Pin 16: WR Signal for writing to external (additional) RAM Pin 17: RD Signal for reading from external RAM

Pin 18, 19: X2, X1 Internal oscillator input and output. A quartz crystal which determines operating frequency is usually connected to these pins. Instead of quartz crystal, the miniature ceramics resonators can be also used for frequency stabilization. Later versions of the microcontrollers operate at a frequency of 0 Hz up to over 50 Hz. Pin 20: GND Ground Pin 21-28: Port 2 If there is no intention to use external memory then these port pins are configured as universal inputs/outputs. In case external memory is used then the higher address byte, i.e. addresses A8-A15 will appear on this port. It is important to know that even memory with capacity of 64Kb is not used (i.e. note all bits on port are used for memory addressing) the rest of bits are not available as inputs or outputs. Pin 29: PSEN If external ROM is used for storing program then it has a logic-0 value every time the microcontroller reads a byte from memory. Pin 30: ALE Prior to each reading from external memory, the microcontroller will set the lower address byte (A0-A7) on P0 and immediately after that activates the output ALE. Upon receiving signal from the ALE pin, the external register (74HCT373 or 74HCT375 circuit is usually embedded) memorizes the state of P0 and uses it as an address for memory chip. In the second part of the microcontrollers machine cycle, a signal on this pin stops being emitted and P0 is used now for data transmission (Data Bus). In this way, by means of only one additional (and cheap) integrated circuit, data multiplexing from the port is performed. This port at the same time used for data and address transmission. Pin 31: EA By applying logic zero to this pin, P2 and P3 are used for data and address transmission with no regard to whether there is internal memory or not. That means that even there is a program written to the microcontroller, it will not be executed, the program written to external ROM will be used instead. Otherwise, by applying logic one to the EA pin, the microcontroller will use both memories, first internal and afterwards external (if it exists), up to end of address space. Pin 32-39: Port 0 Similar to port 2, if external memory is not used, these pins can be used as universal inputs or outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE pin is at high level (1) and as data output (Data Bus), when logic zero (0) is applied to the ALE pin. Pin 40: VCC Power supply +5V

4.3.4 Circuit Diagram

40 10K 39 U1 VCC P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 P1.2 P1.3 P1.4 1 2 3 4 5 6 7 8 9 10 11 10k 12 13 14 15 16 17 18 12MHz 19 20 33pf 33pf 100uf 47ohm


10K 38 10K 37 10K 36 LED 10K 35 10K 34 10K 33





P0.4 P0.5 P0.6 P0.7 VPP ALE/PRG PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0

P1.5 P1.6 P1.7 RST P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 D17 D18 GND

ATML 89s52


32 31 30 29 28 27 26 25 24 23 22 21


Figure 4.7 Circuit Diagram of Micro Controller 89s52 4.3.5 Microcontroller Architecture Input/ Output Ports There are four I/O ports available in AT89S52. They are port 0, port 1, port 2, and port 3. All these ports are eight bit ports. All these ports can be controlled as eight-bit port or it can be controlled individually. In 89S52 port 1 is available for user, Port 3 is combined with interrupts. This can be used as interrupts (or) I/O ports, ports 2 & port 0 is combined with address bus & data bus. All these port lines are available with internal pull-ups except port 0. If we want to use port 0 as I/O port we have to use pull up resistors. This Micro controller is working at a maximum speed of 24MHz. Memory Organization All Atmel Flash micro controllers have separate address spaces for program and data memory. The logical separation of program and data memory allows the data memory to be accessed by 8 bit addresses. Program memory can only be read. There can be up to 64K bytes of directly addressable program memory. The read strobe for external program memory is the Program Store Enable Signal (PSEN).

Data memory occupies a separate address space from program memory. Up to 64K bytes of external memory can be directly addressed in the external data memory space.The CPU generates read and write signals, RD and WR, during external data memory accesses. The Internal Data memory is divided into three blocks namely, The lower 128 Bytes of Internal RAM. The Upper 128 Bytes of Internal RAM. Special Function Register. External program memory and external data memory can be combined by applying the RD and PSEN signal to the inputs of AND gate and using the output of the fate as the read strobe to the external program/data memory. Oscillator and Clock Circuit XTAL1 and XTAL2 are the input and output respectively of an inverting amplifier which is used as a crystal oscillator in the frequency range of 1.2 Mhz to 12 Mhz. XTAL2 is also used as the input to the internal clock generator. To drive the chip with an internal oscillator XTAL1 and XTAL2 are grounded. Since the input to the clock generator is divided by two flip flops there are no requirements on the duty cycle of the external oscillator signal. The clock generator divides the oscillator frequency by 2 and provides a two phase clock signal to the chip. The phase 1 signal is active during the first half of each clock period and the phase 2 signals are active during the second half of each clock period. CPU Timing A machine cycle consists of 6 states. Each state is divided into a phase /half, during which the phase 1 clock is active and phase 2 half. Arithmetic and Logical operations take place during phase1 and internal register to register transfer take place during phase 2. Flash ROM 8 kB ROM is available in the Micro controller. It can be erased and reprogrammed. If the available memory is not enough for program, it can be interfaced with external ROM .It has 16 address lines, so maximum of (2^16) i.e.64 bytes of ROM can be interfaced with this Micro controller. Both internal and external ROM cannot be used simultaneously. RAM Internal 256 bytes of RAM is available for user. These 256 bytes of RAM can be used along with the external RAM. Externally 64kB of RAM can be connected with micro controller. In internal RAM first 128 bytes of RAM is used for direct and indirect access and the remaining 128 bytes are used

as only indirect access . The 128 bytes are used as special function registers (SFR) only direct access. These SFRs are used as control registers for timer, serial port etc.

4.4 Driver Circuit

4.4.1 Driver Using IC ULN 2803 The chip takes low level signals (TLL, CMOS, PMOS, NMOS - which operate at low voltages and low currents) and acts as a relay of sorts itself, switching on or off a higher level signal on the opposite side. A TTL signal operates from 0-5 V, with everything between 0.0 and 0.8 V considered "low" or off, and 2.2 to 5.0 V being considered "high" or on. The maximum power available on a TTL signal depends on the type, but generally does not exceed 25mW. So it is not useful for providing power to something like a relay coil. Computers and other electronic devices frequently generate TTL signals. On the output side the ULN2803 is generally rated at 50V/500mA, so it can operate small loads directly. The figure 4.8 shows the Circuit Diagram of Relay driver.

Figure 4.8 Circuit Diagram of Relay Driver The ULN2803 comes in an 18-pin IC configuration and includes eight transistors. Pins 1-8 receive the low level signals; pin 9 is grounded (for the low level signal reference). Pin 10 is the common on the high side and would generally be connected to the positive of the voltage that is applied to the relay coil. Pins 11-18 are the outputs (Pin 1 drives Pin 18, Pin 2 drives 17, etc.). 4.4.2 Driver Features TTL, DTL, PMOS, or CMOS Compatible Inputs. Output Current to 500 mA.

Output Voltage to 95 V. Transient-Protected Outputs.

4.5 Signal Conditioning Unit

Signal conditioning unit manipulates an analog signal in such a way that it meets the requirements of the next stage for further processing. It is used to rectify the AC voltage and current and remove the ripple content present in the output. 4.5.1 Signal Conditioning Process The two important functions of SCU are it increases the resolution of the input signal and increases its signal-to-noise ratio. The SCU is connected to the Current Transformer and Potential Transformer to produce a constant output. The figure 4.9 shows the Circuit diagram of Signal conditioning unit. The output from the current transformer and the potential transformer is AC and it is given to the signal conditioning unit and it is converted into the DC signal for further calculation. The filter circuit used here is capacitive filter circuit and is connected at the rectifier output, and a DC is obtained across it. The filtered waveform is essentially a DC voltage with negligible ripples, which is ultimately fed to the next stage in such a way that it meets the requirements of the next stage for further processing. In Signal conditioning unit zener diode is used for range matching. It produces an output voltage of range (0-5) V. When the input voltage exceeds 5V it produces a constant output of 5V. 4.5.2 Circuit Diagram

IN4007 Ph



10K N 100uf 1k 5.1V IN4007 IN4007 DIODE ZENER


Figure 4.9 Circuit Diagram of Signal Conditioning Unit

4.6 Current Transformer

4.6.1 Principle of Operation A current transformer has a primary winding, a magnetic core, and a secondary winding. The current transformer primary winding is connected in series with the circuit and it is used for transforming current to a value that is suitable for measurement or control. The Current Transformer is used for the measurement of electric currents. When current in a circuit is too high, it is directly applied to the current transformer and it produces a reduced current accurately proportional to the current in the circuit, which can be conveniently connected for the purpose of measuring and control. The output of the current transformer is stepped down depending upon the primary current and the CT ratio. In this project current transformer of ratio 100 A/5 A is used.

4.7 Potential Transformer

4.7.1 Principle of Operation Potential transformer has a primary winding, a magnetic core, and a secondary winding. The potential transformer primary winding is connected in parallel with the circuit and it is used for transforming voltage to a value that is suitable for measurement or control. The voltage flowing in the primary winding produces a magnetic field in the core, which then induces voltage flow in the secondary winding circuit. The primary objective of potential transformer design is to ensure that the primary and secondary circuits are efficiently coupled, so that the secondary voltage bears an accurate relationship to the primary voltage. The potential transformer is used to reduce the voltage magnitude. Potential transformer ratio (230/12) V is used in this project.

4.8 MAX 232

4.8.1 Description The MAX 232 is an integrated circuit that converts signals from an RS232 serial port to signals suitable for use in TTL compatible digital logic circuits. The drivers provide RS232 voltage level outputs (approx. 7.5 V) from a single + 5 V supply via external capacitors. This makes it useful for implementing RS232 in devices that otherwise do not need any voltages outside the range of 0 V to + 5 V, as power supply design does not need to be made more complicated just for driving the RS232 .The receivers reduce RS232 inputs which may be as high as + 25 V to standard 5 V TTL levels. These receivers have a typical threshold of 1.3 V and a typical hysteresis of 0.5 V. The figure 4.10 shows the pin diagram of MAX 232.


220 ohm 10uf 0.1uf






To PC 8

4 15 5 6


Figure 4.10 Circuit Diagram of MAX 232 4.8.2 Features Operates from a Single 5-V Power Supply with 1.0- micro Farad Charge-Pump Capacitors. Operates Up To 120 Kbit/s. Two Drivers and Two Receivers. 30-V Input Levels. Low Supply Current - 8 mA Typical.ESD Protection Exceeds JESD 22 2000-V HumanBody Model (A114-A). 4.8.3 Applications TIA/EIA-232-F, Battery-Powered Systems, Terminals, Modems, and Computers.

4.9 RS 232
4.9.1 Description RS 232 is standard for serial binary data signals connecting a DTE (Data Terminal Equipment) and a DCE (Data Circuit-terminating Equipment). It is commonly used in computer serial ports. Serial

ports are harder to interface than parallel ports. However due to the following advantages, a serial port is preferred mostly. Serial cables can be longer than parallel cables. The serial port transmits 1 as 3 to 25 volts and 0 as 0 volts and 1 as 5 volts. Therefore the serial port can have a maximum swing of 50V compared to the parallel port which has a maximum swing of 5 Volts. Microcontrollers have also proven to be quite popular recently. Many of these have in built SCI (Serial Communications Interfaces) which can be used to talk to the outside world. Serial Communication reduces the pin count of these MPU's. Only two pins are commonly used, Transmit Data (TXD) and Receive Data (RXD) compared with at least 8 pins if a 8 bit Parallel method is used. 4.9.2 Pin Diagram of RS 232 The figure 4.11 shows the pin diagram of RS232

Figure 4.11 Pin Diagram of RS 232 4.9.3 Advantages Serial Cables can be longer than Parallel cables. The serial port transmits a '1' as -3 to -25 volts and a '0' as +3 to +25 volts where as a parallel port transmits a '0' as 0v and a '1' as 5v. Therefore the serial port can have a maximum swing of 50V compared to the parallel port which has a maximum swing of 5 Volts. Therefore cable loss is not going to be as much of a problem for serial cables as they are for parallel. Wires are less than parallel transmission. Serial transmission is used where one bit is sent at a time.

4.10 Zero Crossing Detector

4.10.1 Description The zero crossing detector is one of the applications of op-amp, which produces an output that will change from one state to another very rapidly every time when the input signal passes through zero. The figure 4.12 shows the Circuit diagram of Zero crossing detector.


+12V R3 2 220ohm 2 3





230V AC

-12V 1 +12V R3 3 220ohm 2 2


3 7486







Figure 4.12 Circuit Diagram of Zero Crossing Detector The pulses are produced at the output when the input signals cross from positive side to negative side through zero. In zero crossing detector the time constant of RC network is very small when compared with the period of the input signal. The output is rectangular signal corresponding to the input signal. In this project we use the zero crossing detector for finding the power factor value. Here two separate zero crossing detectors are used, one produces a rectangular wave corresponding to the voltage signal from the potential transformer and the other produces a rectangular wave corresponding to the current signal from the current transformer. 4.10.2 Output Waveforms


Amplitute (V)

Voltage signal Current signal Time ms

Amplitute (V)

+5V ZCD 1

Time (ms)


Amplitute (V)


Time (ms)

Amplitute (V)

Time (ms)

Figure 4.13 Output Waveforms of ZCD and Gating Circuit The output from the two zero crossing detector is applied to X-OR gate, which produce the output as high state when the two inputs are different. Thus the X-OR gate produces the high output which is corresponding to the phase difference between the voltage and current wave form. Then the output of X-OR gate is applied to the micro controller that controls and displays the power factor.