Volume 2, Issue 3, March 2012

ISSN: 2277 128X

International Journal of Advanced Research in Computer Science and Software Engineering

Research Paper Available online at: www.ijarcsse.com

Performance Parameters of Improved Swing, Wilson & Regulated Cascode Current Mirrors
Hitesh*
VLSI Technology&MMU,Mullana 87.hitesh@gmail.com

Anuj Goel
VLSI Technology&MMU,Mullana

Abstract This paper deals with the design of current mirrors as both biasing element and signal processing components. Three main topologies of current mirror Improved Swing Current Mirror, Wilson Current Mirror, and Regulated Cascode Current Mirror are described. The performance parameters of above said topologies are discussed. Current-mode circuits have been an active area of research for many years due to many intrinsic advantages over voltage mode counterparts including low supply voltage requirement, wide bandwidth, tunable input impedances, high slew rates, and less susceptible to power and ground fluctuations. Desirable features of current mirrors include: low standby power dissipation, wide input and output current swings, low supply voltage requirements, accurate current copy, and high linearity. Keywords High Swing, Output Compliance Voltage, Input Compliance Voltage

I. INTRODUCTION Current mirrors are the core building blocks of almost all the analog circuits and a key part of signal processing elements like op-amp. In current-mode signal processing circuits, current mirrors are frequently used to copy current signals. The basic building block in a current-mode based circuit is the current mirror. Its small size and simplicity is accountable for the high speed and compression of the resulting current-mode circuits [1]. The attractive features of this design technique are high speed and small area with a reasonable degree of precision. Compact and fast analog to digital converters [2], filters [3], neural networks [4], and fuzzy processing components [5] have been reported with current mode circuits. II. IMPROVED SWING CURRENT MIRROR The drawback of standard cascode current mirror is its higher input and output compliance voltage. This high swing cascode topology shown in Fig. 1 [6] is better alternate as it provides the same output resistance as of standard cascode but it provides low input and output compliance voltage in comparison to standard cascode structure.

standard cascode CM. Hence this is an enhanced topology than that of standard cascode CM. In Fig.1 the W/L ratio of transistor M3 is chosen one fourth as compared to other transistors. The problem with this topology is that the Vds of M1 and M2 are not equal.

Fig. 1 High swing Cascode current mirror

The output characteristic for high swing cascode structure is shown in Fig.2. The output compliance voltage is approximately equal to 1.5V which is lesser than the value for

Therefore the current iout will not be an accurate copy of iref due to channel length modulation. If exact copy of iout is desired with iref, then a slight modification of Fig. 1 will

Volume 2, Issue 3, March 2012 minimize this problem. The required circuit is shown in Fig. 3. An additional transistor M5 is added in series with M1 so as to make the drain voltages of M1 and M2 to be identical, thus eliminating any error because of channel length modulation. III. WILSON CURRENT MIRROR This circuit is an n-channel implementation of Wilson current mirror [7]. Refering Fig. 4, the output resistance of this topology is increased through the use of negative current feedback [8]. This topology has large input and output compliance voltage. The output resistance for this structure is given as:

www.ijarcsse.com The output compliance voltage is given as:

vout =v t +

2iout 2i out + 2 3

1+r g (1+3 )+g m2 rds1g m3rds3 rout=rds3 +rds2 ds3 m3 1+g m2 rds2

The output characteristic for this structure is shown in Fig. 5. Refering Fig.5, the output compliance voltage is estimated 1.63V. Also in saturation region its output current is fluctuating with output voltage due to its higher output resistance. The benefit of the Wilson CM is its higher output resistance. The main shortcoming of this topology is the asymmetrical biasing, which causes large DC matching error. This shortcoming can be eliminated by adding one transistor in series with transistor M1.

Fig. 4 Wilson current mirror

Fig. 2 Output characteristics of cascode current mirror

Fig. 5 Output characteristics of current mirror

IV. REGULATED CASCODE CURRENT MIRROR It is discussed earlier that the well desired property of good current mirror is its high output resistance. An enhancement in Wilson CM can be made if someway its output resistance is increased. This can be accomplished by using negative current feedback circuit. The resulted circuit is shown in Fig. 6 [9].

Fig. 3 Improved high swing cascode current mirror

The output resistance is seen to be comparable with that of standard cascode current mirror. The input compliance voltage is given as:

vin =2v t +

2iout 2iout + 2 3

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Volume 2, Issue 3, March 2012

www.ijarcsse.com topologies discussed in this paper, as it offers medium input and output compliance voltage and very high output resistance.

Fig. 6 Regulated cascode current mirror

The output compliance voltage for this topology is given as: [10]

vout =

2iout 2iout + 2 3

REFERENCES
[1] Teresa Serrano and BernaM Linares-Barranco, The Active-Input Regulated-Cascode Current Mirror, IEEE transactions on circuits and systems-i fundamental theory and applications, 41(6), 1994 D. G. Nairn and C.A.T. Salama, Current-mode algorithmic analogto-digital converters, IEEE J. Solid-Stnfe Circ., vol. 25, pp. 997-1004, 1990. S. S. Lee, R. H. Zele, D. J. Allstot, and G. Liang, CMOS continuous time current-mode filters for high-frequency applications, IEEE J.Solid-Stare Circ., 28, pp. 323-329, 1993. A. Rodr;guez-V&quez. S. Espejo, R. Dominguez-Castro, J. L. Huertas, and E. Sanchez-Sinencio, Current-mode techniques for the implementation of continuous- and discrete-time cellular neural networks, IEEE Trans. Circ. and Sysr.. CAS-40, pp. 132-146, 1993. T. Kettner. C. Heite. and K. Schumacher, Analog CMOS realization, of fuzzy logic membership functions, IEEE J. Solid-State Circ., 28, pp. 857-861. 1993. P. E. Allen and D. R. Holberg, CMOS analog circuit design, New York: Oxford University Press, 2002. G. R. Wilson, A Monolithic Junction FET-npn Operational Amplifier, IEEE J. Solid-State Circuits, SC-3(5), pp. 341-348, 1968. Z.Want, Analytical determination of output resistance and DC matching errors in MOS current mirrors, IEE PROCEEDINGS, 137(5), 1990. E. SACKINGER and W. GUGGENBUHL, A versatile building block: the CMOS differential difference amplifier, IEEE J, SC-22(2), pp. 287-294, 1987 Bajrang Bansal, Prabhat Ranjan, Himanshu Kaushik; Current Mirror Circuits with Improved Performances International Journal of Electrical and Electronics Engineerng (IJEEE), ISSN (PRINT): 23315284, Volume-I, Issue-II, 2011

The output resistance for this topology is given as:

[2]

rout rds2g m3rds3g m1rds1

[3]

So this topology accomplishes an output resistance on the 2 3 order of g m rds The output characteristic of this structure is . shown in Fig. 7.

[4]

[5]

[6] [7] [8]

[9]

Fig. 7 Output characteristics of Regulated cascode current mirror

[10]

It can be seen from this Fig. 7, the output compliance voltage for this topology is 1.5V. Also in saturation mode, output current is constant as it should be ideal situation. V. CONCLUSIONS In this paper, three Current Mirror topologies Improving high swing CM, Wilson CM, Regulated cascode CM are discussed along with their benefits and drawbacks. The designer can pick any one of them according to the requirements. Compliance voltages and output resistance are the key parameters for a current mirror topology. Regulated cascode CM structure is best suited topology among all

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