Sivaji Main Project

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM
A Project report submitted to Jawaharlal Nehru Technological University, Kakinada in partial fulfillment for the award of the degree of
BACHELOR OF TECHNOLOGY IN ELECTRONICS AND COMMUNICATION ENGINEERING BY
S.Sivaji M.Yamini Chandra
(08KK1A0450) (08KK1A0430)
Under the Guidance of M.H.S PAVANKUMAR (Associate/Assistant/Professor)
Department of ECE NOVA KK
CERTIFICATE
This is to be certified that, the mini project report entitled VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM Which is a bonafied work carried out by S.SIVAJI (08KK1A0450), M.Yamini Chandra
(08KK1A0430) in partial fulfillment for the award of the degree of Bachelor of Technology in ELECTRONICS AND COMMUNICATION ENGINEERING from Jawaharlal Nehru Technological University, Kakinada, during the year 2011-12. It is certified that, all corrections\suggestions indicated for internal assessment have been incorporated in the report. The seminar report has been approved as it satisfies the academic requirements in respect of seminar prescribed for the above said degree.
Project Guide Department
Head of the
External Examiner
ACKNOWLEDGEMENT
Finally, we whole heartedly acknowledge K.RAMAKRISHNAIAH, Principal and J.SRINIVASARAO, Vice Principal for giving opportunity to execute this the Project.
We have the immense pleasure in expressing our thanks and deep sense of gratitude to Sri. V.V.G.S.RAJENDRA PRASAD , Head of the Department of ELECTRONICS AND COMMUNICATION ENGINEERING for extending necessary facilities for the completion of the Project.
We also extend our thanks to all faculty members of Electronics & Communication Engineering, for their valuable guidance and encouragement in this Project
DECLARATION
I declare that the project report entitled VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM, was solely prepared by me and the matter embodied in this report is the genuine one done by me and has not been submitted to either to this university or to any other university/institute for the fulfillment of the requirement of any course of study.
S.Sivaji M.Yamini Chandra
(08KK1A0450) (08KK1A0430)
CONTENTS
1. ABSTRACT 2. INTRODUCTION 3 BLOCK DIAGRAM OF THE PROJECT 4. EMBEDDED SYSTEM 4.1 INTRODUCTION 4.2 HISTORY 4.3 CHARACTERISTICS 5. MICROCONTROLLER 5.1 MICROCONTROLLEARCHITECTUREANDFEATURES 5.2 PIN DIAGRAM 5.3 BLOCK DIAGRAM 5.4 PIN DESCRIPTION 5.5 SPECIAL FUNCTION REGISTERS 5.6 MEMORY ORGANIZATION 5.7 WATCHDOG TIMER 5.8 SERIAL INTERFACE 5.9 INTERRUPTS 5.10 OSCILLATOR CHARACTERISTICS
P.no
9 11 14 17 17 18 19 26 26 28 29 30 33 38 38 40 44 46
6. RF TECHNOLOGY
50
6.1 INTRODUCTION 6.2 OPERATIONAL STANDARD 6.3 HT12E ENCODER 6.3.1 GENERAL DESCRIPTION 6.3.2 FEATURES 6.3.3 PIN CONFIGURATION 6.4 ENCODER OPERATION 6.5 TLP434A ASK RF TRANSMITTER MODULE 6.5.1GENERAL DESCRIPTION Department of ECE NOVA KK 5
50 51 52 52 53 53 55 57 59
6.6 RLP434A ASK RF RECEIVER MODULE 6.6.1 GENERAL DESCRIPTION 6.7 HT12D DECODER 6.7.1 GENERAL DESCRIPTION 6.7.2 PIN CONFIGURATION 6.7.3 FEATURE 6.8 DECODER OPERATION 6.9 RF TRASMITTER MODULE 6.10 RF RECIEVER MODULE
59 59 61 61 62 62 62 65 66
7. IR TECHNOLOGY
68 68 68 72 75 77 77 77 78 80
7.1 AN INTRODUCTION TO INFRARED TECHNOLOGY 7.2 WIRELESS COMMUNICATION 7.3 INTERFACING IR COMPONENTS TO THE BASIC STAMP 7.4 INFRARED TECHNOLOGY 7.5 IR ADVANTAGES 7.6 IR DISADVANTAGES 7.7 RF ADVANTAGES 7.8 RF DISADVANTAGES
8. DC MOTORS
8.1 INTRODUCTION 8.2 BRUSHLESS DC MOTOR 8.3 FEATURES BRUSHLESS DC MOTOR 8.4 L293DNE DRIVER 8.5 FEATURES OF L293DNE 8.6 DC MOTOR INTERFACING WITH L293DNE
80 80 82 83 84 85
9. POWER SUPPLY
87
9.1 TRANSFORMER 9.2 RECTIFIER 9.3 FILTER 9.4 VOLTAGE REGULATOR
87 88 89 90
10. DESCRIPTION OF THE SOFTWARES USED 10.1 Keil software 10.2 Flash Magic
92 92 102
11. CONCLUSION 12 .BIBILOGRAPHY
105 107
ABSTRACT
1 ABSTRACT
The fatality rate of man is increasing day by day due to many reasons. One of the most important reasons is accidents. Lakh of people are losing their lives across the world due to these deadly accidents.
Governments made several rules to avoid these accidents but they just remained for papers only. Even the people became so careless about their lives. So to prevent these accidents we took the help of modern technology.
In our project we detect the obstacles before the vehicle and act accordingly and in extreme case the vehicle automatically poses break to prevent accident. We generally
have accident prone areas where there is a maximum possibility of occurring of accidents. At such places our vehicle automatically at particular speed. The driver cannot increase the speed even if he wants to.
Our main aim is to prevent men from losing their lives just because of stupid accidents.
INTRODUCTION
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2. INTRODUCTION
Road fatalities are a major concern in the developed world. Recent studies show that a third of the number of fatal or serious accidents are associated with excessive or inappropriate speed, as well as changes in the roadway (like the presence of road-work or unexpected obstacles). Reduction of the number of accidents and mitigation of their consequences are a big concern for traffic authorities, the automotive industry and transport research groups. One important line of action consists in the use of advanced driver assistance systems (ADAS), which are acoustic, haptic or visual signals produced by the vehicle itself to communicate to the driver the possibility of a collision. These systems are somewhat available in commercial vehicles today, and future trends indicate that higher safety will be achieved by automatic driving controls and a growing number of sensors both on the road infrastructure and the vehicle itself.
A prime example of driver assistance systems is cruise control (CC), which has the capability of routinely employed in many countries, like the Telepass system in Italy or the Auto pass system in Norway. Other uses include monitoring systems to avoid vehicle theft, access control to car parking or private areas, and embedding of RFID tags in license plates with specially coded IDs for automatic vehicle detection and identification. Placement of RFID tags on the road lanes has been proposed in order to provide accurate vehicle localization in tunnels or downtown areas where GPS positioning might be unreliable. In the work by Seo et al., RFID tagging of cars is offered as an alternative to traffic data collection by inductive loops placed under the road surface. The information about the traffic collected by a network of maintaining a constant user-preset speed, and its evolution, the adaptive cruise control (ACC), which adds to CC the capability of keeping a safe distance from the preceding vehicle. A drawback of these systems is that they are not independently capable of distinguishing between straight and curved parts of the road, where the speed has to be lowered to avoid accidents. However, curve warning systems (CWS) have been recently developed that use a combination of global positioning systems (GPS) and digital maps obtained from a Geographical Information System (GIS), to assess threat levels for a driver approaching a curve too quickly; likewise, intelligent speed assistance (ISA) systems warn the driver when the Department of ECE NOVA KK 11
vehicles velocity is inappropriate, using GPS in combination with a digital road map containing information about the speed limits. However useful, these systems are inoperative in case of unexpected road circumstances (like roadwork, road diversions, accidents, etc.), which would need the use of dynamically-generated digital maps. The key idea offered by this paper is to use Radio Frequency Identification (RFID) technology to tag the warning signals placed in the dangerous portions of the road. While artificial vision-based recognition of traffic signals might fail if visibility is poor (insufficient light, difficult weather conditions or blocking of the line of sight by preceding vehicles), RF signals might still be transmitted reliably. In the last years, RFID technology has been gradually incorporated to commercial transportation systems. A well known example is the RFID-based highway toll collection systems which are now RF readers is then used to regulate traffic at intersection or critical points in the city. The work by Sato et al describes an ADAS, where passive RFID tags are arranged in the road close to the position of real traffic signals. An antenna placed in the rear part of the car and close to the floor (since the maximum transmitting range of the Sensors.
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BLOCK DIAGRAM
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3. BLOCK DIAGRAM
TRANSMITER
RF Transmitter
Power supply
IR array Encoder
Fig i block diagram of transmitter section
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RECEIVER
Power Supply RF receiver
M1 L293DNE Driver AT 89S52 M2
Decoder
OSCILATOR
Fig ii block diagram of receiver section
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EMBEDDED SYSTEMS
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4. EMBEDDED SYSTEM
4.1 Introduction:
An embedded system is a computer system designed for specific control functions within a larger system, often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts Embedded systems contain processing cores that are typically either
microcontrollers or digital signal processors (DSP The key characteristic, however, is being dedicated to handle a particular task. Since the embedded system is dedicated to specific tasks, design engineers can optimize it to reduce the size and cost of the product and increase the reliability and performance.
PC Engines' ALIX.1C Mini-ITX embedded board with an x86 AMD Geode LX 800 together with Compact Flash, mini PCI and PCI slots, 44-pin IDE interface, audio, USB and 256MB RAM Department of ECE NOVA KK 17
4.2 History:
One of the first recognizably modern embedded systems was the Apollo Guidance Computer, developed by Charles Stark Draper at the MIT Instrumentation Laboratory. Since these early applications in the 1960s, embedded systems have come down in price and there has been a dramatic rise in processing power and functionality. The first microprocessor for example, the Intel 4004, was designed for calculators and other small systems but still required many external memory and support chips. In 1978 National Engineering Manufacturers Association released a "standard" for programmable microcontrollers, including almost any computer-based controllers, such as single board computers, numerical, and event-based controllers. By the mid-1980s, most of the common previously external system components had been integrated into the same chip as the processor and this modern form of the microcontroller allowed an even more widespread use, which by the end of the decade were the norm rather than the exception for almost all electronics devices.
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4.3 Characteristics:
Gumstix Over COM, a tiny, OMAP-based embedded computer-on-module with WiFi and Bluetooth. 1. Embedded systems are designed to do some specific task, rather than be a generalpurpose computer for multiple tasks. 2. Embedded systems are not always standalone devices. Many embedded systems consist of small, computerized parts within a larger device that serves a more general purpose
E-con Systems e SOM270 and e SOM300 computer on modules. 3. The program instructions written for embedded systems are referred to as firmware, and are stored in read-only memory or Flash memory chips. They run with limited computer hardware resources: little memory, small or non-existent keyboard or screen.
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User interface:
Embedded system text user interface using Micro VGA Embedded systems range from no user interface at all dedicated only to one task to complex graphical user interfaces that resemble modern computer desktop operating systems. More sophisticated devices which use a graphical screen with touch sensing or screen-edge buttons provide flexibility while minimizing space used: the meaning of the buttons can
change with the screen, and selection involves the natural behavior of pointing at what's desired. Some systems provide user interface remotely with the help of a serial (e.g. RS-232, USB, IC, etc.) or network (e.g. Ethernet) connection.
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Processors in embedded systems:

Secondly, embedded processors can be broken into two broad categories: ordinary microprocessors (P) and microcontrollers (C), which have many more peripherals on chip, reducing cost and size. Contrasting to the personal computer and server markets, a fairly large number of basic CPU architectures are used; there are Von Neumann as well as various degrees of Harvard architectures, RISC as well as non-RISC and VLIW; word lengths vary from 4-bit to 64-bits and beyond (mainly in DSP processors) although the most typical remain 8/16bit.
Peripherals:
Embedded Systems talk with the outside world via peripherals, such as:

Serial Communication Interfaces (SCI): RS-232, RS-422, RS-485 etc. Synchronous Serial Communication Interface: I2C, SPI, SSC and ESSI (Enhanced Synchronous Serial Interface)
Universal Serial Bus (USB) Multi Media Cards (SD Cards, Compact Flash etc.) Networks: Ethernet, LonWorks, etc. Fieldbuses: CAN-Bus, LIN-Bus, PROFIBUS, etc. Timers: PLL(s), Capture/Compare and Time Processing Units Discrete IO: aka General Purpose Input/Output (GPIO) Analog to Digital/Digital to Analog (ADC/DAC) Debugging: JTAG, ISP, ICSP, BDM Port, BITP, and DP9 ports.
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Tools:
As with other software, embedded system designers use compilers, assemblers, and debuggers to develop embedded system software. However, they may also use some more specific tools:

In circuit debuggers or emulators (see next section).. For systems using digital signal processing, developers may use a math workbench such as Scilab / Scicos, MATLAB / Simulink, EICASLAB, MathCAD, Mathematica,or Flow Stone DSP to simulate the mathematics.
A model based development tool like VisSim lets you create and simulate graphical data flow and UML State chart diagrams of components like digital filters, motor controllers, communication protocol decoding and multi-rate tasks
Custom compilers and linkers may be used to improve optimization for the particular hardware.
An embedded system may have its own special language or design tool, or add enhancements to an existing language such as Forth or Basic.
Another alternative is to add a real-time operating system or embedded operating system, which may have DSP capabilities like DSPnano RTOS.
Modeling and code generating tools often based on state machines
Software tools can come from several sources:

Software companies that specialize in the embedded market Ported from the GNU software development tools Sometimes, development tools for a personal computer can be used if the embedded processor is a close relative to a common PC processor
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Debugging:
Embedded debugging may be performed at different levels, depending on the facilities available. From simplest to most sophisticate they can be roughly grouped into the following areas:
Interactive resident debugging, using the simple shell provided by the embedded operating system (e.g. Forth and Basic)
External debugging using logging or serial port output to trace operation using either a monitor in flash or using a debug server like the Remedy Debugger which even works for heterogeneous multicore systems.
An in-circuit debugger (ICD), a hardware device that connects to the microprocessor via a JTAG or Nexus interface.
An in-circuit emulator (ICE) replaces the microprocessor with a simulated equivalent, providing full control over all aspects of the microprocessor.
A complete emulator provides a simulation of all aspects of the hardware, allowing all of it to be controlled and modified and allowing debugging on a normal PC.
Reliability:
Embedded systems often reside in machines that are expected to run continuously for years without errors and in some cases recover by themselves if an error occurs. Therefore the software is usually developed and tested more carefully than that for personal computers, and unreliable mechanical moving parts such as disk drives, switches or buttons are avoided. Specific reliability issues may include: 1. The system cannot safely be shut down for repair, or it is too inaccessible to repair. Examples include space systems, undersea cables, navigational beacons, bore-hole systems, and automobiles. 2. The system must be kept running for safety reasons. "Limp modes" are less tolerable. Often backups are selected by an operator. Examples include aircraft Department of ECE NOVA KK 23
navigation, reactor control systems, safety-critical chemical factory controls, train signals. 3. The system will lose large amounts of money when shut down: Telephone switches, factory controls, bridge and elevator controls, funds transfer and market making, automated sales and service. A variety of techniques are used, sometimes in combination, to recover from errorsboth software bugs such as memory leaks, and also soft errors in the hardware:
watchdog timer that resets the computer unless the software periodically notifies the watchdog
subsystems with redundant spares that can be switched over to software "limp modes" that provide partial function Designing with a Trusted Computing Base (TCB) architecture ensures a highly secure & reliable system environment
An Embedded Hypervisor is able to provide secure encapsulation for any subsystem component, so that a compromised software component cannot interfere with other subsystems, or privileged-level system software. This encapsulation keeps faults from propagating from one subsystem to another, improving reliability. This may also allow a subsystem to be automatically shut down and restarted on fault detection.
Immunity Aware Programming
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MICROCONTROLLER
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5. MICROCONTROLLER
A microcontroller (or MCU) is a computer-on-a-chip. It is a type of microprocessor emphasizing self-sufficiency and cost-effectiveness, in contrast to a general-purpose microprocessor (the kind used in a PC).
5.1 Microcontroller Architecture and Features:

The basic internal designs of microcontrollers are pretty similar. Figure1 shows the block diagram of a typical microcontroller. All components are connected via an internal bus and are all integrated on one chip. The modules are connected to the outside world via I/O pins.
Fig1 microcontroller Architechere
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Features of At89s52:
8K Bytes of Re-programmable Flash Memory. RAM is 256 bytes. 4.0V to 5.5V Operating Range. Fully Static Operation: 0 Hz to 33 MHzs
The following list contains the modules typically found in a microcontroller.
Processor Core:
The CPU is the controller. It contains the arithmetic logic unit, the control unit, and the registers (stack pointer, program counter, accumulator register.
Memory:
The memory is sometimes split into program memory and data memory. In larger controllers, a DMA controller handles data transfers between peripheral components and the memory.
Interrupt Controller:
Interrupts are useful for interrupting the normal program flow in case of (important) external or internal events. In conjunction with sleep modes, they help to conserve power.
Timer/Counter:
Most controllers have at least one and more likely 2-3 Timer/Counters, which can be used to timestamp events, measure intervals, or count events. Many controllers also contain PWM (pulse width modulation) outputs, which can be used to drive motors or for safe breaking (antilock brake system, ABS). Furthermore the PWM output can, in conjunction with an external filter, be used to realize a cheap digital/analog converter
Digital I/O:
Parallel digital I/O ports are one of the main features of microcontrollers. The number of I/O pins varies from 3-4 to over 90, depending on the controller family and the controller type.
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Analog I/O:
Apart from a few small controllers, most microcontrollers have integrated analog/digital converters, which differ in the number of channels (2-16) and their resolution (8-12 bits).
5.2 Pin diagram:
Fig 2 AT89S52 Pin diagram Department of ECE NOVA KK 28
5.3 Block diagram:
Fig3 AT89S52 Block Diagram
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5.4 Pin Description:

Vcc: Supply Voltage GND: Ground
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification . Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the table. Port 1 also receives the low-order address bytes during Flash programming and verification.
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Table 1 Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification .Port 3 also serves the functions of various special features of the AT89S52, as shown in the following Table.
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Alternate Functions of Port 3: RST (Reset input) A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO Bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.
ALE/PROG:
Address Latch Enable is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash Programming.
Table 2
50In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulses skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
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PSEN: Program Store Enable (PSEN) is the read strobe to external program memory. When theAT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.
EA/Vpp: External Access Enable, EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. A should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.
XTAL 1: Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL 2 Output from the inverting oscillator amplifier.
5.5 Special Function Registers:
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table III Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect. User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.
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Timer 2 Registers:
Control and status bits are contained in registers T2CON (shown in Table IV) and T2MOD (shown in Table VIII) for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit autoreload mode.
Interrupt Registers:
The individual interrupt enable bits are in the IE register. Two priorities can be set for
each of the six interrupt sources in the IP register.
AT89S52 SFR Map and Reset Values:
Table 3 Department of ECE NOVA KK 34
T2CON:
Timer/Counter 2 Control Register
Table 4
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Table 5
Dual Data Pointer Registers:
To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83Hand DP1 at 84H85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should ALWAYS Initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register.
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Power off Flag:
The Power off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to 1during power up. It can be set and rest under software control and is not affected by reset.
AUXR1: Auxiliary Register 1
Table 6
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5.6 Memory Organization:

MCS-52 devices have a separate address space for Program and Data Memory. Up to 64K byte search of external Program and Data Memory can be addressed.
Program Memory: If the EA pin is connected to GND, all program fetches are directed to external memory .On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH .are to external memory.
Data Memory: The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers..
5.7 Watchdog Timer (One-time Enabled with Reset-out):

The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H).When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at the RST pin. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EHand 0E1H to WDTRST to avoid a WDT overflow.
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The RESET pulse duration is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.
WDT during Power-down and Idle: In Power-down mode the oscillator stops, which means the WDT also stops. While in Power down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a levelactivated external interrupt which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. The WDT from resetting the device while the interrupt pin is held low, the WDT is not started until The interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the WDT just before entering Power-down mode .Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit =0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE .
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5.8 Serial Interface:

It provides both synchronous and asynchronous communication modes. It operates as a Universal Asynchronous Receiver and Transmitter (UART) in three full-duplex modes (Modes 1, 2 and 3). Asynchronous transmission and reception can occur simultaneously and at different baud rates .It is also receive-buffered, meaning it can commence reception of a second byte before a previously received byte has been read from the receive register. (However, if the first Byte still hasnt been read by the time reception of the second byte is complete, one of the bytes will be lost). The serial port receive and transmit registers are both accessed at Special Function Register SBUF. Writing to SBUF loads the transmit register, and reading SBUF accesses a physically second receive register.
The serial port can operate in 4 modes:
Mode 0:
Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are transmitted/received 8 data bits (LSB first). The baud rate is fixed at 1/12 the oscillator frequency.
Mode 1: 10 bits are transmitted (through TXD) or received (through RXD): a start bit (0),8 data bits (LSB first), and a stop bit (1). On receive the stop bit goes into RB8 in Special Function Register SCON. The baud rate is variable.
Mode 2: 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0),8 data bits (LSB first), a programmable 9th data bit, and a stop bit (1). On transmit, the9th data bit (TB8 in SCON) can be assigned the value of 0 or 1. Or, for example, Department of ECE NOVA KK 40
the parity bit (P, in the PSW) could be moved into TB8. On receive the 9th data bit goes intoRB8 in Special Function register SCON, while the stop bit is ignored. The baud rate is programmable to either 1/32 or 1/64 the oscillator frequency.
Mode 3: 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0),8 data bits (LSB first), a programmable 9th data bit and a stop bit (1). In fact, Mode 3 is
The same as Mode 2 in all respects except the baud rate. The baud rate in Mode 3 is variable. In all four modes, transmission is initiated in Mode 0 by the condition RI = 0 and REN =1. Reception is initiated in Mode 0 by the condition RI = 0 and REN = 1.
Edit the other modes by the incoming start bit if REN = 1.Serial I/O port includes the following enhancements: Framing error detection Automatic address recognition: The serial port control and status register is the Special Function Register SCON, shown in Table 2-17. This register contains not only the mode selection bits, but also the9th data bit for transmit and receive (TB8 and RB8), and the serial port interrupts bits (TI and RI).
Baud Rates: The baud rate in Mode 0 is fixed the baud rate in Mode 2 depends on the value of bit SMOD in Special Function Register PCON .If SMOD = 0 (which is its value on reset), the baud rate is 1/64 the oscillator frequency .If SMOD = 1, the baud rate is 1/32 the oscillator frequency. In the 80C51, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow rate. In case of Timer2, these baud rates can be determined by Timer 1, or by Timer 2,or by both (one for transmit and the other for receive).
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Baud Rate Generator:

Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON (Table 5-2). Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function .Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode, as shown in Fig. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H andRCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2s overflow rate according to the following equation. The Timer can be configured for either timer or counter operation. In most applications, it is con-figured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it is used as a baud rate generator. The baud rate formula is given below. Where (RCAP2H, RCAP2L) there is the content of RCAP2H andRCAP2L taken as a 16-bit unsigned integer. Timer 2 as a baud rate generator is shown in Figure11-1. This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2does not set TF2 and will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. TheRCAP2 registers may be read but should not be written to, because a write might overlap are load and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.
When Timer 1 is used as the baud rate generator, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow rate and the value of SMOD as follows the Timer 1 interrupt should be disabled in this application. The Timer itself can be configured For timer or counter operation in any of its 3 running modes the most typical applications, it is configured for timer operation, in the auto-reload mode (high nibble of TMOD = 0010B). In that case, the baud rate is given by the formula One can achieve very low baud rates with Timer 1 by leaving the Timer 1 interrupt enabled , and configuring the Department of ECE NOVA KK 42
Timer to run as a 16-bit timer (high nibble of TMOD =0001B), and using the Timer 1 interrupt to do a 16-bit software reload. The write to SBUF signal at S6P2 also loads 1 into the 9th bit position of the transmit shift register and tells the TX Control block to commence a transmission. The internal timing is such that one full machine cycle will elapse between write to SBUF, and activation of SEND.SEND enables the output of the shift register to the alternate output function line of P3.0, and also enables SHIFT CLOCK to the alternate output function line of P3.1. SHIFTCLOCK is low during S3, S4, and S5 of every machine cycle, and high during S6, S1and S2. At S6P2 of every machine cycle in which SEND is active, the contents of the transmit shift register are shifted to the right one position. As data bits shift out to the right, zeros come in from the left. When the MSB of the data byte is at the output position of the shift register, then the 1 that was initially loaded into the 9th position is just to the left of the MSB, and all positions to the left of that contain zeros. This condition flags the TX Control block to do one last shift and then deactivate SEND and set T1. Both of these actions occur at S1P1 of the 10th machine cycle after write to SBUF. Reception is initiated by the condition REN = 1 and RI = 0. At S6P2 of the next machine cycle, the RX Control unit writes the bits 11111110 to the receive shift register, and in the next clock phase activates RECEIVE.RECEIVE enables SHIFT CLOCK to the alternate output function line of P3.1. Shift CLOCK makes transitions at S3P1 and S6P1 of every machine cycle. At S6P2 of every cycle in which RECEIVE is active, the contents of the receive shift register are shifted to the left one position. The value that comes in from the right is the value that was sample data the P3.0 pin at S5P2 of the same machine cycle. As data bits come in from the right, 1s shift out to the left. When the 0 was initially loaded into the rightmost position arrives at the leftmost position in the shift and load SBUF. At S1P1 of the 10th machine cycle after the write to SCON that cleared RI, RECEIVE is cleared and RI is set.
More about Mode 1: Ten bits are transmitted (through TXD), or received (through RXD): a start bit (0), 8 data bits (LSB first), and a stop bit (1). On receive the stop bit goes into RB8 in SCON. In the80C51 the baud rate is determined by the Timer 1 overflow rate. In the microcontroller having Timer 2 feature, it is determined either by the Timer 1 overflow rate, or the Timer2 overflow rate, or both (one for transmit and the other for receive).Figure 2-25 shows a simplified functional diagram of the serial port in Mode 1, and associated timings for Department of ECE NOVA KK 43
transmit and receive. Transmission is initiated by any instruction that uses SBUF as a destination register. The write to SBUF signal also loads a 1 into the 9th bit position of the transmit shift register and flags the TX Control unit that a transmission is requested. Transmission actually commences at S1P1 of the machine cycle following the next rollover in thedivideby-16 counter. (Thus, the bit times are synchronized to the divide-by-16 counter, not to the write to SBUF signal). The transmission begins with activation of SEND, which puts the start bit at TXD. One bit time later, DATA is activated, which enables the output bit of the transmit shift register to TXD. The first shift pulse occurs one bit time after that. As data bits shift out to the right, zeros are clocked in from the left. When the MSB of the data byte is at the output position of the shift register, then the 1 that was initially loaded into the 9th position is just to the left of the MSB, and all positions to the left of that contain zeroes. This condition flags the TX Control unit to do one last shift and then deactivate SEND and set TI. This occurs at the 10th divide-by-16 rollover after write to SBUF. Reception is initiated by a detected 1-to-0 transition at RXD. For this purpose RXD is sampled at a rate of 16 times whatever baud rate has been established. When a transition is detected, the divide-by-16 counter is immediately reset, and 1FFH is written in to the input shift register. Resetting the divide-by-16 counter aligns its rollovers with the boundaries of the incoming bit times.
5.9 Interrupts:
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 2.7.Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that Table IX shows that bit position IE.6 is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 products .Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON.Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to
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determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows. Interrupt Enable (IE) Register:
Table 7
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Fig.4. Interrupt Sources
5.10 Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively of an inverting amplifier that can be configured for use as an on-chip oscillator, as shown in Figure Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2should be left unconnected while XTAL1 is driven, as shown in Figure There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low-time specifications must be observed.
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Fig 5 External Clock Drive Information & Crystal Oscillator Connections
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Idle Mode:
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset, the device normally resumes program execution from where it left off, up to two machine cycles before the internal reset algorithm takes control. Onchip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that invokes idle mode should not write to a port pin or to external memory. Power-down Mode:
In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the Power-down mode is terminated. Exit from Powerdown mode can be initiated either by a hardware reset or by an enabled external interrupt .Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.
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RF TECHNOLOGY
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6. RF TECHNOLOGY
6.1 Introduction:
Radio Frequency (RF) refers to that portion of the electromagnetic spectrum in which electromagnetic waves can be generated by an antenna if a changing current is applied to it. These frequencies form part of a Radio Frequency spectrum, as shown below.
Figure 6 Radio Frequency Spectrums
Each of the bands illustrated in the above figure have their own frequency range. Table below shows this range and their uses in several fields of wireless communication.
Table 8 Band Frequency Range
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6.2 OPERATIONAL STANDARD:

The simplest way in which a person can produce a RF signal would be to short a battery with a wire by continuously scratching the wire on the battery terminal. The disturbance signal created would be heard on a radio which is tuned close to the frequency of the disturbance signal. However it is of no use to create such signals since they do not contain any useful information or data. Hence in real world situations, the data to be sent is encoded within the transmitted signal so that a well designed receiver can separate the data from the signal upon reception of this signal. The decoded data can then be used to perform specified tasks. There are several methods of incorporating data into a signal that is to be transmitted. This process is known as modulation. In real world application, there are several modulation techniques, the Amplitude modulation (AM), Frequency Modulation (FM) and slight variation of AM and FM modulation such as Amplitude Shift Keying (ASK), Frequency Shift Keying (FSK) and Phase Shift Keying (PSK). It has to be highlighted that ASK, FSK and PSK are used in digital modulation. Since this project was on transmission of digital data, the transmitter chosen used the ASK modulation as a means of sending the data signal.
Stages Required for RF Communication:

At first glance, the concept of RF Communication can seem to be complicated. However, a stepwise approach to this system proves to be simpler in nature as well as more understandable to a laymen or a non-electrical student. The basic four steps for RF communication are listed below.
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I.
Encode the n bits of data to be sent into serial format. Since all data is to be
transmitted using a single antenna, the need for such a conversion is justified since all the n bits will be transmitted using this single antenna. The conversion can be done using the available encoder ICs such as Motorolas MC145026 and Holteks HT12E encoder ICs. Each IC has a limit to the number of bits of data that it can encode at a time. The above named ICs are capable of sending 4 bits of data and 8 bits of address at once. II. Send the encoded data to a transmitter. The job of a transmitter is to use any of
the types of modulation discussed in chapter 2 and transmit together with the electromagnetic waves the data that was given to it by the encoder. The transmission is done via an antenna of a specific length depending on the frequency and band at which the transmitter transmits at. III. Receive the incoming RF signal using a receiver tuned at the same frequency as
the transmitter. The receiver also descrambles the signal in order to obtain the serial form of data that was transmitted. IV. Decode the serial form of data from receiver back into its original number of bits. This conversion is done by decoder ICs available by Motorola and Holteks HT12D decoder ICs. Encoder and decoders come in pairs and each pair has to be used for proper operation. This project uses the Holteks encoder/decoder pair for RF communication.
6.3 HT12E Encoder:

6.3.1 General Description: The HT12E encoder is a CMOS IC built especially for remote control system applications. It is capable of encoding 8 bits of address (A0-A7) and 4 bits of data (AD8-AD11) information. Each address/data input can be set to one of the two logic states, 0 or 1. Grounding the pins is taken as a 0 while a high can be given by giving +5V or leaving the pins open (no connection). Upon reception of transmit enable (TE-active low), the programmed address/data are transmitted together with the header bits via an RF medium.
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6.3.2 Features: 2.4-12V Operation Low power, high noise immunity CMOS technology Low standby current of < 1A at 5V supply Built-in oscillator with only a 5% resister
6.3.3 Pin Configuration:
Figure 7 Pin Configuration of HT12E
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Table 9 Pin description
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Table Pin Descriptions for HT12E:

Electrical Characteristics:
Table 10 Electrical Characteristics for HT12E
6.4 Encoder Operation:

The encoder starts a 4 word transmission cycle upon reception of a transmit enable (TE is active low). This cycle repeats itself as long as TE is held low. Once the TE goes high, the encoder completes its final cycle and stops. As soon as a transmit enable occurs, the encoder scans and transmits the status of the 12 bits of address/data serially in the order A0 to AD11
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Encoder Operation flowchart:

The encoder operation can be represented by a flowchart as shown below in Fig 2.3
Figure 8 Encoder operation flow chart As an illustration of the way the data is sent serially, if all the 8 address lines were left open (no connection) and all 4 data lines were grounded, then the serial output would look like:
Table 11 All open circuit address lines will be read as logic high and all 4 data bits will be read as 0 since they were grounded.
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Encoder oscillation frequency:

Since the encoder comes with a built in RC oscillator, its oscillation frequency can be set by connecting a resistor between OSC1 (pin 16) and OSC2 (pin15). The oscillation frequency depends on the resistor value as well as the supply voltage, as shown in Fig. 2.4
Figure 9 Encoder oscillation graph
This project will use a 5V supply hence will use a 1MP resistor to attain a 3 kHz oscillation (as stated in the Fig. under typical oscillation frequency).
6.5 TLP434A ASK RF Transmitter Module:

5.5.1 General Description:
TLP434A is an Ultra Small Transmitter manufactured by Laipac Technology, Inc. This transmitter transmits RF signals upon reception of digital serial data from its Data In (pin2). It operates between 2.0-12V and uses the Amplitude Shift Keying modulation. Pin 4 of this transmitter can be connected directly to an appropriate antenna via a 50P resister in order to provide a power output of 14 dBm at 5V operation. Below are the Electrical characteristics of the transmitter. Out of
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the 315 MHz, 418 MHz and 433.92 MHz versions, this project used the 433.92 MHz version of the transmitter.
Stature:
Figure 10 TLP434A Transmitter and Pins Electrical characteristics:
Table 12 Electrical characteristics of transmitter
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6.6 RLP434A ASK RF Receiver Module:

6.6.1 General Description: RPL434A is a Surface Acoustic Wave (SAW) based receiver, which receives ASK modulated RF signals and outputs the serial format of data which were embedded in the received signal via its Digital data out (pin 2). It operates between 3.3S to 6.0V and also has an analog output (linear out) for received signal testing purposes of the parameters and Electrical characteristics of the receiver. Out of the 315 MHz, 418 MHz and 433.92 MHz versions, this project used the 433.92 MHz version of the receiver.
Stature:
Figure 11 RLP434A Receiver and Pins
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Electrical characteristics:
Table 13 Electrical Characteristics of receiver
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6.7 HT12D Decoder

6.7.1 General Description: The HT12D is a decoder IC made especially to pair with the HT12E encoder. It is a CMOS IC made for remote control system applications. The decoder is capable of decoding 8 bits of address (A0-A7) and 4 bits of data (AD8-AD11) information. Like the encoder, this decoders address pins can be set to logic low by grounding and set to logic high by either connecting the pins to +5V or leaving them open (no connection). The decoder receives serial addresses and data from a programmed encoder transmitted by a carrier using RF or an IR transmission medium 6.7.2 Features: 2.4 12V operation Low power and high noise immunity CMOS technology Low standby current of < 1A at 5V supply Binary address setting Three times of received address checking Built-in oscillator with only a 5% resistor Valid transmission indicator Easy interface with a RF or IR transmission medium Minimal external components
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6.7.3 Pin Configuration:
Figure12 Holtek HT12D Decoder
The major difference between encoder and decoder in pin configuration is pin10-13 which are multiplexed lines in encoder with address and data lines as shown in figure, Along with those multiplexed line pin 14 and 17 are differed from encoder as Din and VT .The decoder is capable of decoding 8 bits of address (A0-A7) and 4 bits of data (AD8-AD11) information.
6.8 Decoder operation:

HT12D receives digital serial data from its DIN (pin 14). A signal in the DIN activates the oscillator which then decodes the incoming address and data. Fig 5.2 below shows how the decoder corresponds to the data sent by the encoder.
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Figure 13 Decoder timing
After decoding, it then checks the serial input data three times continuously with its local addresses. If no error or unmatched codes are found, the input data codes are decoded and then transferred to the data output pins. The valid transmission (VT- pin 17) also goes high to indicate a successful transmission. This pin remains high for 214 = 16384 decoder clocks after the encoders DOUT pin goes low. Since the decoder operates at 150 kHz, it takes 150000-1 * 16384 = 0.1 seconds for the VT pin to go low. This pin also goes low if the address code is incorrect or no signal is received. The 4 data pins are latched to their respective pins, meaning that the previous data remains on the pins unless a new data arrives to replace the existing one.
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Decoder Operation flowchart: The decoder operation can be represented by a flowchart as shown below in Fig
Figure 14 Decoder operation flowchart
Decoder oscillation frequency: Decoder has a built in oscillator hence its clock can de set by connecting a resister between OSC1 (pin 16) and OSC2 (pin 15). The oscillation frequency depends on the resistor value as well as the power supply .This project uses a 5V supply and it is recommended by the Holtek that Oscillator frequency of decoder = 50 x oscillator frequency of encoder. Since the HT12E encoder works at 3 kHz, the decoder frequency has to be 150 kHz. This requires a 51k resistor.
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6.9 RF TRASMITTER MODULE:
Fig 15 RF transmitter module
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6.10 RF RECIEVER MODULE:
Fig 16 RF receiver module
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IR TECHNOLOGY
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7. IR TECHNOLOGY
7.1 An Introduction to Infrared Technology:
As next-generation electronic information systems evolve, it is critical that all people have access to the information available via these systems. Examples of developing and future information systems include interactive television, touch screen-based information kiosks, and advanced Internet programs. Infrared technology, increasingly present in mainstream applications, holds great potential for enabling people with a variety of disabilities to access a growing list of information resources. Already commonly used in remote control of TVs, VCRs and CD players, infrared technology is also being used and developed for remote control of environmental control systems, personal computers, and talking signs. For individuals with mobility impairments, the use of infrared or other wireless technology can facilitate the operation of information kiosks, environmental control systems, personal computers and associated peripheral devices. For individuals with visual impairments, infrared or other wireless communication technology can enable users to locate and access talking building directories, street signs, or other assistive navigation devices. For individuals using augmentative and alternative communication (AAC) devices, infrared or other wireless technology can provide an alternate, more portable, more independent means of accessing computers and other electronic information systems.
7.2 Wireless Communication:

Wireless communication, as the term implies, allows information to be exchanged between two devices without the use of wire or cable. A wireless keyboard sends information to the computer without the use of a keyboard cable; a cellular telephone sends information to another telephone without the use of a telephone cable. Changing television
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channels, opening and closing a garage door, and transferring a file from one computer to another can all be accomplished using wireless technology. In all such cases, information is being transmitted and received using electromagnetic energy, also referred to as electromagnetic radiation. One of the most familiar sources of electromagnetic radiation is the sun; other common sources include TV and radio signals, light bulbs and microwaves. To provide background information in understanding wireless technology, the electromagnetic spectrum is first presented and some basic terminology defined. The electromagnetic spectrum classifies electromagnetic energy according to frequency or wavelength (both described below). As shown in Figure 1, the electromagnetic spectrum ranges from energy waves having extremely low frequency (ELF) to energy waves having much higher frequency, such as x-rays. A typical electromagnetic wave is depicted in Figure 2, where the vertical axis represents the amplitude or strength of the wave, and the horizontal axis represents time. In relation to electromagnetic energy, frequency is: 1. the number of cycles a wave completes (or the number of times a wave repeats itself) in one second 2. expressed as Hertz (Hz), which equals once cycle per second 3. directly related to the amount of information that can be transmitted on the wave
[Figure 17 description: A sine wave is depicted in the graph in following Figure The horizontal axis of the graph represents time, and the vertical axis of the graph represents amplitude. One cycle (or one complete sine wave) is labeled on the graph.]
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Fig 17
Graphs of three different sine waves are depicted in Figure. The horizontal axis, with values ranging from 0 to 1, represents time in seconds. The vertical axis, with values ranging from -1 to 1, represents arbitrary amplitude. The first graph in the figure depicts a sine wave with a frequency of 1 cycle per second. As shown, the energy wave makes a complete cycle from 0 to its maximum positive value, then through to its maximum negative value, then back to 0. The second graph in the figure depicts a sine wave with a frequency of 2 cycles per second. The sine wave therefore makes 2 complete cycles of moving from 0 to its maximum positive value, through to its maximum negative value, and back to 0, in the same time that the wave in the first graph completes 1 cycle. The third graph in the figure depicts a sine wave with a frequency of 3 cycles per second. The sine wave therefore completes 3 full cycles in the same amount of time that the wave in the first graph completes 1 cycle.] Above Figure illustrates energy waves completing one cycle, two cycles and three cycles per second. Generally, the higher the range of frequencies (or bandwidth), the more information can be carried per unit of time. The term wavelength is used almost interchangeably with frequency. In relation to electromagnetic energy, wavelength is: 1. the shortest distance at which the wave pattern fully repeats itself 2. expressed as meters 3. commonly indicated by prefixes such as Department of ECE NOVA KK 70
a. Kilo(km)10exp3 b. Millie(mm)10exp-3 c. Nano(nm) 10exp-9
4. inversely proportional to frequency Following Figure depicts an infrared energy wave and a radio energy wave, and illustrates the two different energy wavelengths. As is expected based on the electromagnetic spectrum, the infrared wave is higher frequency and therefore shorter wavelength than the radio wave. Conversely, the radio wave is lower frequency and therefore longer wavelength than the infrared wave. Anyone who has listened to the radio while driving long distances can appreciate that longer wavelength AM radio waves carry further than the shorter wavelength FM radio waves.
Fig 18 [Above Figure description: depicts a radio frequency energy wave superimposed upon an infrared energy wave, and illustrates the inverse relationship between frequency and wavelength. The infrared energy wave completes nearly 5 and a half cycles in the time that the radio frequency wave completes 2 cycles. The wavelengths of the infrared wave and the radio wave are labeled, and the infrared wavelength is less than half the wavelength of the radio wave.]
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Uses:

Object detection Proximity detection Communication
Components & Circuits:

IR LED: emits IR signal when driven at IR rate IR detector: designed to send a "pin low" in the presence of an IR signal of specified frequency (for example, 40 kHz) with a 50% duty cycle.
Fig 19 IR circuit
7.3 Interfacing IR components to the BASIC Stamp:
Use the FREQOUT routine. FREQOUT Pin, Period, Freq1 (, Freq2)
Where:
o o
Pin is I/O pin the circuit is connected to. Period specifies the duration of the tone to generate. The unit of time depends on the Stamp type used (BS2, BS2e: 1 millisecond; BS2sx: 0.4 milliseconds).
Freq1 specifies the frequency of the first tone. The unit of frequency depends on the Stamp type used (BS2, BS2e: 1 Hz, BS2sx: 2.5 Hz).
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Freq2 is an optional second frequency which can be mixed with the first one specified. FREQOUT generates one or two "sine waves" using a pulse-width
modulation algorithm and output signal filtering. The frequency values are limited, as given in the manual, to 32767 Hz (BS2, BS2e) or 81917 Hz (BS2sx). However, if the output filtering is omitted, higher frequency components are present in the signal as well. It is possible to specify higher frequency values directly to the routine to generate such components.
Fig 20
Fig 21
The IR detector only sends a "pin low" while a suitable signal is present. Since the BASIC Stamp cannot multitask, this would seem to present a problem (you must stop the FREQOUT routine to check the pin state). However, the IR detector has a longer "rebound" time for signals of uneven on/off times (such as that produced by the unfiltered FREQOUT routine).
Object Detection (Breaking the Beam):
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Fig 23 IR object detection
Proximity Detection (Reflections): Objects which are close enough to the emitter will reflect some of the IR signal back to the detector. NOTE: dark objects absorb IR signals very well.
Fig 24 IR Proximity detection
Distance Detection: 74
The 40 kHz detector has maximal response around a frequency of 38.5 kHz. By progressively "detuning" the emitter away from this value, we can approximate a reflecting object's distance.
Fig 25 relative sensitivity vs frequency
7.4 Infrared Technology:

As depicted in Fig. infrared radiation is the region of the electromagnetic spectrum between microwaves and visible light. In infrared communication an LED transmits the infrared signal as bursts of non-visible light. At the receiving end a photodiode or photoreceptor detects and captures the light pulses, which are then processed to retrieve the information they contain. Some common applications of infrared technology are listed below. 1. Augmentative communication devices 2. Car locking systems
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3. Computers a.Mouse b.Keyboards c.Floppydiskdrives d. Printers 4. Emergency response systems 5. Environmentalcontrolsystems a.Windows b.Doors c.Lights d.Curtains e.Beds f. Radios 6. Headphones 7. Home security systems 8. Navigation systems 9. Signage 10. Telephones 11. TVs, VCRs, CD players, stereos 12. Toys Infrared technology offers several important advantages as a form of wireless communication. Advantages and disadvantages of IR are first presented, followed by a comparative listing of radio frequency (RF) advantages and disadvantages.
7.5 IR Advantages:
1. Low power requirements: therefore ideal for laptops, telephones, personal digital assistants 2. Low circuitry costs: $2-$5 for the entire coding/decoding circuitry 3. Simple circuitry: no special or proprietary hardware is required, can be incorporated into the integrated circuit of a product
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4. Higher security: directionality of the beam helps ensure that data isn't leaked or spilled to nearby devices as it's transmitted 5. Portable 6. Few international regulatory constraints: IrDA (Infrared Data Association) functional devices will ideally be usable by international travelers, no matter where they may be 7. High noise immunity: not as likely to have interference from signals from other devices
7.6 IR Disadvantages:
1. Line of sight: transmitters and receivers must be almost directly aligned (i.e. able to see each other) to communicate 2. Blocked by common materials: people, walls, plants, etc. can block transmission 3. Short range: performance drops off with longer distances 4. Light, weather sensitive: direct sunlight, rain, fog, dust, pollution can affect transmission 5. Speed: data rate transmission is lower than typical wired transmission
7.7 RF Advantages:
1. Not line of sight 2. Not blocked by common materials: can penetrate most solids and pass through walls 3. Longer range 4. Not light sensitive 5. Not as sensitive to weather/environmental conditions
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7.8 RF Disadvantages:
1. Interference: communication devices using similar frequencies - wireless phones, scanners, wrist radios and personal locators can interfere with transmission 2. Lack of security: easier to "eavesdrop" on transmissions since signals are spread out in space rather than confined to a wire 3. Higher cost than infrared 4. Federal Communications Commission(FCC) licenses required for some products 5. Lower speed: data rate transmission is lower than wired and infrared transmission In addition to the above noted advantages and disadvantages of IR and RF technology, there are other issues that are also pertinent to the consideration of wireless communication systems. Health, safety and security issues are now discussed.
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DC MOTOR
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8. DC MOTORS
8.1 Introduction:
DC motors are fairly simple to understand. They are also simple to make and only require a battery or dc supply to make them run. The brushed DC motor will generate torque directly from DC power applied to the motor leads. Brushed DC motors require a significant amount of maintenance to work properly. This involves replacing the brushes and springs which carry the electric current as well as cleaning or replacing the commutator. Many of the limitations of the classic commutator DC motor are due to the need for brushes to press against the commutator. This creates friction. At higher speeds, brushes have increasing difficulty in maintaining contact. Brushes may bounce off the irregularities in the commutator surface, creating sparks. This limits the maximum speed of the machine. The current density per unit area of the brushes limits the output of the motor. Brushes eventually wear out and require replacement, and the commutator itself is subject to wear and maintenance. The commutator assembly on a large machine is a costly element, requiring precision assembly of many parts.
8.2 Brushless DC motor:

In this motor, the mechanical "rotating switch" or commutator/ brush gear assembly is replaced by an external electronic switch synchronized to the rotor's position. Brushless motors are typically 85-90% efficient, whereas DC motors with brush gear are typically 75-80% efficient.
Figure 26 Brushless Dc Motor
Synchronous types, like the brushless DC motor and the stepper motor will lock up on DC power, and require external commutation to generate torque. Advantages of the brushless motor include long life span, little or no maintenance, and good efficiency. Disadvantages include high cost and more complicated motor speed controllers. Brushless motors use a rotating permanent magnet and Department of ECE NOVA KK 80
with stationary electrical magnets on the motor housing. This eliminates the complication of getting power to a rotating system. It has a permanent magnet external rotor, three phases of driving coils, one or more Hall effect sensors to sense the position of the rotor, and the associated drive electronics. The coils are activated, one phase after the other, by the drive electronics as cued by the signals from the Hall effect sensors. In effect, they act as three-phase synchronous motors containing their own variable-frequency drive electronics. A specialized class of brushless DC motor controllers utilizes EMF feedback through the main phase connections instead of Hall Effect sensors to determine position and velocity. In a BLDC motor, the electromagnets do not move, instead, the permanent magnets rotate and the armature remains static. The brush-system/commutator assembly is replaced by an electronic controller. The controller performs the same power distribution found in a brushed DC motor, but using a solid-state circuit rather than a commutator/brush system. BLDC motors are often more efficient at converting electricity into mechanical power than brushed DC motors. This improvement is largely due to the absence of electrical and friction losses due to brushes. The enhanced efficiency is greatest in the no-load and low-load region of the motor's performance curve. Brushless DC motors are commonly used where precise speed control is necessary, computer disk drives or in video cassette recorders the spindles within CD, CD-ROM (etc.) drives, and mechanisms within office products such as fans, laser printers and photocopiers. They have several advantages over conventional motors: Compared to AC fans using shaded-pole motors, they are very efficient, running much cooler than the equivalent AC motors. This cool operation leads to much-improved life of the fan's bearings. Without a commutator to wear out, the life of a DC brushless motor can be significantly longer compared to a DC motor using brushes and a commutator. Commutation also tends to cause a great deal of electrical and RF noise; without a commutator or brushes, a brushless motor may be used in electrically sensitive devices like audio equipment or computers.
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The same Hall effect sensors that provide the commutation can also provide a convenient tachometer signal for closed-loop control (servo-controlled) applications. In fans, the tachometer signal can be used to derive a "fan OK" signal. The motor can be easily synchronized to an internal or external clock, leading to precise speed control. Brushless motors have no chance of sparking, unlike brushed motors, making them better suited to environments with volatile chemicals and fuels. Brushless motors are usually used in small equipment such as computers and are generally used to get rid of unwanted heat.
8.3 FEATURES BRUSHLESS DC MOTOR:

Long life span and no maintenance High efficiency(85-90) High reliability Noise reduction and elimination of commutator losses High cost Complexity of motor speed control Require external communication like controller to generate torque Transferring of power from driver to rotor is easy It consists of permanent magnets external to rotor 3-phase driving coils One or more hall effect sensor Uses where exact speed control is necessary
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8.4 L293DNE DRIVER:

Because of induction of the windings, power requirements, and temperature management, some glue circuitry is necessary between digital controllers and motor. In our project to interface DC motor with microcontroller we use L293D driver. L293D are quadruple high-current half-H drivers. The L293 is designed to provide bidirectional drive currents of up to 1 A at voltages from 4.5 V to 36 V. The L293D is designed to provide bidirectional drive currents of up to 600-mA at voltages from 4.5 V to 36 V. Both devices are designed to drive inductive loads such as relays, solenoids, DC. All inputs are TTL compatible. Each output is a complete totem-pole drive circuit, with a Darlington transistor sink and a pseudo- Darlington source. Drivers are enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high, the associated drivers are enabled, and their outputs are active in phase with their inputs. When the enable input is low, those drivers are disabled, and their outputs are off and in the high-impedance state.
Figure 27 Pin Diagram of L293DNE
Figure 28 Internal Block Diagram of L293D
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Figure 29 Input and Output Compatibles
8.5 FEATURES OF L293DNE:

Used has Dc motor driver Supply voltage range 4.5V to 36V High current half H drivers High noise immunity input Out put current of 600mA per channel Out put peak current of 1.2mA per channel Thermal shut down Output clamp diodes for inductive transient suppression Input circuit are TTL compatible Output circuit are totem pole with Darlington transistor pair Maximum input voltage is 7V Output voltage range is -3V to 39V Storage temperature range is -65 to 150C It is a 16 pin DIP IC configuration
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8.6 DC MOTOR INTERFACING WITH L293DNE:

By using single 16 pin L293D driver we can interface 2 dc motor. In our project we use 2 Dc motors one for front wheels used to turn left or right and other for movement of motor as forward and reverse direction. For one motor we give two inputs to rotate forward and backward directions or to turn right/left. Below figure is an example for interfacing a single Dc motor to L293DNE driver. Where 2 & 7 pin of L293DNE are inputs from microcontroller ports these input are enable only when 1pin of L293D is high and 3 & 6 pins of L293D are inputs to dc motor. Diodes used externally for inductive transient suppression. Supply is from power supply generator. In this when enable low then motor stops and when enable is high and both inputs are same that is either high or low then also motor stops. It works only when one input is high and enable is high.
Figure 30 Interfacing of DC Motor with L293DNE
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POWER SUPPLY
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9. POWER SUPPLY
The input to the circuit is applied from the regulated power supply. The a.c. input i.e., 230V from the mains supply is step down by the transformer to 12V and is fed to a rectifier. The output obtained from the rectifier is a pulsating d.c voltage. So in order to get a pure d.c voltage, the output voltage from the rectifier is fed to a filter to remove any a.c components present even after rectification. Now, this voltage is given to a voltage regulator to obtain a pure constant dc voltage.
230V AC 50Hz
D.C Output
Step down transformer
Bridge Rectifier Filter Fig 31 Power supply block diagram Regulator
9.1 Transformer:
Usually, DC voltages are required to operate various electronic equipment and these voltages are 5V, 9V or 12V. But these voltages cannot be obtained directly. Thus the a.c input available at the mains supply i.e., 230V is to be brought down to the required voltage level. This is done by a transformer. Thus, a step down transformer is employed to decrease the voltage to a required level.
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9.2 Rectifier:
The output from the transformer is fed to the rectifier. It converts A.C. into pulsating D.C. The rectifier may be a half wave or a full wave rectifier. In this project, a bridge rectifier is used because of its merits like good stability and full wave rectification.
Fig 32 rectifier The Bridge rectifier is a circuit, which converts an ac voltage to dc voltage using both half cycles of the input ac voltage. The Bridge rectifier circuit is shown in the figure. The circuit has four diodes connected to form a bridge. The ac input voltage is applied to the diagonally opposite ends of the bridge. The load resistance is connected between the other two ends of the bridge. For the positive half cycle of the input ac voltage, diodes D1 and D3 conduct, whereas diodes D2 and D4 remain in the OFF state. The conducting diodes will be in series with the load resistance RL and hence the load current flows through RL. For the negative half cycle of the input ac voltage, diodes D2 and D4 conduct whereas, D1 and D3 remain OFF. The conducting diodes D2 and D4 will be in series with the load resistance RL and hence the current flows through RL in the same direction as in the previous half cycle. Thus a bi-directional wave is converted into a unidirectional wave.
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9.3 Filter:
Capacitive filter is used in this project. It removes the ripples from the output of rectifier and smoothens the D.C. Output received from this filter is constant until the mains voltage and load is maintained constant. However, if either of the two is varied, D.C. voltage received at this point changes. Therefore a regulator is applied at the output stage.
Fig 33 Bridge rectifier
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9.4 Voltage regulator:

As the name itself implies, it regulates the input applied to it. A voltage regulator is an electrical regulator designed to automatically maintain a constant Voltage level in this project, power supply of 5V and 12V are required. In order to obtain these voltage levels, 7805 and 7812 voltage regulators are to be used. The first number 78 represents positive supply and the numbers 05, 12 represent the required output voltage levels.
Fig 34 regulator
Fig 35 regulator ckt diagram
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DESCRIPTION OF SOFTWARES USED
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10 .DESCRIPTION OF SOFTWARES USED

10.1Keil Software:
Installing the Keil software on a Windows PC Insert the CD-ROM in your computers CD drive On most computers, the CD will auto run, and you will see the Keil installation menu. If the menu does not appear, manually double click on the Setup icon, in the root directory: you will then see the Keil menu. On the Keil menu, please select Install Evaluation Software. (You will not require a license number to install this software). Follow the installation instructions as they appear.
Loading the Projects
Configuring the Simulator Open the Keil Vision2
Go to Project Open Project and browse for Hello in Ch03_00 in Pont and open it.
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Go to Project Select Device for Target Target1
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Select 8052(all variants) and click OK
Now we need to check the oscillator frequency: Go to project Options for Target Target1
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Make sure that the oscillator frequency is 12MHz.
Building the Target
Build the target as illustrated in the figure below
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Running the Simulation Having successfully built the target, we are now ready to start the debug session and run the simulator. First start a debug session
The flashing LED we will view will be connected to Port 1. We therefore want to observe the activity on this port
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To ensure that the port activity is visible, we need to start the periodic window update flag
Go to Debug - Go
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While the simulation is running, view the performance analyzer to check the delay durations.
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Go to Debug Performance Analyzer and click on it
Double click on DELAY_LOOP_Wait in Function Symbols: and click Define button
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About Keil
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13.
Click on the Keil u Vision Icon on Desktop Click on the Project menu from the title bar Then Click on New Project Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\ Then Click on Save button above. Select the component for u r project. i.e. Atmel Click on the + Symbol beside of Atmel Select AT89C51 Then Click on OK Then Click either YES or NOmostly NO Now your project is ready to USE Now double click on the Target1, you would get another option Source group 1 Click on the file option from menu bar and select new
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14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27.
The next screen will be as shown in next page, and just maximize it by double clicking on its blue boarder. Now start writing program in either in C or ASM For a program written in Assembly, then save it with extension . asm and for C based program save it with extension .C Now right click on Source group 1 and click on Add files to Group Source Now you will get another window, on which by default C files will appear. Now select as per your file extension given while saving the file Click only one time on option ADD Now Press function key F7 to compile. Any error will appear if so happen.If the file contains no error, then press Control+F5 simultaneously. The new window is as follows Then Click OK Now Click on the Peripherals from menu bar, and check your required port Drag the port a side and click in the program file. Now keep Pressing function key F11 slowly and observe. You are running your program successfully
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10.2 Flash Magic:

Flash Magic is Windows software from that microcontroller is easyly programmed using In-System Programming technology to all the ISP feature empowered devices.
After installing the software when we click on the icon of the software the window will open on the screen as shown in figure. We need to change the device and have to select the device 89V51RD2 , and then we set to erase all flash option on the flash magic window.
If we need to verify the proper dumping of the program in the microcontroller then we need to set the verify after program option.
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Loading of hex file: After selecting device we load the hex file in the given block by using the browse option on the FLASH MAGIC window..
Programming of device: after loading the file next step is dumping of code in microcontroller. For that we first connect the computers serial port to your controller board through serial cable. Then after give the power supply to the controller board.. Now its time to dump the code in controller.. Press the start option on your flash magic window. Then your microcontroller will be programmed in few seconds.
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CONCLUSION
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11. CONCLUSION
The fatality rate of man is increasing day by day due to many reasons. One of the most important reasons is accidents. Lakh of people are losing their lives across the world due to these deadly accidents. Governments made several rules to avoid these accidents but they just remained for papers only. Even the people became so careless about their lives. So to prevent these accidents we took the help of modern technology. Our project helps to avoid accidents by providing automatic speed control for vehicles by RF radio communication by installing these equipments in vehicles and providing transmitters at every accident prone area like highways, junctions, U turns, school zones etc
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BIBILOGRAPHY
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12. BIBILOGRAPHY
The 8051 Micro controller and Embedded Systems Muhammad Mazidi Janice Mazidi The 8051 Micro controller Architecture, Programming & Applications Kenneth J. Ayala Gillispie Ali
Electronic Components
D.V.Prasad
REFERENCES ON THE WEB:
www.national.com www.atmel.com www.wikipedia.com
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VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

BACHELOR OF TECHNOLOGY IN ELECTRONICS AND COMMUNICATION ENGINEERING BY

S.Sivaji M.Yamini Chandra

Under the Guidance of M.H.S PAVANKUMAR (Associate/Assistant/Professor)

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Project Guide Department

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

S.Sivaji M.Yamini Chandra

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

9.1 TRANSFORMER 9.2 RECTIFIER 9.3 FILTER 9.4 VOLTAGE REGULATOR

11. CONCLUSION 12 .BIBILOGRAPHY

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Fig i block diagram of transmitter section

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Power Supply RF receiver

M1 L293DNE Driver AT 89S52 M2

Fig ii block diagram of receiver section

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Processors in embedded systems:

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Modeling and code generating tools often based on state machines

Software tools can come from several sources:

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Immunity Aware Programming

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM

Department of ECE NOVA KK

VECHILE ACCIDENT PREVENTION USING AUTOMATIC SPEED CONTROL SYSTEM