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DATA SHEET
Philips Semiconductors
Objective specication
TDA9181
The TDA9181 is a an adaptive PAL/NTSC comb filter with two internal delay lines, filters, clock control and input clamps. Video standards PAL B, G, H, D, I, M and N and NTSC M are supported. Two CVBS input signals can be selected by means of an input switch. The selected CVBS input signal is filtered to obtain a combed luminance output signal and a combed chrominance output signal. Switched capacitor circuit techniques are used, requiring an internal clock, locked on to the colour subcarrier frequency. The colour subcarrier frequency as well as twice the colour subcarrier frequency may be applied to the IC. In addition to the comb filter the circuit contains an output switch so that a selection can be made between the combed CVBS signal and an external Y/C signal. The IC is available in a DIP16 and SO16 package. The supply voltage is 5 V.
QUICK REFERENCE DATA SYMBOL VCCA ICCA VDDD IDDD Vi(Y/CVBS)(p-p) Vi(CIN)(p-p) Vi(FSC)(p-p) Vo(Y/CVBS)(p-p) Vo(CIN)(p-p) analog supply voltage analog supply current digital supply voltage digital supply current luminance or CVBS input signal voltage (peak-to-peak value) chrominance input signal voltage (peak-to-peak value) colour subcarrier input signal voltage (peak-to-peak value) luminance or CVBS output signal voltage (peak-to-peak value) chrominance output signal voltage (peak-to-peak value) PARAMETER MIN. 4.5 4.5 0.7 100 0.6 TYP. 5.0 25 5.0 10 1.0 0.7 200 1.0 0.7 MAX. 5.5 5.5 1.4 1.0 400 1.54 1.1 UNIT V mA V mA V V mV V V
ORDERING INFORMATION TYPE NUMBER TDA9181P TDA9181T PACKAGE NAME DIP16 SO16 DESCRIPTION plastic dual in-line package; 16 leads (300 mil); long body plastic small outline package; 16 leads; body width 7.5 mm VERSION SOT38-4 SOT162-1
2000 Nov 22
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handbook, full pagewidth
BLOCK DIAGRAM
Philips Semiconductors
VCCA 6
VDDD 5 14
INPSEL Y/CVBS1
2 12 Y/CVBSOUT
LPF
Y/CVBS2
CLAMP
LPF
TDA9181
1 7 FILTER TUNING (LPFs) 9 4 fsc CLOCK GENERATOR
16
COUT
3
CIN SC SANDCASTLE DETECTOR
11
10
13
15
FSC
FSCSEL
SYS1
SYS2
MGT518
Objective specication
TDA9181
Philips Semiconductors
Objective specication
TDA9181
DESCRIPTION chrominance signal input input switch select input luminance or CVBS signal 2 input digital ground digital supply voltage analog supply voltage sandcastle signal input colour subcarrier select input colour subcarrier input signal standard select 2 input standard select 1 input luminance or CVBS signal 1 input analog ground (signal reference) luminance or CVBS signal output output switch select input chrominance signal output
handbook, halfpage
CIN 1
handbook, halfpage
CIN 1
TDA9181P
VDDD 5 VCCA 6 SC 7 FSCSEL 8
MGT519
TDA9181T
12 Y/CVBS1 11 SYS1 10 SYS2 9 FSC VDDD 5 VCCA 6 SC 7 FSCSEL 8
MGT520
2000 Nov 22
Philips Semiconductors
Objective specication
TDA9181
The luminance output switch selects between the reconstructed combed luminance signal and one of the buffered and clamped input signals, Y/CVBS1 or Y/CVBS2. The chrominance output switch selects between the reconstructed combed chrominance signal and the chrominance input signal (CIN). An external coupling capacitor is needed for CIN. The selected signals are applied to the outputs Y/CVBSOUT and COUT respectively via a buffer stage. The output switch signal (OUTSEL) determines whether the output switches select the internal combed signals or the external Y/C signals. Clock generation and lter tuning The clock generator is driven by a Phase-Locked Loop (PLL) circuit which generates a reference frequency of four times the colour subcarrier frequency. This PLL circuit is phase-locked to the colour subcarrier input signal (FSC). Several internal clock signals are derived from the 4 fSC reference. The filter tuning ensures the automatic alignment of the anti-alias and the reconstruction low-pass filters. A 4 fSC clock signal is used as a reference for the alignment. The tuning takes place each line during the line blanking and is initiated by means of an internally generated signal which is derived from the sandcastle input signal. If the output switches select external Y/C signals the oscillator of the PLL circuit is stopped regardless of the FSC input and no internal clock signals are generated. The filter tuning is also stopped.
2000 Nov 22
Philips Semiconductors
Objective specication
TDA9181
1. If the OUTSEL pin is left open-circuit, the pin is pulled LOW by means of an internal pull-down resistor to analog ground (AGND). Thus the COMB mode can also be selected by not connecting the OUTSEL pin. Table 2 Y/CVBSOUT output signal denitions MODE COMB YC Table 3 Y/CVBSOUT OUTPUT SIGNAL comb ltered luminance signal Y/CVBS1 or Y/CVBS2 signal COUT output signal denitions MODE COMB YC Table 4 COUT OUTPUT SIGNAL comb ltered chrominance signal CIN signal Input switch mode denitions; note 1 INPUT SWITCH MODE Y/CVBS1 input selected Y/CVBS2 input selected
1. If the FSCSEL pin is left open-circuit, the pin is pulled LOW by means of an internal pull-down resistor to analog ground (AGND). Thus the fSC mode can also be selected by not connecting the FSCSEL pin. Table 6 Video standard mode denitions; note 1 PIN SYS2 LOW HIGH LOW HIGH VIDEO STANDARD PAL M PAL B, G, H, D or I NTSC M PAL N
1. If the SYS1 and SYS2 pins are left open-circuit, the SYS1 pin is pulled HIGH by means of an internal pull-up resistor to analog supply (VCCA) and the SYS2 pin is pulled LOW by means of an internal pull-down resistor to analog ground (AGND). Thus the NTSC M video standard can also be selected by not connecting pins SYS1 and SYS2.
1. If the INPSEL pin is left open-circuit, the pin is pulled LOW by means of an internal pull-down resistor to analog ground (AGND). Thus the Y/CVBS1 input can also be selected by not connecting the INPSEL pin.
2000 Nov 22
Philips Semiconductors
Objective specication
TDA9181
MAX. 5.5 5.5 VDD + 0.3 +150 +70 260 150 +3000 +300
UNIT V V V C C C C V V
2000 Nov 22
Philips Semiconductors
Objective specication
TDA9181
CHARACTERISTICS VCCA = VDDD = 5 V; Tamb = 25 C; input signal Y/CVBS1 = 1 V (p-p); input signal Y/CVBS2 = 1 V (p-p); input signal CIN = 0.7 V (p-p); input signal FSC = 200 mV (p-p) sine wave at fSC; input signal SC = 5 V (p-p) sandcastle signal; test signal: 100/0/75/0 EBU colour bar for PAL B, G, H, D, I and N, 100% white 75% amplitude FCC colour bar for NTSC M and PAL M; source impedance for Y/CVBS1 and Y/CVBS2 = 75 , coupled with 10 nF; source impedance for CIN and FSC = 75 , coupled with 100 nF; load impedance for CVBS/YOUT and COUT = 15 pF to analog ground (pin AGND); all voltages are related to analog ground (pin AGND); unless otherwise specied. SYMBOL Supplies VCCA ICCA VDDD IDDD P analog supply voltage analog supply current digital supply voltage digital supply current power dissipation 4.5 4.5 5.0 25 5.0 10 175 5.5 5.5 V mA V mA mW PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Luminance or CVBS input 1 and input 2; pins Y/CVBS1 and Y/CVBS2 Vi(Y/CVBS)(p-p) tclamp(Y/CVBS) Ii(Y/CVBS) luminance or CVBS input voltage (peak-to-peak value) clamp time constant input current during clamping during active video Chrominance input; pin CIN Vi(CIN)(p-p) Ri(CIN) Vi(FSC)(p-p) D Ri(FSC) Vi(SC) tW tW(rep) Ri(SC) Ci(SC) VIL VIH Ri(INPSEL) Ci(INPSEL) 2000 Nov 22 chrominance input voltage (peak-to-peak value) input resistance 30 0.7 200 50 1.0 400 60 3.3 2.6 2 V k including sync 0.7 10 10 1.0 20 0 0 1.4 +10 +10 V lines A nA
Colour subcarrier input; pin FSC subcarrier input voltage (peak-to-peak value) duty cycle input resistance square wave 100 40 30 3.7 2.6 1 Y/CVBS1 selected Y/CVBS2 selected 2.0 100 8 mV % k
Sandcastle input; pin SC sandcastle input voltage pulse width pulse rising edge position input resistance input capacitance no clamping clamping clamping; note 1 with respect to end of line-blanking; note 1 V V s s M pF
Input switch select input; pin INPSEL LOW-level input voltage HIGH-level input voltage input resistance input capacitance 0.5 2 V V k pF
Philips Semiconductors
Objective specication
TDA9181
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Output switch select input; pin OUTSEL VIL VIH Ri(OUTSEL) Ci(OUTSEL) VIL VIH Ri(FSCSEL) Ci(FSCSEL) VIL VIH Ri(SYS) Ci(SYS) LOW-level input voltage HIGH-level input voltage input resistance input capacitance COMB mode YC mode 0.5 2 V V k pF 2.0 100 fSC at FSC input; note 2 2 fSC at FSC input 2.0 100 2.0 100
Colour subcarrier select input; pin FSCSEL LOW-level input voltage HIGH-level input voltage input resistance input capacitance 0.5 2 V V k pF
Standard select inputs 1 and 2; pins SYS1 and SYS2 LOW-level input voltage HIGH-level input voltage input resistance input capacitance 0.5 2 V V k pF
Luminance output; pin Y/CVBSOUT Vo(Y/CVBSOUT)(p-p) EG(Y) B3dB(Y) luminance output signal (peak-to-peak value) luminance gain error 3 dB luminance bandwidth COMB mode; PAL B, G, H, D and I COMB mode; NTSC M, PAL M and N YC mode td(proc)(Y) luminance processing delay COMB mode; PAL B, G, H, D and I; note 3 COMB mode; NTSC M, PAL M and N; note 3 YC mode Vclamp Ebl S/N ct fCLK(res)(Y) voltage level during clamping black level error luminance signal-to-noise ratio (1 V/Vrms noise) crosstalk between different inputs residues of clock frequencies in the luminance signal (Vrms/1 V) during blanking; note 4 unweighted; 200 kHz to 5 MHz 0 to 5 MHz COMB mode; note 2 f = 4 fSC f = 2 fSC f = 1.33 fSC f = fSC 30 30 30 40 dB dB dB dB including sync 0.6 1 6 5 10 10 56 1.0 0 650 800 15 1.5 0 1.54 +1 +10 50 V dB MHz MHz MHz ns ns ns V mV dB dB
2000 Nov 22
Philips Semiconductors
Objective specication
TDA9181
SYMBOL FSCres(YC)
MIN.
TYP.
MAX. 60 60
UNIT dB dB dB
f = 2 fSC; 2 fSC at FSC input ct crosstalk suppression at vertical transient black multi-burst [1 V/V (p-p)] suppression (comb depth) with respect to luminance band-pass nearest to fSC vertical transition active 26 video vertical blanking; Figs 6 and 7; note 5 COMB mode; PAL B, G, H, D and I; note 2 and Fig.8 f = fSC 283.75 74 f = ------------------------------ f SC 283.75 283.75 + 74 f = ------------------------------ f SC 283.75 COMB mode; PAL M; note 2 and Fig.9 f = fSC 227.25 59 f = ------------------------------ f SC 227.25 227.25 + 59 f = ------------------------------ f SC 227.25 COMB mode, PAL N; see note 2 and Fig.10 f = fSC 229.25 59 f = ------------------------------ f SC 229.25 229.25 + 59 f = ------------------------------ f SC 229.25 COMB mode, NTSC M; see note 2 and Fig.11 f = fSC 227.5 59 f = -------------------------- f SC 227.5 227.5 + 59 f = --------------------------- f SC 227.5 Ro ZL output resistance load impedance 30 30 30 30
SUPcomb(Y)
10 10
dB dB dB
10 10
dB dB dB
10 10
dB dB dB
10 10
500 15
dB dB dB pF
2000 Nov 22
10
Philips Semiconductors
Objective specication
TDA9181
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Chrominance output; pin COUT Vo(COUT)(p-p) EG(chrom) B3dB(chrom) chrominance output signal (peak-to-peak value) chrominance gain error 3 dB chrominance bandwidth difference with luminance processing delay DC voltage level chrominance signal-to-noise ratio (0.7 V/Vrms noise) crosstalk between different inputs residues of clock frequencies in the chrominance signal (Vrms/0.7 V) unweighted; fSC 0.3fSC; note 2 0 to 5 MHz COMB mode; note 2 f = 4 fSC f = 2 fSC f = 1.33 fSC f = fSC FSCres(YC) FSC residue in YC mode (Vrms/0.7 V) f = fSC; fSC at FSC input; note 2 30 30 40 50 60 60 dB dB dB dB dB dB dB 0.7 0 0 1.5 1.1 +1 20 50 V dB MHz MHz ns V dB dB
f = 2 fSC; 2 fSC at FSC input ct crosstalk suppression at vertical transient no-colour colour [0.7 V/V (p-p)] vertical transition active 26 video vertical blanking; see Figs 6 and 7 and note 6
2000 Nov 22
11
Philips Semiconductors
Objective specication
TDA9181
SYMBOL SUPcomb(chrom)
CONDITIONS COMB mode; PAL B, G, H, D and I; note 2 and Fig.12 284 f = ----------------- f SC 283.75 284 74 f = --------------------- f SC 283.75 284 + 74 f = ---------------------- f SC 283.75 COMB mode; PAL M; see note 2 and Fig.13 227 f = ----------------- f SC 227.25 227 59 f = --------------------- f SC 227.25 227 + 59 f = ---------------------- f SC 227.25 COMB mode; PAL N; see note 2 and Fig.14 229 f = ----------------- f SC 229.25 229 59 f = --------------------- f SC 229.25 229 + 59 f = ---------------------- f SC 229.25 COMB mode; NTSC M; see note 2 and Fig.15 227 f = -------------- f SC 227.5 227 59 f = --------------------- f SC 227.5 227 + 59 f = ---------------------- f SC 227.5
MIN.
TYP.
MAX.
UNIT
30 30 30
dB dB dB
30 30 30
dB dB dB
30 30 30
dB dB dB
30 30 30
500 15
dB dB dB pF
Ro ZL
2000 Nov 22
12
Philips Semiconductors
Objective specication
TDA9181
1. The pulse should fall inside the line-blanking interval, after the rising edge of the synchronizing pulse. 2. fSC = colour subcarrier frequency; fSC = 4.43361875 MHz for the PAL B, G, H, D and I systems; fSC = 3.57561149 MHz for the PAL M system; fSC = 3.58205625 MHz for the PAL N system; fSC = 3.579545 MHz for the NTSC M system. 3. For PAL B, G, H, D and I: with respect to 567.5 colour subcarrier periods (equals 128.00 s) due to 2H delay in the comb filter. For PAL M: with respect to 454.5 colour subcarrier periods (equals 127.11 s) due to 2H delay in the comb filter. For PAL N: with respect to 458.5 colour subcarrier periods (equals 128.00 s) due to 2H delay in the comb filter. For NTSC M: with respect to 227.5 colour subcarrier periods (equals 63.556 s) due to 1H delay in the comb filter. 4. With respect to the voltage level during clamping. 5. Test signal for PAL B, G, H, D, I and N: CCIR-18 multi-burst (see Fig.4). For PAL M and NTSC M: 100% amplitude FCC multi-burst (see Fig.5). 6. Test signal for PAL B, G, H, D, I and N: 100/0/75/0 EBU colour bar. For PAL M and NTSC M: 100% white 75% amplitude FCC colour bar.
0.65
0.45 0.44
0.30
0.15
0
MGT521
2000 Nov 22
13
Philips Semiconductors
Objective specication
TDA9181
1 (V)
0.5
1.5
2.0
3.0
3.58
4.1
MHz
0.65
0.45
0.30
0.15
0
MGT522
2000 Nov 22
14
Philips Semiconductors
Objective specication
TDA9181
input
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
output
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
crosstalk
input
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
output
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
crosstalk
MGT523
Fig.6 Vertical transitions active video vertical blanking from line to line (PAL systems).
input
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
output
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
input
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
output
line n 2
line n 1
line n
line n + 1
line n + 2
line n + 3
MGT524
Fig.7 Vertical transitions active video vertical blanking from line to line (NTSC system).
2000 Nov 22
15
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 282.75 f 283.75 SC 283 f 283.75 SC 283.25 f 283.75 SC 283.5 f 283.75 SC 283.75 f 283.75 SC 284 f 283.75 SC 284.25 f 283.75 SC 284.5 f 283.75 SC 284.75 f 283.75 SC
MGT525
2000 Nov 22
16
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 226.25 f 227.25 SC 226.5 f 227.25 SC 226.75 f 227.25 SC 227 f 227.25 SC 227.25 f 227.25 SC 227.5 f 227.25 SC 227.75 f 227.25 SC 228 f 227.25 SC 228.25 f 227.25 SC
MGT526
2000 Nov 22
17
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 228.25 f 229.25 SC 228.5 f 229.25 SC 228.75 f 229.25 SC 229 f 229.25 SC 229.25 f 229.25 SC 229.5 f 229.25 SC 229.75 f 229.25 SC 230 f 229.25 SC 230.25 f 229.25 SC
MGT527
2000 Nov 22
18
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 225.5 f 227.5 SC 226 f 227.5 SC 226.5 f 227.5 SC 227 f 227.5 SC 227.5 f 227.5 SC 228 f 227.5 SC 228.5 f 227.5 SC 229 f 227.5 SC 229.5 f 227.5 SC
MGT528
2000 Nov 22
19
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 282.75 f 283.75 SC 283 f 283.75 SC 283.25 f 283.75 SC 283.5 f 283.75 SC 283.75 f 283.75 SC 284 f 283.75 SC 284.25 f 283.75 SC 284.5 f 283.75 SC
MGT529
2000 Nov 22
20
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 226.25 f 227.25 SC 226.5 f 227.25 SC 226.75 f 227.25 SC 227 f 227.25 SC 227.25 f 227.25 SC 227.5 f 227.25 SC 227.75 f 227.25 SC 228 f 227.25 SC
MGT530
2000 Nov 22
21
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 228.25 f 229.25 SC 228.5 f 229.25 SC 228.75 f 229.25 SC 229 f 229.25 SC 229.25 f 229.25 SC 229.5 f 229.25 SC 229.75 f 229.25 SC 230 f 229.25 SC
MGT531
2000 Nov 22
22
Philips Semiconductors
Objective specication
TDA9181
0.5
0 0 1 f SC 2 f SC
0.5
0 225.5 f 227.5 SC 226 f 227.5 SC 226.5 f 227.5 SC 227 f 227.5 SC 227.5 f 227.5 SC 228 f 227.5 SC 228.5 f 227.5 SC 229 f 227.5 SC
MGT532
2000 Nov 22
23
Philips Semiconductors
Objective specication
TDA9181
C1 CIN 100 nF INPSEL C3 Y/CVBS2 L5 220 H 10 nF C4 100 nF 5 L6 5V 220 H SC FSCSEL C6 100 nF 6 7 8 11 10 C9 9 100 nF FSC 3 4 14 13 Y/CVBSOUT 2 15 1 16 COUT OUTSEL
TDA9181
12
MGT533
2000 Nov 22
24
Philips Semiconductors
Objective specication
TDA9181
SOT38-4
D seating plane
ME
A2
A1
c Z e b1 b 16 9 b2 MH w M (e 1)
pin 1 index E
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.030
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
2000 Nov 22
25
Philips Semiconductors
Objective specication
TDA9181
SOT162-1
A X
c y HE v M A
Z 16 9
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT162-1 REFERENCES IEC 075E03 JEDEC MS-013 EIAJ EUROPEAN PROJECTION A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 10.5 10.1 0.41 0.40 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
8o 0o
2000 Nov 22
26
Philips Semiconductors
Objective specication
TDA9181
Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. For packages with leads on two sides and a pitch (e): larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. MANUAL SOLDERING Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. 27
2000 Nov 22
Philips Semiconductors
Objective specication
TDA9181
SOLDERING METHOD MOUNTING PACKAGE WAVE Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. suitable(2) not suitable not suitable(3) suitable not recommended(4)(5) not recommended(6) REFLOW(1) DIPPING suitable suitable suitable suitable suitable suitable
2000 Nov 22
28
Philips Semiconductors
Objective specication
TDA9181
This data sheet contains the design target or goal specications for product development. Specication may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains nal specications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specication
Qualication
Product specication
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2000 Nov 22
29
Philips Semiconductors
Objective specication
TDA9181
2000 Nov 22
30
Philips Semiconductors
Objective specication
TDA9181
2000 Nov 22
31
For all other countries apply to: Philips Semiconductors, Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
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