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Experiment #5
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Experiment #5
Counter Design Using J-K Flip-Flop
Objectives:1- To study sequential logic circuits and be familiar with the concept of the clock. 2- To design synchronous counter of a specified sequence.
Introduction:A Flip Flop is an electronic circuit that has two stable states and capable of being a memory of 1-bit data. Flip Flops have a clock input which controls their operation. Counters are built from a number of Flip Flops depending on the number of bits e.g. A counter to count from 0 to 2 needs 2 Flip Flop. Flip Flops will change state according the specified sequence when the input pulses are received.
Results & Discussion:In this experiment we design a sequential circuit with 2 JK Flip-Flops, A & B and one input X. When X=0, the circuit goes through count up states: 00 01 10 11 00 then repeat. When X=1, the circuit goes repeatedly through countdown states: 00 11 10 01 00.
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Table 2: State table Input X 0 0 0 0 1 1 1 1 Present State A 0 0 1 1 0 0 1 1 B 0 1 0 1 0 1 0 1 A+ 0 1 1 0 1 0 0 1 Next State 1 0 1 0 1 0 1 0 B+ Input Flip-Flop JA 0 1 X X 1 0 X X KA X X 0 1 X X 1 0 JB 1 X 1 X 1 X 1 X KB X 1 X 1 X 1 X 1
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We derive the JK flip-flops input equation from the next state k-maps:-
JA
xA
B
JB
xA
B
00 0 1
01 X X
11 X X
10 1 0
00 1 X
01 1 X
11 1 X
10 1 X
0 1
0 1
KA
B
xA 0 1
KB
xA
B
00 X X
01 0 1
11 1 0
10 X X
00 X 1
01 X 1
11 X 1
10 X 1
0 1
JA = XB + XB = X B
KA = XB + XB = X B JB = 1
KA = 1
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Questions:-
1) Repeat your design with D-flip flops and discuss your results. Table 3: State table Input X 0 0 0 0 1 1 1 1 Present State A 0 0 1 1 0 0 1 1 B 0 1 0 1 0 1 0 1 A+ 0 1 1 0 1 0 0 1 Next State 1 0 1 0 1 0 1 0 B+ Input Flip-Flop DA 0 1 1 0 1 0 0 1
DB
DB 1 0 1 0 1 0 1 0
DA
AB X
AB X
00 0 1 0 1
01 1 0
11 0 1
10 1 0
00 0 1 1 1
01 0 0
11 0 0
10 1 1
DA = X A B DB = B
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Conclusion:In this experiment we learn how to design a sequential logic circuit using JK flip-flop. Also, we test the circuit and compare it with the theorem tables.
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