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Analysis of the Operation of a D-STATCOM in Unbalanced Distribution Systems Under Voltage Disturbances
Gabriel R. F. Q. Mafra, Wadaed Uturbey and Braz J. Cardoso Filho, Member, IEEE

AbstractIn this paper, a study on the operation of a static synchronous compensator for distribution systems, DSTATCOM, in relation to its performance in the presence of events that can affect systems power quality, is presented. Performance under short-circuit and load variation is assessed. The IEEE 13 node test feeder, which is a highly loaded unbalanced system, is used in the study. The D-STATCOM consists mainly of a three-level inverter with IGBTs and PWM control. Modeling and simulations are implemented in Matlab/Simulink. Index Terms-- D-STATCOM, Power Quality, Unbalanced Distribution Systems.

The aim of this work is to contribute in the assessment of the D-STACOM performance in realistic distribution systems. Extensive tests of the D-STATCOM operation performance in the 13-bus IEEE distribution test system under power quality related problems, are presented. Response to short circuit and load variations are assessed through computer simulations with Matlab/Simulink. Sections II and III present the D-STATCOM and the distribution system description. The obtained simulation results are discussed in section IV and, finally, section V concludes the paper.

I. INTRODUCTION

II. DESCRIPTION OF THE D-STATCOM The D-STATCOM model adopted in this work is based on the model presented in [2], which is implemented on Simulink/Matlab as a demonstration developed by Pierre Giroux and Gilbert Sybille (Hydro-Qubec, IREQ). The model is conveniently modified in order to include an inverter topology commercially used now-a-days and to adapt its rating to the distribution system used. The block diagram is presented in Fig.1. A three-level IGBTs inverter with two 10.000 F DC capacitor banks, three 800H AC seriesconnected inductors and a coupling transformer are used. The measurement system block and control system block are also shown. In order to represent conductor losses, three 0.025 series-connected resistors are used. The D-STATCOM rated power is equal to 1MVAR and its rated voltage is equal to 4.16kV.
DC voltage measurement Three-Level Bridge Control System
g +

OWER quality related problems impose a great challenge for the distribution system, since sensitive industrial loads and critical computer-based industrial controllers may be negatively affected. Among the most common and critical power quality related problems are voltage sags, swells and interruptions. Millions of dollars are lost each year around the world due to these problems. Many power electronics based voltage regulators have been studied as solutions to mitigate voltage power quality problems. The Static Synchronous Compensator (STATCOM) is a power electronics based solution for voltage regulation and power compensation on transmission systems [1]. Many researches see it as a cost effective solution in order to mitigate power quality problems in the distribution system. Since distribution systems have quite different characteristics, for instance, they operate under unbalanced conditions and near their power limits, many studies have been done in order to adapt the STATCOM. These studies lead to several different design approaches and the equipment has been called D-STATCOM, as can be seen from [2,3,4,5]. Among the vast literature about the D-STATCOM, only a few of them explore its performance when connected to a realistic and complex distribution system.
G. R. F. Q. Mafra received an undergraduate scholarship from the Brazilian National Council for Scientific and Technological Development CNPq. G. R. F. Q. Mafra (e-mail: grmafra@gmail.com), W. Uturbey (e-mail: wadaed@cpdee.ufmg.br) and B.J. Cardoso Filho (e-mail: bcardoso@ufmg.br) are with the Electrical Engineering Department of the Federal University of Minas Gerais, Av. Antonio Carlos 6627, Pampulha, Belo Horizonte-MG, Brazil.

Three-Phase Vref V-I Measurement Vabc A

C1
v+ N

Iabc
Series Resistance A B C a b c

Va B C
2

a b c

Vb
3

C2
C

Series Inductance

Vc

Coupling Transformer

Fig. 1. The D-STATCOM structure

For the coupling transformer, the three phase model with voltage ratio equal to 1.0kV/4.16kV, -Yg connected, and rated power equal to 1MVA is used. The series-connected

inductors were necessary in order to reduce harmonic distortion on the AC side to the specified limits.
646 645 632

650

633

634

The control system, shown in Fig. 2, is based on the dq0 transformation and uses PWM technique. Fig. 3 and Fig. 4 show details of both the DC voltage control and the AC voltage control. As usual, both controllers have an inner current control loop to improve responsiveness. Further details about the control system can be found in [2] and [6].

611

684

671

692

675

652
Vabc PLL Vabc
1 Vref 4 AC voltage control Vref Vd Vq* Vq Iq VdVq Vabc* DC voltage control Vdc Vd* Vdc_ref Id 1 Vabc*

680

Fig. 5. IEEE 13 node test feeder

dq0 transformation
Vabc d

TABLE I SPOT LOAD D ATA FOR THE IEEE 13 NODE TEST FEEDER Node 634 645 646 652 671 675 692
Vd*

Iabc
2 Iabc theta

dq0 transformation
d q

Load Model Y-PQ Y-PQ D-Z Y-Z D-PQ Y-PQ D-I Y-I TOTAL

Ph-1 kW 160 0 0 128 385 485 0 0 1158

Ph-1 kVAr 110 0 0 86 220 190 0 0 606

Ph-2 kW 120 170 230 0 385 68 0 0 973

Ph-2 kVAr 90 125 132 0 220 60 0 0 627

Ph-3 kW 120 0 0 0 385 290 170 170 1135

Ph-3 kVAr 90 0 0 0 220 212 151 80 753

Vdc_measured
3 Vdc_ref

Fig. 2. The D-STATCOM control system overview

Id Vdc ref
2 1

Discrete 3 PI Controller Id* PI

PID Discrete PID Controller

611

Vdc_measured

Fig. 3. The DC voltage control block diagram

Vref
1

TABLE II DISTRIBUTED LOAD DATA FOR THE IEEE 13 NODE TEST FEEDER Node A Node B
Vq*

Iq
4 Iq* PI Discrete PI Controller

Vd
2

Magnitude
d magnitude q

Load Ph-1 Ph-1 Ph-2 Ph-2 Ph-3 Ph-3 Model kW kVAr kW kVAr kW kVAr Y-PQ 17 10 66 38 117 68

Iq*

PID

Vq
3

632

671

Discrete PID Controller

Fig. 4. The AC voltage control block diagram

III. DISTRIBUTION SYSTEM MODEL The IEEE 13 node test feeder [7], shown in Fig. 5, is chosen in order to illustrate the D-STATCOM performance in a highly loaded and unbalanced system. This system has a 115kV/4.16kV substation and a voltage regulator connected between bus #650 and bus #632. There are overhead and underground lines with variety of phasing, capacitor banks and balanced and unbalanced loads. These characteristics make this system very interesting in order to analyze the DSTATCOM operation. More details about the system can be seen in [7]. The load data can be seen in Table I and Table II. The test system includes a distributed load, presented in Table II, which in this study is approximated by a load concentrated in the middle of the line that connects nodes #632 and #671.

A. Load model The system has constant impedance, constant current and also constant power loads. In this study, the load models are implemented as single-phase blocks that can be connected in delta or wye and can be balanced or unbalanced. The constant impedance loads are implemented using the standard load blocks from Simulink. The constant current and constant power loads are modeled using current sources. The inputs to these current sources are the instantaneous values of the desired currents. Fig. 6 presents the block diagram for the constant power load. Voltages at the current source are measured and the instantaneous current is determined in order to obtain the given apparent power and power factor. For voltage and current synchronization, a PLL is used. The constant current load block structure is similar to the diagram in Fig. 6. In this case, the RMS voltage is not used, since load current peak value is given, only a synchronized signal is necessary.

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1 V+

Voltage Measurement
v+ -

s +

Controlled Current Source

RMS

Unit Delay 1 z

V- 2

-CApparent Power Power factor angle -Csin Trigonometric Function Discrete 1-phase PLL -C- SQRT(2)

V(pu) wt

-CNominal Voltage

Fig. 6. Block diagram for the constant power load

B. Line Model Since low frequencies are involved in the study (IGBTs switching frequency is 1680 Hz) and distribution lines are short, a concentrated parameters line model is adopted. In [8], lines are modeled by an impedance matrix, which represents the lines self and mutual impedances and self and mutual resistances. Also, a set of discrete capacitors connected to its terminals, which represent the line-to-line and line-toground capacitances, are included in the model [9]. The implementation in Simulink is straightforward, since a mutual impedance model is available. Fig. 7 shows the line model diagram.
1 A 3 B 5 C 2 a 4 b 6 c

A. Line-to-ground fault The first case study explores the D-STATCOM performance under short-circuit in a certain node. It is supposed that a line-to-ground fault occurs on node #675, phase A, with a 2.0 fault impedance. Fig. 8 and Fig. 9 show the results without the D-STATCOM. Fig. 10 and Fig. 11 present the obtained results when the D-STATCOM is connected to the system. On Fig. 8, one can notice that the short-circuit produces, on bus #675, which is the bus under short-circuit, a swell on phase B of about 20%, and a sag of more than 30% on the phase A. Fig. 9 presents voltages on bus #671, which are also disturbed. One can observe on Fig. 10 that, with the D-STATCOM connected on bus #671, the swell on phase B was significantly mitigated and the resulting voltage is not characterized as a swell anymore, as it presents an overvoltage equal to less than 10% of the rated voltage [10]. Notice that the sag was significantly reduced with the D-STATCOM, since phase A voltage is above 80% of the rated voltage and, therefore, it is less harmful to sensitive equipments. However, it is still characterized as sag, as it is equal to less than 90% of rated voltage.
RMS Voltage on bus 675 1.2

1.1

Voltage (pu)

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

Fig. 7. The line model using Simulinks power system blockset

Fig. 8. RMS voltages on bus #675, when a line-to-phase short-circuit occurs on phase A in this bus, without the D-STATCOM
RMS Voltage on bus 671 1.2

With the impedance matrices and the admittance matrices available in the IEEE 13 node test system documentation [7], it is possible to obtain the values for these components, as described in [8,9].
Voltage (pu)

1.1

IV. SIMULATION RESULTS Three case studies, with different voltage disturbances, are presented. For comparison purposes, all simulations are accomplished with and without the D-STATCOM. In all cases the D-STATCOM is connected to node #671, since it is the last node in the main feeder which has loads directly connected to it. The voltage is measured at all nodes of the system. However, only voltages at node #671 and at the node in which the disturbance is generated are shown. In order to clarify the discussion, voltages are presented using rms values. Simulation results are shown from 0.2s to 0.5s, events that generate power quality problems occur during a 100ms time period starting at 0.3s.

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

Fig. 9. RMS voltages on bus #671 when a line-to-phase short-circuit occurs on bus #675, phase A, without the D-STATCOM.

RMS Voltage on bus 675 1.2 1.2

RMS Voltage on bus 671

1.1

1.1

Voltage (pu)

1
Voltage (pu)

0.9

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.7

0.6 0.2

0.6 0.2

Fig. 10. RMS voltages on bus #675, when a line-to-phase short-circuit occurs on phase A in this bus, with the D-STATCOM connected at bus #671.
RMS Voltage on bus 671 1.2

Fig. 13. RMS voltages on bus #671 under an unbalanced load variation at bus #611, without the D-STATCOM.
RMS Voltage on bus 611 1.2

1.1

1.1

Voltage (pu)

1
Voltage (pu)

0.9

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.7

0.6 0.2

0.6 0.2

Fig. 11. RMS voltages on bus #671 when a line-to-phase short-circuit occurs on phase A at bus #675, with the D-STATCOM connected at bus #671.

Fig. 14. RMS voltage on bus #611 under unbalanced load variation in this same bus, with the D-STATCOM connected at node #671.
RMS Voltage on bus 671 1.2

B. Unbalanced load variation The second case study considers that a single-phase load increase equal to 500kVA, with a 5ms time constant and power factor equal to 0.85 lagging, occurs at phase C, node #611, during 100ms. Fig. 12 and Fig. 13 present voltages at node #611 and node #671 without the D-STATCOM. Notice that a voltage sag of 20% occurs at node #611, phase C. On Fig. 13, which presents voltages at three-phase node #671, can be noticed that the load variation affects mainly phase C. Fig. 14 and Fig. 15 show the effect that the D-STATCOM produces on the voltages at the same nodes. One can notice that phase C voltage sag is eliminated with the D-STATCOM in both nodes. In addition, in Fig. 15 can be noticed that voltage unbalance is reduced at node #671.
RMS Voltage on bus 611 1.2

1.1

Voltage (pu)

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

Fig. 15. RMS voltage on bus #671 under unbalanced load variation on bus #611, with the D-STATCOM at node #671.

1.1

Voltage (pu)

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

Fig. 12. RMS voltage on bus #611 (single-phase) under an unbalanced load variation, without the D-STATCOM.

C. Balanced load variation This section illustrates the D-STATCOM performance under balanced load increase with different time constant. Two cases are simulated; initially, a 1MVA wye balanced load variation, power factor equal to 0.85 lagging, with time constant equal to 1 ms occurs at node #675. Secondly, is supposed that the same load variation occurs with time constant equal to 20ms. Fig. 16 and Fig. 17 present voltages at nodes #675 and node #671, when the time constant of the load variation is 1ms, without the D-STATCOM. Fig. 18 and Fig. 19 present the same voltages when the D-STATCOM is connected to bus #671.

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RMS Voltage on bus 675 1.2

1.1

Voltage (pu)

0.9

0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

Fig. 16. RMS voltage on bus #675 under 1ms time constant balanced load variation, without the D-STATCOM.
RMS Voltage on bus 671

Fig. 19 and Fig 20 present voltages at nodes #675 and node #671, when the time constant of the load variation is 20 ms, without the D-STATCOM. Fig. 21 and Fig. 22 present the same voltages when the D-STATCOM is connected to bus #671. In both cases, one can observe that the D-STATCOM improves the voltage profile and restores voltages to previous stationary values. On Fig. 22 and Fig. 23, with load time constant equal to 20ms, the D-STATCOM compensates the load variation without voltage oscillations. One can observe that, when load variation is faster, like on Fig. 18 and Fig. 19, higher voltage oscillations are obtained, as expected.
RMS Voltage on bus 675 1.2

1.2 1.1 1.1

Voltage (pu)

Voltage (pu)

0.9

0.9

0.8 0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5 0.7 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

0.6 0.2

Fig. 17. RMS voltage on bus #671 under 1ms time constant balanced load variation, without the D-STATCOM.
RMS Voltage on bus 675

Fig. 20. RMS voltage on bus #675 under 20ms time constant balanced load variation, without the D-STATCOM.
RMS Voltage on bus 671 1.2

1.2 1.1 1.1

Voltage (pu)

Voltage (pu)

0.9

0.9

0.8 0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5 0.7 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

0.6 0.2

Fig. 18. RMS voltage on bus #675 under 1ms time constant balanced load variation, with the D-STATCOM connected at node #671.
RMS Voltage on bus 671

Fig. 21. RMS voltage on bus #671 under 20ms time constant balanced load variation, without the D-STATCOM.
RMS Voltage on bus 675 1.2

1.2 1.1 1.1

Voltage (pu)

Voltage (pu)

0.9

0.9

0.8 0.8 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5 0.7 phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.7

0.6 0.2

0.6 0.2

Fig. 19. RMS voltage on bus #671 under 1ms time constant balanced load variation, with the D-STATCOM connected in this node.

Fig. 22. RMS voltage on bus #675 under 20ms time constant balanced load variation, with the D-STATCOM connected at node #671.

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RMS Voltage on bus 671 1.2

[9]

1.1

A. E. A. de Arajo, and W. L. A. Neves, Clculo de Transitrios Eletromagnticos em Sistemas de Energia. Belo Horizonte: Editora UFMG, 2005, pp. 235-254. [10] IEEE Recommended Practice for Electric Power Quality, IEEE 11591995, Mar. 2009.

Voltage (pu)

0.9

VII. BIOGRAPHIES
phase A phase B phase C 0.25 0.3 0.35 time (s) 0.4 0.45 0.5

0.8

0.7

0.6 0.2

Fig. 23. RMS voltage on bus #671 under 20ms time constant balanced load variation, with the D-STATCOM connected at this node.

Gabriel R. F. Q. Mafra is currently an undergraduate student at the Electrical Engineering Course of the Universidade Federal de Minas Gerais in Belo Horizonte, Brazil. He received an undergraduate scholarship from the Brazilian National Council for Scientific and Technological Development CNPq during Aug. 2008 Jul. 2010 in order to develop this research. His research interests include power quality and power electronics. Wadaed Uturbey received her degree in Electrical Engineering from UDELAR, Uruguay, in 1991, the M.Sc. and Dr. Eng. degree from Federal University of Santa Catarina, Brazil, in 1995 and 2002, respectively. She is currently an assistant professor at the Department of Electrical Engineering of the Universidade Federal de Minas Gerais, Brazil. Her research interests include power quality and computer modeling of flexible ac transmission systems (FACTS) devices. Braz J. Cardoso Filho received the Electrical Engineer degree (Lcio dos Santos AwardGold Medal) and the Masters degree in electrical engineering from the Universidade Federal de Minas Gerais, Belo Horizonte, Brazil, in 1987 and 1991, respectively, and the Ph.D. degree in electrical engineering from the University of Wisconsin, Madison, in 1998. Since 1989, he has been with the Department of Electrical Engineering, Universidade Federal de Minas Gerais where he founded the Industry Applications Laboratory. His current research and technical interests are in utility applications of power electronics, high-power converters and drives, and semiconductor power devices.

V. CONCLUSIONS This work presented simulation results for a D-STATCOM operating in a typical unbalanced distribution test system. Simulations were conducted in order to assess the DSTATCOM performance under balanced and unbalanced disturbances. A commercially available D-STATCOM topology was chosen. In addition, a standard control system was used, in order to illustrate that, in general, good solutions for power quality related problems can be obtained without resorting to more complex and specific problem-oriented control systems. The DC voltage, although not shown, was in all cases, stable with low ripple. Controller parameters did not have to be modified for different situations in order to perform satisfactorily. Finally, it can be concluded that the D-STATCOM used in this study can contribute significantly to the improvement of power quality in unbalanced distribution systems.

VI. REFERENCES
[1] N. G. Hingorani, and L. Gyugyi, Understanding Facts: Concepts and Technology of Flexible AC Transmission Systems. Wiley-IEEE Press, December 1999. P. Giroux, G. Sybille, and H. Le-Huy, Modeling and Simulation of a Distribution STATCOM using Simulinks Power System Blockset, in IECONOl: The 27th Annual Conference of the IEEE Industrial Electronics Society, pp. 990-994. C. Hochgraf, and R. H. Lasseter, Statcom Controls for Operation with Unbalanced Voltages, IEEE Transactions on Power Delivery, vol. 13, No. 2, April 1998. M. T. Bina, and M. D. Eskandari, Consequence of Unbalance Supplying Condition on a Distribution Static Compensator, in 35th Annual IEEE Power electronics Specialists Conference, pp. 3900-3904. B. Blai, and I. Papi, Improved D-StatCom Control for Operation With Unbalanced Currents and Voltages, IEEE Transactions on Power Delivery, vol. 21, No. 1, January 2006. M. B. C. Salles, W. Freitas, and A. Morelato, Comparative Analysis between SVC and DSTATCOM Devices for Improvement of Induction Generator Stability, IEEE MELECON 2004, pp. 1025-1028, May 2004. IEEE PES Distribution System Analysis Subcommittee, Radial Distribution Test Feeders [online]. Available: http://ewh.ieee.org/soc/pes/dsacom/testfeeders/index.html R. M. Ciric, and A. P. Feltrin, Power Flow in Four-Wire Distribution Networks General Approach, IEEE Transactions on Power Systems, vol. 18, No. 4, pp. 1283-1290, November 2003.

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