A FPGA based TDEMI measurement system for quasi-peak detection and disturbance analysis

Stephan Braun, Peter Russer

Lehrstuhl f r Hochfrequenztechnik Technische Universit t M nchen u a u M nchen, Germany 80333 u Email: stephan.braun@tum.de, russer@tum.de II. TDEMI MEASUREMENT SYSTEM In Fig. 1 the block diagram of the TDEMI measurement system is shown. The EMI signal is received by an antenna or Line Impedance Stabilization Network (LISN), amplied by a low noise amplier (LNA) and low-pass ltered by an anti-aliasing lter. The input signal is digitized by an analogto-digital converter (ADC). The recording unit, the maximum detector as well as the trigger unit are implemented on a Field Programmable Gate Array (FPGA). In the recording mode individual samples are stored temporarily in the Static Random Access Memory (SRAM). In the maximum detection mode the signal is sampled into several consecutive intervals. The maximum of the amplitude of each interval is calculated and stored into the SRAM. The FPGA is connected via a 16-Bit
LISN

Abstract Measurement equipment that allows to measure electromagnetic interference (EMI) in short measurement time allows to reduce the costs and the time-to-market. By a timedomain EMI (TDEMI) measurement the measurement time can be reduced by several orders of magnitude. In the following a novel trigger unit and recording algorithm for a TDEMI measurement system is described. The trigger unit triggers on signal parts that have a maximum amplitude between a certain preselected interval. The maximum detector unit allows to measure and store the maximum amplitude of the signal within a preselected time interval. The maxima of consecutive time intervals are stored. The signal is processed in real-time for several seconds. Recorded signal parts are assigned according to their maximum amplitude to a certain point in time. The original signal is reconstructed. A time-dependent spectrum for several seconds is calculated. The signal corresponding to the envelope of the IF-signal of an EMI Receiver is extracted at each discrete spectral value. An analysis with the Quasi-Peak-Detector as well as the Disturbance Analyzer is now possible. Measurements were performed in the Quasi-Peak-Detector mode and compared with results obtained by an EMI-Receiver. Also the demodulated IFSignal of the EMI-Receiver is compared with the reconstructed IF-Signal of the TDEMI measurement system.

ADC

FPGA

USB 2.0 Controller

PC

SRAM

Fig. 1.

Time-domain EMI Measurement System

I. I NTRODUCTION A time-domain EMI measurement (TDEMI) system that performs a Quasi-Peak-Detection has been presented in [1]. The system generates a time-dependent spectrum statistically equivalent to the original signal. The time intervals between pulses as well as the pulse positions are statistically equivalent to the original signal. One drawback of this method is that it is not possible to perform an analysis of the IF-signal at each frequency as performed with by a disturbance analyzer. In the following a trigger unit and an algorithm are described that allow to reconstruct the original pulse train of the original signal. The input signal is sampled into several intervals. Within each time interval the maximum of the signal amplitude is recorded. A signal consisting of the stored consecutive maxima is created. A discretization according to the number of selected amplitude intervals is performed. This discretized signal describes at which point in time a signal with a certain maximum amplitude has occurred. Single shot measurements of individual samples are performed. The samples are assigned to certain amplitude intervals according to their calculated maximum amplitude. The original signal is reconstructed by placing the recorded samples according to their maximum amplitude at that point of time, where it corresponds to the descretized signal of the consecutive maxima.

Bus Interface to a microcontroller with integrated USB 2.0 Interface. The microcontroller is controlled by a conventional PC via USB. Stored data is transferred in high-speed mode to the PC for post processing. In Fig. 2 the picture of the realized system is shown.

Fig. 2.

Time-domain EMI Measurement System

III. A NALOG - TO - DIGITAL CONVERSION Analog-to-digital conversion is performed by a 12-Bit Analog-to-Digital Converter (ADC) at 200 MS/s. The FPGA has to process a data stream of 400 MByte/s in realtime. The used ADC is a ash-type ADC. The ADC is connected via Low Voltage Differential Signalling (LVDS) to the FPGA. Differential signalling with matched transmission lines and
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termination is used to minimize crosstalk between the analog and digital section of the Printed Circuit Board (PCB). In the following the performance of the implemented ADC unit is investigated and characterized. A. Noise Floor In Fig. 3 the spectrum of the noise oor with a modelled IFBandwidth of 9 kHz and 120 kHz is shown. The measurement was performed without a low-pass lter and a pre-amplier. The spectrum is evaluated under the peak- and quasi-peakdetector modes for a scantime of 2 s. The spectrum shown in
30 25 Magnitude / dBV 20 15 10 5 0

The power of the quantization noise is given by (4) (4) 12 with as the quantization step of the analog-to-digitalconverter (ADC). 1) Window function: The digitized signal x[n] is the re sult of the superposition of the original signal x[n] and the quantization noise e[n]. We obtain: z[n] = x[n] w[n] = x[n] w[n] + e[n] w[n] (5)
2 PN oise = e = 2

e[n] is described as a statistical signal with constant probability density function in the interval [ 2 ; + 2 ] according to a midriser quantization [4]. Applying (2) and (3) we obtain a SNR for each calculated spectrum: SN R = For e[n] (6): SN R
70 80 90
1 N 1 N N x n=1 ([n] N n=1 (e[n]

w[n] w[n]

1 N 1 N

N k=1 N k=1

x[k] w[k])2 e[k] w[k])2

(6)

x[n] we can replace x[n] by x[n] and obtain with

1 N 1 N N n=1 (x[n] N n=1 (e[n]

TDEMI QP Accurate 9kHz TDEMI QP Accurate 120kHz TDEMI Peak Accurate 120kHz TDEMI Peak 9kHz 10 20 30 40 50 60 Frequency / MHz

w[n] w[n]

1 N 1 N

N k=1 N k=1

x[k] w[k])2 e[k] w[k])2

(7)

C. Stationary signal During the last sections the SNR and dynamic range for transient signal was investigated. In the following the SNR for stationary signal is presented. 1) Signal-to-noise ratio: Stationary signal has a constant power over the time. Thus the SNR is constant. With (3) and (4) we obtain a constant signal to noise ratio of: SN R = 12 (x(t) x(t) )2
2

Fig. 3.

Noise Floor

Fig. 3 is completely uniform over the whole frequency range. B. Spurious Signals Spurious Signals are crucial for EMI measurements. According to CISPR 16-1 [2] spurious signals may only contribute to a maximum measurement error of 1 dB. Thus any spurious signal has to be below 1 dB of the total measurement range. Commercial available oscilloscopes show spurious signals that are up to 15 dB above the noise oor. In Fig. 3 no spurious signals can be seen over the whole frequency range. IV. S IGNAL - TO - NOISE RATIO In the following the signal-to-noise ratio (SNR) of the TDEMI Measurement System is investigated. A. Short-time fast Fourier transform In order to obtain a time dependent spectrum the STFFT [3] is applied. A time dependent spectrum can be described as consecutive spectra. These spectra are calculated by the DFT, using a time interval smaller than the total record length. TsBB corresponds with the increment used in the STFFT [3]. TsBB = 1 fsBB (1)

(8)

2) Dynamic range: With the modelled IF-lter we get at each discrete spectral value a SNR according to (9). Bs (9) BIF Bs is the total bandwidth of the measurement system and BIF is the equivalent noise bandwidth [5] of the IF-Filter. SN RIF = SN R V. D IGITAL I NTERFACE A. Field Programmable Gate Array A Field Programmable Gate Array (FPGA) was used to implement the digital interface as well as digital signal processing. The used FPGA provides 150 000 logic gates. For the actual Implementation only 10 percent of the logic gates where used. Thus we have the possibility to add further features via updates. B. Universal Serial Bus The the High Speed Universal Serial Bus (USB) interface was implemented with a microcontroller with integrated USB 2.0 interface. The High Speed Mode provides a maximum data rate of 480 Mbps. The microcontroller of the used interface uses the instruction set of a 8051 microcontroller. For this microcontroller a controlling software (rmware) was developed that allows to perform the high-speed data transfers of recorded samples from the Analog-to-Digital Converter system to the PC. The different modes of the Analog-toDigital Converter system are controlled by the microcontroller.
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fsBB is the baseband sampling frequency, that is used to simulate peak-, average-, rms-, and quasi-peak-detector. B. Signal-to-noise ratio For a general signal the SNR is given by [4]: SN R = PSignal PN oise (2)

while the power of the signal is given by (3):

2 PSignal = s = (x(t) x(t) )2

(3)

214

The rmware is stored onto an EEPROM and is booted during the power on. An estimation of the achieved data transfer rate r is given by N b r= (10) t where N is the number of transfered samples and b is the resolution in bit. Table I shows the data throughput for the USB 2.0 Interface in comparison to standard measurement interfaces like GPIB and Ethernet.
samples N resolution b time t transfer rate r GPIB 200000 8 Bit 0,37 s 0,5 Mbyte/s Ethernet 200000 8 Bit 0,11 s 1,8 Mbyte/s USB 2.0 200000 16 Bit 0,047 s 8,5 Mbyte/s

to minimize any spurious emissions from the signal lines to the analog signal. The signal is demultiplexed by the FPGA and transferred to the SRAM. This unit is used to perform single shot measurements with the length n. B. Trigger Unit The signal is provided simultaneously to the internal trigger unit. The digital trigger unit processes the input signal in real-time. If the signal crosses a certain selectable threshold a trigger event is generated. This threshold corresponds to the trigger level of an analogue trigger unit. Post- and pre triggering is implemented by an internal counter that generates from the trigger event an output signal for the ADC unit with a certain delay in time. C. Maximum detector unit During the maximum detection mode the signal is passed directly to the maximum detector unit. The signal is separated into different samples of the length n. The signal d[k] describing the transient behavior of the input signal is calculated according to (11) where N is the total number of samples. N 1} (11) n The signal is stored into the SRAM. The input signal with a data rate of 400 Mbyte/s is processed in realtime for several seconds. Afterwards it is transferred via USB to the PC for post-processing. d[k] = maxi=kn (s[i])
n(k+1)

TABLE I OVERVIEW OVER DATA RATES

The results show, USB 2.0 reaches a data transfer rate of about 8.5 Mbyte/s which is an improvement of a factor of 5 in comparison to Ethernet and 17 in comparison to GPIB. VI. D IGITAL SIGNAL PROCESSING The input signal is processed in real-time by several components that were realized in the FPGA. In Fig. 4 the block
SRAM FPGA
Max Detector Unit Recording Unit Trigger Unit Interface and Controller

k = {0..

VII. R ECONSTRUCTION OF ORIGINAL SIGNAL In this section an algorithm is described that reconstructs the original transient signal. During this reconstruction the recorded transients are assigned to certain points in time.
USBController PC

Digital RF

A. Analysis of transient behavior First a measurement of the input signal is performed in the maximum detection mode. Typically the input signal is recorded for two seconds. The whole used amplitude scale is divided into several intervals. The output signal d[k] is discretized according to the intervals. An example is shown in Fig. 5.
50 40 d[k] 30 20 10 0 0 0.5
Fig. 5.

Fig. 4.

Signal processing blocks

diagram of the different signal processing blocks are depicted. The recording unit supports the recording of individual samples and is controlled by the trigger unit. Triggered data acquisition [6] is used to trigger on single transients. In state of the art oscilloscopes triggering is done by a separate analogue trigger unit. In the following a trigger unit is described that is fully implemented digitally on the FPGA. In the past a trigger mode called Fast-Frame [7] was used to characterize transient signal for a longer duration of time. Several measurements at different amplitude resolutions have to be performed to obtain the transient behavior for the full amplitude scale. The drawback was that the original pulse train could not be reconstructed. The implemented FPGA-integrated maximum detector unit separates the input signal into several samples. Of each sample the maximum value is calculated and stored. Only a single measurement is necessary to obtain the transient behavior for the complete amplitude scale over the complete dwell time. A. Recording Unit By the Recording Unit the signal is digitized with 12 Bit and 200 MS/s. The ADC is connected via LVDS to the FPGA

1
Maximum detected signal

1.5

B. Single shot measurement The measurement of individual samples is performed by the recording unit. During this recording the trigger unit is set up to trigger only on signals that have a maximum amplitude within a preselected amplitude interval. Several samples are recorded at each amplitude interval. All amplitude
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Level / dBV

intervals assigned by the signal d[k] are selected during the measurement of individual samples. At each amplitude interval the number of recorded samples is reduced. This is done by eliminating similar samples. Samples are similar if the maximum of the cross correlation function of the power spectra is higher than a preselected threshold. We obtain the relative frequency of each sample by counting the similar samples. C. Distribution of samples on the timescale The samples are distributed on the timescale according to the signal d[k]. Samples are placed on the timescale where they match to the amplitude interval given by d[k]. Within an amplitude interval the pulses are placed according to their relative frequency. VIII. M EASUREMENT R ESULTS The total measurement time was evaluated. The measurement time is compared with a conventional EMI Receiver in the Quasi-Peak-Detector mode and a dwell time of 2 s.
Measurement of time intervals Recording of 50 signal samples Measurement time STFFT Statistical Calculations Peak-Detection Quasi-Peak-Detection Calculation time Total measurement time: TABLE II M EASUREMENT TIME TDEMI 2s 1:20 s 1:22 min 1 min 10 s 5 s min 40 s min 1:55 min 3:17 min ESCS30 3:33 h 3:33 h

with the reconstructed IF-Signal of the TDEMI measurement system. During the measurement 50 amplitude intervals were selected. In Fig. 7 the result is shown. The time intervals
ESCS 30 70 60 50 40 30 20

0.2

0.4

0.6

0.8 time / s TDEMI

1.2

1.4

70 60
Level / dBV

50 40 30 20

0.8

1.2 time / s

1.4

1.6

1.8

Fig. 7.

IF-Signal

between pulses is within a accuracy of 40 s the same as measured with the EMI-Receiver. The amplitude of the IFsignal shows a maximum deviation of 8 dB. The average deviation is below 3 dB. IX. C ONCLUSION A TDEMI measurement system that can perform a QuasiPeak-Detection as well as a disturbance analysis has been presented. Measurement results show an average deviation of the IF-Signal about 3 dB. The reconstructed IF-Signal is provided by the TDEMI Measurement System at all scanned frequencies in parallel. Measurements performed in the QuasiPeak-Detector mode show a maximum difference of 2 dB in comparison to the measurements obtained with an EMIReceiver. The measurement time is reduced by a factor of 60. ACKNOWLEDGMENT The authors would like to thank Reinhard Schneider for the development of the USB-Interface. R EFERENCES
[1] S. Braun, F. Krug, and P. Russer, A novel automatic digital quasi-peak detector for a time domain measurement system, in 2004 IEEE International Symposium On Electromagnetic Compatibility Digest, August 914, Santa Clara, USA, 2004. [2] CISPR16-1, Specication for radio disturbance and immunity measuring apparatus and methods Part 1: Radio disturbance and immunity measuring apparatus. International Electrotechnical Commission, 1999. [3] L. Cohen, Time-Frequency Distributions - A Review, in Proceeding of the IEEE, vol. 77, no. 7, pp. 941981, 1989. [4] A. V. Oppenheim and R. W. Schafer, DiscreteTime Signal Processing. ISBN 0-13-214107-8, Prentice-Hall, 1999. [5] F. Krug, D. Mueller, and P. Russer, Statistical Physical Noise Behavior Analysis of the Time Domain EMI Measurement System, in 2003 IEEE AP-S International Symposium on Antennas and Propagation, 2227.06.2003, Columbus, USA, vol. 3, pp. 212215, 2003. [6] F. Krug and P. Russer, Signal Processing Methods for Time Domain EMI Measurements, in 2003 IEEE International Symposium On Electromagnetic Compatibility Digest, May 1116, Istanbul, Turkey, pp. , no. THPR2.8, 2003. [7] Tektronix, Digital Phosphor Osciloscopes - TDS7000 Series. Data sheet, 2001.

The measurement of the EMI originating from a drill machine was with a LISN for conducted emission measurement. The measurement has been carried out in the 150 kHz 30 MHz frequency range. In Fig. 6 result of the measurement in the Quasi-Peak-Detector mode is shown. The maximum difference between the result obtained with the EMI Receiver and the measurement result obtained with the FPGA based TDEMI measurement system is 2 dB.
80 75 70 Magnitude / dBV 65 60 55 50 45 40 35 5 10 15 20 Frequency / MHz 25 30 TDEMI QP ESCS30 QP

Fig. 6.

Drill Machine

For disturbance analysis the signal at the IF-Frequency is fed to an external disturbance analyzer. In the following the demodulated IF-Signal of an EMI Receiver is compared

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