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A power FET can parallel two or more devices at relatively high power levels. This technique is considered impractical for bipolar transistors due to their low input impedance. The limit to the number of power.FE Ts that can be paralleled is dictated by physical, rather than electrical restrictions.
A power FET can parallel two or more devices at relatively high power levels. This technique is considered impractical for bipolar transistors due to their low input impedance. The limit to the number of power.FE Ts that can be paralleled is dictated by physical, rather than electrical restrictions.
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A power FET can parallel two or more devices at relatively high power levels. This technique is considered impractical for bipolar transistors due to their low input impedance. The limit to the number of power.FE Ts that can be paralleled is dictated by physical, rather than electrical restrictions.
Droits d'auteur :
Attribution Non-Commercial (BY-NC)
Formats disponibles
Téléchargez comme PDF, TXT ou lisez en ligne sur Scribd